[llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 8 05:04:22 PST 2026
================
@@ -29751,10 +29745,80 @@ static SDValue LowerFMINIMUM_FMAXIMUM(SDValue Op, const X86Subtarget &Subtarget,
SDValue MinMax = DAG.getNode(MinMaxOp, DL, VT, NewX, NewY, Op->getFlags());
+ // We handle signed-zero ordering by taking the larger (or smaller) sign bit.
+ if (ShouldHandleZeros) {
+ const fltSemantics &Sem = VT.getFltSemantics();
+ unsigned EltBits = VT.getScalarSizeInBits();
+ bool IsFakeVector = !VT.isVector();
+ MVT LogicVT = VT.getSimpleVT();
+ if (IsFakeVector)
+ LogicVT = (VT == MVT::f64) ? MVT::v2f64
----------------
arsenm wrote:
```suggestion
LogicVT = VT == MVT::f64 ? MVT::v2f64
```
https://github.com/llvm/llvm-project/pull/170069
More information about the llvm-commits
mailing list