The Week Of Monday 20 July 2026 Archives by date

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Starting: Mon Jul 20 00:05:52 PDT 2026
Ending: Sun Jul 26 23:59:23 PDT 2026
Messages: 6337

• [llvm] [polly] [LoopInfo] Add an opaque LoopRef handle and stop exposing loop containers (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy][COFF] Support --rename-section (PR #210573)   James Henderson via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [lld] e2572b8 - [LLD][RISCV][Zicfilp] Generate unlabeled landing pad-style PLT (#145461)   via llvm-commits
• [lld] [LLD][RISCV][Zicfilp] Generate unlabeled landing pad-style PLT (PR #145461)   Piyou Chen via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (NFC) (PR #210647)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (NFC) (PR #210647)   Piotr Fusik via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   via llvm-commits
• [llvm] [llvm-readobj] Print all callgraph sections (PR #198929)   James Henderson via llvm-commits
• [llvm] 21d537e - [LV][Test] Rename conflicting IR values to avoid FileCheck conflicts. nfc (#210293)   via llvm-commits
• [llvm] [LV][Test] Rename conflicting IR values to avoid FileCheck conflicts. nfc (PR #210293)   Mel Chen via llvm-commits
• [clang] [llvm] [X86] Add ACE v1 (AI Compute Extensions) support (PR #208408)   Arun Thangamani via llvm-commits
• [llvm] Fix validate checkout (PR #210471)   Cullen Rhodes via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (NFC) (PR #210647)   Mayank Solanki via llvm-commits
• [llvm] [BOLT][DebugInfo] Add DWARF64 support for BOLT (PR #206437)   via llvm-commits
• [llvm] [polly] [LoopInfo] Add an opaque LoopRef handle and stop exposing loop containers (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [libc] [llvm] [libc] Fix sockatmark test (PR #210655)   Pavel Labath via llvm-commits
• [libc] [llvm] [libc] Port process utilities to hermetic mode and enable some tests (PR #209999)   Pavel Labath via llvm-commits
• [libc] [llvm] [libc] Fix sockatmark test (PR #210655)   via llvm-commits
• [llvm] [AMDGPU] merge 16bit mov pairs in post-RA peephole (PR #208625)   Jay Foad via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] ba9a115 - [AArch64] Fold vector shifts guarded against oversized amounts into USHL (#207628)   via llvm-commits
• [llvm] [AArch64] Fold vector shifts guarded against oversized amounts into USHL (PR #207628)   David Green via llvm-commits
• [llvm] [BOLT][DebugInfo] Add DWARF64 support for BOLT (PR #206437)   via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (PR #208414)   David Green via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Florian Hahn via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Florian Hahn via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (NFC) (PR #210647)   Piotr Fusik via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Add more inline memcpy and memmove tests (NFC) (PR #210263)   David Green via llvm-commits
• [llvm] [LoopInterchange] Supported partially-perfect Loop Nests (PR #199511)   Rohit Garg via llvm-commits
• [llvm] [AggressiveInstCombine] Emit branchless MSB index for de Bruijn ctlz tables (PR #210633)   Craig Topper via llvm-commits
• [llvm] [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (PR #163501)   Jim Lin via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (NFC) (PR #210647)   Mayank Solanki via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (PR #210647)   Mayank Solanki via llvm-commits
• [llvm] [AArch64] Fold vector shifts guarded against oversized amounts into USHL (PR #207628)   LLVM Continuous Integration via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (PR #210647)   Mayank Solanki via llvm-commits
• [llvm] [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (PR #163501)   via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (PR #208414)   Kamlesh Kumar via llvm-commits
• [llvm] [Coroutines] Only rematerialize when operands are available after the suspend (PR #209195)   Weibo He via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (PR #210647)   Mayank Solanki via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (PR #163501)   Jim Lin via llvm-commits
• [llvm] [ADT] ImutAVLFactory: avoid overhead of vector for freelist (PR #196534)   Gábor Horváth via llvm-commits
• [llvm] [libc][bazel] Add missing arpa/inet functions and tests (PR #210310)   Pavel Labath via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (PR #210522)   Hongyu Chen via llvm-commits
• [llvm] [GVN] Canonicalize null values in `createConstantExpression` (PR #200160)   Iris Shi via llvm-commits
• [llvm] [RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (PR #210522)   Hongyu Chen via llvm-commits
• [llvm] [LLVM] Remove SVEIntrinsicOpts pass. (PR #210368)   Sander de Smalen via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (PR #163501)   Jim Lin via llvm-commits
• [llvm] [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (PR #163501)   Jim Lin via llvm-commits
• [llvm] [Hexagon] Drop NodeAddr::operator<, fix bad asserts directives (PR #210192)   Santanu Das via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Luke Lau via llvm-commits
• [llvm] [GlobalISel][AArch64] Add more inline memcpy and memmove tests (NFC) (PR #210263)   Cullen Rhodes via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Lucas Chollet via llvm-commits
• [llvm] 72e0b55 - [ConstraintSys] Solve sub-system with variables needed for query (#210432)   via llvm-commits
• [llvm] [ConstraintSys] Solve sub-system with variables needed for query (NFC) (PR #210432)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix wrong half selection in wave.shuffle lowering (PR #210661)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix wrong half selection in wave.shuffle lowering (PR #210661)   via llvm-commits
• [llvm] [RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (PR #210522)   via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Florian Hahn via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   Fangrui Song via llvm-commits
• [llvm] 37a2803 - [AArch64] Add combine for interleave deinterleave (#208414)   via llvm-commits
• [llvm] [AArch64] Add combine for interleave deinterleave (PR #208414)   David Green via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Allow cost-free cast absorption into widening instructions with multiple users (PR #210460)   David Green via llvm-commits
• [llvm] 03b5c52 - [LSROA] Add logical SROA pass (#192058)   via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (PR #206274)   Tõnu Samuel via llvm-commits
• [llvm] b8300a7 - [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (#210323)   via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Rename some functions to follow LLVM naming conventions (NFC) (PR #210332)   Momchil Velikov via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Jay Foad via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Jay Foad via llvm-commits
• [llvm] [X86] Fix XOR folding in EmitCmp (PR #210546)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Benjamin Maxwell via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Ramkumar Ramachandra via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   via llvm-commits
• [llvm] [TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (PR #206274)   Simon Pilgrim via llvm-commits
• [llvm] b9b4541 - [RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (#210522)   via llvm-commits
• [llvm] [RISCV][P-ext] Generalize lowerVECTOR_SHUFFLEAsRV32PNarrowingShift (PR #210522)   Hongyu Chen via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (PR #210647)   Piotr Fusik via llvm-commits
• [llvm] [runtimes][cmake] Keep default PIC behavior consistent in standalone build (PR #205797)   Kristina Bessonova via llvm-commits
• [llvm] [NFC][AMDGPU] Use SIInstrFlags predicates in SIMemoryLegalizer and AMDGPUBaseInfo. (PR #209821)   Valery Pykhtin via llvm-commits
• [llvm] [TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (PR #206274)   via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   Simon Pilgrim via llvm-commits
• [llvm] DAG: Use poison instead of undef in SimplifyDemandedVectorElts (PR #207788)   Björn Pettersson via llvm-commits
• [llvm] DAG: Use poison instead of undef in SimplifyDemandedVectorElts (PR #207788)   Björn Pettersson via llvm-commits
• [llvm] DAG: Use poison instead of undef in SimplifyDemandedVectorElts (PR #207788)   Björn Pettersson via llvm-commits
• [llvm] DAG: Use poison instead of undef in SimplifyDemandedVectorElts (PR #207788)   Björn Pettersson via llvm-commits
• [llvm] DAG: Use poison instead of undef in SimplifyDemandedVectorElts (PR #207788)   Björn Pettersson via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Florian Hahn via llvm-commits
• [llvm] [X86][GISEL] - Legalize G_FPTOUI & G_UITOFP for X87 (PR #155562)   Pawan Nirpal via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Florian Hahn via llvm-commits
• [llvm] RuntimeLibcalls: Rename RuntimeLibcallPredicate to RuntimeLibcallAvailability (PR #210648)   Benjamin Maxwell via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   Nikita Popov via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstSimplify] Defer to ConstantFold in simplifyInstrinsic (PR #205061)   Ramkumar Ramachandra via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [clang] [llvm] [IR] Add flags operand to structured.gep (PR #200093)   Nathan Gauër via llvm-commits
• [llvm] [InstSimplify] Defer to ConstantFold in simplifyInstrinsic (PR #205061)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Accept extractelement of a widening cast when folding image ops to a16 (PR #208207)   Barbara Mitic via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[GVN] Remove the "private" `llvm::gvn` namespace (NFC)" (PR #210666)   Momchil Velikov via llvm-commits
• [llvm] [InstSimplify] Defer to ConstantFold in simplifyInstrinsic (PR #205061)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] Revert "[GVN] Remove the "private" `llvm::gvn` namespace (NFC)" (PR #210666)   via llvm-commits
• [llvm] Revert "[GVN] Remove the "private" `llvm::gvn` namespace (NFC)" (PR #210666)   via llvm-commits
• [llvm] RuntimeLibcalls: Rename RuntimeLibcallPredicate to RuntimeLibcallAvailability (PR #210648)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Rename RuntimeLibcallPredicate to RuntimeLibcallAvailability (PR #210648)   Matt Arsenault via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   LLVM Continuous Integration via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   LLVM Continuous Integration via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Reject builtin calls if mangled argument types do not match the IR (PR #208152)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Reject builtin calls if mangled argument types do not match the IR (PR #208152)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Reject builtin calls if mangled argument types do not match the IR (PR #208152)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] RuntimeLibcalls: Rename RuntimeLibcallPredicate to RuntimeLibcallAvailability (PR #210648)   Sergei Barannikov via llvm-commits
• [llvm] [NVPTX][Rubin] Add Rubin baseline support (PR #210646)   Durgadoss R via llvm-commits
• [llvm] [ConstraintElim] decompose subtract with guard as precondition (PR #209615)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] decompose subtract with guard as precondition (PR #209615)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] decompose subtract with guard as precondition (PR #209615)   Florian Hahn via llvm-commits
• [llvm] 1c1c065 - [ConstraintElim] LSHR x, n <= x when n< bitwidth (#209583)   via llvm-commits
• [llvm] [ConstraintElim] LSHR x, n <= x when n< bitwidth (PR #209583)   Florian Hahn via llvm-commits
• [llvm] [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (PR #210667)   Antonio Frighetto via llvm-commits
• [llvm] [InstSimplify] Defer to ConstantFold in simplifyInstrinsic (PR #205061)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstSimplify] Defer to ConstantFold in simplifyInstrinsic (PR #205061)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (PR #210667)   via llvm-commits
• [llvm] [InstSimplify] Defer to ConstantFold in simplifyInstrinsic (PR #205061)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy and memset isvolatile args (PR #210669)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy and memset isvolatile args (PR #210669)   via llvm-commits
• [llvm] 9cb6db4 - Revert "[GVN] Remove the "private" `llvm::gvn` namespace (NFC)" (#210666)   via llvm-commits
• [llvm] Revert "[GVN] Remove the "private" `llvm::gvn` namespace (NFC)" (PR #210666)   Momchil Velikov via llvm-commits
• [llvm] [ADT] ImutAVLFactory: avoid overhead of vector for freelist (PR #196534)   Gábor Horváth via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [ConstraintElim] decompose subtract with guard as precondition (PR #209615)   Florian Hahn via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   via llvm-commits
• [llvm] [RISCV][P-ext] Custom legalize v4i16->v4i8 and v2i32->v2i16 truncate. (PR #210670)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Custom legalize v4i16->v4i8 and v2i32->v2i16 truncate. (PR #210670)   via llvm-commits
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• [llvm] [GlobalISel][AArch64] Add more inline memcpy and memmove tests (NFC) (PR #210263)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [GlobalISel][AArch64] Add more memcpy and memmove tests (NFC) (PR #210263)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [SCEV] Analyze constant range for Urem idiom (PR #205694)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Analyze constant range for Urem idiom (PR #205694)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Analyze constant range for Urem idiom (PR #205694)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Analyze constant range for Urem idiom (PR #205694)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Analyze constant range for Urem idiom (PR #205694)   Florian Hahn via llvm-commits
• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   LLVM Continuous Integration via llvm-commits
• [llvm] [SCEV] Use m_scev_AffineAddRec in get{Zero, Sign}ExtendExprImpl (NFC) (PR #210082)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Use m_scev_AffineAddRec in get{Zero, Sign}ExtendExprImpl (NFC) (PR #210082)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Reject fp128 and ppc_fp128 types with a diagnostic (PR #208397)   Juan Manuel Martinez Caamaño via llvm-commits
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• [llvm] [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210323)   LLVM Continuous Integration via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Harrison Hao via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Harrison Hao via llvm-commits
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• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Harrison Hao via llvm-commits
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• [llvm] [SPIR-V] Reject builtin calls if mangled argument types do not match the IR (PR #208152)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Reject builtin calls if mangled argument types do not match the IR (PR #208152)   Arseniy Obolenskiy via llvm-commits
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• [llvm] ded79d9 - [SPIR-V] Reject fp128 and ppc_fp128 types with a diagnostic (#208397)   via llvm-commits
• [llvm] [SPIR-V] Reject fp128 and ppc_fp128 types with a diagnostic (PR #208397)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Jacob Crawley via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Sander de Smalen via llvm-commits
• [llvm] [GlobalISel][AArch64] Add more memcpy and memmove tests (NFC) (PR #210263)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Jacob Crawley via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Sander de Smalen via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy and memset isvolatile args (PR #210669)   Antonio Frighetto via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   Alexey Gerenkov via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [IVDescriptors] Fix the message of llvm_unreachable. nfc (PR #168509)   Florian Hahn via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   Alexey Gerenkov via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Harrison Hao via llvm-commits
• [llvm] [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (PR #210667)   Nikita Popov via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Harrison Hao via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Harrison Hao via llvm-commits
• [llvm] [AArch64] Keep v16i8 -> v2i64 partial_reduce fixed-length for VL > 128 (PR #204938)   Matthew Blewitt via llvm-commits
• [llvm] [AArch64] Keep v16i8 -> v2i64 partial_reduce fixed-length for VL > 128 (PR #204938)   Matthew Blewitt via llvm-commits
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• [llvm] [AArch64] Keep v16i8 -> v2i64 partial_reduce fixed-length for VL > 128 (PR #204938)   Matthew Blewitt via llvm-commits
• [llvm] [Xtensa] Support 'f' Inline Assembly Constraint (PR #202345)   Alexey Gerenkov via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] 35c8e92 - [NFC][AMDGPU] Use SIInstrFlags predicates in SIMemoryLegalizer and AMDGPUBaseInfo. (#209821)   via llvm-commits
• [llvm] [NFC][AMDGPU] Use SIInstrFlags predicates in SIMemoryLegalizer and AMDGPUBaseInfo. (PR #209821)   Valery Pykhtin via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] [Xtensa] Support 'f' Inline Assembly Constraint (PR #202345)   Alexey Gerenkov via llvm-commits
• [llvm] [GVN] Rename some functions to follow LLVM naming conventions (NFC) (PR #210332)   Pengcheng Wang via llvm-commits
• [llvm] [CodeGen] Expand fmaximum/fminimum reductions (PR #195169)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Sander de Smalen via llvm-commits
• [llvm] [SCEV] Tighten loop guards range check idiom (PR #210387)   Aleksandr Popov via llvm-commits
• [llvm] [AArch64] Keep v16i8 -> v2i64 partial_reduce fixed-length for VL > 128 (PR #204938)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Gaëtan Bossu via llvm-commits
• [llvm] [VPlan] Assert VPRegionValues are not used VPTransformState::get (NFC) (PR #199420)   Florian Hahn via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   via llvm-commits
• [llvm] [DAG] added ISD::FMINIMUM/FMAXIMUM cases in isIdentityElement (PR #210169)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] added ISD::FMINIMUM/FMAXIMUM cases in isIdentityElement (PR #210169)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Assert VPRegionValues are not used VPTransformState::get (NFC) (PR #199420)   Florian Hahn via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Simon Pilgrim via llvm-commits
• [llvm] [SCEV] Tighten loop guards range check idiom (PR #210387)   Aleksandr Popov via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Kerry McLaughlin via llvm-commits
• [llvm] [VPlan] Detect contiguous accesses in outer loop VPlan path. (PR #203790)   Florian Hahn via llvm-commits
• [clang] [compiler-rt] [libcxx] [Clang] Support atomic operations on _BitInt(N) (PR #204815)   Xavier Roche via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [VPlan] Assert VPRegionValues are not used VPTransformState::get (NFC) (PR #199420)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPGEPInstruction (PR #193510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Assert VPRegionValues are not used VPTransformState::get (NFC) (PR #199420)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Assert VPRegionValues are not used VPTransformState::get (NFC) (PR #199420)   Florian Hahn via llvm-commits
• [llvm] [llubi] Experimental support for noalias (PR #195808)   Zhige Chen via llvm-commits
• [llvm] [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (PR #210667)   Antonio Frighetto via llvm-commits
• [llvm] Implement bolt-align (PR #210634)   Ilija Tovilo via llvm-commits
• [llvm] [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (PR #210667)   Antonio Frighetto via llvm-commits
• [llvm] Implement bolt-align (PR #210634)   via llvm-commits
• [llvm] [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (PR #210667)   Antonio Frighetto via llvm-commits
• [llvm] Implement bolt-align (PR #210634)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   Simon Pilgrim via llvm-commits
• [llvm] [SCEV] Tighten loop guards range check idiom (PR #210387)   Aleksandr Popov via llvm-commits
• [llvm] Implement bolt-align (PR #210634)   Ilija Tovilo via llvm-commits
• [llvm] [Offload][OpenMP] Fix RPC callback registration when RPC server is not initialized (PR #210215)   via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [llvm] [SCEV] Reach MatchRangeCheckIdiom through zext in LoopGuards worklist (PR #210463)   Aleksandr Popov via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (PR #209885)   Florian Hahn via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   via llvm-commits
• [llvm] [lit] Add --per-test-output-subdir to isolate test_exec_root across concurrent runs (PR #206826)   David Young via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [VPlan] Detect contiguous accesses in outer loop VPlan path. (PR #203790)   Florian Hahn via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   Boyao Wang via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   Boyao Wang via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   Boyao Wang via llvm-commits
• [llvm] [CVP] Infer no-wrap flags from operand ranges at use sites. (PR #207522)   Florian Hahn via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   Boyao Wang via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy and memset isvolatile args (PR #210669)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (PR #210667)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy and memset isvolatile args (PR #210669)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [VPlan] Drop redundant ArrayRef constructions (NFC) (PR #210680)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy and memset isvolatile args (PR #210669)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [VPlan] Drop redundant ArrayRef constructions (NFC) (PR #210680)   via llvm-commits
• [llvm] [VPlan] Drop redundant ArrayRef constructions (NFC) (PR #210680)   via llvm-commits
• [llvm] [SystemZ][z/OS] Move emission of PPA1 (PR #208543)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (PR #208750)   Petar Avramovic via llvm-commits
• [llvm] 91ad9f0 - AMDGPU/GlobalISel: Handle G_BITCAST for 16 bit extendedLLTs (#208750)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Switch legalizer intrinsic lowering to extended LLTs (PR #209200)   Petar Avramovic via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [CVP] Infer no-wrap flags from operand ranges at use sites. (PR #207522)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Phoebe Wang via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [VPlan] Detect contiguous accesses in outer loop VPlan path. (PR #203790)   Julian Nagele via llvm-commits
• [flang] [llvm] [flang][cuda] Fix device-variable leaks and reset-safe cleanup (PR #209865)   via llvm-commits
• [flang] [llvm] [flang][cuda] Fix device-variable leaks and reset-safe cleanup (PR #209865)   via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   Pengcheng Wang via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   Simi Pallipurath via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   Simi Pallipurath via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Switch legalizer intrinsic lowering to extended LLTs (PR #209200)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Calculate div/rem with frcp more efficiently (PR #210684)   via llvm-commits
• [llvm] [VPlan] Consolidate VPIWithType and VPI (NFC) (PR #203019)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Pengcheng Wang via llvm-commits
• [llvm] AMDGPU/GlobalISel: Switch legalizer intrinsic lowering to extended LLTs (PR #209200)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix G_UNMERGE_VALUES lowering for extended LLTs (PR #209201)   Petar Avramovic via llvm-commits
• [llvm] f6b1a57 - AMDGPU/GlobalISel: Switch legalizer intrinsic lowering to extended LLTs (#209200)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] 085ecff - [VPlan] Assert VPRegionValues are not used in VPTransformState::get(NFC) (#199420)   via llvm-commits
• [llvm] [VPlan] Assert VPRegionValues are not used VPTransformState::get (NFC) (PR #199420)   Florian Hahn via llvm-commits
• [llvm] 79e05f4 - [AArch64][LV] Adjust costs for low-VF interleaved access (#209441)   via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Jacob Crawley via llvm-commits
• [compiler-rt] [compiler-rt][test] Use fallback page size with an emulator (PR #210685)   via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [orc-rt] Fix wrapper-call managed-code token lifetime (PR #210686)   Lang Hames via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   Hugo da Silva via llvm-commits
• [llvm] [RISCV][SMT] Add SpacemiT-x100 vector sched info (PR #210597)   Pengcheng Wang via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   via llvm-commits
• [llvm] [VPlan] Consolidate VPIWithType and VPI (NFC) (PR #203019)   Florian Hahn via llvm-commits
• [llvm] [polly] [LoopInfo] Add an opaque LoopRef handle and stop exposing loop containers (PR #210653)   Alexis Engelke via llvm-commits
• [llvm] [VPlan] Assert VPRegionValues are not used VPTransformState::get (NFC) (PR #199420)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [gn build] Port 03b5c5285eaf (PR #210688)   Nico Weber via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix G_UNMERGE_VALUES lowering for extended LLTs (PR #209201)   Petar Avramovic via llvm-commits
• [llvm] [gn build] Port 03b5c5285eaf (PR #210688)   Nico Weber via llvm-commits
• [llvm] [gn build] Port 03b5c5285eaf (PR #210688)   Nico Weber via llvm-commits
• [llvm] 334708e - [gn build] Port 03b5c5285eaf (#210688)   via llvm-commits
• [llvm] [gn build] Port 03b5c5285eaf (PR #210688)   Nico Weber via llvm-commits
• [llvm] [X86] Prefer sub-of-not for vector inc-of-add (PR #207695)   Simon Pilgrim via llvm-commits
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• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Florian Hahn via llvm-commits
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• [llvm] AMDGPU/GlobalISel: Fix G_MERGE_VALUES lowering for extended LLTs (PR #209202)   Petar Avramovic via llvm-commits
• [llvm] [orc-rt] Fix wrapper-call managed-code token lifetime (PR #210686)   Lang Hames via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Łukasz Plewa via llvm-commits
• [llvm] [offload] support arbitrary memoryFill pattern sizes in L0 plugin (PR #209724)   Łukasz Plewa via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Forward stores of loaded i1 vectors as integer load/store pairs (PR #210535)   Kamlesh Kumar via llvm-commits
• [llvm] [VPlan] Assert VPRegionValues are not used VPTransformState::get (NFC) (PR #199420)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Sam Elliott via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [VectorCombine] load-widening.ll - add test coverage for all 4 x86-64 cpu levels and aarch64 endian test coverage (PR #210690)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] load-widening.ll - add test coverage for all 4 x86-64 cpu levels and aarch64 endian test coverage (PR #210690)   Simon Pilgrim via llvm-commits
• [llvm] 14f6b9f - [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (#209037)   via llvm-commits
• [llvm] [VectorCombine] Fold bitcast(bitreverse.v8i8(bitcast(IntTy))) into bswap+bitreverse (PR #209037)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (PR #209885)   Luke Lau via llvm-commits
• [llvm] [VectorCombine] load-widening.ll - add test coverage for all 4 x86-64 cpu levels and aarch64 endian test coverage (PR #210690)   via llvm-commits
• [llvm] 06e3180 - [AMDGPU] Accept extractelement of a widening cast when folding image ops to a16 (#208207)   via llvm-commits
• [llvm] [AMDGPU] Accept extractelement of a widening cast when folding image ops to a16 (PR #208207)   Barbara Mitic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix G_MERGE_VALUES lowering for extended LLTs (PR #209202)   Petar Avramovic via llvm-commits
• [llvm] bd38dd0 - [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (#209782)   via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix G_MERGE_VALUES lowering for extended LLTs (PR #209202)   Petar Avramovic via llvm-commits
• [llvm] 60f8b46 - AMDGPU/GlobalISel: Fix G_MERGE_VALUES lowering for extended LLTs (#209202)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Stop using changeTo in legalizer actions (PR #209203)   Petar Avramovic via llvm-commits
• [llvm] [InstCombine] Simplify `add nsw/nuw i1` to `or disjoint i1` (PR #118221)   Pedro Lobo via llvm-commits
• [llvm] [InstCombine] Simplify `add nsw/nuw i1` to `or disjoint i1` (PR #118221)   Pedro Lobo via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   Benjamin Maxwell via llvm-commits
• [llvm] AMDGPU/GlobalISel: Stop using changeTo in legalizer actions (PR #209203)   Petar Avramovic via llvm-commits
• [llvm] 648aec1 - [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (#207200)   via llvm-commits
• [llvm] [AArch64] NFC: Factor out code from FP_TO_INT (SVE). (PR #207200)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (PR #207201)   Sander de Smalen via llvm-commits
• [llvm] 25b75a1 - AMDGPU/GlobalISel: Stop using changeTo in legalizer actions (#209203)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Stop using changeTo in legalizer actions (PR #209203)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix legalizer lowering for G_EXTRACT/INSERT_VECTOR_ELT (PR #210094)   Petar Avramovic via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Florian Hahn via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Florian Hahn via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Florian Hahn via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Florian Hahn via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Florian Hahn via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Florian Hahn via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Paul Walker via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Paul Walker via llvm-commits
• [llvm] [AArch64] Forward stores of loaded i1 vectors as integer load/store pairs (PR #210535)   Joel Walker via llvm-commits
• [llvm] [AArch64] Forward stores of loaded i1 vectors as integer load/store pairs (PR #210535)   Joel Walker via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] [VPlan] Sink single-scalar VPI to replicate regions (PR #208906)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][LV] Adjust costs for low-VF interleaved access (PR #209441)   via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lucas Ramirez via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lucas Ramirez via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lucas Ramirez via llvm-commits
• [llvm] 8abc269 - [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (#210281)   via llvm-commits
• [llvm] [X86] combineShiftRightLogical - fold srl(vecreduce_umax(x),bw-1) as MOVMSK signbit reduction (PR #210281)   Simon Pilgrim via llvm-commits
• [llvm] d9c8806 - [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (#210525)   via llvm-commits
• [clang] [llvm] [analyzer] Fix _BitInt support & casting behavior for Z3 symbolic execution (PR #210525)   Balázs Benics via llvm-commits
• [llvm] 27fe16d - [Darwin][ASan] Strip MTE-tags for inlined shadow translations (#204827)   via llvm-commits
• [llvm] [Darwin][ASan] Strip MTE-tags for inlined shadow translations (PR #204827)   Dan Blackwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Paul Walker via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (PR #204938)   Matthew Blewitt via llvm-commits
• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   via llvm-commits
• [llvm] [X86] Fix swapped VPTERNLOG231_imm8/VPTERNLOG312_imm8 SDNodeXForm bodies (PR #209782)   Simon Pilgrim via llvm-commits
• [llvm] [gn build] Port b21fb937f165 (PR #210698)   Nico Weber via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix legalizer lowering for G_EXTRACT/INSERT_VECTOR_ELT (PR #210094)   Petar Avramovic via llvm-commits
• [llvm] [gn build] Port b21fb937f165 (PR #210698)   Nico Weber via llvm-commits
• [llvm] c30b1fa - [gn build] Port b21fb937f165 (#210698)   via llvm-commits
• [llvm] [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (PR #204938)   Matthew Blewitt via llvm-commits
• [llvm] [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (PR #204938)   Matthew Blewitt via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Simon Pilgrim via llvm-commits
• [llvm] [Support][Unit] Fix ProgramTest.cpp build warning unused variable 'RetCode' (PR #210699)   Wenju He via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix legalizer lowering for G_EXTRACT/INSERT_VECTOR_ELT (PR #210094)   Petar Avramovic via llvm-commits
• [llvm] 2cdd343 - AMDGPU/GlobalISel: Fix legalizer lowering for G_EXTRACT/INSERT_VECTOR_ELT (#210094)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Explicitly widen scalar to i32 for load and store (PR #210095)   Petar Avramovic via llvm-commits
• [llvm] [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (PR #204938)   Benjamin Maxwell via llvm-commits
• [llvm] [Support][Unit] Fix ProgramTest.cpp build warning unused variable 'RetCode' (PR #210699)   via llvm-commits
• [llvm] ca276b4 - [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (#209738)   via llvm-commits
• [llvm] [ExpandMemCmp][RISCV] Expand memcmp/bcmp for aligned pointers on strict-align targets (PR #209738)   Pengcheng Wang via llvm-commits
• [llvm] [SystemZ][z/OS] Implement emitCommonSymbol in MCGOFFStreamer (PR #210179)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Implement emitCommonSymbol in MCGOFFStreamer (PR #210179)   Ulrich Weigand via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   via llvm-commits
• [llvm] [VectorCombine] load-widening.ll - add test coverage for all 4 x86-64 cpu levels and aarch64 endian test coverage (PR #210690)   Simon Pilgrim via llvm-commits
• [llvm] 0000fd1 - [VectorCombine] load-widening.ll - add test coverage for all 4 x86-64 cpu levels and aarch64 endian test coverage (#210690)   via llvm-commits
• [llvm] [VectorCombine] load-widening.ll - add test coverage for all 4 x86-64 cpu levels and aarch64 endian test coverage (PR #210690)   Simon Pilgrim via llvm-commits
• [llvm] [IR] Mark caller strictfp when inlining strictfp callee (PR #210701)   Wenju He via llvm-commits
• [llvm] a35bcae - AMDGPU/GlobalISel: Explicitly widen scalar to i32 for load and store (#210095)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Explicitly widen scalar to i32 for load and store (PR #210095)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use integer as MMO type for loads and stores lowering (PR #210096)   Petar Avramovic via llvm-commits
• [llvm] [SPIR-V] Reject builtin calls if mangled argument types do not match the IR (PR #208152)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Nathaniel McCallum via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Nathaniel McCallum via llvm-commits
• [llvm] [IR][RFC] Add @llvm.mask.beforefirst intrinsic (PR #203874)   Luke Lau via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Arseniy Obolenskiy via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   via llvm-commits
• [llvm] [IR] Mark caller strictfp when inlining strictfp callee (PR #210701)   via llvm-commits
• [llvm] [VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (PR #209885)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (PR #209885)   Florian Hahn via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Simon Tatham via llvm-commits
• [llvm] [lit] Add --per-test-output-subdir to isolate test_exec_root across concurrent runs (PR #206826)   David Young via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Nikita Popov via llvm-commits
• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   Simi Pallipurath via llvm-commits
• [llvm] [SPIR-V] Reject builtin calls if mangled argument types do not match the IR (PR #208152)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Port MFMA-form rewrite refinements onto shared copy-plan analysis (PR #210703)   via llvm-commits
• [llvm] [AMDGPU] Port MFMA-form rewrite refinements onto shared copy-plan analysis (PR #210703)   via llvm-commits
• [llvm] [AMDGPU] Port MFMA-form rewrite refinements onto shared copy-plan analysis (PR #210703)   via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Paul Walker via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix wrong half selection in wave.shuffle lowering (PR #210661)   Lukas Sommer via llvm-commits
• [llvm] [VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (PR #209885)   Luke Lau via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Simon Pilgrim via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   Simi Pallipurath via llvm-commits
• [llvm] [RISCV] Add SelectAddrRegImm26 isel complex pattern for Xqcilo 26-bit load/store (PR #207363)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   Simi Pallipurath via llvm-commits
• [llvm] [Offload][OpenMP] Fix RPC callback registration when RPC server is not initialized (PR #210215)   Joseph Huber via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Arseniy Obolenskiy via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use integer as MMO type for loads and stores lowering (PR #210096)   Petar Avramovic via llvm-commits
• [llvm] 16e213f - [AMDGPU][GlobalISel] Fix wrong half selection in wave.shuffle lowering (#210661)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix wrong half selection in wave.shuffle lowering (PR #210661)   Arseniy Obolenskiy via llvm-commits
• [llvm] 75ee393 - AMDGPU/GlobalISel: Use integer as MMO type for loads and stores lowering (#210096)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use integer as MMO type for loads and stores lowering (PR #210096)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix extending load narrow scalar (PR #210097)   Petar Avramovic via llvm-commits
• [llvm] 112aac3 - AMDGPU/GlobalISel: Fix extending load narrow scalar (#210097)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix extending load narrow scalar (PR #210097)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use integers for read-any-lane split type (PR #210098)   Petar Avramovic via llvm-commits
• [llvm] [GlobalISel] Use KnownBits to determine zeros and ones in CombineHelper.cpp (PR #197099)   Iris Shi via llvm-commits
• [llvm] 88a19bd - AMDGPU/GlobalISel: Use integers for read-any-lane split type (#210098)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use integers for read-any-lane split type (PR #210098)   Petar Avramovic via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] GlobalISel: Use extended LLTs in f64 to f16 fptrunc lowering (PR #210099)   Petar Avramovic via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] [LLVM] Remove SVEIntrinsicOpts pass. (PR #210368)   Paul Walker via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] [AMDGPU] Fix wrong min/max for amdgcn.fmed3 NaN 3rd operand (PR #203822)   Arseniy Obolenskiy via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   via llvm-commits
• [llvm] [MemCpyOpt] Precommit tests for PR210667 (NFC) (PR #210708)   Antonio Frighetto via llvm-commits
• [llvm] 1e18a0f - [MemCpyOpt] Precommit tests for PR210667 (NFC) (#210708)   via llvm-commits
• [llvm] [MemCpyOpt] Precommit tests for PR210667 (NFC) (PR #210708)   Antonio Frighetto via llvm-commits
• [llvm] GlobalISel: Use extended LLTs in f64 to f16 fptrunc lowering (PR #210099)   Petar Avramovic via llvm-commits
• [llvm] [IR] Mark caller strictfp when inlining strictfp callee (PR #210701)   Ramkumar Ramachandra via llvm-commits
• [llvm] [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (PR #210667)   Antonio Frighetto via llvm-commits
• [llvm] [CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (PR #200196)   via llvm-commits
• [llvm] 92539cf - [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (#210667)   via llvm-commits
• [llvm] [MemCpyOpt] Ensure call slot optz does not lower destination alloca alignment (PR #210667)   Antonio Frighetto via llvm-commits
• [llvm] [SLP] Account for fma fusion when vectorizing an ordered fadd reduction (PR #210399)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #207568)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #207568)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #207568)   Simon Pilgrim via llvm-commits
• [llvm] 4f93957 - GlobalISel: Use extended LLTs in f64 to f16 fptrunc lowering (#210099)   via llvm-commits
• [llvm] GlobalISel: Use extended LLTs in f64 to f16 fptrunc lowering (PR #210099)   Petar Avramovic via llvm-commits
• [llvm] GlobalISel: Use extended LLTs in extract lowering (PR #210100)   Petar Avramovic via llvm-commits
• [llvm] e3016ce - GlobalISel: Use extended LLTs in extract lowering (#210100)   via llvm-commits
• [llvm] GlobalISel: Use extended LLTs in extract lowering (PR #210100)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use integers for clamp i64 to i16 prelegalizer combine (PR #210101)   Petar Avramovic via llvm-commits
• [llvm] e896930 - AMDGPU/GlobalISel: Use integers for clamp i64 to i16 prelegalizer combine (#210101)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use integers for clamp i64 to i16 prelegalizer combine (PR #210101)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use extended LLTs in AMDGPUCombinerHelper (PR #210102)   Petar Avramovic via llvm-commits
• [llvm] [CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (PR #200196)   via llvm-commits
• [llvm] 066fba2 - AMDGPU/GlobalISel: Use extended LLTs in AMDGPUCombinerHelper (#210102)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use extended LLTs in AMDGPUCombinerHelper (PR #210102)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix type mismatch in regbank combiner for applyD16Load (PR #210103)   Petar Avramovic via llvm-commits
• [llvm] [SLP] Account for fma fusion when vectorizing an ordered fadd reduction (PR #210399)   Dmitry Sidorov via llvm-commits
• [llvm] Fix CODEOWNERS error, remove Lanza from ClangIR owners (PR #207294)   Erich Keane via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Optimized f32 add/subtract for Armv6-M. (PR #154093)   Simon Tatham via llvm-commits
• [llvm] [libc++] Run macOS CI on self-hosted runners instead of Github ones (PR #210124)   Louis Dionne via llvm-commits
• [llvm] [InstCombine] Fold icmp on frexp exponent to fcmp on fabs(x) (PR #210711)   via llvm-commits
• [llvm] [libc++] Run macOS CI on self-hosted runners instead of Github ones (PR #210124)   Louis Dionne via llvm-commits
• [llvm] [AMDGPU] Calculate div/rem with frcp more efficiently (PR #210684)   Lukas Sommer via llvm-commits
• [llvm] [CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (PR #200196)   via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [llvm] [SCEV] Derive element size from the access's own pointer address space (PR #209824)   Jinsong Ji via llvm-commits
• [llvm] [SCEV] Derive element size from the access's own pointer address space (PR #209824)   Nikita Popov via llvm-commits
• [llvm] Re-commit: [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210712)   Momchil Velikov via llvm-commits
• [llvm] Re-commit: [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210712)   Momchil Velikov via llvm-commits
• [llvm] [SelectionDAG] Improve shifted range checks with add offsets (PR #207955)   Simon Pilgrim via llvm-commits
• [lld] [llvm] [DTLTO] Overlap temporary file removal (PR #209423)   Ben Dunbobbin via llvm-commits
• [llvm] [IR] Mark caller strictfp when inlining strictfp callee (PR #210701)   Wenju He via llvm-commits
• [llvm] [IR] Mark caller strictfp when inlining strictfp callee (PR #210701)   Wenju He via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Florian Hahn via llvm-commits
• [llvm] [X86] Fold cross-block constants into address mode displacement (PR #203883)   via llvm-commits
• [llvm] Re-commit: [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210712)   Momchil Velikov via llvm-commits
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• [llvm] AMDGPU/GlobalISel: Fix type mismatch in regbank combiner for applyD16Load (PR #210103)   Petar Avramovic via llvm-commits
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• [llvm] 8888665 - AMDGPU/GlobalISel: Fix type mismatch in regbank combiner for applyD16Load (#210103)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix type mismatch in regbank combiner for applyD16Load (PR #210103)   Petar Avramovic via llvm-commits
• [llvm] GlobalISel: Use extended LLTs in lshr narrow combine (PR #210298)   Petar Avramovic via llvm-commits
• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Alex Voicu via llvm-commits
• [llvm] 743813d - GlobalISel: Use extended LLTs in lshr narrow combine (#210298)   via llvm-commits
• [llvm] GlobalISel: Use extended LLTs in lshr narrow combine (PR #210298)   Petar Avramovic via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [SDAG] Specify unsigned compares for loop.dependence.{war|raw} masks (PR #197437)   Benjamin Maxwell via llvm-commits
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• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Alex Voicu via llvm-commits
• [llvm] [X86][CostModel] Add vXi64 divide/remainder-by-constant costs (PR #208491)   LLVM Continuous Integration via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Matt Arsenault via llvm-commits
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• [clang] [llvm] [SPIRV] Add support for the `SPV_EXT_long_vector` extension (PR #210279)   Alex Voicu via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [X86] Fold cross-block constants into address mode displacement (PR #203883)   Craig Topper via llvm-commits
• [llvm] [X86] MIR-level tests for bitcnt/bls/compress/expand false dependencies (PR #209879)   Simon Pilgrim via llvm-commits
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• [llvm] [VPlan] Consolidate VPIWithType and VPI (NFC) (PR #203019)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [IR] Mark caller strictfp when inlining strictfp callee (PR #210701)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [X86] Fold cross-block constants into address mode displacement (PR #203883)   Craig Topper via llvm-commits
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• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Matthew Devereau via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Piotr Sobczak via llvm-commits
• [llvm] [SCEV] Tighten loop guards range check idiom (PR #210387)   Aleksandr Popov via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Matthew Devereau via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fold trivial uniform G_AMDGPU_READANYLANE (PR #210449)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fold trivial uniform G_AMDGPU_READANYLANE (PR #210449)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fold trivial uniform G_AMDGPU_READANYLANE (PR #210449)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fold trivial uniform G_AMDGPU_READANYLANE (PR #210449)   Petar Avramovic via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Matthew Devereau via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Ankit Kumar Tiwari via llvm-commits
• [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [llvm] [AMDGPU] Calculate div/rem with frcp more efficiently (PR #210684)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Account for fma fusion when vectorizing an ordered fadd reduction (PR #210399)   Alexey Bataev via llvm-commits
• [llvm] [GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (PR #207013)   via llvm-commits
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• [llvm] [GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (PR #207013)   Matt Arsenault via llvm-commits
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• [llvm] [GlobalISel] Synchronize GISelValueTrackingAnalysis behavior across Legacy and New PM paths (PR #207013)   Matt Arsenault via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Evgenii Kudriashov via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] [llvm][docs] Update TestingGuide with LLVM PR merge advice (PR #207754)   John Otken via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Ankit Kumar Tiwari via llvm-commits
• [llvm] [SPIR-V] Simplify lookup of llvm.global.annotations using getNamedGlobal (PR #210722)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] Only set LLVM_ENABLE_DIA_SDK in bazel build defs to zero if not set by build args (PR #210723)   David Young via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] [InstCombine] Fold icmp on frexp exponent to fcmp on fabs(x) (PR #210711)   via llvm-commits
• [llvm] Re-commit: [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210712)   via llvm-commits
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• [compiler-rt] [Darwin][TSan] Fix race in mach_vm_deallocate interceptor (PR #210716)   via llvm-commits
• [llvm] [Bazel] Fixes 2a33792 (PR #210726)   via llvm-commits
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• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] SME definitions for C1-Nano scheduling model (PR #207174)   Asher Dobrescu via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   Alexey Gerenkov via llvm-commits
• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   via llvm-commits
• [llvm] [SCEV] Distribute zext across (-C + Rest) in LoopGuards rewriter (PR #210719)   via llvm-commits
• [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   via llvm-commits
• [libc] [llvm] [libc] Convert readv, writev, and read_write tests to use pipes (PR #210725)   Pavel Labath via llvm-commits
• [llvm] [IR] Mark caller strictfp when inlining strictfp callee (PR #210701)   Nikita Popov via llvm-commits
• [llvm] AMDGPU/GlobalISel: Switch to extended LLTs (PR #196522)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Switch to extended LLTs (PR #196522)   Petar Avramovic via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Florian Hahn via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Florian Hahn via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Lucas Chollet via llvm-commits
• [llvm] [MC][NFC] Share some code between MasmParser and AsmParser (PR #210731)   Alexander Richardson via llvm-commits
• [llvm] [SCEV] Use m_scev_AffineAddRec in get{Zero, Sign}ExtendExprImpl (NFC) (PR #210082)   Florian Hahn via llvm-commits
• [llvm] e16e607 - [SCEV] Use m_scev_AffineAddRec in get{Zero,Sign}ExtendExprImpl (NFC) (#210082)   via llvm-commits
• [llvm] [SCEV] Use m_scev_AffineAddRec in get{Zero, Sign}ExtendExprImpl (NFC) (PR #210082)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Florian Hahn via llvm-commits
• [llvm] [LV] Use SCEV loop-uniformity for outer-loop branch legality (PR #199632)   Ming Yan via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy and memset isvolatile args (PR #210669)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [SPIR-V] Simplify lookup of llvm.global.annotations using getNamedGlobal (PR #210722)   via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (PR #210713)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (PR #210713)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy and memset isvolatile args (PR #210669)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fold trivial uniform G_AMDGPU_READANYLANE (PR #210449)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy, memset, memmove isvolatile args (PR #210669)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy, memset, memmove isvolatile args (PR #210669)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (PR #210429)   Sean Clarke via llvm-commits
• [llvm] b16c5f7 - [NVPTX] Clear unsafe kill flags in NVPTXProxyRegErasure (#198143)   via llvm-commits
• [llvm] [NVPTX] Clear unsafe kill flags in NVPTXProxyRegErasure (PR #198143)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (PR #210429)   Sean Clarke via llvm-commits
• [llvm] bb5c8d5 - [LangRef] Add immarg attributes to memcpy, memset, memmove isvolatile args (#210669)   via llvm-commits
• [llvm] [LangRef] Add immarg attributes to memcpy, memset, memmove isvolatile args (PR #210669)   Ömer Sinan Ağacan via llvm-commits
• [clang] [llvm] [X86] Add ACE v1 (AI Compute Extensions) support (PR #208408)   via llvm-commits
• [llvm] 1ed1ca5 - Re-commit: [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (#210712)   via llvm-commits
• [llvm] Re-commit: [GVN] Remove the "private" `llvm::gvn` namespace (NFC) (PR #210712)   Momchil Velikov via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] 6998fd5 - [AMDGPU] Print max-BB inline rejections   via llvm-commits
• [llvm] [AMDGPU] Print max-BB inline rejections (PR #208755)   Yaxun Liu via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [AMDGPU] Port MFMA-form rewrite refinements onto shared copy-plan analysis (PR #210703)   via llvm-commits
• [llvm] [VPlan] Expand sequential/regular UMin SCEVs in VPSCEVExpander. (PR #209786)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [rtsan] Loosen requirements of halt_on_error test (PR #210734)   Chris Apple via llvm-commits
• [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [libc] [llvm] [libc] Convert readv, writev, and read_write tests to use pipes (PR #210725)   via llvm-commits
• [clang] [llvm] [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (PR #210713)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (PR #210429)   Sean Clarke via llvm-commits
• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   Matt Arsenault via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [X86][CodeGen] Support partial-reduce dot products (PR #205373)   Simon Pilgrim via llvm-commits
• [llvm] [Bazel] Fixes 2a33792 (PR #210726)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fixes 2a33792 (PR #210726)   Jordan Rupprecht via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make a few WaitcntBracket member functions private (PR #180018)   Jay Foad via llvm-commits
• [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Simon Pilgrim via llvm-commits
• [llvm] [MC][NFC] Share some code between MasmParser and AsmParser (PR #210731)   via llvm-commits
• [compiler-rt] [rtsan] Loosen requirements of halt_on_error test (PR #210734)   via llvm-commits
• [libc] [llvm] [libc] Fix sockatmark test (PR #210655)   Jeff Bailey via llvm-commits
• [libc] [llvm] [libc] Fix sockatmark test (PR #210655)   Jeff Bailey via llvm-commits
• [libc] [llvm] [libc] Fix sockatmark test (PR #210655)   Jeff Bailey via llvm-commits
• [libc] [llvm] [libc] Fix sockatmark test (PR #210655)   Jeff Bailey via llvm-commits
• [libc] [llvm] [libc] Fix sockatmark test (PR #210655)   Jeff Bailey via llvm-commits
• [llvm] [libsycl][E2E] Compile all E2E tests with -fsycl (PR #204115)   Sergey Semenov via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Lucas Chollet via llvm-commits
• [llvm] [libsycl][NFC] Move the cmake msvc DLL check (PR #193485)   Sergey Semenov via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Lucas Chollet via llvm-commits
• [llvm] [llvm][docs] Update TestingGuide with LLVM PR merge advice (PR #207754)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (PR #210429)   Sean Clarke via llvm-commits
• [llvm] [llvm][docs] Update TestingGuide with LLVM PR merge advice (PR #207754)   Matt Arsenault via llvm-commits
• [llvm] [X86] Fold chained i32 CLMUL operands (PR #202250)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold chained i32 CLMUL operands (PR #202250)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold chained i32 CLMUL operands (PR #202250)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold chained i32 CLMUL operands (PR #202250)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (PR #210429)   Sean Clarke via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   via llvm-commits
• [llvm] [SPIR-V] Reject builtin calls if mangled argument types do not match the IR (PR #208152)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Simplify lookup of llvm.global.annotations using getNamedGlobal (PR #210722)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Diego Caballero via llvm-commits
• [llvm] [ADT] ImutAVLFactory: avoid overhead of vector for freelist (PR #196534)   Christoph Cullmann via llvm-commits
• [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Diego Caballero via llvm-commits
• [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Diego Caballero via llvm-commits
• [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Diego Caballero via llvm-commits
• [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Diego Caballero via llvm-commits
• [llvm] [SPIR-V] Simplify lookup of llvm.global.annotations using getNamedGlobal (PR #210722)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [llvm][docs] Update TestingGuide with LLVM PR merge advice (PR #207754)   John Otken via llvm-commits
• [llvm] [X86] Fold cross-block constants into address mode displacement (PR #203883)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Lucas Chollet via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Ankit Kumar Tiwari via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Ankit Kumar Tiwari via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Lucas Chollet via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Ankit Kumar Tiwari via llvm-commits
• [llvm] [Hexagon] Drop NodeAddr::operator<, fix bad asserts directives (PR #210192)   Fateme Hosseini via llvm-commits
• [llvm] [ARM] Use .reloc for dso_local weak symbols in PIC mode instead of GOT indirection (PR #209660)   Peter Smith via llvm-commits
• [compiler-rt] [scudo] Add unmap and eviction stats to Secondary (PR #210465)   Sadaf Ebrahimi via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   via llvm-commits
• [llvm] [ADT] ImutAVLFactory: avoid overhead of vector for freelist (PR #196534)   Gábor Horváth via llvm-commits
• [llvm] [AMDGPU] Reimplement PreRARematStage stage for the GCNSchedStrategy. Early-preview, WIP. (PR #72505)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] Speedup SIFormMemoryClauses live-in register set calculation. (PR #89919)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] Use V_FMAC_F64 in "if (cond) a -= c" (PR #168710)   Valery Pykhtin via llvm-commits
• [llvm] [SSAUpdaterBulk] Fix PHI handling in self-loop cases to prevent spurious intermediate PHIs (PR #196934)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Yudistira Putra via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Yudistira Putra via llvm-commits
• [llvm] [AMDGPU] Use simpler form of applyWaitcnt. NFC. (PR #210736)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Yudistira Putra via llvm-commits
• [llvm] [AMDGPU] Use simpler form of applyWaitcnt. NFC. (PR #210736)   via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [PAC][llvm-readobj][ELF][AArch64] Define R_AARCH64_AUTH_TLSDESC_CALL reloc (PR #199503)   Daniil Kovalev via llvm-commits
• [llvm] b2d3db9 - [SCEV] Derive element size from the access's own pointer address space (#209824)   via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Phoebe Wang via llvm-commits
• [llvm] [SLP][NFC]Add a test with fmuladd copyables candidates, NFC (PR #210744)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Remove some unneeded waits for VA_VDST (PR #210741)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Remove some unneeded waits for VA_VDST (PR #210741)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Remove some unneeded waits for VA_VDST (PR #210741)   Krzysztof Drewniak via llvm-commits
• [llvm] [SLP][NFC]Add a test with fmuladd copyables candidates, NFC (PR #210744)   via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Kerry McLaughlin via llvm-commits
• [llvm] 0c0d9ff - [SLP][NFC]Add a test with fmuladd copyables candidates, NFC   via llvm-commits
• [llvm] [SLP][NFC]Add a test with fmuladd copyables candidates, NFC (PR #210744)   Alexey Bataev via llvm-commits
• [llvm] Fix validate checkout (PR #210471)   Tom Stellard via llvm-commits
• [llvm] Fix validate checkout (PR #210471)   Tom Stellard via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Ralf Jung via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed floating-point extend/trunct builtins (PR #209984)   Simon Tatham via llvm-commits
• [llvm] workflows/release-documentation: Add missing secrets (PR #210421)   Tom Stellard via llvm-commits
• [llvm] Fixes for MSVC DLL compilation (PR #210746)   via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Ryan Mitchell via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Ryan Mitchell via llvm-commits
• [llvm] workflows/release-documentation: Add missing secrets (PR #210421)   Tom Stellard via llvm-commits
• [llvm] Fixes for MSVC DLL compilation (PR #210746)   via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Krzysztof Drewniak via llvm-commits
• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   Simi Pallipurath via llvm-commits
• [llvm] Fixes for MSVC DLL compilation (PR #210746)   via llvm-commits
• [llvm] 9ba8a3c - [AMDGPU] Use simpler form of applyWaitcnt. NFC. (#210736)   via llvm-commits
• [llvm] [AMDGPU] Use simpler form of applyWaitcnt. NFC. (PR #210736)   Jay Foad via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Ralf Jung via llvm-commits
• [llvm] [AMDGPU] Remove some unneeded waits for VA_VDST (PR #210741)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove some unneeded waits for VA_VDST (PR #210741)   Jay Foad via llvm-commits
• [llvm] Fix validate checkout (PR #210471)   Cullen Rhodes via llvm-commits
• [lld] wasm-ld: Preserve segment linking flags in --relocatable output (PR #210747)   Max Desiatov via llvm-commits
• [lld] wasm-ld: Preserve segment linking flags in --relocatable output (PR #210747)   Max Desiatov via llvm-commits
• [lld] wasm-ld: Preserve segment linking flags in --relocatable output (PR #210747)   via llvm-commits
• [lld] wasm-ld: Preserve segment linking flags in --relocatable output (PR #210747)   via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Ralf Jung via llvm-commits
• [lld] wasm-ld: Preserve segment linking flags in --relocatable output (PR #210747)   Yuta Saito via llvm-commits
• [lld] wasm-ld: Preserve segment linking flags in --relocatable output (PR #210747)   via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Piotr Sobczak via llvm-commits
• [llvm] workflows/release-documentation: Add missing secrets (PR #210421)   via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   Phoebe Wang via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] Revise commit access policy (PR #207272)   Reid Kleckner via llvm-commits
• [llvm] [DAG] - computeKnownFPClass - ISD::FMAXIMUM/ISD::FMINIMUM + ISD::FMAXIMUMNUM/ISD::FMINIMUMNUM (PR #190465)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Yudistira Putra via llvm-commits
• [llvm] [AMDGPU] Reject image-load merges when either op has TFE/LWE (PR #210583)   Yudistira Putra via llvm-commits
• [lld] lld: Migrate amdgpu tests to use subarch triples (PR #210114)   Matt Arsenault via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (alternative) (PR #210739)   Nikita Taranov via llvm-commits
• [clang] [llvm] [X86] Support apxf in attribute target (PR #184078)   via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [compiler-rt] [compiler-rt][test] Use configured Python for lit page-size probe (PR #209175)   Eli Friedman via llvm-commits
• [llvm] [llubi] Experimental support for noalias (PR #195808)   Ralf Jung via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [llvm] [llubi] Add support for captures (PR #201170)   Yingwei Zheng via llvm-commits
• [lld] [ELF] Apply version script patterns to name-versioned definitions by node (PR #208882)   Fangrui Song via llvm-commits
• [lld] lld: Migrate amdgpu tests to use subarch triples (PR #210114)   Shilei Tian via llvm-commits
• [clang] [compiler-rt] [llvm] Reapply "Skipping host target exports during cross-compilation" (#210… (PR #210496)   via llvm-commits
• [llvm] [AMDGPU] [SelectionDAG] Lower constant i128 UREM without a libcall (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [lld] 1020bbf - lld: Migrate amdgpu tests to use subarch triples (#210114)   via llvm-commits
• [lld] lld: Migrate amdgpu tests to use subarch triples (PR #210114)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyCFG] Simplify switch default branch when branch proves operand value (PR #206597)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Simplify switch default branch when branch proves operand value (PR #206597)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Simplify switch default branch when branch proves operand value (PR #206597)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV][P-ext] Custom legalize v4i16->v4i8 and v2i32->v2i16 truncate. (PR #210670)   Hongyu Chen via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] [ConstantFolding]Fold llvm.powi via square-and-multiply (PR #210771)   Alexey Bataev via llvm-commits
• [llvm] [gn build] Port 2a33792a2ec1 (PR #210772)   Arthur Eubanks via llvm-commits
• [llvm] 7b9ab3a - [gn build] Port 2a33792a2ec1 (#210772)   via llvm-commits
• [llvm] [gn build] Port 2a33792a2ec1 (PR #210772)   Arthur Eubanks via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   Simi Pallipurath via llvm-commits
• [polly] [Polly] Guard ISL ast gen compute out (PR #201859)   Eli Friedman via llvm-commits
• [lld] [llvm] [DTLTO] Overlap temporary file removal (PR #209423)   Teresa Johnson via llvm-commits
• [libunwind] [llvm] [MC][AArch64] Add .cfi_set_ra_state for PAuth_LR (PR #209949)   Sergei Barannikov via llvm-commits
• [llvm] 30c0454 - RuntimeLibcalls: Reuse AssemblerPredicate's operators for libcalls (#210651)   via llvm-commits
• [llvm] RuntimeLibcalls: Reuse AssemblerPredicate's operators for libcalls (PR #210651)   Matt Arsenault via llvm-commits
• [llvm] TableGen: Parenthesize negated predicate-dag leaves with operators (PR #210652)   Matt Arsenault via llvm-commits
• [llvm] [SCEV] Expand isKnownPredicateViaConstantRanges (PR #210784)   Abhay Kanhere via llvm-commits
• [llvm] [ValueTracking][InstCombine] Preserve samesign when flipping icmp strictness (PR #209097)   Yingwei Zheng via llvm-commits
• [llvm] 6fcf3b3 - [AggressiveInstCombine] Emit branchless MSB index for de Bruijn ctlz tables (#210633)   via llvm-commits
• [llvm] [AggressiveInstCombine] Emit branchless MSB index for de Bruijn ctlz tables (PR #210633)   Yingwei Zheng via llvm-commits
• [llvm] [SCEV] Analyze constant range for Urem idiom (PR #205694)   Abhay Kanhere via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   via llvm-commits
• [libc] [llvm] [libc] Convert readv, writev, and read_write tests to use pipes (PR #210725)   Alexey Samsonov via llvm-commits
• [llvm] [X86][AVX] Prefer per-element vector shifts for known splats #39424 (PR #87913)   via llvm-commits
• [llvm] [SCEV] Analyze constant range for Urem idiom (PR #205694)   Abhay Kanhere via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fold immediate from REQ_SEQUENCE (imm, IMPLICIT_DEF) (PR #210787)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fold immediate from REQ_SEQUENCE (imm, IMPLICIT_DEF) (PR #210787)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fold immediate from REQ_SEQUENCE (imm, IMPLICIT_DEF) (PR #210787)   Stanislav Mekhanoshin via llvm-commits
• [llvm] afb54cc - [LoopUnroll] Remove `Count` from `UnrollingPreferences` (NFC) (#203413)   via llvm-commits
• [llvm] [LoopUnroll] Remove `Count` from `UnrollingPreferences` (NFC) (PR #203413)   Justin Fargnoli via llvm-commits
• [llvm] [llubi] Add support for captures (PR #201170)   Ralf Jung via llvm-commits
• [llvm] [AMDGPU] Fix fmul/fma legacy sign-of-zero miscompile (PR #203567)   via llvm-commits
• [llvm] [ConstantFolding]Fold llvm.powi via square-and-multiply (PR #210771)   Alexey Bataev via llvm-commits
• [llvm] [NewPM] Port LegacyPM regalloc Refactoring (PR #210760)   Arthur Eubanks via llvm-commits
• [llvm] 0de567b - [NewPM] Port LegacyPM regalloc Refactoring   via llvm-commits
• [llvm] [NewPM] Port LegacyPM regalloc Refactoring (PR #210760)   Aiden Grossman via llvm-commits
• [llvm] [bazel][RuntimeLibcalls] Fix 30c0454414ec043dc50d2690f72a12719ab89d6c (PR #210796)   Jordan Rupprecht via llvm-commits
• [lld] wasm-ld: Preserve segment linking flags in --relocatable output (PR #210747)   Derek Schuff via llvm-commits
• [llvm] [SampleProfileMatcher] Move fuzzy base name matching to a later stage after more precise CG matching (PR #210798)   via llvm-commits
• [llvm] [SampleProfileMatcher] Move fuzzy base name matching to a later stage after more precise CG matching (PR #210798)   via llvm-commits
• [llvm] [IR] Reject token and label overload types in intrinsic signature matching (PR #210799)   Akshay K via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat.i16 to SALU instructions (PR #210156)   Anshil Gandhi via llvm-commits
• [llvm] [IR] Reject token and label overload types in intrinsic signature matching (PR #210799)   via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   via llvm-commits
• [llvm] [bazel][RuntimeLibcalls] Fix 30c0454414ec043dc50d2690f72a12719ab89d6c (PR #210796)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Nikita Popov via llvm-commits
• [llvm] [bazel][RuntimeLibcalls] Fix 30c0454414ec043dc50d2690f72a12719ab89d6c (PR #210796)   Jordan Rupprecht via llvm-commits
• [llvm] [SampleProfileMatcher] Move fuzzy base name matching to a later stage after more precise CG matching (PR #210798)   via llvm-commits
• [llvm] [AMDGPU] Clean up check prefixes and regenerate checklines for some tests that were out of date (PR #209889)   Domenic Nutile via llvm-commits
• [llvm] [AMDGPU] Fix performFMACombine FDOT2 fold ignores denormal-fp-math-f32 (PR #205101)   via llvm-commits
• [clang] [llvm] [Offload] Split frontend CUDA/HIP language assumptions from backend device (PR #210121)   Sophia Herrmann via llvm-commits
• [llvm] RuntimeLibcalls: Migrate to dag libcall predicates (PR #210674)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   via llvm-commits
• [llvm] [IRCE] Check loop clone legality before attempting to do so (PR #151062)   Keno Fischer via llvm-commits
• [llvm] [IRCE] Check loop clone legality before attempting to do so (PR #151062)   Keno Fischer via llvm-commits
• [llvm] [X86] Fix getStackProbeSymbolName returning non-callable values on Windows (PR #210800)   via llvm-commits
• [llvm] [X86] Fix getStackProbeSymbolName returning non-callable values on Windows (PR #210800)   via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Hao Ren via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_MUL of a constant BUILD_VECTOR (PR #210126)   Simon Pilgrim via llvm-commits
• [llvm] [GlobalISel] Emit G_BITCAST for same-size scalar reassembly (PR #200946)   Michal Paszkowski via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Zachary Yedidia via llvm-commits
• [clang] [llvm] PowerPC: Rename "float-abi" module flag to "long-double-type" (PR #210817)   Matt Arsenault via llvm-commits
• [lld] [lld][WebAssembly] Follow relocations of TLS-base accessors during GC (PR #206831)   Alex Crichton via llvm-commits
• [clang] [llvm] PowerPC: Rename "float-abi" module flag to "long-double-type" (PR #210817)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Amara Emerson via llvm-commits
• [compiler-rt] [libc] [llvm] [compiler-rt][builtins] add libc-backed arithmetic builtins (PR #207092)   Michael Jones via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   Folkert de Vries via llvm-commits
• [llvm] [NFC][SLP] Precommit tests for ordered fadd-reduction FMA-fusion cost (PR #210835)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC][SLP] Precommit tests for ordered fadd-reduction FMA-fusion cost (PR #210835)   via llvm-commits
• [llvm] [NFC][SLP] Precommit tests for ordered fadd-reduction FMA-fusion cost (PR #210835)   via llvm-commits
• [llvm] [Support] Add LLVM_WINDOWS_AVOID_SHELL32_APIS for shell32-free path lookups (PR #209448)   Reid Kleckner via llvm-commits
• [llvm] [SPIRV][Matrix] Change Matrix Shader legalization to largest common divisor (PR #207768)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][SLP] Precommit tests for ordered fadd-reduction FMA-fusion cost (PR #210835)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC][SLP] Precommit tests for ordered fadd-reduction FMA-fusion cost (PR #210835)   Dmitry Sidorov via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer_common] Size readlink/getsockopt post-hook unpoison by bytes written (PR #209209)   Patrik Dokoupil via llvm-commits
• [llvm] [NFC][SLP] Precommit tests for ordered fadd-reduction FMA-fusion cost (PR #210835)   Alexey Bataev via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   Lang Hames via llvm-commits
• [llvm] [AArch64] Set NoPHIs for outlined functions (PR #209852)   Zhaoxuan Jiang via llvm-commits
• [llvm] [GlobalISel] Add `isKnownNeverZero` to `GISelValueTracking` (PR #198438)   Alan Li via llvm-commits
• [llvm] [GlobalISel] Add `isKnownNeverZero` to `GISelValueTracking` (PR #198438)   Alan Li via llvm-commits
• [llvm] [RISCV][P-Ext] Add RISCVISD::WADD/WSUB. (PR #210862)   Hank Chang via llvm-commits
• [llvm] [SLP] Vectorize select-addressed loads as masked-load blends (PR #210455)   Alexey Bataev via llvm-commits
• [llvm] [AtomicExpand] Add elementwise expansion (PR #196464)   Yonah Goldberg via llvm-commits
• [llvm] d6790a7 - [GlobalISel] Add `isKnownNeverZero` to `GISelValueTracking` (#198438)   via llvm-commits
• [llvm] [GlobalISel] Add `isKnownNeverZero` to `GISelValueTracking` (PR #198438)   Alan Li via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Craig Topper via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [SLP] Vectorize select-addressed loads as masked-load blends (PR #210455)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Coroutines] Use destroy slot for CoroElide resume fallthrough (PR #207799)   Yuxuan Chen via llvm-commits
• [llvm] [X86] Narrow vXi32/vXi64 usubsat to vpsubusb/vpsubusw when LHS is known to fit in fewer bits (PR #206592)   Phoebe Wang via llvm-commits
• [clang] [llvm] [Coroutines] Use destroy slot for CoroElide resume fallthrough (PR #207799)   Chuanqi Xu via llvm-commits
• [clang] [llvm] [Coroutines] Use destroy slot for CoroElide resume fallthrough (PR #207799)   Chuanqi Xu via llvm-commits
• [llvm] [CycleInfo] Store entries in the block layout. NFC (PR #210866)   Fangrui Song via llvm-commits
• [llvm] [CycleInfo] Store entries in the block layout. NFC (PR #210866)   via llvm-commits
• [llvm] [OFFLOAD][L0] Fix PatternSize assert in L0QueueTy::memoryFill (PR #210867)   Wenju He via llvm-commits
• [llvm] [OFFLOAD][L0] Fix PatternSize assert in L0QueueTy::memoryFill (PR #210867)   via llvm-commits
• [llvm] [SLP] Vectorize select-addressed loads as masked-load blends (PR #210455)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   Jerry Zhang Jian via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   via llvm-commits
• [llvm] [dsymutil] collect pseudoprobe sections from debug map into __LLVM segment (PR #206817)   Henry Jiang via llvm-commits
• [llvm] [IR] Allow vector atomicrmw xchg (PR #208510)   Yonah Goldberg via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Yusuke MINATO via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   Jerry Zhang Jian via llvm-commits
• [llvm] [SPIRV] SPIRVTools custom targets should not have executable suffix (PR #210773)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pengcheng Wang via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Fangrui Song via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Fangrui Song via llvm-commits
• [llvm] [LoopIdiomRecognize] Enable clmul optimization for CRC loops (PR #203405)   Sean Clarke via llvm-commits
• [llvm] [NFC][llvm] Fix typo in tests (PR #210841)   Aiden Grossman via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [premerge] Build and check runtimes on macOS premerge (PR #210852)   Aiden Grossman via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Aiden Grossman via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Aiden Grossman via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Aiden Grossman via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-documentation: Fix typo (PR #210815)   Aiden Grossman via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   via llvm-commits
• [llvm] [CSSPGO] Fix use-after-free in SampleContextTracker::getBaseSamplesFor (PR #210824)   Kunal Pathak via llvm-commits
• [llvm] [CSSPGO] Fix use-after-free in SampleContextTracker::getBaseSamplesFor (PR #210824)   Kunal Pathak via llvm-commits
• [llvm] [CSSPGO] Fix use-after-free in SampleContextTracker::getBaseSamplesFor (PR #210824)   via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Aiden Grossman via llvm-commits
• [llvm] e6103d7 - [AMDGPU] Relax SGPR splat selection for PK_*64 (#210790)   via llvm-commits
• [llvm] [AMDGPU] Relax SGPR splat selection for PK_*64 (PR #210790)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [Offload] Split frontend CUDA/HIP language assumptions from backend device (PR #210121)   via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
• [lld] [llvm] [LTO] Move section names from symbol table to module summary. (PR #210856)   via llvm-commits
• [llvm] [AArch64][CostModel] Add cost model for pdep/pext instructions (PR #207657)   Yashwant Singh via llvm-commits
• [llvm] [AArch64][CostModel] Add cost model for pdep/pext instructions (PR #207657)   via llvm-commits
• [llvm] [AArch64][CostModel] Add cost model for pdep/pext instructions (PR #207657)   Yashwant Singh via llvm-commits
• [llvm] [AArch64][CostModel] Add cost model for pdep/pext instructions (PR #207657)   Yashwant Singh via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   via llvm-commits
• [llvm] [RISCV][P-Ext] Add RISCVISD::WADD/WSUB. (PR #210862)   Sam Elliott via llvm-commits
• [clang] [llvm] [Coroutines] Use destroy slot for CoroElide resume fallthrough (PR #207799)   Yuxuan Chen via llvm-commits
• [llvm] [NFC][llvm] Fix typo in tests (PR #210841)   Prabhu Rajasekaran via llvm-commits
• [llvm] [AMDGPU] Use global_prefetch_b8 for GFX1250 unclaused VMEM workaround (PR #210874)   Siu Chi Chan via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Use global_prefetch_b8 for GFX1250 unclaused VMEM workaround (PR #210874)   via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Jay Foad via llvm-commits
• [llvm] ee98df5 - [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (#178711)   via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   Jay Foad via llvm-commits
• [lld] [llvm] DTLTO Cache optimization - rebased (PR #203971)   Teresa Johnson via llvm-commits
• [lld] [llvm] DTLTO Cache optimization - rebased (PR #203971)   Teresa Johnson via llvm-commits
• [lld] [llvm] DTLTO Cache optimization - rebased (PR #203971)   Teresa Johnson via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [compiler-rt] [rtsan] Loosen requirements of halt_on_error test (PR #210734)   Florian Mayer via llvm-commits
• [llvm] RuntimeLibcalls: Reuse AssemblerPredicate's operators for libcalls (PR #210651)   LLVM Continuous Integration via llvm-commits
• [llvm] [premerge] Build and check runtimes on macOS premerge (PR #210852)   Mishal Shah via llvm-commits
• [llvm] [SPIR-V] Reject builtin calls if mangled argument types do not match the IR (PR #208152)   Arseniy Obolenskiy via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract free cost helpers into SLPCostAnalysis (PR #210278)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract free cost helpers into SLPCostAnalysis (PR #210278)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract free cost helpers into SLPCostAnalysis (PR #210278)   via llvm-commits
• [llvm] [PassBuilder] Run MemCpyOpt before early SROA (PR #210875)   Rick Guo via llvm-commits
• [llvm] [PassBuilder] Run MemCpyOpt before early SROA (PR #210875)   via llvm-commits
• [llvm] [PassBuilder] Run MemCpyOpt before early SROA (PR #210875)   Rick Guo via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   Alexis Engelke via llvm-commits
• [llvm] [OFFLOAD][L0] Fix PatternSize assert in L0QueueTy::memoryFill (PR #210867)   Alex Duran via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   Ian Anderson via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   Ian Anderson via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   via llvm-commits
• [llvm] 0b16957 - [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (#163501)   via llvm-commits
• [llvm] [RISCV] Don't transfer (select c, t, f) to Zicond when optimizing for size (PR #163501)   Jim Lin via llvm-commits
• [clang] [llvm] [mlir] Enforce single-operand form for llvm.loop.distribute metadata (PR #201077)   Madhur Amilkanthwar via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   via llvm-commits
• [clang] [llvm] PowerPC: Rename "float-abi" module flag to "long-double-type" (PR #210817)   Matt Arsenault via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   Ian Anderson via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [libunwind] [llvm] [MC][AArch64] Add .cfi_set_ra_state for PAuth_LR (PR #209949)   Nathan Corbyn via llvm-commits
• [llvm] [AMDGPU] Fix simplification of VM_VSRC based on VMEM waits (PR #178711)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_AND/OR/XOR of a constant BUILD_VECTOR (PR #210883)   Ankit Kumar Tiwari via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_AND/OR/XOR of a constant BUILD_VECTOR (PR #210883)   via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Narrow icmp of mismatched sext/zext (PR #196517)   Adam Scott via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_AND/OR/XOR of a constant BUILD_VECTOR (PR #210883)   via llvm-commits
• [llvm] 921f4da - [SLP][Modularisation][NFC] Extract free cost helpers into SLPCostAnalysis (#210278)   via llvm-commits
• [llvm] [SLP][Modularisation][NFC] Extract free cost helpers into SLPCostAnalysis (PR #210278)   Madhur Amilkanthwar via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
• [llvm] [DebugInfo] Update assigned DWARF language codes (PR #210884)   via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [ARM] Use .reloc for dso_local weak symbols in PIC mode instead of GOT indirection (PR #209660)   dong jianqiang via llvm-commits
• [llvm] [DebugInfo] Fix Fortran 2018 default array lower bound (PR #210885)   via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   Sam Elliott via llvm-commits
• [clang] [llvm] [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (PR #210713)   Mariusz Sikora via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (PR #210647)   Ramkumar Ramachandra via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (PR #210647)   Ramkumar Ramachandra via llvm-commits
• [llvm] 9aebd4b - [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (#210028)   via llvm-commits
• [llvm] [RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats (PR #210028)   Luke Lau via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   Alexis Engelke via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Support for "atomic compare capture" (PR #202315)   via llvm-commits
• [llvm] [InstCombine] Fold (X * 0.0) * constant => X * 0.0 #85241 (PR #92512)   via llvm-commits
• [llvm] [IR] Encode no-op addrspacecast validity in DataLayout (PR #210888)   Michal Paszkowski via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (alternative) (PR #210739)   Nikita Taranov via llvm-commits
• [llvm] [IRCE] Check loop clone legality before attempting to do so (PR #151062)   Aleksandr Popov via llvm-commits
• [llvm] [IR] Encode no-op addrspacecast validity in DataLayout (PR #210888)   Michal Paszkowski via llvm-commits
• [libc] [llvm] [ilbc] Revert recent changes to the hermetic tests (PR #210889)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   via llvm-commits
• [libc] [llvm] [ilbc] Revert recent changes to the hermetic tests (PR #210889)   Jeff Bailey via llvm-commits
• [llvm] [AArch64] Fold shifts of guarded vector inputs into USHL and SSHL (PR #210880)   Adam Scott via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Fold shifts of guarded vector inputs into USHL and SSHL (PR #210880)   via llvm-commits
• [llvm] [premerge] Build and check runtimes on macOS premerge (PR #210852)   Andrew Haberlandt via llvm-commits
• [llvm] [AArch64] Fold shifts of guarded vector inputs into USHL and SSHL (PR #210880)   Adam Scott via llvm-commits
• [llvm] [CodeGen] Precompute pressure-set register classes (PR #210751)   Alexis Engelke via llvm-commits
• [llvm] 4c8e5c3 - [TTI] Fix haveFastClmul to access inherited DL via thisT() (#210647)   via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (PR #210647)   Ramkumar Ramachandra via llvm-commits
• [llvm] [TTI] Fix haveFastClmul to access inherited DL via thisT() (PR #210647)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   Kane Wang via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   via llvm-commits
• [llvm] [polly] [LoopInfo] Replace raw loop-container accessors with semantic operations (PR #210653)   Fangrui Song via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Nikhil Kotikalapudi via llvm-commits
• [llvm] [CodeGen][NewPM] Introduce CodeGenPassManager (PR #210473)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   Kane Wang via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Support for "atomic compare capture" (PR #202315)   via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   via llvm-commits
• [llvm] [X86] MIR-level tests for bitcnt/bls/compress/expand false dependencies (PR #209879)   Simon Pilgrim via llvm-commits
• [llvm] [X86] MIR-level tests for bitcnt/bls/compress/expand false dependencies (PR #209879)   Simon Pilgrim via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Konrad Kleine via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Fangrui Song via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   Victor Campos via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   Victor Campos via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] 13822d0 - [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (#204329)   via llvm-commits
• [llvm] [RFC][LangRef] Specify that the accessed bytes of concurrent atomics must be either disjoint or the same (PR #204329)   Fabian Ritter via llvm-commits
• [llvm] [FileCheck][NFC] Encapsulate more into InputAnnotationLabeler (PR #207484)   Fangrui Song via llvm-commits
• [llvm] [AArch64][ISel] Support i1 masked interleaved loads and stores (PR #209231)   David Sherwood via llvm-commits
• [llvm] [AArch64] Update abs cost with scalar costs and CSSC. NFC (PR #210900)   David Green via llvm-commits
• [llvm] e3dfa82 - [AArch64] Update abs cost with scalar costs and CSSC. NFC (#210900)   via llvm-commits
• [llvm] [AArch64] Update abs cost with scalar costs and CSSC. NFC (PR #210900)   David Green via llvm-commits
• [libc] [llvm] [ilbc] Revert recent changes to the hermetic tests (PR #210889)   Pavel Labath via llvm-commits
• [llvm] [IR] Encode no-op addrspacecast validity in DataLayout (PR #210888)   Michal Paszkowski via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [IR] Encode no-op addrspacecast validity in DataLayout (PR #210888)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][GlobalISel] Move `to_tframeindex` & `renderFrameIndex` from targets into common code. (PR #210896)   via llvm-commits
• [llvm] [SelectionDAG][GlobalISel] Move `to_tframeindex` & `renderFrameIndex` from targets into common code. (PR #210896)   Matt Arsenault via llvm-commits
• [llvm] d80b9a5 - [X86] MIR-level tests for bitcnt/bls/compress/expand false dependencies (#209879)   via llvm-commits
• [llvm] [X86] MIR-level tests for bitcnt/bls/compress/expand false dependencies (PR #209879)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][GlobalISel] Move `to_tframeindex` & `renderFrameIndex` from targets into common code. (PR #210896)   Demetrius Kanios via llvm-commits
• [llvm] [RISC-V] Use an optional offset operand instead of zero-offset InstAliases (PR #210901)   Alexander Richardson via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [NFC][llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [RISC-V] Use an optional offset operand instead of zero-offset InstAliases (PR #210901)   via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Fangrui Song via llvm-commits
• [llvm] Fix LLVM_VERSION_SUFFIX handling for release branches (PR #210865)   Cyrus Ding via llvm-commits
• [llvm] [IR] Encode no-op addrspacecast validity in DataLayout (PR #210888)   Michal Paszkowski via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Konrad Kleine via llvm-commits
• [llvm] [IR] Encode no-op addrspacecast validity in DataLayout (PR #210888)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   Kane Wang via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Generalize A + zext(-A + B) fold to A + zext(C + X) (PR #209160)   Florian Hahn via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   Kane Wang via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Konrad Kleine via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   Kane Wang via llvm-commits
• [llvm] Fix LLVM_VERSION_SUFFIX handling for release branches (PR #210865)   via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   Craig Topper via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   Kane Wang via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Matt Arsenault via llvm-commits
• [llvm] 62e843a - [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (#210366)   via llvm-commits
• [llvm] [AMDGPU] Reject illegal image atomic data widths in SelectionDAG (PR #210366)   Arseniy Obolenskiy via llvm-commits
• [llvm] [VectorCombine] Check load offsets in APInt before narrowing shuffle indices (PR #210904)   via llvm-commits
• [llvm] [VectorCombine] Check load offsets in APInt before narrowing shuffle indices (PR #210904)   via llvm-commits
• [llvm] [VectorCombine] Check load offsets in APInt before narrowing shuffle indices (PR #210904)   via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Yuyang Zhang via llvm-commits
• [llvm] [AMDGPU] Un-share poison-padded BUILD_VECTOR in INSERT_VECTOR_ELT combine (PR #199631)   Yuyang Zhang via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   via llvm-commits
• [llvm] [AMDGPU] Un-share poison-padded BUILD_VECTOR in INSERT_VECTOR_ELT combine (PR #199631)   Yuyang Zhang via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Matt Arsenault via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fold low-prefix masked memops (PR #205118)   via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Matt Arsenault via llvm-commits
• [llvm] [LV] Allow runtime checks for low trip count loops without scalar epilogues (PR #197391)   Mel Chen via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Fold low-prefix masked memops (PR #205118)   via llvm-commits
• [llvm] [AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (PR #207201)   Sander de Smalen via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Cullen Rhodes via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Add FMIN/FMAX clustering on Apple CPU (PR #210906)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Add FMIN/FMAX clustering (PR #210906)   Tomer Shafir via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Add FMIN/FMAX clustering (PR #210906)   Tomer Shafir via llvm-commits
• [llvm] [LV] Allow runtime checks for low trip count loops without scalar epilogues (PR #197391)   Mel Chen via llvm-commits
• [llvm] [AMDGPU] Add per-class register stress options (PR #210907)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU] Add per-class register stress options (PR #210907)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU] Add per-class register stress options (PR #210907)   via llvm-commits
• [llvm] 285a3cb - [CycleInfo] Store entries in the block layout. NFC (#210866)   via llvm-commits
• [llvm] [CycleInfo] Store entries in the block layout. NFC (PR #210866)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Add per-class register stress options (PR #210907)   via llvm-commits
• [llvm] [LV] Allow runtime checks for low trip count loops without scalar epilogues (PR #197391)   Mel Chen via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Allow runtime checks for low trip count loops without scalar epilogues (PR #197391)   Mel Chen via llvm-commits
• [llvm] 0228fac - [RISCV][P-Ext] Add RISCVISD::WADD/WSUB. (#210862)   via llvm-commits
• [llvm] [VPlan] Use equal_to in isUsedByLoadStoreAddr (NFC) (PR #210911)   via llvm-commits
• [llvm] [VPlan] Use equal_to in isUsedByLoadStoreAddr (NFC) (PR #210911)   via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Konrad Kleine via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Konrad Kleine via llvm-commits
• [clang] [llvm] [Clang][coro] Fix `coro.free` in `.resume` clones with `[[clang::coro_await_elidable]]` (PR #207799)   Chuanqi Xu via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Konrad Kleine via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Konrad Kleine via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RegisterCoalescer] Avoid retrying high-cost joins for live intervals (PR #207976)   via llvm-commits
• [llvm] [VPlan] Migrate VPBuilder to VPInsertPt fully (NFC) (PR #209764)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RegisterCoalescer] Avoid retrying high-cost joins for live intervals (PR #207976)   Matt Arsenault via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [CodeGen] Precompute pressure-set register classes (PR #210751)   Nathan Corbyn via llvm-commits
• [llvm] [VPlan] Use equal_to in isUsedByLoadStoreAddr (NFC) (PR #210911)   Luke Lau via llvm-commits
• [llvm] [VPlan] Drop redundant ArrayRef constructions (NFC) (PR #210680)   Florian Hahn via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   via llvm-commits
• [llvm] [SelectionDAG][GlobalISel] Move `to_tframeindex` & `renderFrameIndex` from targets into common code. (PR #210896)   via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   via llvm-commits
• [llvm] [SelectionDAG] Merge consecutive loads feeding as shuffle operands (PR #207303)   Ricardo Jesus via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Use module flags to control xnack and sramecc (PR #204595)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   via llvm-commits
• [llvm] [VPlan] Use equal_to in isUsedByLoadStoreAddr (NFC) (PR #210911)   Florian Hahn via llvm-commits
• [llvm] [LFI][X86] Add control-flow rewrites (PR #210913)   Zachary Yedidia via llvm-commits
• [llvm] [LFI][X86] Add control-flow rewrites (PR #210913)   via llvm-commits
• [llvm] c096c8d - PPC: Remove manual run of machine verifier (#208032)   via llvm-commits
• [llvm] PPC: Remove manual run of machine verifier (PR #208032)   Matt Arsenault via llvm-commits
• [llvm] 9e2664e - [GVN] Rename some functions to follow LLVM naming conventions (NFC) (#210332)   via llvm-commits
• [llvm] [GVN] Rename some functions to follow LLVM naming conventions (NFC) (PR #210332)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Remove unused debug helper (NFC) (PR #210333)   Momchil Velikov via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Yuyang Zhang via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Yuyang Zhang via llvm-commits
• [llvm] PPC: Remove manual run of machine verifier (PR #208032)   LLVM Continuous Integration via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Yuyang Zhang via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Yuyang Zhang via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Yuyang Zhang via llvm-commits
• [llvm] [VPlan] Use equal_to in isUsedByLoadStoreAddr (NFC) (PR #210911)   Ramkumar Ramachandra via llvm-commits
• [llvm] bd07f0c - [VPlan] Drop redundant ArrayRef constructions (NFC) (#210680)   via llvm-commits
• [llvm] [VPlan] Drop redundant ArrayRef constructions (NFC) (PR #210680)   Ramkumar Ramachandra via llvm-commits
• [llvm] RuntimeLibcalls: Emit all available impls for a libcall, not just one (PR #210915)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Emit all available impls for a libcall, not just one (PR #210915)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fold constant PARTIAL_REDUCE_SMLA/UMLA/SUMLA nodes (PR #210351)   via llvm-commits
• [llvm] [OFFLOAD][L0] Fix PatternSize assert in L0QueueTy::memoryFill (PR #210867)   via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   David Sherwood via llvm-commits
• [compiler-rt] 46fb353 - [compiler-rt][test] Skip page-size feature detection under emulators. (#210683)   via llvm-commits
• [compiler-rt] [compiler-rt][test] Skip page-size feature detection under emulators. (PR #210683)   Simi Pallipurath via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] RuntimeLibcalls: Emit all available impls for a libcall, not just one (PR #210915)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Add s_wait asynccnt/tensorcnt test for gfx13 (PR #210916)   Mariusz Sikora via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [OFFLOAD][L0] Fix PatternSize assert in L0QueueTy::memoryFill (PR #210867)   Łukasz Plewa via llvm-commits
• [llvm] [NFC][AMDGPU] Add s_wait asynccnt/tensorcnt test for gfx13 (PR #210916)   via llvm-commits
• [llvm] [OFFLOAD][L0] Fix PatternSize assert in L0QueueTy::memoryFill (PR #210867)   Łukasz Plewa via llvm-commits
• [llvm] RuntimeLibcalls: Emit all available impls for a libcall, not just one (PR #210915)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Emit all available impls for a libcall, not just one (PR #210915)   via llvm-commits
• [llvm] RuntimeLibcalls: Add sqrtf to the Hexagon runtime libcall set (PR #210909)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] d0cc912 - [VPlan] Use equal_to in isUsedByLoadStoreAddr (NFC) (#210911)   via llvm-commits
• [llvm] [VPlan] Use equal_to in isUsedByLoadStoreAddr (NFC) (PR #210911)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Add per-class register stress options (PR #210907)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU] Add per-class register stress options (PR #210907)   Romanov Vlad via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   David Sherwood via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize predicated loop-invariant loads via masked load + broadcast (PR #200361)   Florian Hahn via llvm-commits
• [llvm] [CodeGen] Precompute pressure-set register classes (PR #210751)   Cullen Rhodes via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Keshav Vinayak Jha via llvm-commits
• [llvm] [X86] narrow the check scope to function NFC (PR #210917)   Kamlesh Kumar via llvm-commits
• [llvm] [X86] narrow the check scope to function NFC (PR #210917)   via llvm-commits
• [llvm] [NFC][AMDGPU] Add s_wait asynccnt/tensorcnt test for gfx13 (PR #210916)   Mirko Brkušanin via llvm-commits
• [llvm] fd9e690 - [RegisterCoalescer] Avoid retrying high-cost joins for live intervals (#207976)   via llvm-commits
• [llvm] [RegisterCoalescer] Avoid retrying high-cost joins for live intervals (PR #207976)   Matt Arsenault via llvm-commits
• [llvm] [RegisterCoalescer] Avoid retrying high-cost joins for live intervals (PR #207976)   via llvm-commits
• [llvm] [X86] Synchronise middle and backend test coverage for ADDSUBPS/PD patterns (PR #210919)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Synchronise middle and backend test coverage for ADDSUBPS/PD patterns (PR #210919)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   Georgiy Samoylov via llvm-commits
• [lldb] [llvm] [llvm][lldb] Add check for incorrect target features (PR #180901)   Georgiy Samoylov via llvm-commits
• [llvm] [X86] narrow the check scope to function NFC (PR #210917)   Jaydeep Chauhan via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [SelectionDAG] Merge consecutive loads feeding as shuffle operands (PR #207303)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [AArch64][SME] Scan function attributes once in SMEAttrs (NFC) (PR #210924)   Benjamin Maxwell via llvm-commits
• [lld] 914d5a1 - [DTLTO] Overlap temporary file removal (#209423)   via llvm-commits
• [lld] [llvm] [DTLTO] Overlap temporary file removal (PR #209423)   Ben Dunbobbin via llvm-commits
• [lld] [llvm] [DTLTO] Overlap temporary file removal (PR #209423)   Ben Dunbobbin via llvm-commits
• [llvm] [InstCombine] Fold icmp on frexp exponent to fcmp on fabs(x) (PR #210711)   via llvm-commits
• [lld] [llvm] [DTLTO] Overlap temporary file removal (PR #209423)   Ben Dunbobbin via llvm-commits
• [llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)   Kane Wang via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   via llvm-commits
• [llvm] [GVN] Remove unused debug helper (NFC) (PR #210333)   Momchil Velikov via llvm-commits
• [llvm] [InstCombine] Fold icmp on frexp exponent to fcmp on fabs(x) (PR #210711)   via llvm-commits
• [llvm] [ExpandVariadics] Don't lower unmangled C printf on SPIR-V (PR #206998)   Paulius Velesko via llvm-commits
• [llvm] [AMDGPU] Reject illegal buffer atomic data widths in SelectionDAG (PR #210925)   Arseniy Obolenskiy via llvm-commits
• [llvm] [GlobalISel][AMDGPU][test] fix cttz/cltz tests in no-assert builds (PR #210926)   Alan Li via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Reject illegal buffer atomic data widths in SelectionDAG (PR #210925)   via llvm-commits
• [llvm] [GlobalISel][AMDGPU][test] fix cttz/cltz tests in no-assert builds (PR #210926)   via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [RISC-V] Use an optional offset operand instead of zero-offset InstAliases (PR #210901)   Alexander Richardson via llvm-commits
• [llvm] [InstCombine] Fold icmp on frexp exponent to fcmp on fabs(x) (PR #210711)   via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Antonio Frighetto via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Antonio Frighetto via llvm-commits
• [llvm] [VPlan] Detect contiguous accesses in outer loop VPlan path. (PR #203790)   Mel Chen via llvm-commits
• [llvm] [RISCV] Lower prefix slide-pair shuffle as vslidedown (PR #210927)   Liao Chunyu via llvm-commits
• [llvm] [APFloat] Generalize bitcast to also cover x87 semantics (PR #209781)   via llvm-commits
• [llvm] [RISCV] Lower prefix slide-pair shuffle as vslidedown (PR #210927)   via llvm-commits
• [llvm] [GlobalISel][AMDGPU][test] fix cttz/cltz tests in no-assert builds (PR #210926)   via llvm-commits
• [llvm] Handle lifetime.end-only allocas (PR #210581)   via llvm-commits
• [llvm] [IR] Encode no-op addrspacecast validity in DataLayout (PR #210888)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Migrate VPBuilder to VPInsertPt fully (NFC) (PR #209764)   via llvm-commits
• [llvm] [LV] Enable the exit value optimization via SCEV for tail folding. (PR #210928)   Mel Chen via llvm-commits
• [llvm] [SLP] Vectorize select-addressed loads as masked-load blends (PR #210455)   Alexey Bataev via llvm-commits
• [llvm] [LV] Enable the exit value optimization via SCEV for tail folding. (PR #210928)   via llvm-commits
• [llvm] [LV] Enable the exit value optimization via SCEV for tail folding. (PR #210928)   via llvm-commits
• [llvm] Handle lifetime.end-only allocas (PR #210581)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_AND/OR/XOR of a constant BUILD_VECTOR (PR #210883)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] 818fd11 - [SelectionDAG] Merge consecutive loads feeding as shuffle operands (#207303)   via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] [SelectionDAG] Merge consecutive loads feeding as shuffle operands (PR #207303)   Simon Pilgrim via llvm-commits
• [llvm] Install llvm 23 in libc docker image (PR #210929)   via llvm-commits
• [llvm] Install llvm 23 in libc docker image (PR #210929)   via llvm-commits
• [llvm] 46e8d53 - [X86] Synchronise middle and backend test coverage for ADDSUBPS/PD patterns (#210919)   via llvm-commits
• [llvm] [X86] Synchronise middle and backend test coverage for ADDSUBPS/PD patterns (PR #210919)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (alternative) (PR #210739)   Nikita Taranov via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (alternative) (PR #210739)   Nikita Taranov via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (alternative) (PR #210739)   Nikita Taranov via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   Alexis Engelke via llvm-commits
• [llvm] Reland "[lit] Migrate lit to ProcessPoolExecutor (#202681)" (PR #209076)   Prasoon Kumar via llvm-commits
• [llvm] [AArch64] Add FMIN/FMAX clustering (PR #210906)   Tomer Shafir via llvm-commits
• [llvm] be25717 - [Xtensa] Support 'f' Inline Assembly Constraint (#202345)   via llvm-commits
• [llvm] [SLP] Extend compare chains downward before bottom-up vectorization (PR #210921)   Alexey Bataev via llvm-commits
• [llvm] [Xtensa] Support 'f' Inline Assembly Constraint (PR #202345)   Andrei Safronov via llvm-commits
• [llvm] [AArch64] Add FMIN/FMAX clustering (PR #210906)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] Enforce single-operand form for llvm.loop.vectorize metadata (PR #210932)   Madhur Amilkanthwar via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] Enforce single-operand form for llvm.loop.vectorize metadata (PR #210932)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] Enforce single-operand form for llvm.loop.vectorize metadata (PR #210932)   via llvm-commits
• [llvm] [InstCombine] Fold icmp on frexp exponent to fcmp on fabs(x) (PR #210711)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold icmp on frexp exponent to fcmp on fabs(x) (PR #210711)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_AND/OR/XOR of a constant BUILD_VECTOR (PR #210883)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_AND/OR/XOR of a constant BUILD_VECTOR (PR #210883)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] Enforce single-operand form for llvm.loop.vectorize metadata (PR #210932)   Madhur Amilkanthwar via llvm-commits
• [llvm] [DAGCombiner] Fold insert_vector_elt into a shared BUILD_VECTOR with undef lanes (PR #210905)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] [llvm-reduce] Tighten the check to count actual store NFC (PR #210933)   Kamlesh Kumar via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] [SLP] Extend compare chains downward before bottom-up vectorization (PR #210921)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Extend compare chains downward before bottom-up vectorization (PR #210921)   Alexey Bataev via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   via llvm-commits
• [llvm] [VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (PR #209885)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] [VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (PR #209885)   Florian Hahn via llvm-commits
• [llvm] [GlobalISel][AMDGPU][test] fix cttz/cltz tests in no-assert builds (PR #210926)   Alan Li via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] Enforce single-operand form for llvm.loop.vectorize metadata (PR #210932)   Madhur Amilkanthwar via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Detect contiguous accesses in outer loop VPlan path. (PR #203790)   Florian Hahn via llvm-commits
• [llvm] [X86] Remove TuningPOPCNTFalseDeps from x86-64-v4 (PR #210312)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][ISel] Support i1 masked interleaved loads and stores (PR #209231)   Paul Walker via llvm-commits
• [llvm] [AArch64] Avoid ld4 lowering for deinterleave4 feeding uitofp (PR #200763)   Kamlesh Kumar via llvm-commits
• [llvm] [AArch64] Avoid ld4 lowering for deinterleave4 feeding uitofp (PR #200763)   Kamlesh Kumar via llvm-commits
• [llvm] [VPlan] Detect contiguous accesses in outer loop VPlan path. (PR #203790)   Florian Hahn via llvm-commits
• [llvm] [Docs] Remove dead Phabricator link from DeveloperPolicy (PR #210934)   via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][ISel] Support i1 masked interleaved loads and stores (PR #209231)   Harry Ramsey via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [InstCombine]Fold bitcast shuffle ashr v2i64 (PR #206717)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine]Fold bitcast shuffle ashr v2i64 (PR #206717)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine]Fold bitcast shuffle ashr v2i64 (PR #206717)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine]Fold bitcast shuffle ashr v2i64 (PR #206717)   Simon Pilgrim via llvm-commits
• [llvm] Reland "[lit] Migrate lit to ProcessPoolExecutor (#202681)" (PR #209076)   Prasoon Kumar via llvm-commits
• [llvm] [RegisterCoalescer] Materialize undef subrange PHI inputs (PR #204867)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][ISel] Support i1 masked interleaved loads and stores (PR #209231)   Harry Ramsey via llvm-commits
• [llvm] [GlobalISel][AArch64] Add more memcpy and memmove tests (NFC) (PR #210263)   Simon Pilgrim via llvm-commits
• [llvm] 3ef7c5a - [GlobalISel][AMDGPU][test] fix cttz/cltz tests in no-assert builds (#210926)   via llvm-commits
• [llvm] [GlobalISel][AMDGPU][test] fix cttz/cltz tests in no-assert builds (PR #210926)   Alan Li via llvm-commits
• [clang] [llvm] [RISCV] Update Zvzip support to v0.2 (PR #210603)   via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   Trevor Gross via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [LV] Allow runtime checks for low trip count loops without scalar epilogues (PR #197391)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Preserve store memoperands (PR #210936)   Kamlesh Kumar via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Paulius Velesko via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [AArch64] Preserve store memoperands (PR #210936)   via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] Revert "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (PR #210937)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] Revert "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (PR #210937)   Luke Lau via llvm-commits
• [llvm] acfaabe - Revert "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (#210937)   via llvm-commits
• [llvm] Revert "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (PR #210937)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Matt Arsenault via llvm-commits
• [llvm] Revert "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (PR #210937)   via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [AMDGPU] Reject illegal buffer atomic data widths in SelectionDAG (PR #210925)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Port MFMA-form rewrite refinements onto shared copy-plan analysis (PR #210703)   via llvm-commits
• [llvm] [ARM] Fix chkstk definition (PR #210940)   Trung Nguyen via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [ARM] Fix chkstk definition (PR #210940)   Trung Nguyen via llvm-commits
• [llvm] [ARM] Fix chkstk definition (PR #210940)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] Enforce single-operand form for llvm.loop.vectorize metadata (PR #210932)   Madhur Amilkanthwar via llvm-commits
• [llvm] [WIP][X86] Sync backend addsub tests with middleend codegen (PR #200399)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][ISel] Recover ADDHN from OR comparison masks (PR #210943)   Harry Ramsey via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [AArch64][ISel] Recover ADDHN from OR comparison masks (PR #210943)   via llvm-commits
• [llvm] [AMDGPU] Fix LDS access via flat pointer argument in amdgpu-sw-lower-lds (PR #209842)   via llvm-commits
• [llvm] [DAGCombiner] Port custom DAG combine for `rem` from NVPTX (PR #210344)   Matt Arsenault via llvm-commits
• [llvm] Revert "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (PR #210937)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Add per-class register stress options (PR #210907)   Matt Arsenault via llvm-commits
• [llvm] 7f9f1ac - [llvm-ir2vec] Adding metadata for llvm-ir2vec python binding wheel builds (#194222)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding metadata for llvm-ir2vec python binding wheel builds (PR #194222)   S. VenkataKeerthy via llvm-commits
• [llvm] ea20554 - [VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (#209885)   via llvm-commits
• [llvm] [VPlan] Move lowering transforms to VPlanLowering.cpp (NFC) (PR #209885)   Florian Hahn via llvm-commits
• [llvm] aeda9ae - [SelectionDAG] Fold VECREDUCE_AND/OR/XOR of a constant BUILD_VECTOR (#210883)   via llvm-commits
• [llvm] [SelectionDAG] Fold VECREDUCE_AND/OR/XOR of a constant BUILD_VECTOR (PR #210883)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] 136547c - [VPlan] Detect contiguous accesses in outer loop VPlan path. (#203790)   via llvm-commits
• [llvm] [VPlan] Detect contiguous accesses in outer loop VPlan path. (PR #203790)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Paulius Velesko via llvm-commits
• [llvm] [AMDGPU] Add per-class register stress options (PR #210907)   Romanov Vlad via llvm-commits
• [llvm] [SLP] Merge redundant input operands of binary-operator nodes (PR #208670)   Balakrishna Bandlapalli via llvm-commits
• [llvm] [SDAG] Use DAG.getTokenFactor in more places (PR #210949)   David Green via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat.i16 to SALU instructions (PR #210156)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat.i16 to SALU instructions (PR #210156)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat.i16 to SALU instructions (PR #210156)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat.i16 to SALU instructions (PR #210156)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Use DAG.getTokenFactor in more places (PR #210949)   via llvm-commits
• [llvm] [SDAG] Use DAG.getTokenFactor in more places (PR #210949)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Extend compare chains downward before bottom-up vectorization (PR #210921)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   via llvm-commits
• [clang] [llvm] [ADT] Add single-pass merge for ImmutableSet/ImmutableMap (PR #209807)   Balázs Benics via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   via llvm-commits
• [llvm] [release] Build all targets for Windows releases (PR #208747)   via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   Matt Arsenault via llvm-commits
• [llvm] [Hexagon] Avoid spurious high vmem for contained sub-HVX stores (PR #204661)   via llvm-commits
• [llvm] [SDAG] Use DAG.getTokenFactor in more places (PR #210949)   Simon Pilgrim via llvm-commits
• [llvm] [GlobalISel] Port over `simplifyDemandedBits` to GlobalISel (PR #198808)   Alan Li via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa][NFC] Use compact enum for CPUNames/features (PR #206954)   Alexis Engelke via llvm-commits
• [llvm] [Xtensa][NFC] Use compact enum for CPUNames/features (PR #206954)   Alexis Engelke via llvm-commits
• [llvm] [Xtensa][NFC] Use compact enum for CPUNames/features (PR #206954)   Alexis Engelke via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   Alexis Engelke via llvm-commits
• [llvm] [DAGCombiner] Teach MatchLoadCombine to look through AND masks (PR #200247)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Teach MatchLoadCombine to look through AND masks (PR #200247)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [ADT] Add single-pass merge for ImmutableSet/ImmutableMap (PR #209807)   Utkarsh Saxena via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   Mateusz Mikuła via llvm-commits
• [clang] [llvm] [ADT] Add single-pass merge for ImmutableSet/ImmutableMap (PR #209807)   Utkarsh Saxena via llvm-commits
• [llvm] ad3f09c - [ADT] Add single-pass merge for ImmutableSet/ImmutableMap (#209807)   via llvm-commits
• [clang] [llvm] [ADT] Add single-pass merge for ImmutableSet/ImmutableMap (PR #209807)   Gábor Horváth via llvm-commits
• [llvm] AMDGPU: VALU data fast-forwarding needs no s_delay (PR #205481)   Reem Elkhouly via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Giles Payne via llvm-commits
• [llvm] AMDGPU: Refactor checkVOPDRegConstraints (PR #196514)   Petar Avramovic via llvm-commits
• [llvm] Only set LLVM_ENABLE_DIA_SDK in bazel build defs to zero if not set by build args (PR #210723)   David Young via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Giles Payne via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   via llvm-commits
• [llvm] [Xtensa][NFC] Use compact enum for CPUNames/features (PR #206954)   Andrei Safronov via llvm-commits
• [llvm] [Xtensa][NFC] Use compact enum for CPUNames/features (PR #206954)   Andrei Safronov via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Giles Payne via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [PassBuilder] Run MemCpyOpt before early SROA (PR #210875)   Rick Guo via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs (PR #210955)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs (PR #210955)   Sudharsan Veeravalli via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs (PR #210955)   via llvm-commits
• [llvm] [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (PR #204938)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (PR #204938)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (PR #204938)   Sander de Smalen via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Matt Arsenault via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Matt Arsenault via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Matt Arsenault via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Matt Arsenault via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   Trevor Gross via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ehsan Amiri via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Petar Avramovic via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   via llvm-commits
• [llvm] [SDAG][NVPTX] Cache control metadata support and lowering (PR #204067)   Matt Arsenault via llvm-commits
• [llvm] [PassBuilder] Run MemCpyOpt before early SROA (PR #210875)   Rick Guo via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   David Green via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   via llvm-commits
• [clang] [llvm] [clang][X86] Return Win64 __int128 indirectly (PR #210358)   via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs (PR #210955)   Sudharsan Veeravalli via llvm-commits
• [llvm] [Pipelines] Run MemCpyOpt before early SROA (PR #210875)   Rick Guo via llvm-commits
• [llvm] [Pipelines] Run MemCpyOpt before early SROA (PR #210875)   Rick Guo via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [GlobalISel] Port over `simplifyDemandedBits` to GlobalISel (PR #198808)   Alan Li via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Petar Avramovic via llvm-commits
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• [llvm] [AArch64][ISel] Prefer SVE over NEON for fixed-width ASL LSR (PR #199003)   Paul Walker via llvm-commits
• [llvm] fe0bc11 - [NFC][AMDGPU] Add s_wait asynccnt/tensorcnt test for gfx13 (#210916)   via llvm-commits
• [llvm] [NFC][AMDGPU] Add s_wait asynccnt/tensorcnt test for gfx13 (PR #210916)   Mariusz Sikora via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Matt Arsenault via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Paulius Velesko via llvm-commits
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• [llvm] [Xtensa][NFC] Use compact enum for CPUNames/features (PR #206954)   Alexis Engelke via llvm-commits
• [llvm] [AMDGPU] Use global_prefetch_b8 for GFX1250 unclaused VMEM workaround (PR #210874)   Jay Foad via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
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• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Paulius Velesko via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] [bazel][llvm] Guard pthread_getname_np / posix_spawn for low-API Android (PR #203412)   David Young via llvm-commits
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• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   David Sherwood via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   David Sherwood via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   David Sherwood via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   David Sherwood via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   David Sherwood via llvm-commits
• [llvm] [AArch64] Accept __chkstk_darwin stack probes on Darwin (PR #210812)   Karim Alweheshy via llvm-commits
• [llvm] 4d4bf12 - [AMDGPU] Reject illegal buffer atomic data widths in SelectionDAG (#210925)   via llvm-commits
• [llvm] [AMDGPU] Reject illegal buffer atomic data widths in SelectionDAG (PR #210925)   Arseniy Obolenskiy via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Florian Hahn via llvm-commits
• [llvm] RuntimeLibcalls: Add sqrtf to the Hexagon runtime libcall set (PR #210909)   Matt Arsenault via llvm-commits
• [llvm] [SLP]Fix crash on short interleaved gathered-load remainder (PR #210965)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Fix crash on short interleaved gathered-load remainder (PR #210965)   via llvm-commits
• [llvm] 981735b - [SLP]Fix crash on short interleaved gathered-load remainder   via llvm-commits
• [llvm] [SLP]Fix crash on short interleaved gathered-load remainder (PR #210965)   Alexey Bataev via llvm-commits
• [llvm] 3ed1836 - [GlobalISel][AArch64] Add more memcpy and memmove tests (NFC) (#210263)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Add more memcpy and memmove tests (NFC) (PR #210263)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Florian Hahn via llvm-commits
• [lld] [lld][ELF] Fix dynamic relocations in .eh_frame (PR #210967)   Kirill A. Korinsky via llvm-commits
• [lld] [lld][ELF] Fix dynamic relocations in .eh_frame (PR #210967)   via llvm-commits
• [lld] [lld][ELF] Fix dynamic relocations in .eh_frame (PR #210967)   via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Kirill A. Korinsky via llvm-commits
• [clang] [llvm] [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (PR #210713)   Mariusz Sikora via llvm-commits
• [clang] [llvm] [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (PR #210713)   Mariusz Sikora via llvm-commits
• [llvm] 27eeb73 - AMDGPU: Use module flags to control xnack and sramecc (#204595)   via llvm-commits
• [clang] [llvm] AMDGPU: Use module flags to control xnack and sramecc (PR #204595)   Matt Arsenault via llvm-commits
• [llvm] b1d21c6 - [ExpandVariadics] Don't lower unmangled C printf on SPIR-V (#206998)   via llvm-commits
• [llvm] [ExpandVariadics] Don't lower unmangled C printf on SPIR-V (PR #206998)   Joseph Huber via llvm-commits
• [llvm] [CostModel][X86] getArithmeticReductionCost - convert to CostKindTblEntry entries. NFC. (PR #210969)   Simon Pilgrim via llvm-commits
• [libcxx] [libcxxabi] [llvm] [runtimes] Unify exception and RTTI configuration for the runtimes (PR #165296)   Louis Dionne via llvm-commits
• [llvm] [AMDGPU] Fix fmul/fma legacy sign-of-zero miscompile (PR #203567)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix fmul/fma legacy sign-of-zero miscompile (PR #203567)   Matt Arsenault via llvm-commits
• [llvm] [CostModel][X86] getArithmeticReductionCost - convert to CostKindTblEntry entries. NFC. (PR #210969)   via llvm-commits
• [llvm] [AMDGPU] Fix fmul/fma legacy sign-of-zero miscompile (PR #203567)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Kirill A. Korinsky via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to cover 64-bit vectors. (PR #209833)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Kirill A. Korinsky via llvm-commits
• [llvm] [AMDGPU] Port MFMA-form rewrite refinements onto shared copy-plan analysis (PR #210703)   via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Matt Arsenault via llvm-commits
• [llvm] 4aa8d56 - [LLVM][SVE] Convert FFR intrinsic definition to use IntrRead/IntrWrite. (#210084)   via llvm-commits
• [llvm] [LLVM][SVE] Convert FFR intrinsic definition to use IntrRead/IntrWrite. (PR #210084)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   Joseph Huber via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Port MFMA-form rewrite refinements onto shared copy-plan analysis (PR #210703)   via llvm-commits
• [llvm] [gn build] Port 1a11f6ca1779 (PR #210974)   Nico Weber via llvm-commits
• [llvm] [gn build] Port 30c0454414ec (PR #210975)   Nico Weber via llvm-commits
• [llvm] [gn build] Port 921f4da4a05f (PR #210976)   Nico Weber via llvm-commits
• [llvm] [gn build] Port ea205541b987 (PR #210977)   Nico Weber via llvm-commits
• [llvm] [release] Build all targets for Windows releases (PR #208747)   via llvm-commits
• [llvm] [SCEV][NFC] Precommit tests for MatchRangeCheckIdiom through zext (PR #210978)   Aleksandr Popov via llvm-commits
• [llvm] [VPlan] Remove additional stray whitespace when printing calls. (PR #210979)   Florian Hahn via llvm-commits
• [llvm] [SCEV][NFC] Precommit tests for MatchRangeCheckIdiom through zext (PR #210978)   Aleksandr Popov via llvm-commits
• [llvm] [SCEV][NFC] Precommit tests for MatchRangeCheckIdiom through zext (PR #210978)   Aleksandr Popov via llvm-commits
• [llvm] [BOLT] Prevent .rela.plt reordering (PR #207412)   Ilija Tovilo via llvm-commits
• [llvm] 0e678e9 - [gn build] Port ea205541b987 (#210977)   via llvm-commits
• [llvm] [gn build] Port ea205541b987 (PR #210977)   Nico Weber via llvm-commits
• [llvm] 11a6145 - [gn build] Port 921f4da4a05f (#210976)   via llvm-commits
• [llvm] [gn build] Port 921f4da4a05f (PR #210976)   Nico Weber via llvm-commits
• [llvm] 114372a - [gn build] Port 30c0454414ec (#210975)   via llvm-commits
• [llvm] [gn build] Port 30c0454414ec (PR #210975)   Nico Weber via llvm-commits
• [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Emil Pedersen via llvm-commits
• [llvm] 14cb461 - [gn build] Port 1a11f6ca1779 (#210974)   via llvm-commits
• [llvm] [gn build] Port 1a11f6ca1779 (PR #210974)   Nico Weber via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Arseniy Obolenskiy via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
• [llvm] LV: Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (PR #127399)   via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Arseniy Obolenskiy via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   David Green via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Sander de Smalen via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Sander de Smalen via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Add islands to StructurizeCFG (PR #201675)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add islands to StructurizeCFG (PR #201675)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add islands to StructurizeCFG (PR #201675)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add islands to StructurizeCFG (PR #201675)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add islands to StructurizeCFG (PR #201675)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [compiler-rt] [llvm] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] 1d0b606 - [Darwin][TSan] Fix race in mach_vm_deallocate interceptor (#210716)   via llvm-commits
• [compiler-rt] [Darwin][TSan] Fix race in mach_vm_deallocate interceptor (PR #210716)   Dan Blackwell via llvm-commits
• [llvm] [AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (PR #210986)   Shanzhi Chen via llvm-commits
• [llvm] [AMDGPU] Add islands to StructurizeCFG (PR #201675)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Remove additional stray whitespace when printing calls. (PR #210979)   Florian Hahn via llvm-commits
• [llvm] [SCEV][NFC] Precommit tests for MatchRangeCheckIdiom through zext (PR #210978)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold fp_to_int(fmul) for FPR results (PR #210987)   Kieran B via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   Mikołaj Piróg via llvm-commits
• [compiler-rt] [llvm] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold fp_to_int(fmul) for FPR results (PR #210987)   via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   via llvm-commits
• [llvm] [AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (PR #210986)   via llvm-commits
• [llvm] [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (PR #195402)   Paulius Velesko via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   Matt Arsenault via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Simon Pilgrim via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Simon Pilgrim via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (PR #210739)   Nikita Taranov via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Matt Arsenault via llvm-commits
• [llvm] 215b3e4 - [DAGCombiner] Teach MatchLoadCombine to look through AND masks (#200247)   via llvm-commits
• [llvm] [DAGCombiner] Teach MatchLoadCombine to look through AND masks (PR #200247)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   Mikołaj Piróg via llvm-commits
• [llvm] [DAGCombiner] Teach MatchLoadCombine to look through AND masks (PR #200247)   via llvm-commits
• [llvm] 81081c0 - [GVN] Remove unused debug helper (NFC) (#210333)   via llvm-commits
• [llvm] [GVN] Remove unused debug helper (NFC) (PR #210333)   Momchil Velikov via llvm-commits
• [llvm] [GVN] Reorganise GVN.h/GVH.cpp to improve readability and maintainability (NFC) (PR #210334)   Momchil Velikov via llvm-commits
• [llvm] [RISCV] Fix assertion in combineBinOpOfExtractToReduceTree on type mismatch (PR #202201)   Tanmay Gulhane via llvm-commits
• [llvm] [flang-rt] - Reduce ShallowCopy template instantiations to improve LTO time (PR #209915)   Tom Eccles via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Matt Arsenault via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   Mikołaj Piróg via llvm-commits
• [clang] [llvm] [X86] AVX10_V2_AUX Implementation (PR #206888)   Mikołaj Piróg via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Dynamically find unused register for stack protection code (PR #210992)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [RISCV] Dynamically find unused register for stack protection code (PR #210992)   via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   via llvm-commits
• [llvm] 7c40a1d - [CostModel][X86] getArithmeticReductionCost - convert to CostKindTblEntry entries. NFC. (#210969)   via llvm-commits
• [llvm] [CostModel][X86] getArithmeticReductionCost - convert to CostKindTblEntry entries. NFC. (PR #210969)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Add islands to StructurizeCFG (PR #201675)   Robert Imschweiler via llvm-commits
• [llvm] [GlobalISel] Compact failure targets in large match tables (PR #202642)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [clang][SemaCXX] Fixed a crash when returning an initialization to a top-level deleted function (PR #210973)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [CostModel][X86] getArithmeticReductionCost - add missing type split handling for AVX512 types (PR #210994)   Simon Pilgrim via llvm-commits
• [llvm] [CostModel][X86] getArithmeticReductionCost - add missing type split handling for AVX512 types (PR #210994)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Madhur Kumar via llvm-commits
• [llvm] b679982 - [VPlan] Remove additional stray whitespace when printing calls. (#210979)   via llvm-commits
• [llvm] [VPlan] Remove additional stray whitespace when printing calls. (PR #210979)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Add islands to StructurizeCFG (PR #201675)   Matt Arsenault via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   Tom Stellard via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   Tom Stellard via llvm-commits
• [llvm] [RISCV] Fix assertion in combineBinOpOfExtractToReduceTree on type mismatch (PR #202201)   Tanmay Gulhane via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold fp_to_int(fmul) for FPR results (PR #210987)   Kieran B via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (PR #210986)   Shanzhi Chen via llvm-commits
• [llvm] [FileCheck][NFC] Encapsulate more into InputAnnotationLabeler (PR #207484)   Joel E. Denny via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Anthony Latsis via llvm-commits
• [llvm] c3e48df - [FileCheck][NFC] Encapsulate more into InputAnnotationLabeler (#207484)   via llvm-commits
• [llvm] [FileCheck][NFC] Encapsulate more into InputAnnotationLabeler (PR #207484)   Joel E. Denny via llvm-commits
• [llvm] [FileCheck][NFC] Introduce FileCheckDiagAnnotator (PR #207485)   Joel E. Denny via llvm-commits
• [llvm] Revert "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (PR #210937)   Luke Lau via llvm-commits
• [llvm] [libsycl] Fix debug build error caused by RTTI option mismatch (PR #210997)   Sergey Semenov via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (PR #210986)   Shanzhi Chen via llvm-commits
• [llvm] [DirectX] Add slim debug support (PR #204459)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DirectX] Add slim debug support (PR #204459)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] ba83659 - [SDAG] Use DAG.getTokenFactor in more places (#210949)   via llvm-commits
• [llvm] [SDAG] Use DAG.getTokenFactor in more places (PR #210949)   David Green via llvm-commits
• [llvm] [LV] Vectorize fmin/fmax reductions (PR #198300)   Nashe Mncube via llvm-commits
• [llvm] [DirectX] Add slim debug support (PR #204459)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (PR #210923)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (PR #210923)   Alexey Bataev via llvm-commits
• [llvm] [NFC][AMDGPU] Use SIInstrFlags predicates in AMDGPUAsmParser (PR #210998)   Valery Pykhtin via llvm-commits
• [llvm] AMDGPU/GlobalISel: Clean up fp LLT usage in AMDGPULegalizerInfo (PR #210999)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Clean up fp LLT usage in AMDGPULegalizerInfo (PR #210999)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Romanov Vlad via llvm-commits
• [llvm] [FileCheck][NFC] Introduce FileCheckDiagAnnotator (PR #207485)   Joel E. Denny via llvm-commits
• [llvm] AMDGPU/GlobalISel: Clean up fp LLT usage in AMDGPULegalizerInfo (PR #210999)   Petar Avramovic via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Antonio Frighetto via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Antonio Frighetto via llvm-commits
• [llvm] [ConstraintElim] Derive signed facts for post-increment inductions. (PR #210079)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] AMDGPU/GlobalISel: Clean up fp LLT usage in AMDGPULegalizerInfo (PR #210999)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   Romanov Vlad via llvm-commits
• [clang] [llvm] [PowerPC] _Float16 scalar datatype support for Power8+ (PR #196559)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC] _Float16 scalar datatype support for Power8+ (PR #196559)   Tony Varghese via llvm-commits
• [llvm] [AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (PR #210986)   Shanzhi Chen via llvm-commits
• [llvm] [LV] Vectorize fmin/fmax reductions (PR #198300)   Nashe Mncube via llvm-commits
• [llvm] [LV] Vectorize fmin/fmax reductions (PR #198300)   Nashe Mncube via llvm-commits
• [llvm] [LV] Vectorize fmin/fmax reductions (PR #198300)   Nashe Mncube via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Madhur Kumar via llvm-commits
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• [llvm] [PPC] Constrain register in VSPLT of XXSLDWI transform (PR #208005)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] _Float16 scalar datatype support for Power8+ (PR #196559)   Tony Varghese via llvm-commits
• [llvm] [LV] Vectorize fmin/fmax reductions (PR #198300)   Nashe Mncube via llvm-commits
• [clang] [llvm] [CHERI][RISCV][AArch64][MC] Add shared support for aligning globals to an "alignment granule", which is applied to both the alignment and the allocated size. (PR #203872)   Owen Anderson via llvm-commits
• [llvm] [SLP]Make the instruction-count check loop-aware (PR #210074)   Alexey Bataev via llvm-commits
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• [llvm] [X86][AsmParser] Support parentheses around scale and index register in Intel syntax (PR #211003)   Wiktor Ludwichowski via llvm-commits
• [llvm] [SLP]Make the instruction-count check loop-aware (PR #210074)   Alexey Bataev via llvm-commits
• [llvm] [llubi] Add support for captures (PR #201170)   Ralf Jung via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] Remove Signum_match template and its implementation (PR #210629)   via llvm-commits
• [clang] [llvm] [PowerPC] _Float16 scalar datatype support for Power8+ (PR #196559)   Tony Varghese via llvm-commits
• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Vedant Neve via llvm-commits
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• [libc] [llvm] [libc][math] Add tgammabf16 math support for bfloat16. (PR #208689)   Vedant Neve via llvm-commits
• [llvm] 7cd9cee - [CostModel][X86] getArithmeticReductionCost - add missing type split handling for AVX512 types (#210994)   via llvm-commits
• [llvm] [CostModel][X86] getArithmeticReductionCost - add missing type split handling for AVX512 types (PR #210994)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   Alexey Gerenkov via llvm-commits
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• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   via llvm-commits
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• [llvm] [SDAG] Use DAG.getTokenFactor in more places (PR #210949)   Alex Rønne Petersen via llvm-commits
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• [llvm] [DirectX] Add slim debug support (PR #204459)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   David Green via llvm-commits
• [llvm] b02de9d - [GlobalISel] Use correct fp semantics when building constants. (#210190)   via llvm-commits
• [llvm] [GlobalISel] Use correct fp semantics when building constants (PR #210190)   Jason Eckhardt via llvm-commits
• [clang] [llvm] [PowerPC] Enable __bf16 (PR #208598)   Tony Varghese via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   Alexey Gerenkov via llvm-commits
• [llvm] [AMDGPU] Use global_prefetch_b8 for GFX1250 unclaused VMEM workaround (PR #210874)   Siu Chi Chan via llvm-commits
• [clang] [llvm] [PowerPC] Enable _Float16 (PR #208542)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC] Enable _Float16 (PR #208542)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC] Enable _Float16 (PR #208542)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC] Enable __bf16 (PR #208598)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC] Enable __bf16 (PR #208598)   Tony Varghese via llvm-commits
• [llvm] [SPIRV][Matrix] Change Matrix Shader legalization to largest common divisor (PR #207768)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [PowerPC] Enable _Float16 (PR #208542)   Tony Varghese via llvm-commits
• [llvm] [GlobalISel] Port over `simplifyDemandedBits` to GlobalISel (PR #198808)   Alan Li via llvm-commits
• [llvm] [DWARFLinker] Fix placement lost-update crash in parallel marking (PR #211009)   Jonas Devlieghere via llvm-commits
• [llvm] [AArch64] Preserve store memoperands (PR #210936)   Kamlesh Kumar via llvm-commits
• [llvm] [DirectX] Add slim debug support (PR #204459)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DirectX][Driver] Add /Qpdb_in_private flag support (PR #204903)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DirectX][Driver] Add /Qpdb_in_private flag support (PR #204903)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DirectX][Driver] Add /Qpdb_in_private flag support (PR #204903)   Vladislav Dzhidzhoev via llvm-commits
• [lld] [lld][WebAssembly] Preserve segment linking flags in --relocatable output (PR #210747)   Max Desiatov via llvm-commits
• [llvm] [SCEV][NFC] Precommit tests for MatchRangeCheckIdiom through zext (PR #210978)   Aleksandr Popov via llvm-commits
• [llvm] [SCEV][NFC] Precommit tests for MatchRangeCheckIdiom through zext (PR #210978)   Aleksandr Popov via llvm-commits
• [llvm] 754c2bc - [SCEV][NFC] Precommit tests for MatchRangeCheckIdiom through zext (#210978)   via llvm-commits
• [llvm] [SCEV][NFC] Precommit tests for MatchRangeCheckIdiom through zext (PR #210978)   Aleksandr Popov via llvm-commits
• [llvm] [AArch64] Preserve store memoperands (PR #210936)   Kamlesh Kumar via llvm-commits
• [llvm] Remove Signum_match template and its implementation (PR #210629)   via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
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• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [clang] [flang] [llvm] [clang] Switch to Default PIE on FreeBSD (PR #206139)   via llvm-commits
• [llvm] 444ea3e - AMDGPU/GlobalISel: Clean up fp LLT usage in AMDGPULegalizerInfo (#210999)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Clean up fp LLT usage in AMDGPULegalizerInfo (PR #210999)   Petar Avramovic via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   Joshua Rodriguez via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Fold zero-interleave shuffle into vector shift left (PR #210793)   David Green via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Matt Arsenault via llvm-commits
• [llvm] 119b31f - [DAGCombiner] Fold NaN-guard fptosi/fptoui select to saturating variant (#201435)   via llvm-commits
• [llvm] [DAGCombiner] Fold NaN-guard fptosi/fptoui select to saturating variant (PR #201435)   Adel Ejjeh via llvm-commits
• [llvm] Remove Signum_match template and its implementation (PR #210629)   via llvm-commits
• [llvm] [AMDGPU] Lower uniform uaddsat.i16 to SALU instructions (PR #210156)   Jay Foad via llvm-commits
• [llvm] [PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (PR #204170)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (PR #204170)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (PR #204170)   Maryam Moghadas via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [llvm][docs] Update TestingGuide with LLVM PR merge advice (PR #207754)   Tarun Prabhu via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LV] Support interleaving in order to reduce stalls (PR #197959)   Florian Hahn via llvm-commits
• [llvm] [LV] Support interleaving in order to reduce stalls (PR #197959)   Florian Hahn via llvm-commits
• [llvm] [LV] Support interleaving in order to reduce stalls (PR #197959)   Florian Hahn via llvm-commits
• [llvm] [NFC][AMDGPU] Use SIInstrFlags predicates in AMDGPUAsmParser (PR #210998)   Shilei Tian via llvm-commits
• [llvm] [LV] Support interleaving in order to reduce stalls (PR #197959)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Fix ISel crash on llvm.amdgcn.class with bf16 operand (PR #210971)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [clang][AArch64] Set hardening fn attrs on synthetic functions (PR #211013)   Daniil Kovalev via llvm-commits
• [llvm] AMDGPU: Validate processor and features in TargetID parsing (PR #209304)   Yaxun Liu via llvm-commits
• [clang] [llvm] [clang][AArch64] Set hardening fn attrs on synthetic functions (PR #211013)   Daniil Kovalev via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [clang] [llvm] [clang][llvm][AArch64] Set hardening fn attrs on synthetic functions (PR #211013)   Daniil Kovalev via llvm-commits
• [llvm] [RuntimeDyld][COFF] Apply addend for IMAGE_REL_AMD64_SECREL (PR #211015)   Charles Zablit via llvm-commits
• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Ulrich Weigand via llvm-commits
• [llvm] [LegalizeDAG][X86][AArch64][LoongArch] Freeze index when converting extract_elt/extract_subvector to load/store on stack. (PR #88985)   Yingwei Zheng via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   via llvm-commits
• [llvm] [CodeGen] Precompute pressure-set register classes (PR #210751)   Cullen Rhodes via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   Alexis Engelke via llvm-commits
• [llvm] AMDGPU: Do not report inline immediates as legal for generic operands (PR #208216)   Jay Foad via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   Alexis Engelke via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: single exit copy for same-block uses (PR #209179)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Flush denormals when constant folding llvm.amdgcn.rcp (PR #211017)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Ulrich Weigand via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   Madhur Amilkanthwar via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs (PR #210955)   Sudharsan Veeravalli via llvm-commits
• [clang] [llvm] [Clang][coro] Fix `coro.free` in `.resume` clones with `[[clang::coro_await_elidable]]` (PR #207799)   Yuxuan Chen via llvm-commits
• [llvm] [llvm][docs] Update TestingGuide with LLVM PR merge advice (PR #207754)   John Otken via llvm-commits
• [llvm] [SandboxVectorizer] Implement topdown/bottomup vectorizers in unison (PR #205249)   Anshil Gandhi via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [AArch64][CodeGen] Fix trampoline basic block offset (PR #202716)   via llvm-commits
• [llvm] [GVN] Reorganise GVN.h/GVH.cpp to improve readability and maintainability (NFC) (PR #210334)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Prefer (sub x, -c) over (add x, c) if -c is cheaper. (PR #211020)   Ricardo Jesus via llvm-commits
• [llvm] [LV] codegen for tail-folded epilogue loop (PR #208764)   via llvm-commits
• [llvm] [SPIRV][Matrix] Change Matrix Shader legalization to largest common divisor (PR #207768)   via llvm-commits
• [llvm] [DWARFLinker] Fix placement lost-update crash in parallel marking (PR #211009)   via llvm-commits
• [llvm] [RISCV] Avoid forming Zilsd pairs with x0 for non-x0 register classes (PR #211019)   via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   via llvm-commits
• [clang] [llvm] [clang][llvm][AArch64] Set hardening fn attrs on synthetic functions (PR #211013)   via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   via llvm-commits
• [llvm] [AMDGPU] Flush denormals when constant folding llvm.amdgcn.rcp (PR #211017)   via llvm-commits
• [llvm] AMDGPU: Do not report inline immediates as legal for generic operands (PR #208216)   Jay Foad via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] AMDGPU: Do not report inline immediates as legal for generic operands (PR #208216)   Jay Foad via llvm-commits
• [llvm] [X86][AsmParser] Support parentheses around scale and index register in Intel syntax (PR #211003)   via llvm-commits
• [llvm] [AArch64] Prefer (sub x, -c) over (add x, c) if -c is cheaper. (PR #211020)   via llvm-commits
• [compiler-rt] [scudo] Add unmap and eviction stats to Secondary (PR #210465)   via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SLP]Make the instruction-count check loop-aware (PR #210074)   Ryan Buchner via llvm-commits
• [llvm] [SCEV] Reach MatchRangeCheckIdiom through zext in LoopGuards worklist (PR #210463)   Aleksandr Popov via llvm-commits
• [compiler-rt] [scudo] Add unmap and eviction stats to Secondary (PR #210465)   Sadaf Ebrahimi via llvm-commits
• [lld] [llvm] [DTLTO] Overlap temporary file removal (PR #209423)   Slava Zakharin via llvm-commits
• [llvm] [SampleProfile] Support Eytzinger layout in SecNameTable (PR #211027)   Kazu Hirata via llvm-commits
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• [llvm] [SDAG] Specify unsigned compares for loop.dependence.{war|raw} masks (PR #197437)   Sander de Smalen via llvm-commits
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• [llvm] AMDGPU: Constant fold instructions with inline immediate operands (PR #208422)   Matt Arsenault via llvm-commits
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• [llvm] AMDGPU: Constant fold instructions with inline immediate operands (PR #208422)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fold inline immediates in peephole-opt (PR #208423)   Matt Arsenault via llvm-commits
• [llvm] Only set LLVM_ENABLE_DIA_SDK in bazel build defs to zero if not set by build args (PR #210723)   Keith Smiley via llvm-commits
• [llvm] Only set LLVM_ENABLE_DIA_SDK in bazel build defs to zero if not set by build args (PR #210723)   Keith Smiley via llvm-commits
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• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Relax singleUse for GEP(p, add(x, constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
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• [llvm] [ConstraintElim] decompose subtract with guard as precondition (PR #209615)   Abhay Kanhere via llvm-commits
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• [llvm] [AMDGPU] Move SGPR Count Queries into TargetParser (PR #209848)   Chinmay Deshpande via llvm-commits
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• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   Ian Anderson via llvm-commits
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• [llvm] [AMDGPU] Fix isCanonicalized to require canonical input for NaN-propa… (PR #208733)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix performFMACombine FDOT2 fold ignores denormal-fp-math-f32 (PR #205101)   Wooseok Lee via llvm-commits
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• [llvm] [SPIR-V] Erase dead functions in shader modules (PR #209672)   Ashley Coleman via llvm-commits
• [llvm] [SCEV] Urem identification from X - C*X/uC (PR #210778)   Abhay Kanhere via llvm-commits
• [llvm] TargetParser: Add Triple::getDefaultFloatABI (PR #210899)   Eli Friedman via llvm-commits
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• [llvm] TargetParser: Add Triple::getDefaultFloatABI (PR #210899)   Eli Friedman via llvm-commits
• [llvm] [SCEV] Expand isKnownPredicateViaConstantRanges (PR #210784)   Abhay Kanhere via llvm-commits
• [llvm] [AMDGPU] Fix isCanonicalized to require canonical input for NaN-propa… (PR #208733)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Erase dead functions in shader modules (PR #209672)   Joshua Batista via llvm-commits
• [llvm] [SPIR-V] Erase dead functions in shader modules (PR #209672)   Joshua Batista via llvm-commits
• [llvm] [Bazel] Fixes db816fe (PR #211109)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fixes db816fe (PR #211109)   Jordan Rupprecht via llvm-commits
• [llvm] [SCEV] Distribute zext across (-C + Rest) in LoopGuards rewriter (PR #210719)   Aleksandr Popov via llvm-commits
• [llvm] [AArch64] Set NoPHIs for outlined functions (PR #209852)   Ellis Hoag via llvm-commits
• [llvm] TargetParser: Add Triple::getDefaultFloatABI (PR #210899)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Fold shifts of guarded vector inputs into USHL and SSHL (PR #210880)   Adam Scott via llvm-commits
• [llvm] [AArch64] Fold shifts of guarded vector inputs into USHL and SSHL (PR #210880)   Adam Scott via llvm-commits
• [llvm] [SLP] Enable full non-power-of-2 vectorization by default (PR #199450)   Alexey Bataev via llvm-commits
• [llvm] [SPIR-V] Erase dead functions in shader modules (PR #209672)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Hubert Tong via llvm-commits
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• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Hubert Tong via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Eric Christopher via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   Akshay K via llvm-commits
• [llvm] [NVPTX] Fix illegal .ftz modifier for setp and neg PTX instructions for bf16 (PR #211128)   via llvm-commits
• [llvm] [ConstraintElim] decompose subtract with guard as precondition (PR #209615)   Abhay Kanhere via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   Akshay K via llvm-commits
• [llvm] [ConstraintElim] decompose subtract with guard as precondition (PR #209615)   Abhay Kanhere via llvm-commits
• [llvm] [AMDGPU] Update assembler check to use global_prefetch_b8 for GFX1250 (PR #211104)   Stanislav Mekhanoshin via llvm-commits
• [libc] [llvm] [libc][cpp::string] Allocate fewer temp strings in operator= and += (PR #210895)   Jackson Stogel via llvm-commits
• [llvm] [AMDGPU] Fix performFMACombine FDOT2 fold ignores denormal-fp-math-f32 (PR #205101)   Wooseok Lee via llvm-commits
• [llvm] [AMDGPU] Port MFMA-form rewrite refinements onto shared copy-plan analysis (PR #210703)   via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   via llvm-commits
• [llvm] [GlobalISel] Expand `isKnownNeverZero` for vector instructions (PR #211149)   Alan Li via llvm-commits
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• [clang] [lld] [llvm] Reland "Compute GUIDs once and store in metadata" (#184065) (PR #201849)   Shilei Tian via llvm-commits
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• [llvm] [gn build] Port acb8fbe83ff1 (PR #211156)   Nico Weber via llvm-commits
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• [llvm] [gn build] Port db816fe2ed4e (PR #211157)   Nico Weber via llvm-commits
• [llvm] [AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (PR #203150)   via llvm-commits
• [llvm] [DWARFLinker] Fix placement lost-update crash in parallel marking (PR #211009)   LLVM Continuous Integration via llvm-commits
• [llvm] [IR] Reject inlining strictfp alwaysinline callee into non-strictfp caller (PR #210701)   Wenju He via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (PR #210955)   Sam Elliott via llvm-commits
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• [llvm] [AMDGPU] RewriteMFMAFormStage: safe-guard hardening, shared copy-plan analysis, and rewrite() copy-insertion enhancements (PR #210703)   via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: safe-guard hardening, shared copy-plan analysis, and rewrite() copy-insertion enhancements (PR #210703)   via llvm-commits
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• [llvm] [CoroElide] Remove restriction that the ramp function be inlined (PR #211163)   via llvm-commits
• [llvm] [CoroElide] Remove restriction that the ramp function be inlined (PR #211163)   Chuanqi Xu via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] exclude selection pattern for s_max/min_f32/16 for gfx1170 (PR #207308)   via llvm-commits
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• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Nikhil Kotikalapudi via llvm-commits
• [llvm] [AMDGPU] exclude selection pattern for s_max/min_f32/16 for gfx1170 (PR #207308)   via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Nikhil Kotikalapudi via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   via llvm-commits
• [llvm] [BOLT] Implement platform independent distribution and shuffle algorithm (PR #206554)   via llvm-commits
• [llvm] [BOLT] Implement platform independent distribution and shuffle algorithm (PR #206554)   via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Nikhil Kotikalapudi via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Nikhil Kotikalapudi via llvm-commits
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• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
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• [llvm] 9bcb851 - [RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (#210955)   via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (PR #210955)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (PR #210955)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (PR #210955)   Sudharsan Veeravalli via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Aman LaChapelle via llvm-commits
• [llvm] [RISCV] Support uimm5 operands for Xqcicm cmovs in RISCVExpandPseudoInsts (PR #210955)   via llvm-commits
• [clang] [llvm] [Clang][SYCL] Call sycl_kernel_launch with a kernel info type rather than a kernel name type. (PR #208958)   Tom Honermann via llvm-commits
• [llvm] [LoopInfo] Derive Loop::contains(BlockT*) from the block-to-loop map (PR #207613)   Fangrui Song via llvm-commits
• [llvm] [CodeGen] RegisterCoalescer: keep partial redefs valid when eliminating undef copies (PR #202599)   Aochang Liu via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [llvm] [LoopInfo] Derive Loop::contains(BlockT*) from the block-to-loop map (PR #207613)   Fangrui Song via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Farzon Lotfi via llvm-commits
• [llvm] [X86] Don't emit x87 register scrub when x87 is unavailable (PR #211146)   Phoebe Wang via llvm-commits
• [llvm] [CodeGen] RegisterCoalescer: keep partial redefs valid when eliminating undef copies (PR #202599)   Aochang Liu via llvm-commits
• [llvm] [DWARFLinker] Fix placement lost-update crash in parallel marking (PR #211009)   Jonas Devlieghere via llvm-commits
• [lld] [WebAssembly] Fix __init_tls_base global in coop threading (PR #208597)   Alex Crichton via llvm-commits
• [llvm] [DWARFLinker] Fix placement lost-update crash in parallel marking (PR #211009)   Jonas Devlieghere via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Flush denormals when constant folding llvm.amdgcn.rcp (PR #211017)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Flush denormals when constant folding llvm.amdgcn.rcp (PR #211017)   Arseniy Obolenskiy via llvm-commits
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• [lld] [WebAssembly] Fix __init_tls_base global in coop threading (PR #208597)   Alex Crichton via llvm-commits
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• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] Introduction of typified section in ExtBinary format (PR #166553)   Sergey Shcherbinin via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [X86][GISEL] - Legalize G_FPTOUI & G_UITOFP for X87 (PR #155562)   Pawan Nirpal via llvm-commits
• [lld] [LLD][COFF] Only merge funclets with mergeable parents (PR #211140)   Reid Kleckner via llvm-commits
• [llvm] a67429f - [LoopInfo] Factor use-scan of isBlockInLCSSAForm [NFC] (#211087)   via llvm-commits
• [llvm] [LoopInfo] Factor use-scan of isBlockInLCSSAForm [NFC] (PR #211087)   Keno Fischer via llvm-commits
• [llvm] [CodeView] Encode signed enumerators as signed integers (PR #210352)   Reid Kleckner via llvm-commits
• [llvm] [SandboxVec][Scheduler] Refill ready list during topdown scheduling (PR #211046)   Anshil Gandhi via llvm-commits
• [llvm] 06bbd26 - [SandboxVec][Scheduler] Refill ready list during topdown scheduling (#211046)   via llvm-commits
• [llvm] [SandboxVectorizer] Implement topdown/bottomup vectorizers in unison (PR #205249)   Anshil Gandhi via llvm-commits
• [llvm] [SandboxVectorizer] Implement topdown/bottomup vectorizers in unison (PR #205249)   Anshil Gandhi via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   Fangrui Song via llvm-commits
• [llvm] [GlobalISel] Expand `isKnownNeverZero` for vector instructions (PR #211149)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Expand `isKnownNeverZero` for vector instructions (PR #211149)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Expand `isKnownNeverZero` for vector instructions (PR #211149)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Expand `isKnownNeverZero` for vector instructions (PR #211149)   Matt Arsenault via llvm-commits
• [llvm] [SandboxVec][Scheduler] Refill ready list during topdown scheduling (PR #211046)   LLVM Continuous Integration via llvm-commits
• [llvm] [Hexagon] Drop NodeAddr::operator<, fix bad asserts directives (PR #210192)   Santanu Das via llvm-commits
• [llvm] [Hexagon] Drop NodeAddr::operator<, fix bad asserts directives (PR #210192)   Santanu Das via llvm-commits
• [llvm] [AMDGPU][NewPM] Run UniformityInfoAnalysis inside AMDGPUISelDAGToDAGPass (PR #211174)   via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Make getSmallestCommonLoop O(depth). NFC (PR #211175)   Fangrui Song via llvm-commits
• [llvm] [LoopInfo] Make getSmallestCommonLoop O(depth). NFC (PR #211175)   Fangrui Song via llvm-commits
• [llvm] [LoopInfo] Derive Loop::contains(BlockT*) from the block-to-loop map (PR #207613)   Alexis Engelke via llvm-commits
• [llvm] [LoopUnroll] Allow vector types for minmax reductions (PR #207630)   Wenju He via llvm-commits
• [llvm] 15363db - [DebugInfo] Update assigned DWARF language codes (#210884)   via llvm-commits
• [llvm] [DebugInfo] Update assigned DWARF language codes (PR #210884)   via llvm-commits
• [llvm] c2a39ea - [dsymutil] collect pseudoprobe sections from debug map into __LLVM segment (#206817)   via llvm-commits
• [llvm] [dsymutil] collect pseudoprobe sections from debug map into __LLVM segment (PR #206817)   Henry Jiang via llvm-commits
• [llvm] [LoopInfo] Make getSmallestCommonLoop O(depth). NFC (PR #211175)   Alexis Engelke via llvm-commits
• [llvm] 49f5065 - [DebugInfo] Fix Fortran 2018 default array lower bound (#210885)   via llvm-commits
• [llvm] [DebugInfo] Fix Fortran 2018 default array lower bound (PR #210885)   via llvm-commits
• [llvm] Install llvm-23 in libc docker image (PR #210929)   via llvm-commits
• [llvm] [AMDGPU] Stop iDot4 chain walker at non-ADD nodes (PR #198412)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Stop iDot4 chain walker at non-ADD nodes (PR #198412)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Eric Christopher via llvm-commits
• [llvm] [Transforms] Add DeadBranchElimination pass (PR #211176)   Raz Luvaton via llvm-commits
• [llvm] [Transforms] Add DeadBranchElimination pass (PR #211176)   via llvm-commits
• [clang] [llvm] [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (PR #210713)   Mariusz Sikora via llvm-commits
• [llvm] [Transforms] Add DeadBranchElimination pass (PR #211176)   Raz Luvaton via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Jay Foad via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   Sam Elliott via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Jay Foad via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   Sam Elliott via llvm-commits
• [llvm] e202421 - [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (#210868)   via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   Jerry Zhang Jian via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Luke Lau via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Luke Lau via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   via llvm-commits
• [llvm] AMDGPU: VALU data fast-forwarding needs no s_delay (PR #205481)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Stop iDot4 chain walker at non-ADD nodes (PR #198412)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Stop iDot4 chain walker at non-ADD nodes (PR #198412)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Stop iDot4 chain walker at non-ADD nodes (PR #198412)   Arseniy Obolenskiy via llvm-commits
• [llvm] [Reassociate] Use UniformityInfo to group uniform operands together (PR #198507)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Use global_prefetch_b8 for GFX1250 unclaused VMEM workaround (PR #210874)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Arseniy Obolenskiy via llvm-commits
• [compiler-rt] 91406e8 - Remove debug leftovers (#211068)   via llvm-commits
• [compiler-rt] [llvm] Remove debug leftovers (PR #211068)   via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   David Li via llvm-commits
• [llvm] [RISCV][NFC] Fixed WADD comment typo. (PR #211177)   Tyler Chen via llvm-commits
• [llvm] [RISCV][NFC] Fixed WADD comment typo. (PR #211177)   via llvm-commits
• [llvm] [RISCV][NFC] Fixed WADD comment typo. (PR #211177)   via llvm-commits
• [llvm] [RISCV][NFC] Fixed WADD comment typo. (PR #211177)   Tyler Chen via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as mayLoad/mayStore (PR #211179)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as mayLoad/mayStore (PR #211179)   via llvm-commits
• [llvm] [LV] Convert scatter stores with constant stride into strided stores (PR #206896)   Mel Chen via llvm-commits
• [llvm] [RISCV][NFC] Fixed WADD comment typo. (PR #211177)   Hank Chang via llvm-commits
• [llvm] 33928f6 - [LoopInfo] Make getSmallestCommonLoop O(depth). NFC (#211175)   via llvm-commits
• [llvm] [LoopInfo] Make getSmallestCommonLoop O(depth). NFC (PR #211175)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RISCV] Don't overcost wide load in optimized segment load/store (PR #207146)   Luke Lau via llvm-commits
• [llvm] [Analysis] Use CycleInfo for BranchProbabilityInfo (PR #210301)   Alexis Engelke via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Alexey Lapshin via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] 860cb62 - [X86] narrow the check scope to function NFC (#210917)   via llvm-commits
• [llvm] [X86] narrow the check scope to function NFC (PR #210917)   Jaydeep Chauhan via llvm-commits
• [llvm] [LV][RFC] Generating conditional VPBB that will be skip when the mask is inactive in VPlan. (PR #141900)   Elvis Wang via llvm-commits
• [llvm] [llvm-profgen] Prioritize checking the format of the first LBR sample pair (PR #211182)   Amir Ayupov via llvm-commits
• [llvm] [llvm-profgen] Prioritize checking the format of the first LBR sample pair (PR #211182)   Amir Ayupov via llvm-commits
• [llvm] [llvm-profgen] Prioritize checking the format of the first LBR sample pair (PR #211182)   Amir Ayupov via llvm-commits
• [llvm] [ADT][NFC] Use block numbers for po_iterator (PR #177182)   Alexis Engelke via llvm-commits
• [llvm] [AMDGPU][NewPM] Run UniformityInfoAnalysis inside AMDGPUISelDAGToDAGPass (PR #211174)   Vikram Hegde via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AArch64] Update ctpop cost tests. NFC (PR #211184)   David Green via llvm-commits
• [llvm] [AMDGPU] Support i16 element types for tbuffer D16 load/store (PR #201420)   Arseniy Obolenskiy via llvm-commits
• [llvm] b77f997 - [AArch64] Update ctpop cost tests. NFC (#211184)   via llvm-commits
• [llvm] [AArch64] Update ctpop cost tests. NFC (PR #211184)   David Green via llvm-commits
• [llvm] db369a6 - [AMDGPU][NewPM] Run UniformityInfoAnalysis inside AMDGPUISelDAGToDAGPass (#211174)   via llvm-commits
• [llvm] [AMDGPU][NewPM] Run UniformityInfoAnalysis inside AMDGPUISelDAGToDAGPass (PR #211174)   via llvm-commits
• [llvm] [SLP]Use poor-throughput instructions as vectorization seeds (PR #206518)   Simon Pilgrim via llvm-commits
• [llvm] [Verifier] Use size_t width for reqd_work_group_size check (PR #206214)   Wenju He via llvm-commits
• [llvm] [InstCombine] foldVectorBinop - don't fold length changing shuffles across binops (PR #211115)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] foldVectorBinop - don't fold length changing shuffles across binops (PR #211115)   Simon Pilgrim via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [InstCombine]Fold bitcast shuffle ashr v2i64 (PR #206717)   Simon Pilgrim via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Luke Lau via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [LoopInterchange] Prevent the transformation stage from stopping partway (PR #205564)   Ryotaro Kasuga via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Fangrui Song via llvm-commits
• [llvm] 7c72a11 - PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (#209687)   via llvm-commits
• [llvm] PerThreadBumpPtrAllocator: remove dependency on getThreadIndex (PR #209687)   Fangrui Song via llvm-commits
• [llvm] [LoopInterchange] Prevent the transformation stage from stopping partway (PR #205564)   Ryotaro Kasuga via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Mel Chen via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Mel Chen via llvm-commits
• [llvm] 06e24fa - [AArch64][SME] Scan function attributes once in SMEAttrs (NFC) (#210924)   via llvm-commits
• [llvm] [AArch64][SME] Scan function attributes once in SMEAttrs (NFC) (PR #210924)   Cullen Rhodes via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Jay Foad via llvm-commits
• [llvm] Add missing opcode for offset validity check (PR #211186)   Santanu Das via llvm-commits
• [llvm] Add missing opcode for offset validity check (PR #211186)   via llvm-commits
• [llvm] [AArch64] Remove redundant `clearRenameReg` calls in aarch64-ldst-opt (NFC) (PR #201786)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [LV] Convert scatter stores with constant stride into strided stores (PR #206896)   Luke Lau via llvm-commits
• [llvm] [LV] Convert scatter stores with constant stride into strided stores (PR #206896)   Luke Lau via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AArch64] Add a ctpop cost with CSSC (PR #211189)   via llvm-commits
• [llvm] c75267c - [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (#210713)   via llvm-commits
• [clang] [llvm] [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (PR #210713)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Update assembler check to use global_prefetch_b8 for GFX1250 (PR #211104)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   via llvm-commits
• [llvm] [llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [VPlan] Simplify EVL strided load match in optimizeMaskToEVL. nfc (PR #211193)   Mel Chen via llvm-commits
• [llvm] [LV] Convert scatter stores with constant stride into strided stores (PR #206896)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify EVL strided load match in optimizeMaskToEVL. nfc (PR #211193)   via llvm-commits
• [llvm] [LoopInfo] Derive Loop::contains(BlockT*) from the block-to-loop map (PR #207613)   Nikita Popov via llvm-commits
• [llvm] [LoopInfo] Derive Loop::contains(BlockT*) from the block-to-loop map (PR #207613)   Nikita Popov via llvm-commits
• [llvm] [LoopInfo] Derive Loop::contains(BlockT*) from the block-to-loop map (PR #207613)   Nikita Popov via llvm-commits
• [llvm] ff90624 - [InstCombine] foldVectorBinop - don't fold length changing shuffles across binops (#211115)   via llvm-commits
• [llvm] [InstCombine] foldVectorBinop - don't fold length changing shuffles across binops (PR #211115)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Fangrui Song via llvm-commits
• [llvm] [LoopInfo] Derive Loop::contains(BlockT*) from the block-to-loop map (PR #207613)   Nikita Popov via llvm-commits
• [llvm] e878b12 - [AMDGPU] Do not copy noundef onto a widened kernarg load (#211181)   via llvm-commits
• [llvm] [Support] parallelFor: enable caller participation (PR #209690)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Do not copy noundef onto a widened kernarg load (PR #211181)   Arseniy Obolenskiy via llvm-commits
• [llvm] [NFC][SPIR-V] Merge duplicate prefix/suffix switches in lookupBuiltin (PR #211194)   Arseniy Obolenskiy via llvm-commits
• [llvm] [Support] parallelFor: enable caller participation (PR #209690)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Nikita Popov via llvm-commits
• [llvm] [NFC][SPIR-V] Merge duplicate prefix/suffix switches in lookupBuiltin (PR #211194)   via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
• [llvm] cfc9216 - [InstCombine] Optimize GEP comparisons with constant offsets (#208547)   via llvm-commits
• [llvm] [InstCombine] Optimize GEP comparisons with constant offsets (PR #208547)   Ömer Sinan Ağacan via llvm-commits
• [llvm] ca52c1b - [LoopInterchange] Prevent the transformation stage from stopping partway (#205564)   via llvm-commits
• [llvm] [LoopInterchange] Prevent the transformation stage from stopping partway (PR #205564)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-reduce] Tighten the check to count actual store NFC (PR #210933)   Matt Arsenault via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as mayLoad/mayStore (PR #211179)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Simplify EVL strided load match in optimizeMaskToEVL. nfc (PR #211193)   Luke Lau via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as mayLoad/mayStore (PR #211179)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [AArch64] Add A57 schedule model for CAS instructions (PR #211195)   Andrew Savonichev via llvm-commits
• [llvm] [MemDep] Treat partial-overlap lifetime.start as a clobber (PR #211167)   Nikita Popov via llvm-commits
• [llvm] [MemDep] Treat partial-overlap lifetime.start as a clobber (PR #211167)   Nikita Popov via llvm-commits
• [llvm] [MemDep] Treat partial-overlap lifetime.start as a clobber (PR #211167)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Add A57 schedule model for CAS instructions (PR #211195)   via llvm-commits
• [llvm] [BranchFolding] Fold away subsequent identical branches (PR #203110)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Simplify EVL strided load match in optimizeMaskToEVL. nfc (PR #211193)   Mel Chen via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   Robert Imschweiler via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as mayLoad/mayStore (PR #211179)   Luke Lau via llvm-commits
• [llvm] 948c4a2 - [AArch64][GlobalISel] Select vector element extract into GPR (#210030)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Select vector element extract into GPR (PR #210030)   Cullen Rhodes via llvm-commits
• [clang] [llvm] [AMDGPU] Builtins and intrinsics for v_cvt_scalef32_pk32_(fp|bf)6_f32 (PR #210713)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Support i16 element types for tbuffer D16 load/store (PR #201420)   Matt Arsenault via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-reduce] Tighten the check to count actual store NFC (PR #210933)   Kamlesh Kumar via llvm-commits
• [llvm] [AMDGPU] Support i16 element types for tbuffer D16 load/store (PR #201420)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as mayLoad/mayStore (PR #211179)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Cullen Rhodes via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Cullen Rhodes via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Cullen Rhodes via llvm-commits
• [clang] [llvm] [Clang][SYCL] Call sycl_kernel_launch with a kernel info type rather than a kernel name type. (PR #208958)   Mariya Podchishchaeva via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Corentin Jabot via llvm-commits
• [llvm] [llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [SCEV] Missed trip count for same-base inbounds pointer-IV loop (PR #211036)   via llvm-commits
• [llvm] [X86] Fold chained i32 CLMUL operands (PR #202250)   via llvm-commits
• [llvm] [llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [CoroElide] Remove restriction that the ramp function be inlined (PR #211163)   Weibo He via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Emit a warning when the hard-float ABI is enabled but can't be used. (PR #111334)   Chris Copeland via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [llvm][RISCV] Bump svukte to 1.0 (PR #211199)   Brandon Wu via llvm-commits
• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [AggressiveInstCombine] Avoid converting first table element when folding table-based cttz (PR #211202)   Antonio Frighetto via llvm-commits
• [llvm] [AggressiveInstCombine] Avoid converting first table element when folding table-based cttz (PR #211202)   via llvm-commits
• [llvm] [AMDGPU] Avoid slow 64-bit max/min/multiply instructions on GFX1250 (PR #207006)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Avoid slow 64-bit max/min/multiply instructions on GFX1250 (PR #207006)   Jay Foad via llvm-commits
• [llvm] [CVP] Infer no-wrap flags from operand ranges at use sites. (PR #207522)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Avoid slow 64-bit max/min/multiply instructions on GFX1250 (PR #207006)   Jay Foad via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Petar Avramovic via llvm-commits
• [llvm] [CVP] Extract computeNoWrapFlags helper from processBinOp (NFC). (PR #207527)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Carl Ritson via llvm-commits
• [clang] [llvm] [llvm][RISCV] Bump svukte to 1.0 (PR #211199)   Pengcheng Wang via llvm-commits
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• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Matt Arsenault via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] RewriteMFMAFormStage: safe-guard hardening, shared copy-plan analysis, and rewrite() copy-insertion enhancements (PR #210703)   via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Luke Lau via llvm-commits
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• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as mayLoad/mayStore (PR #211179)   Luke Lau via llvm-commits
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• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [llvm] [VectorCombine] Fold interleave of high-half truncations (PR #211022)   Jacob Crawley via llvm-commits
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• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Matt Arsenault via llvm-commits
• [llvm] b9ba0be - [SDAG] Specify unsigned compares for loop.dependence.{war|raw} masks (#197437)   via llvm-commits
• [llvm] [SDAG] Specify unsigned compares for loop.dependence.{war|raw} masks (PR #197437)   Benjamin Maxwell via llvm-commits
• [llvm] 5205cd7 - [llvm-reduce] Tighten the check to count actual store NFC (#210933)   via llvm-commits
• [llvm] [llvm-reduce] Tighten the check to count actual store NFC (PR #210933)   Matt Arsenault via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [AArch64] Allow cost-free cast absorption into widening instructions with multiple users (PR #210460)   David Green via llvm-commits
• [llvm] [AArch64] Allow cost-free cast absorption into widening instructions with multiple users (PR #210460)   David Green via llvm-commits
• [llvm] [AArch64] Allow cost-free cast absorption into widening instructions with multiple users (PR #210460)   David Green via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   David Green via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [Matrix] De-duplicate reshaped matrixes used as incoming values for phi. (PR #211210)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [Matrix] Default incoming terminator as insert point in visitPHI. (PR #211211)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   via llvm-commits
• [llvm] [Matrix] De-duplicate reshaped matrixes used as incoming values for phi. (PR #211210)   via llvm-commits
• [llvm] [Matrix] Default incoming terminator as insert point in visitPHI. (PR #211211)   via llvm-commits
• [llvm] [DTLTO] Forward loop interchange to DTLTO remote compilations (PR #208591)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO] Forward loop interchange to DTLTO remote compilations (PR #208591)   Ben Dunbobbin via llvm-commits
• [llvm] [AggressiveInstCombine] Avoid converting first table element when folding table-based cttz (PR #211202)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64] Add A57 schedule model for CAS instructions (PR #211195)   David Green via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Matt Arsenault via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Paulius Velesko via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Paulius Velesko via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   via llvm-commits
• [llvm] [AArch64] Accept __chkstk_darwin stack probes on Darwin (PR #210812)   Karim Alweheshy via llvm-commits
• [llvm] [LLVM] Auto-upgrade legacy coro.end results (PR #211081)   Karim Alweheshy via llvm-commits
• [llvm] [Coroutines] Support typed retcon allocators (PR #211099)   Karim Alweheshy via llvm-commits
• [llvm] [AArch64] Accept __chkstk_darwin stack probes on Darwin (PR #210812)   via llvm-commits
• [llvm] [LLVM] Auto-upgrade legacy coro.end results (PR #211081)   via llvm-commits
• [llvm] [Coroutines] Support typed retcon allocators (PR #211099)   via llvm-commits
• [llvm] [AMDGPU] Make libc build backwards compatible (triple) (PR #211214)   Robert Imschweiler via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [llvm] [DTLTO] Forward loop interchange to DTLTO remote compilations (PR #208591)   via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Matthew Devereau via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand bounded memcpy/memmove as masked lo… (PR #211216)   via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Karim Alweheshy via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Karim Alweheshy via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   Matt Arsenault via llvm-commits
• [llvm] [CoroElide] Remove restriction that the ramp function be inlined (PR #211163)   Weibo He via llvm-commits
• [llvm] [CoroElide] Remove restriction that the ramp function be inlined (PR #211163)   Chuanqi Xu via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   Madhur Amilkanthwar via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   Madhur Amilkanthwar via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (PR #195402)   Arseniy Obolenskiy via llvm-commits
• [llvm] [ARM] Use .reloc for dso_local weak symbols in PIC mode instead of GOT indirection (PR #209660)   dong jianqiang via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [AArch64] Prefer (sub x, -c) over (add x, c) if -c is cheaper. (PR #211020)   Paul Walker via llvm-commits
• [clang] [compiler-rt] [libcxx] [llvm] [polly] Backport for #203715 on llvm 23 (PR #211219)   via llvm-commits
• [llvm] [AArch64] Add A57 schedule model for CAS instructions (PR #211195)   Andrew Savonichev via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   Asher Dobrescu via llvm-commits
• [llvm] dabf57f - [LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to cover 64-bit vectors. (#209833)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to cover 64-bit vectors. (PR #209833)   Paul Walker via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   Hongyu Chen via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   Asher Dobrescu via llvm-commits
• [llvm] [AMDGPU] Fix register pressure estimates for use-and-redefs (PR #211139)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Fix register pressure estimates for use-and-redefs (PR #211139)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Fix register pressure estimates for use-and-redefs (PR #211139)   Lucas Ramirez via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   Nikita Popov via llvm-commits
• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   Kareem Ergawy via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   via llvm-commits
• [llvm] [GlobalISel] Expand `isKnownNeverZero` for vector instructions (PR #211149)   Alan Li via llvm-commits
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• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   CHANDRA GHALE via llvm-commits
• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   Kareem Ergawy via llvm-commits
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• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   Madhur Amilkanthwar via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Jacob Crawley via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Jacob Crawley via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [llvm] [AArch64] Fold vector select with power-of-2 bit-test to CMTST+BSP (PR #209100)   Mugundan S via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [clang][NFC] fold ExpressionTraits and TypeTraits helpers into Traits.h (PR #210838)   Matthias Wippich via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Matt Arsenault via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Matt Arsenault via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Matt Arsenault via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Ramkumar Ramachandra via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] [GlobalISel] Expand `isKnownNeverZero` for vector instructions (PR #211149)   Alan Li via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Hussam Alhassan via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Piotr Fusik via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Ramkumar Ramachandra via llvm-commits
• [llvm] 28972b1 - [GVN] Fix PHITransAddr crash scanning cross-function cast users (#211169)   via llvm-commits
• [llvm] [GVN] Fix PHITransAddr crash scanning cross-function cast users (PR #211169)   Madhur Amilkanthwar via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize call… (PR #211226)   chandan singh via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (PR #210923)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GlobalISel] Add immediates to `LegalizerQuery` (PR #211101)   Nathan Corbyn via llvm-commits
• [llvm] [GlobalISel] Add immediates to `LegalizerQuery` (PR #211101)   Nathan Corbyn via llvm-commits
• [llvm] [GlobalISel] Add immediates to `LegalizerQuery` (PR #211101)   Nathan Corbyn via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize call… (PR #211226)   via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   chandan singh via llvm-commits
• [llvm] [AArch64] Add FMIN/FMAX clustering (PR #210906)   Tomer Shafir via llvm-commits
• [llvm] [DirectX][MC] Fix dangling StringRefs in DXContainerWriterTest (PR #211227)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DirectX][MC] Fix dangling StringRefs in DXContainerWriterTest (PR #211227)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DirectX][MC] Fix dangling StringRefs in DXContainerWriterTest (PR #211227)   via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand bounded memcpy/memmove as masked lo… (PR #211216)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to include min/max operations. (PR #211228)   Paul Walker via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   Sergio Afonso via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to include min/max operations. (PR #211228)   via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Piotr Fusik via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   Pengcheng Wang via llvm-commits
• [llvm] [GlobalISel][AMDGPU] Expand `isKnownNeverZero` for vector instructions (PR #211149)   Alan Li via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [llvm] [DirectX][MC] Fix dangling StringRefs in DXContainerWriterTest (PR #211227)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Piotr Fusik via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [LLVM][AArch64TargetTransformInfo] Fix typos in SVEIntrinsicInfo. (PR #211230)   Paul Walker via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   CHANDRA GHALE via llvm-commits
• [llvm] 30a0a51 - [AArch64] Fix FPCR abbreviations and an incorrect association in a comment (NFC) (#211188)   via llvm-commits
• [llvm] [AArch64] Fix FPCR abbreviations and an incorrect association in a comment (NFC) (PR #211188)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (PR #204938)   Benjamin Maxwell via llvm-commits
• [llvm] [IndVarSimplify] Add experimental pointer IV elimination (PR #209413)   via llvm-commits
• [clang] [clang-tools-extra] [flang] [libcxx] [lld] [llvm] Bump version to 24.0.0git (PR #209473)   LLVM Continuous Integration via llvm-commits
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• [llvm] [LLVM][CodeGen][SVE] Lower to multivector stores (PR #207397)   Jacob Crawley via llvm-commits
• [llvm] [CodeGen] Rematerializer: Handle subranges for full-mask users (PR #211031)   Michael Halkenhäuser via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Paul Walker via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Paul Walker via llvm-commits
• [clang] [llvm] [Clang][AArch64] Command-line options for A-profile's Sign Return Address Hardening (PR #176171)   Victor Campos via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (PR #207201)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (PR #207201)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (PR #207201)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (PR #207201)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [CoroElide] Remove restriction that the ramp function be inlined (PR #211163)   Weibo He via llvm-commits
• [llvm] fbc5841 - [CoroElide] Remove restriction that the ramp function be inlined (#211163)   via llvm-commits
• [llvm] [CoroElide] Remove restriction that the ramp function be inlined (PR #211163)   Weibo He via llvm-commits
• [llvm] [AArch64][GlobalISel] Update and cleanup s/umul.fix tests. NFC (PR #211232)   David Green via llvm-commits
• [llvm] b9ecf45 - [AArch64][GlobalISel] Update and cleanup s/umul.fix tests. NFC (#211232)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Update and cleanup s/umul.fix tests. NFC (PR #211232)   David Green via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Matt Arsenault via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Nikita Popov via llvm-commits
• [llvm] [NFC] Reword comment per post-merge feedback on #211031 (PR #211234)   Michael Halkenhäuser via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   via llvm-commits
• [llvm] [AMDGPU] Enable StructurizeCFG SkipUniformRegions (PR #206739)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang][AArch64] Command-line options for A-profile's Sign Return Address Hardening (PR #176171)   Victor Campos via llvm-commits
• [clang] [llvm] [Clang][AArch64] Command-line options for A-profile's Sign Return Address Hardening (PR #176171)   Victor Campos via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [Clang][AArch64] Command-line options for A-profile's Sign Return Address Hardening (PR #176171)   Victor Campos via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   via llvm-commits
• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   Eugene Epshteyn via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211236)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to include min/max operations. (PR #211228)   Sander de Smalen via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   Jessica Clarke via llvm-commits
• [llvm] [AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (PR #210986)   Shanzhi Chen via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211236)   via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [AArch64][SVE] Allow scalable factor-3 interleaved accesses (PR #200424)   Harry Ramsey via llvm-commits
• [llvm] [SLP]Use poor-throughput instructions as vectorization seeds (PR #206518)   Alexey Bataev via llvm-commits
• [llvm] [AArch64][ISel] Recover ADDHN from OR comparison masks (PR #210943)   Harry Ramsey via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Matt Arsenault via llvm-commits
• [llvm] [Docs] Remove dead Phabricator link from DeveloperPolicy (PR #210934)   Aaron Ballman via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [llvm] 1c7c783 - [Docs] Remove dead Phabricator link from DeveloperPolicy (#210934)   via llvm-commits
• [llvm] [Docs] Remove dead Phabricator link from DeveloperPolicy (PR #210934)   Aaron Ballman via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   Alex Duran via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   Alex Duran via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [clang] [llvm] multiple-compile-time-improv (PR #211225)   via llvm-commits
• [llvm] [CVP] Infer no-wrap flags from operand ranges at use sites. (PR #207522)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Distribute zext across (-C + Rest) in LoopGuards rewriter (PR #210719)   Aleksandr Popov via llvm-commits
• [libc] [llvm] [libc][cmake] Add LIBC_TEST_SUBPROCESS_TESTS (PR #211238)   Pavel Labath via llvm-commits
• [libc] [llvm] [libc][cmake] Add LIBC_TEST_SUBPROCESS_TESTS (PR #211238)   via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Nathan Corbyn via llvm-commits
• [llvm] [LV][RFC] Generating conditional VPBB that will be skip when the mask is inactive in VPlan. (PR #141900)   Elvis Wang via llvm-commits
• [llvm] [GlobalISel][AArch64] Implement `llvm.{get,set}.rounding` lowering (PR #210665)   Matt Arsenault via llvm-commits
• [llvm] [AggressiveInstCombine] Avoid converting first table element when folding table-based cttz (PR #211202)   Antonio Frighetto via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Remove some unneeded waits for VA_VDST (PR #210741)   Jay Foad via llvm-commits
• [clang] [llvm] PowerPC: Rename "float-abi" module flag to "long-double-type" (PR #210817)   Matt Arsenault via llvm-commits
• [llvm] [AggressiveInstCombine] Avoid converting first table element when folding table-based cttz (PR #211202)   Antonio Frighetto via llvm-commits
• [llvm] [NFC] Reword comment per post-merge feedback on #211031 (PR #211234)   Lucas Ramirez via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Luke Lau via llvm-commits
• [llvm] 31810a1 - AMDGPU: Refactor checkVOPDRegConstraints (#196514)   via llvm-commits
• [llvm] AMDGPU: Refactor checkVOPDRegConstraints (PR #196514)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU: Validate VOPD/VOPD3 physical source registers against operand RC (PR #196515)   Petar Avramovic via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Luke Lau via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Luke Lau via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Remove some unneeded waits for VA_VDST (PR #210741)   Jay Foad via llvm-commits
• [llvm] [AggressiveInstCombine] Avoid converting first table element when folding table-based cttz (PR #211202)   Antonio Frighetto via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (PR #210923)   via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] 05daf2a - [LLVM][AArch64TargetTransformInfo] Fix typos in SVEIntrinsicInfo. (#211230)   via llvm-commits
• [llvm] [LLVM][AArch64TargetTransformInfo] Fix typos in SVEIntrinsicInfo. (PR #211230)   Paul Walker via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Piotr Fusik via llvm-commits
• [clang] [llvm] [clang][NFC] fold ExpressionTraits and TypeTraits helpers into Traits.h (PR #210838)   Corentin Jabot via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] [LLVM][AArch64TargetTransformInfo] Fix typos in SVEIntrinsicInfo. (PR #211230)   LLVM Continuous Integration via llvm-commits
• [clang] [flang] [llvm] [flang][AIX] Diagnose unsupported OBJECT_MODE setting and -maix32 option (PR #209919)   Daniel Chen via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [LAA] Properly report strided access preventing store-to-load forwarding (PR #208791)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Properly report strided access preventing store-to-load forwarding (PR #208791)   Ramkumar Ramachandra via llvm-commits
• [llvm] AMDGPU: Validate VOPD/VOPD3 physical source registers against operand RC (PR #196515)   Petar Avramovic via llvm-commits
• [llvm] 3407cd1 - AMDGPU: Validate VOPD/VOPD3 physical source registers against operand RC (#196515)   via llvm-commits
• [llvm] AMDGPU: Validate VOPD/VOPD3 physical source registers against operand RC (PR #196515)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU: Reland: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3 (PR #196516)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU: Reland: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3 (PR #196516)   Petar Avramovic via llvm-commits
• [llvm] 3369ddd - AMDGPU: Reland: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3 (#196516)   via llvm-commits
• [llvm] AMDGPU: Reland: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3 (PR #196516)   Petar Avramovic via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Arseniy Obolenskiy via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (PR #210923)   Alexey Bataev via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [ARM] Fix chkstk definition (PR #210940)   Trung Nguyen via llvm-commits
• [llvm] [AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (PR #210986)   Shanzhi Chen via llvm-commits
• [llvm] bad9ad3 - [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (#204938)   via llvm-commits
• [llvm] [AArch64][SVE] Fix v16i8 -> v2i64 partial_reduce for VL > 128 (PR #204938)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (PR #210986)   via llvm-commits
• [llvm] [InstCombine] Fix typo in assert message for Fp state (PR #211244)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed "Q-format" Multiplication (PR #211236)   via llvm-commits
• [llvm] [InstCombine] Fix typo in assert message for Fp state (PR #211244)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed "Q-format" Multiplication (PR #211236)   via llvm-commits
• [llvm] [SLP]Initial support for copyables in fmuladd intrinsic (PR #211245)   Alexey Bataev via llvm-commits
• [llvm] [InstCombine] Fix typo in assert message for Fp state (PR #211244)   via llvm-commits
• [llvm] [AMDGPU] Cost i1 insertelements as free (PR #211246)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed "Q-format" Multiplication (PR #211236)   via llvm-commits
• [llvm] [SLP]Initial support for copyables in fmuladd intrinsic (PR #211245)   via llvm-commits
• [llvm] [AMDGPU] Cost i1 insertelements as free (PR #211246)   via llvm-commits
• [llvm] AMDGPU: Reland: Codegen for v_dual_dot2acc_f32_f16/bf16 from VOP3 (PR #196516)   Matthias Gehre via llvm-commits
• [llvm] [AMDGPU] Cost i1 insertelements as free (PR #211246)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [LV] Enable the exit value optimization via SCEV for tail folding. (PR #210928)   Luke Lau via llvm-commits
• [llvm] [RegAlloc] Consider rematerialization over CSR use (PR #206756)   Lukas Sommer via llvm-commits
• [llvm] f5430c5 - [NFC] Reword comment per post-merge feedback on #211031 (#211234)   via llvm-commits
• [llvm] [NFC] Reword comment per post-merge feedback on #211031 (PR #211234)   Michael Halkenhäuser via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (PR #210923)   Madhur Amilkanthwar via llvm-commits
• [llvm] 29575a3 - [MachO] Preserve weak linkage for aliases (#198148)   via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Folkert de Vries via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] 6f47123 - [AMDGPU] Remove some unneeded waits for VA_VDST (#210741)   via llvm-commits
• [llvm] [AMDGPU] Remove some unneeded waits for VA_VDST (PR #210741)   Jay Foad via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Luke Lau via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Cost i1 insertelements as free (PR #211246)   Luke Lau via llvm-commits
• [llvm] [AArch64] Add FMIN/FMAX clustering (PR #210906)   Tomer Shafir via llvm-commits
• [clang] [llvm] [AMDGPU] Add FeatureSubtarget for global async load/store lds (PR #211247)   Mariusz Sikora via llvm-commits
• [clang] [llvm] [AMDGPU] Add FeatureSubtarget for global async load/store lds (PR #211247)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add FeatureSubtarget for global async load/store lds (PR #211247)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [CodeGen][AMDGPU] Support type-aware intrinsic feature checks (PR #205536)   Keshav Vinayak Jha via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Jay Foad via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold fp_to_int(fmul) for FPR results (PR #210987)   Kieran B via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Aaron Ballman via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Aaron Ballman via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Aaron Ballman via llvm-commits
• [libc] [llvm] [libc][cmake] Add LIBC_TEST_SUBPROCESS_TESTS (PR #211238)   Pavel Labath via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Trevor Gross via llvm-commits
• [libc] [llvm] [libc][cmake] Add LIBC_TEST_SUBPROCESS_TESTS (PR #211238)   Pavel Labath via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Jay Foad via llvm-commits
• [llvm] [LLVM][InstCombine] Add infrastructure to allow simplification of SVE compare intrinsics. (PR #211249)   Paul Walker via llvm-commits
• [llvm] [LIT][NFC] Fix double slash in GoogleTest format test names (PR #210296)   via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Jay Foad via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [LLVM][InstCombine] Add infrastructure to allow simplification of SVE compare intrinsics. (PR #211249)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   via llvm-commits
• [llvm] coro.retcon: Fix return type and buffer poisoning in elided coroutines (PR #208384)   via llvm-commits
• [llvm] ef13d46 - [CodeView] Encode signed enumerators as signed integers (#210352)   via llvm-commits
• [llvm] [CodeView] Encode signed enumerators as signed integers (PR #210352)   via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Ahmed Bougacha via llvm-commits
• [llvm] [dyndbg][llvm][ELF] Add ELF section type for dynamic debugging (PR #208803)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Antonio Frighetto via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   Jan Trusiłło via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [AArch64][InstCombine] Fold zext cmpne umin boolean trees (PR #209234)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Matt Arsenault via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [RFC][AMDGPU][InsertWaitcnts] Move `WaitcntBrackets` to a separate file (PR #210044)   Pierre van Houtryve via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [AMDGPU] Make libc build backwards compatible (triple) (PR #211214)   Joseph Huber via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
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• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Nikita Popov via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Karim Alweheshy via llvm-commits
• [llvm] 08f3f01 - [DirectX][MC] Fix dangling StringRefs in DXContainerWriterTest (#211227)   via llvm-commits
• [llvm] [DirectX][MC] Fix dangling StringRefs in DXContainerWriterTest (PR #211227)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] 12e6cd9 - [PPC] Constrain register in VSPLT of XXSLDWI transform (#208005)   via llvm-commits
• [llvm] [DirectX][MC] Fix dangling StringRefs in DXContainerWriterTest (PR #211227)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [PPC] Constrain register in VSPLT of XXSLDWI transform (PR #208005)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][cmake] Add LIBC_TEST_SUBPROCESS_TESTS (PR #211238)   Pavel Labath via llvm-commits
• [llvm] RuntimeLibcalls: Drop artificial __aeabi_?cmpeq suffixes (PR #211251)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Drop artificial __aeabi_?cmpeq suffixes (PR #211251)   Matt Arsenault via llvm-commits
• [llvm] RuntimeLibcalls: Drop artificial __aeabi_?cmpeq suffixes (PR #211251)   Matt Arsenault via llvm-commits
• [llvm] 6abffd7 - [SelectionDAG] Allow constant UREM decomposition without high multiply (#210232)   via llvm-commits
• [llvm] [SelectionDAG] Allow constant UREM decomposition without high multiply (PR #210232)   Keshav Vinayak Jha via llvm-commits
• [llvm] RuntimeLibcalls: Drop artificial __aeabi_?cmpeq suffixes (PR #211251)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] [CodeGenPrepare] Use UniformityAnalysis to sink uniform compares (PR #204528)   Jay Foad via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   Luke Lau via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   Spencer Bryngelson via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   Spencer Bryngelson via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   Spencer Bryngelson via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   Spencer Bryngelson via llvm-commits
• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Spencer Bryngelson via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   Spencer Bryngelson via llvm-commits
• [llvm] [LV] Support interleaving in order to reduce stalls (PR #197959)   John Brawn via llvm-commits
• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   Kareem Ergawy via llvm-commits
• [llvm] e757e81 - [AMDGPU] Cost i1 insertelements as free (#211246)   via llvm-commits
• [llvm] [AMDGPU] Cost i1 insertelements as free (PR #211246)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LV] Support interleaving in order to reduce stalls (PR #197959)   John Brawn via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   David Green via llvm-commits
• [llvm] [LV] Support interleaving in order to reduce stalls (PR #197959)   John Brawn via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Corentin Jabot via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Corentin Jabot via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Corentin Jabot via llvm-commits
• [llvm] [AArch64] Preserve store memoperands (PR #210936)   David Green via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Don't apply the cold-callsite inline threshold in kernels (PR #211255)   Spencer Bryngelson via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   Spencer Bryngelson via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   Lukas Sommer via llvm-commits
• [llvm] [AMDGPU] Don't apply the cold-callsite inline threshold in kernels (PR #211255)   Spencer Bryngelson via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Add IntrConvergent to convergent intrinsics (PR #211256)   Tim Corringham via llvm-commits
• [llvm] [InstCombine]Fold bitcast shuffle ashr v2i64 (PR #206717)   via llvm-commits
• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Louis Dionne via llvm-commits
• [llvm] [CodeGenPrepare] Use UniformityAnalysis to sink uniform compares (PR #204528)   Jay Foad via llvm-commits
• [llvm] [InstCombine]Fold bitcast shuffle ashr v2i64 (PR #206717)   via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [libc] [llvm] [libc][cmake] Add LIBC_TEST_SUBPROCESS_TESTS (PR #211238)   Pavel Labath via llvm-commits
• [llvm] [Analysis][NFC] Remove redundant include SCCIterator.h from BranchProbabilityInfo (PR #211259)   Wenju He via llvm-commits
• [llvm] [CodeGenPrepare] Use UniformityAnalysis to sink uniform compares (PR #204528)   Jay Foad via llvm-commits
• [llvm] [CodeGenPrepare] Use UniformityAnalysis to sink uniform compares (PR #204528)   Jay Foad via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   Spencer Bryngelson via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (PR #210739)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Zach Goldthorpe via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Jay Foad via llvm-commits
• [llvm] 6b52427 - [LLVM] Remove SVEIntrinsicOpts pass. (#210368)   via llvm-commits
• [llvm] [LLVM] Remove SVEIntrinsicOpts pass. (PR #210368)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Jay Foad via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Add olCreateContext / olDestroyContext / olGetContextInfo API (PR #209144)   Joseph Huber via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Aiden Grossman via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Aiden Grossman via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Aiden Grossman via llvm-commits
• [llvm] [X86] Don't emit x87 register scrub when x87 is unavailable (PR #211146)   Akshay K via llvm-commits
• [llvm] [AMDGPU] Add gfx13 support for v_cvt_pk_{fp8, bf8}_f16 (PR #211263)   Mariusz Sikora via llvm-commits
• [llvm] [CodeGenPrepare] Use UniformityAnalysis to sink uniform compares (PR #204528)   Jay Foad via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   Nico Weber via llvm-commits
• [llvm] [LIT][NFC] Fix double slash in GoogleTest format test names (PR #210296)   Aiden Grossman via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand bounded memcpy/memmove as masked lo… (PR #211216)   via llvm-commits
• [libc] [llvm] [libc][cmake] Add LIBC_TEST_SUBPROCESS_TESTS (PR #211238)   via llvm-commits
• [llvm] [AMDGPU] Don't apply the cold-callsite inline threshold in kernels (PR #211255)   via llvm-commits
• [llvm] fdae383 - [SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (#210923)   via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   Nico Weber via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract same-opcode compatibility helpers (1/3) (PR #210923)   Madhur Amilkanthwar via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   chandan singh via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   chandan singh via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand bounded memcpy/memmove as masked lo… (PR #211216)   via llvm-commits
• [llvm] Install llvm-23 in libc docker image (PR #210929)   Aiden Grossman via llvm-commits
• [llvm] [X86] Don't emit x87 register scrub when x87 is unavailable (PR #211146)   Akshay K via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Folkert de Vries via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Always inline device-outlined target regions (PR #211136)   Spencer Bryngelson via llvm-commits
• [llvm] [InstCombine]Fold bitcast shuffle ashr v2i64 (PR #206717)   via llvm-commits
• [llvm] [LLVM] Remove 'LLVM_LIBC_GPU_BUILD' logic (PR #211265)   Joseph Huber via llvm-commits
• [clang] [llvm] [IR] Add fast-math flags to atomicrmw (PR #211267)   via llvm-commits
• [clang] [llvm] [clang][Modules][serialization] Deduplicate source location entries across loaded modules (PR #209795)   Ayokunle Amodu via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Nikita Popov via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Add IntrConvergent to convergent intrinsics (PR #211256)   Tim Corringham via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Nikita Popov via llvm-commits
• [clang] [llvm] [clang][Modules][serialization] Deduplicate source location entries across loaded modules (PR #209795)   Ayokunle Amodu via llvm-commits
• [llvm] [Analysis][NFC] Remove redundant include SCCIterator.h from BranchProbabilityInfo (PR #211259)   Alexis Engelke via llvm-commits
• [llvm] 84301dd - [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (#180631)   via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Thibault Monnier via llvm-commits
• [clang] [llvm] [IR] Add fast-math flags to atomicrmw (PR #211267)   via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Add IntrConvergent to convergent intrinsics (PR #211256)   via llvm-commits
• [llvm] [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (PR #195402)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (PR #195402)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (PR #195402)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Zach Goldthorpe via llvm-commits
• [llvm] [SystemZ][z/OS] Implement emitCommonSymbol in MCGOFFStreamer (PR #210179)   Ulrich Weigand via llvm-commits
• [llvm] [DWARFLinker] Fix placement lost-update crash in parallel marking (PR #211009)   Jonas Devlieghere via llvm-commits
• [clang] [llvm] [clang][Modules][serialization] Deduplicate source location entries across loaded modules (PR #209795)   Ayokunle Amodu via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Zach Goldthorpe via llvm-commits
• [llvm] [BranchFolding] Refactor AreConditionalsEqual to Helper (PR #211270)   Aiden Grossman via llvm-commits
• [llvm] [BranchFolding] Fold away subsequent identical branches (PR #203110)   Aiden Grossman via llvm-commits
• [llvm] workflows/release-documentation: Add missing checkout (PR #211082)   Tom Stellard via llvm-commits
• [llvm] workflows/release-documentation: Add missing checkout (PR #211082)   Tom Stellard via llvm-commits
• [llvm] workflows/release-documentation: Add missing checkout (PR #211082)   Tom Stellard via llvm-commits
• [llvm] Set up windows specific cmake defines for lldb bazel build and config for LZMA (PR #205823)   David Young via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Zach Goldthorpe via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Guo Chen via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Guo Chen via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Hubert Tong via llvm-commits
• [llvm] Set up windows specific cmake defines for lldb bazel build and config for LZMA (PR #205823)   David Young via llvm-commits
• [llvm] [NFC][SPIR-V] Reuse PartialOrderingVisitor across sortSelectionMerge calls (PR #211200)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Hubert Tong via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Guo Chen via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [llvm] [X86] Don't emit x87 register scrub when x87 is unavailable (PR #211146)   Phoebe Wang via llvm-commits
• [llvm] [X86] Don't emit x87 register scrub when x87 is unavailable (PR #211146)   Phoebe Wang via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [llvm] [FileCheck] Extend -dump-input with pattern notes (PR #207486)   Joel E. Denny via llvm-commits
• [llvm] [LoopIdiom] Use SCEV for deciding memmove validity (PR #211274)   John Brawn via llvm-commits
• [llvm] [NFC][SPIR-V] Merge duplicate prefix/suffix switches in lookupBuiltin (PR #211194)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [llvm] [NFC][SPIR-V] Merge duplicate prefix/suffix switches in lookupBuiltin (PR #211194)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (PR #210689)   Nikita Taranov via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][flang-rt] Add -ffpe-trap= to set the initial FP exception halting mode (PR #208828)   Tarun Prabhu via llvm-commits
• [llvm] [AMDGPU] Flush denormal results when constant folding amdgcn.rcp (PR #203566)   Arseniy Obolenskiy via llvm-commits
• [llvm] draft (PR #211025)   Kseniya Tikhomirova via llvm-commits
• [llvm] 1654b66 - [NFC][SPIR-V] Reuse PartialOrderingVisitor across sortSelectionMerge calls (#211200)   via llvm-commits
• [llvm] [NFC][SPIR-V] Reuse PartialOrderingVisitor across sortSelectionMerge calls (PR #211200)   Arseniy Obolenskiy via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (PR #210739)   Nikita Taranov via llvm-commits
• [llvm] [llubi][NFC] Use context-aware value printer (PR #211275)   Yingwei Zheng via llvm-commits
• [llvm] Install llvm-23 in libc docker image (PR #210929)   via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   CHANDRA GHALE via llvm-commits
• [llvm] [AArch64][ISel] Recover ADDHN from OR comparison masks (PR #210943)   Harry Ramsey via llvm-commits
• [llvm] [NFC][SPIR-V] Merge duplicate prefix/suffix switches in lookupBuiltin (PR #211194)   Arseniy Obolenskiy via llvm-commits
• [llvm] [NFC][SPIR-V] Merge duplicate prefix/suffix switches in lookupBuiltin (PR #211194)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIRV][NFCI] Refactor selection of atomic operations with pointer operands (PR #208294)   Nick Sarnie via llvm-commits
• [llvm] Add os select for plugin process on Initialization target to add windows (PR #211276)   David Young via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   CHANDRA GHALE via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   CHANDRA GHALE via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Pradeep Kumar via llvm-commits
• [llvm] b9e3e65 - [Clang][coro] Fix `coro.free` in `.resume` clones with `[[clang::coro_await_elidable]]` (#207799)   via llvm-commits
• [clang] [llvm] [Clang][coro] Fix `coro.free` in `.resume` clones with `[[clang::coro_await_elidable]]` (PR #207799)   Yuxuan Chen via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (PR #210739)   Nikita Taranov via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [llvm] [offload] Remove `omptarget` references from tests (PR #208205)   Krzysztof Parzyszek via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [llvm] [offload] Remove `omptarget` references from tests (PR #208205)   Ivan R. Ivanov via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
• [llvm] [AMDGPU] Fix performFMACombine FDOT2 fold ignoring denormal mode and signed zero (PR #205101)   Wooseok Lee via llvm-commits
• [compiler-rt] [llvm] Remove debug leftovers (PR #211068)   Petr Hosek via llvm-commits
• [clang] [flang] [llvm] [flang][AIX] Diagnose unsupported OBJECT_MODE setting and -maix32 option (PR #209919)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][AIX] Diagnose unsupported OBJECT_MODE setting and -maix32 option (PR #209919)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][AIX] Diagnose unsupported OBJECT_MODE setting and -maix32 option (PR #209919)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang][AIX] Diagnose unsupported OBJECT_MODE setting and -maix32 option (PR #209919)   Tarun Prabhu via llvm-commits
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• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Juan Manuel Martinez Caamaño via llvm-commits
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• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Arseniy Obolenskiy via llvm-commits
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• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Florian Hahn via llvm-commits
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• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Florian Hahn via llvm-commits
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• [llvm] [SLP][NFC]Add a test for mixed fma/fmuladd scalars, NFC (PR #211280)   Alexey Bataev via llvm-commits
• [llvm] Add missing opcode for offset validity check (PR #211186)   Jyotsna Verma via llvm-commits
• [llvm] [AMDGPU] Fix performFMACombine FDOT2 fold ignoring denormal mode and signed zero (PR #205101)   Wooseok Lee via llvm-commits
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• [llvm] [SLP][NFC]Add a test for mixed fma/fmuladd scalars, NFC (PR #211280)   Alexey Bataev via llvm-commits
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• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Florian Hahn via llvm-commits
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• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Sean Clarke via llvm-commits
• [clang] [llvm] [Clang][coro] Fix `coro.free` in `.resume` clones with `[[clang::coro_await_elidable]]` (PR #207799)   LLVM Continuous Integration via llvm-commits
• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   Kareem Ergawy via llvm-commits
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• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   David Sherwood via llvm-commits
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• [clang] [llvm] [IR] Add fast-math flags to atomicrmw (PR #211267)   via llvm-commits
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• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Fix incorrect grid_dims constant folding for reqd_work_group_size (PR #211285)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Fix incorrect grid_dims constant folding for reqd_work_group_size (PR #211285)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Fix incorrect grid_dims constant folding for reqd_work_group_size (PR #211285)   Arseniy Obolenskiy via llvm-commits
• [llvm] [Hexagon] Fix ISel error: LLVM: cannot select -fmaximum (PR #211283)   Brian Cain via llvm-commits
• [llvm] [NFC][SPIR-V] Fuse redundant full-traversal loops in prepare/emit-intrinsics/structurizer passes (PR #211299)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [SystemZ] Do not extend integer arguments in z/OS XPLINK64 ABI (PR #206833)   Zibi Sarbinowski via llvm-commits
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• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Aaron Ballman via llvm-commits
• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Aaron Ballman via llvm-commits
• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Aaron Ballman via llvm-commits
• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Aaron Ballman via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Sean Clarke via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (PR #207201)   Benjamin Maxwell via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Piotr Fusik via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add legalisation to G_EXRACT_SUBVECTOR (PR #207956)   David Green via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Ralf Jung via llvm-commits
• [llvm] 5e860ee - [AArch64] Set NoPHIs for outlined functions (#209852)   via llvm-commits
• [llvm] [AArch64] Set NoPHIs for outlined functions (PR #209852)   Ellis Hoag via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Hubert Tong via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Ralf Jung via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Guo Chen via llvm-commits
• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [SystemZ] Do not extend integer arguments in z/OS XPLINK64 ABI (PR #206833)   Ulrich Weigand via llvm-commits
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• [llvm] [AArch64] Add A57 schedule model for CAS instructions (PR #211195)   Andrew Savonichev via llvm-commits
• [llvm] [AArch64] Add A57 schedule model for CAS instructions (PR #211195)   Andrew Savonichev via llvm-commits
• [llvm] [VPlan] Use DerivedIV in convertToStridedAccesses (PR #209611)   Florian Hahn via llvm-commits
• [llvm] 22351c7 - [Flang][OpenMP] Add support for interop construct (#203959)   via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Add support for interop construct (PR #203959)   Caroline Newcombe via llvm-commits
• [llvm] [SampleProfile] Support Eytzinger layout in SecNameTable (PR #211027)   David Li via llvm-commits
• [llvm] [SampleProfile] Support Eytzinger layout in SecNameTable (PR #211027)   David Li via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Sean Clarke via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Sean Clarke via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Piotr Fusik via llvm-commits
• [clang] [llvm] [SystemZ] Do not extend integer arguments in z/OS XPLINK64 ABI (PR #206833)   Ulrich Weigand via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [llvm] [ProfileData] Split EagerSampleProfileNameTable by key type (NFC) (PR #211126)   David Li via llvm-commits
• [llvm] 65c377b - [MC][NFC] Share some code between MasmParser and AsmParser   via llvm-commits
• [llvm] [MC][NFC] Share some code between MasmParser and AsmParser (PR #210731)   Alexander Richardson via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Graham Hunter via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Nikita Popov via llvm-commits
• [llvm] [llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   Ian Anderson via llvm-commits
• [llvm] [AMDGPU] Move VGPR, EU, and Wave Queries into TargetParser (PR #211312)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for Two-Address Instructions (PR #207731)   Lukas Sommer via llvm-commits
• [clang] [llvm] [IR] Add fast-math flags to atomicrmw (PR #211267)   via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Move VGPR, EU, and Wave Queries into TargetParser (PR #211312)   via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Florian Hahn via llvm-commits
• [llvm] Exclude another coro test from profcheck (PR #211296)   Yuxuan Chen via llvm-commits
• [llvm] [ARM] support -mlong-calls -fPIC on arm32 #39970 (PR #147313)   via llvm-commits
• [llvm] [NFC][VPlan] Add initial tests for future VPlan-based stride MV (PR #182594)   Florian Hahn via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Min-Yih Hsu via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Min-Yih Hsu via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Min-Yih Hsu via llvm-commits
• [lld] [lld][docs] Document /DRIVER support (PR #211311)   Tyler Gibbs via llvm-commits
• [llvm] [ARM] support -mlong-calls -fPIC on arm32 #39970 (PR #147313)   via llvm-commits
• [llvm] [NFC][VPlan] Add initial tests for future VPlan-based stride MV (PR #182594)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Preserve instruction flags in ILP scheduler (PR #211190)   Matt Arsenault via llvm-commits
• [llvm] [bazel] Add os select for plugin process on Initialization target to add windows (PR #211276)   Keith Smiley via llvm-commits
• [llvm] [bazel] Add os select for plugin process on Initialization target to add windows (PR #211276)   Keith Smiley via llvm-commits
• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Aaron Ballman via llvm-commits
• [llvm] [BranchFolding] Refactor AreConditionalsEqual to Helper (PR #211270)   Matt Arsenault via llvm-commits
• [llvm] [BranchFolding] Refactor AreConditionalsEqual to Helper (PR #211270)   Matt Arsenault via llvm-commits
• [llvm] [HLSL] Add in-memory representation of Semantic Signatures (PR #209907)   Finn Plummer via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [llvm] [BranchFolding] Refactor AreConditionalsEqual to Helper (PR #211270)   Aiden Grossman via llvm-commits
• [llvm] [BranchFolding] Refactor AreConditionalsEqual to Helper (PR #211270)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Use global_prefetch_b8 for GFX1250 unclaused VMEM workaround (PR #210874)   Siu Chi Chan via llvm-commits
• [llvm] [HLSL] Add in-memory representation of Semantic Signatures (PR #209907)   Finn Plummer via llvm-commits
• [llvm] [HLSL] Add in-memory representation of Semantic Signatures (PR #209907)   Finn Plummer via llvm-commits
• [llvm] [HLSL] Add in-memory representation of Semantic Signatures (PR #209907)   Finn Plummer via llvm-commits
• [llvm] 8c55656 - [Matrix] Use incoming terminator as insert point in visitPHI. (#211211)   via llvm-commits
• [llvm] [Matrix] Use incoming terminator as insert point in visitPHI. (PR #211211)   Florian Hahn via llvm-commits
• [llvm] Revert "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211341)   Arthur Eubanks via llvm-commits
• [llvm] [NVPTXAsmPrinter] Allow self-referential device global initializers (PR #197838)   Artem Belevich via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Piotr Fusik via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Piotr Fusik via llvm-commits
• [llvm] [Matrix] Use incoming terminator as insert point in visitPHI. (PR #211211)   Florian Hahn via llvm-commits
• [llvm] [Matrix] Use incoming terminator as insert point in visitPHI. (PR #211211)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Florian Hahn via llvm-commits
• [llvm] b47174d - [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (#210543)   via llvm-commits
• [llvm] [VPlan] Add createWiden{Load,Store} VPBuilder members (NFC) (PR #210543)   Florian Hahn via llvm-commits
• [llvm] [LLVM] Remove 'LLVM_LIBC_GPU_BUILD' logic (PR #211265)   via llvm-commits
• [llvm] [SLP] Enable runtime stride stores (PR #200018)   Ryan Buchner via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   via llvm-commits
• [llvm] [SLP] Enable runtime stride stores (PR #200018)   Alexey Bataev via llvm-commits
• [llvm] [Matrix] De-duplicate reshaped matrixes used as incoming values for phi. (PR #211210)   Florian Hahn via llvm-commits
• [llvm] [CodeGen] ReplaceWithVeclib assertion failure with invalid intrinsic (PR #211352)   via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Zach Goldthorpe via llvm-commits
• [llvm] 5431603 - Revert "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (#211341)   via llvm-commits
• [llvm] Revert "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211341)   Arthur Eubanks via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Louis Dionne via llvm-commits
• [llvm] [PhaseOrdering] Add more tests for expanding ptr SCEVs (NFC) (PR #211360)   Florian Hahn via llvm-commits
• [llvm] [PhaseOrdering] Add more tests for expanding ptr SCEVs (NFC) (PR #211360)   Florian Hahn via llvm-commits
• [compiler-rt] [scudo] Add unmap and eviction stats to Secondary (PR #210465)   Sadaf Ebrahimi via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [IR] Add fast-math flags to atomicrmw (PR #211267)   via llvm-commits
• [compiler-rt] [scudo] Add unmap and eviction stats to Secondary (PR #210465)   Sadaf Ebrahimi via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Sean Clarke via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Support lowering preloaded kernel arguments (PR #205049)   Keshav Vinayak Jha via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
• [lld] [llvm] [LTO] Move section names from symbol table to module summary. (PR #210856)   Eli Friedman via llvm-commits
• [llvm] [Inliner] Don't apply the cold-callsite threshold in non-callable functions (PR #211255)   Spencer Bryngelson via llvm-commits
• [llvm] 3140a64 - [IR] Allow vector atomicrmw xchg (#208510)   via llvm-commits
• [llvm] [IR] Allow vector atomicrmw xchg (PR #208510)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Yaxun Liu via llvm-commits
• [llvm] coro.retcon: Fix return type and buffer poisoning in elided coroutines (PR #208384)   Anton Korobeynikov via llvm-commits
• [llvm] [LAA] Properly report strided access preventing store-to-load forwarding (PR #208791)   Andrei Elovikov via llvm-commits
• [llvm] [LAA] Switch safe-distance APIs to operate in elements instead of bits, NFCI'ish (PR #191867)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Florian Hahn via llvm-commits
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• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Nikita Popov via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Nikita Popov via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Nikita Popov via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Nikita Popov via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Nikita Popov via llvm-commits
• [clang] [llvm] [SystemZ] Do not extend integer arguments in z/OS XPLINK64 ABI (PR #206833)   Kai Nacke via llvm-commits
• [llvm] [PhaseOrdering] Add more tests for expanding ptr SCEVs (NFC) (PR #211360)   Florian Hahn via llvm-commits
• [llvm] f1483ea - [PhaseOrdering] Add more tests for expanding ptr SCEVs (NFC) (#211360)   via llvm-commits
• [llvm] [PhaseOrdering] Add more tests for expanding ptr SCEVs (NFC) (PR #211360)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Matt Arsenault via llvm-commits
• [llvm] [X86] Narrow vXi32/vXi64 usubsat to vpsubusb/vpsubusw when LHS is known to fit in fewer bits (PR #206592)   via llvm-commits
• [llvm] [SLP][AArch64]Support masked div/rem on non-pow-2 vectors (PR #210623)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Add a test for mixed fma/fmuladd scalars, NFC (PR #211280)   via llvm-commits
• [clang] [llvm] [IR] Add fast-math flags to atomicrmw (PR #211267)   Nikita Popov via llvm-commits
• [llvm] [Offload] Add warp size device info to liboffload (PR #211380)   Sophia Herrmann via llvm-commits
• [llvm] 5f88e49 - [MemDep] Treat partial-overlap lifetime.start as a clobber (#211167)   via llvm-commits
• [llvm] [MemDep] Treat partial-overlap lifetime.start as a clobber (PR #211167)   Usama Hameed via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   Krzysztof Parzyszek via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   via llvm-commits
• [llvm] [Matrix] De-duplicate reshaped matrixes used as incoming values for phi. (PR #211210)   Jon Roelofs via llvm-commits
• [llvm] [x86] Handle implicit sections when determining if a global is large (PR #206210)   Pranav Kant via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   Krzysztof Parzyszek via llvm-commits
• [llvm] [NFC][SPIR-V] Fuse redundant full-traversal loops in prepare/emit-intrinsics/structurizer passes (PR #211299)   via llvm-commits
• [llvm] [AMDGPU] Track async events for vm_vsrc simplifications (PR #211333)   Krzysztof Drewniak via llvm-commits
• [llvm] [x86] Handle implicit sections when determining if a global is large (PR #206210)   Arthur Eubanks via llvm-commits
• [llvm] [x86] Handle implicit sections when determining if a global is large (PR #206210)   Arthur Eubanks via llvm-commits
• [libc] [llvm] [libc] Move generated elf header to include (PR #211428)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc] Move generated elf header to include (PR #211428)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc] Move generated elf header to include (PR #211428)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc] Move generated elf header to include (PR #211428)   Alexey Samsonov via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Mark LIFETIME_START and LIFETIME_END as not safe to move (PR #211179)   Luke Lau via llvm-commits
• [llvm] [LLVM] Auto-upgrade legacy coro.end results (PR #211081)   Chuanqi Xu via llvm-commits
• [llvm] [CI] Add precommit CIs to test compiler-rt + LLVM libc integration. (PR #200196)   via llvm-commits
• [llvm] Install llvm-23 in libc docker image (PR #210929)   via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [llvm] [LoopVectorize] Introduce check-first vectorization for multiple early-exit loops (PR #210492)   Arjun H Kumar via llvm-commits
• [llvm] [Matrix] Add remarks for matrix loads and stores (PR #211441)   Jon Roelofs via llvm-commits
• [llvm] [Matrix] Add remarks for matrix loads and stores (PR #211441)   Jon Roelofs via llvm-commits
• [llvm] [x86] Handle implicit sections when determining if a global is large (PR #206210)   Pranav Kant via llvm-commits
• [llvm] Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211427)   Sayan Sivakumaran via llvm-commits
• [llvm] [Sample Profile] make page size configurable for ProfiledBinary (PR #206873)   via llvm-commits
• [llvm] a812f33 - [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (#209684)   via llvm-commits
• [llvm] [LoopVersioningLICM] Do not let llvm.pseudoprobe block loop versioning (PR #209684)   chandan singh via llvm-commits
• [llvm] 0745688 - [SampleProfile] Support Eytzinger layout in SecNameTable (#211027)   via llvm-commits
• [llvm] [SampleProfile] Support Eytzinger layout in SecNameTable (PR #211027)   Kazu Hirata via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Yaxun Liu via llvm-commits
• [llvm] [Sample Profile] make page size configurable for ProfiledBinary (PR #206873)   via llvm-commits
• [llvm] [Sample Profile] make page size configurable for ProfiledBinary (PR #206873)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Yaxun Liu via llvm-commits
• [llvm] Reapply "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (#210937) (PR #211452)   Luke Lau via llvm-commits
• [llvm] Reapply "[RISCV] Run EarlyMachineLICM before VLOptimizer to hoist constant splats" (#210937) (PR #211452)   Luke Lau via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (PR #210739)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add tests for uniform uaddsat.i16 (NFC) (PR #211337)   Shilei Tian via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] [BOLT][RISCV] Don't read .rela.plt twice when DT_RELA aliases DT_JMPREL (PR #211201)   Pengcheng Wang via llvm-commits
• [clang] [flang] [libc] [llvm] [cmake][docs] Fix incremental docs builds under deletion and renames (PR #211411)   Reid Kleckner via llvm-commits
• [llvm] [X86][CCMP] Fix invalid CCMP emission (PR #211161)   Feng Zou via llvm-commits
• [llvm] [X86][CCMP] Fix invalid CCMP emission (PR #211161)   Feng Zou via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyCFGSortPass (PR #210247)   Aiden Grossman via llvm-commits
• [llvm] 3897623 - [WebAssembly] Port WebAssemblyCFGSortPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyCFGSortPass (PR #210247)   Aiden Grossman via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyCFGStackifyPass (PR #210255)   Aiden Grossman via llvm-commits
• [llvm] e14b11b - [WebAssembly] Port WebAssemblyCFGStackifyPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyCFGStackifyPass (PR #210255)   Aiden Grossman via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Luke Lau via llvm-commits
• [llvm] [LFI][X86] Add control-flow rewrites (PR #210913)   Zachary Yedidia via llvm-commits
• [llvm] bdddd13 - [DebugInfo] Don't assert on missing template parameter names (#211412)   via llvm-commits
• [llvm] [DebugInfo] Don't assert on missing template parameter names (PR #211412)   Jonas Devlieghere via llvm-commits
• [llvm] [DebugInfo] Don't assert on missing template parameter names (PR #211412)   Jonas Devlieghere via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyExplicitLocalsPass (PR #210256)   Aiden Grossman via llvm-commits
• [llvm] 90bed50 - [WebAssembly] Port WebAssemblyExplicitLocalsPass   via llvm-commits
• [llvm] [DebugInfo] Don't assert on missing template parameter names (PR #211412)   Jonas Devlieghere via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyExplicitLocalsPass (PR #210256)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyLowerBrUnlessPass (PR #210257)   Aiden Grossman via llvm-commits
• [llvm] 8bae4dc - [WebAssembly] Port WebAssemblyLowerBrUnlessPass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyLowerBrUnlessPass (PR #210257)   Aiden Grossman via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [CodeGen] Expand unsupported interleave to shuffles (PR #210494)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Expand unsupported interleave to shuffles (PR #210494)   Luke Lau via llvm-commits
• [llvm] Adding the support for vectorization of loops with load based tripcount (PR #209390)   Manish Srivastava via llvm-commits
• [llvm] [llvm-calc-occupancy] Add an AMDGPU occupancy calculator tool (PR #208727)   via llvm-commits
• [compiler-rt] 73a7638 - [compiler-rt][sanitizer_common] Size readlink/getsockopt post-hook unpoison by bytes written (#209209)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer_common] Size readlink/getsockopt post-hook unpoison by bytes written (PR #209209)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer_common] Size readlink/getsockopt post-hook unpoison by bytes written (PR #209209)   via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [libc] [llvm] [libc] Move generated elf header to include (PR #211428)   Pavel Labath via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract InstructionsState (2/3) (PR #211461)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract InstructionsState (2/3) (PR #211461)   via llvm-commits
• [libc] [llvm] [libc][cmake] Add LIBC_TEST_SUBPROCESS_TESTS (PR #211238)   Pavel Labath via llvm-commits
• [clang-tools-extra] [llvm] [Github][CI] Remove doc8 in code-linter workflow (PR #211460)   Baranov Victor via llvm-commits
• [llvm] [LoopFusion] Do not fuse loops containing convergent operations (PR #203460)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopFusion] Do not fuse loops containing convergent operations (PR #203460)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GitHub] Collect statistics in test-suite workflow (PR #210316)   Luke Lau via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   via llvm-commits
• [llvm] [llvm-profgen] Formatting StringRef iteration in isLBRSample (PR #211462)   via llvm-commits
• [llvm] [GitHub] Collect statistics in test-suite workflow (PR #210316)   Luke Lau via llvm-commits
• [llvm] [llvm-profgen] Formatting StringRef iteration in isLBRSample (PR #211462)   via llvm-commits
• [llvm] [CodeGen][ARM] Keep undef REG_SEQUENCE operands live for full-register uses without LIS (PR #203178)   via llvm-commits
• [llvm] [llvm-profgen] Formatting StringRef iteration in isLBRSample (PR #211462)   Amir Ayupov via llvm-commits
• [llvm] [llvm-profgen] Formatting StringRef iteration in isLBRSample (PR #211462)   via llvm-commits
• [llvm] [llvm-profgen] Formatting StringRef iteration in isLBRSample (PR #211462)   via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] e04cf35 - [VPlan] Compute blend masks from minimum set of edge masks (#201783)   via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #201783)   Luke Lau via llvm-commits
• [llvm] [CodeGen][ARM] Keep undef REG_SEQUENCE operands live for full-register uses without LIS (PR #203178)   via llvm-commits
• [llvm] 450cf0a - [llvm-profgen] Formatting StringRef iteration in isLBRSample (#211462)   via llvm-commits
• [llvm] [llvm-profgen] Formatting StringRef iteration in isLBRSample (PR #211462)   via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Piotr Fusik via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [llvm] 22cb41c - [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (#210139)   via llvm-commits
• [llvm] [LoopIdiom] Use narrower bit widths where possible in `optimizeCRCLoopUsingClmul` (PR #210139)   Piotr Fusik via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [llvm] 8730451 - [Reassociate] Use UniformityInfo to group uniform operands together (#198507)   via llvm-commits
• [llvm] [Reassociate] Use UniformityInfo to group uniform operands together (PR #198507)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [AMDGPU] Add gfx13 support for global_load_async_to_lds (PR #211248)   Mariusz Sikora via llvm-commits
• [clang] [llvm] [AMDGPU] Add gfx13 support for global_load_async_to_lds (PR #211248)   Mariusz Sikora via llvm-commits
• [llvm] [GVN] Add tests for loop-load PRE into a multi-successor block (PR #206693)   Madhur Amilkanthwar via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [llvm] da27aac - [RISCV][P-ext] Add packed sign and zero extend intrinsics (#208685)   via llvm-commits
• [clang] [llvm] [LoongArch] Support i128 operands for LSX inline assembly (PR #211464)   via llvm-commits
• [llvm] [RISCV][P-ext] Add packed sign and zero extend intrinsics (PR #208685)   via llvm-commits
• [clang] [llvm] [LoongArch] Support i128 operands for LSX inline assembly (PR #211464)   via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   Kito Cheng via llvm-commits
• [llvm] [AMDGPU] Reject unsupported TFE D16 format buffer loads (PR #211465)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   Kito Cheng via llvm-commits
• [llvm] [CodeGen][ARM] Keep undef REG_SEQUENCE operands live for full-register uses without LIS (PR #203178)   via llvm-commits
• [llvm] [AMDGPU] Reject unsupported TFE D16 format buffer loads (PR #211465)   via llvm-commits
• [llvm] [VPlan] Use control flow to implement MaskedCond and preserve SSA (PR #201784)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use CFG to mask early exit loops with side-effects. NFC (PR #203263)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Reject unsupported TFE D16 format buffer loads (PR #211465)   via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Reject unsupported TFE D16 format buffer loads (PR #211465)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RISCV] Preserve call-preserved reg mask for LPAD-aligned calls (PR #210868)   via llvm-commits
• [llvm] [CodeGen] Precompute pressure-set register classes (PR #210751)   Cullen Rhodes via llvm-commits
• [llvm] [llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   James Henderson via llvm-commits
• [llvm] [CodeGen] Fix -Wrange-loop-construct (PR #211469)   Gergely Futo via llvm-commits
• [llvm] [VectorCombine] Allow shuffling with bitcast for not multiple offset for loadsize (PR #119139)   via llvm-commits
• [compiler-rt] [sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (PR #211468)   Thurston Dang via llvm-commits
• [llvm] e407c4b - [AMDGPU] Add gfx13 support for global_load_async_to_lds (#211248)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add gfx13 support for global_load_async_to_lds (PR #211248)   Mariusz Sikora via llvm-commits
• [compiler-rt] [sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (PR #211468)   via llvm-commits
• [llvm] [LoopDistribute][NFC] Autogenerate checks for some tests (PR #211471)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopDistribute][NFC] Autogenerate checks for some tests (PR #211471)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopDistribute][NFC] Autogenerate checks for some tests (PR #211471)   via llvm-commits
• [llvm] [Support/ELF] Add OpenBSD NT_OPENBSD_PACMASK core note type (PR #205411)   James Henderson via llvm-commits
• [llvm] 44dd295 - [AMDGPU] Using feature to define vmem cacheline size (#207884)   via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [llvm] [VectorCombine] Fold contiguous loads into a single vector load (PR #185736)   via llvm-commits
• [llvm] [SimplifyLibCalls] Shrink llvm.sincos.f64 to llvm.sincos.f32 (PR #211218)   Kito Cheng via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Xiaoyang Gong via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   via llvm-commits
• [clang] [llvm] [SelectionDAG][NVPTX] support expanding target intrinsics; implement for `nvvm.{fmax/fmin}` (PR #194783)   Princeton Ferro via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   via llvm-commits
• [llvm] [AMDGPU] Simplify check for packed fp32/64 opsel bits. NFCI (PR #211374)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [X86][CCMP] Fix invalid CCMP emission (PR #211161)   Phoebe Wang via llvm-commits
• [llvm] [X86][CCMP] Reorder Comparison Trees to Facilitate CSE (PR #211476)   Phoebe Wang via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Yuyang Zhang via llvm-commits
• [llvm] [X86][CCMP] Reorder Comparison Trees to Facilitate CSE (PR #211476)   via llvm-commits
• [llvm] [SimplifyLibCalls] Shrink llvm.sincos.f64 to llvm.sincos.f32 (PR #211218)   Kito Cheng via llvm-commits
• [llvm] [llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   Ian Anderson via llvm-commits
• [llvm] [SimplifyLibCalls] Shrink llvm.sincos.f64 to llvm.sincos.f32 (PR #211218)   Kito Cheng via llvm-commits
• [llvm] [llvm-objdump] Factor the load command prologue into a shared function (PR #210881)   Ian Anderson via llvm-commits
• [llvm] 520a930 - [llvm-objdump] Factor the load command prologue into a shared function (#210881)   via llvm-commits
• [llvm] AMDGPU: Migrate llvm-mca tests to subarch triples (PR #211477)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate llvm-mca tests to subarch triples (PR #211477)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate llvm-mca tests to subarch triples (PR #211477)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyLibCalls] Shrink llvm.sincos.f64 to llvm.sincos.f32 (PR #211218)   Matt Arsenault via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Paulius Velesko via llvm-commits
• [llvm] AMDGPU: Migrate llvm-mca tests to subarch triples (PR #211477)   via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [llvm] [VectorCombine] Fold contiguous loads into a single vector load (PR #185736)   via llvm-commits
• [llvm] [X86][CCMP] Reorder Comparison Trees to Facilitate CSE (PR #211476)   Shengchen Kan via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Felipe de Azevedo Piovezan via llvm-commits
• [lld] [llvm] Add initial support for Xtensa to LLD (PR #202926)   Alexey Gerenkov via llvm-commits
• [llvm] [AMDGPU] Add gfx13 support for v_cvt_pk_{fp8, bf8}_f16 (PR #211263)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add gfx13 support for v_cvt_pk_{fp8, bf8}_f16 (PR #211263)   Mariusz Sikora via llvm-commits
• [clang] [llvm] [clang][NFC] fold ExpressionTraits and TypeTraits helpers into BuiltinTraits.h (PR #210838)   Corentin Jabot via llvm-commits
• [llvm] [AA] Make getSyncEffects sync-scope aware for pointer arguments (PR #211486)   via llvm-commits
• [clang] [llvm] [clang][NFC] fold ExpressionTraits and TypeTraits helpers into BuiltinTraits.h (PR #210838)   Corentin Jabot via llvm-commits
• [llvm] [AA] Make getSyncEffects sync-scope aware for pointer arguments (PR #211486)   via llvm-commits
• [llvm] [AA] Make getSyncEffects sync-scope aware for pointer arguments (PR #211486)   via llvm-commits
• [llvm] 355dac7 - [AMDGPU] Preserve liveness flags in ILP scheduler (#211190)   via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add packed sign and zero extend intrinsics (PR #211487)   via llvm-commits
• [llvm] [AMDGPU] Preserve liveness flags in ILP scheduler (PR #211190)   Lukas Sommer via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   Luke Lau via llvm-commits
• [clang] [llvm] [Clang][RISCV] Add packed sign and zero extend intrinsics (PR #211487)   via llvm-commits
• [clang] [llvm] Add InterlockedAdd resource methods (PR #208128)   Joshua Batista via llvm-commits
• [clang] [llvm] [clang][NFC] fold ExpressionTraits and TypeTraits helpers into BuiltinTraits.h (PR #210838)   Corentin Jabot via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [llvm] [AA] Make getSyncEffects sync-scope aware for pointer arguments (PR #211486)   Nikita Popov via llvm-commits
• [compiler-rt] [sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (PR #211468)   via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [libc] [llvm] Reapply "[libc] Port process utilities to hermetic mode and enable some tests" (PR #211484)   via llvm-commits
• [llvm] [AArch64] Add SME clustering (PR #211483)   Tomer Shafir via llvm-commits
• [llvm] 14371a7 - [AMDGPU] Simplify check for packed fp32/64 opsel bits. NFCI (#211374)   via llvm-commits
• [llvm] [AMDGPU] Simplify check for packed fp32/64 opsel bits. NFCI (PR #211374)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AArch64] Add SME clustering (PR #211483)   Tomer Shafir via llvm-commits
• [clang] [llvm] [DirectX][Driver] Add /Qpdb_in_private flag support (PR #204903)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Luke Lau via llvm-commits
• [llvm] beca2e9 - [AArch64] Prefer (sub x, -c) over (add x, c) if -c is cheaper. (#211020)   via llvm-commits
• [llvm] [AArch64] Prefer (sub x, -c) over (add x, c) if -c is cheaper. (PR #211020)   Ricardo Jesus via llvm-commits
• [llvm] [X86][CCMP] Fix invalid CCMP emission (PR #211161)   Phoebe Wang via llvm-commits
• [llvm] [MergeFuncs] Account for elementwise loads in FunctionComparator (PR #211478)   Yonah Goldberg via llvm-commits
• [llvm] [X86][CCMP] Fix invalid CCMP emission (PR #211161)   Phoebe Wang via llvm-commits
• [llvm] [AA] Make getSyncEffects sync-scope aware for pointer arguments (PR #211486)   via llvm-commits
• [llvm] [docs] Update BOLT Office Hours Zoom link (PR #211491)   Paschalis Mpeis via llvm-commits
• [llvm] 0e78045 - [Matrix] De-duplicate reshaped matrixes used as incoming values for phi. (#211210)   via llvm-commits
• [llvm] [Matrix] De-duplicate reshaped matrixes used as incoming values for phi. (PR #211210)   Florian Hahn via llvm-commits
• [llvm] [docs] Update BOLT Office Hours Zoom link (PR #211491)   Paschalis Mpeis via llvm-commits
• [llvm] [GVN] Propagate constant equalities into expressions defined outside... (PR #211492)   via llvm-commits
• [llvm] 27ec80f - [Hexagon] Avoid spurious high vmem for contained sub-HVX stores (#204661)   via llvm-commits
• [llvm] [Hexagon] Avoid spurious high vmem for contained sub-HVX stores (PR #204661)   Artem Gindinson via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   James Henderson via llvm-commits
• [llvm] [AMDGPU] Fix llvm.amdgcn.ballot with return width != wavefront size (PR #211493)   Arseniy Obolenskiy via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Petar Avramovic via llvm-commits
• [llvm] [Hexagon] Avoid spurious high vmem for contained sub-HVX stores (PR #204661)   via llvm-commits
• [llvm] [AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (PR #207201)   Sander de Smalen via llvm-commits
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• [llvm] 5bf9d61 - [AArch64] Add SVE lowering for FP_TO_[US]INT_SAT. (#207201)   via llvm-commits
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• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Lower prefix slide-pair shuffle as vslidedown (PR #210927)   Liao Chunyu via llvm-commits
• [llvm] [AMDGPU] Fix llvm.amdgcn.ballot with return width != wavefront size (PR #211493)   Arseniy Obolenskiy via llvm-commits
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• [llvm] [RISCV] Lower prefix slide-pair shuffle as vslidedown (PR #210927)   Liao Chunyu via llvm-commits
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• [llvm] [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (PR #195402)   Paulius Velesko via llvm-commits
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• [llvm] [RISCV] Lower prefix slide-pair shuffle as vslidedown (PR #210927)   Liao Chunyu via llvm-commits
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• [llvm] [EarlyIfConversion] Extend data dependent analysis across multiple blocks (PR #180623)   Nathan Corbyn via llvm-commits
• [llvm] [EarlyIfConversion] Extend data dependent analysis across multiple blocks (PR #180623)   Nathan Corbyn via llvm-commits
• [llvm] [EarlyIfConversion] Extend data dependent analysis across multiple blocks (PR #180623)   Nathan Corbyn via llvm-commits
• [llvm] [EarlyIfConversion] Extend data dependent analysis across multiple blocks (PR #180623)   Nathan Corbyn via llvm-commits
• [llvm] [EarlyIfConversion] Extend data dependent analysis across multiple blocks (PR #180623)   Nathan Corbyn via llvm-commits
• [llvm] [RISCV] Lower prefix slidedown shuffles using VL + tail-undisturbed (PR #210927)   Liao Chunyu via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Yonah Goldberg via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [llvm] [IR] Reject inlining strictfp alwaysinline callee into non-strictfp caller (PR #210701)   Wenju He via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [llvm] [VPlan] Expand sequential/regular UMin SCEVs in VPSCEVExpander. (PR #209786)   Florian Hahn via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Yonah Goldberg via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [llvm] [MachineScheduler] Put -dag-maps-huge-region back to 1000 (PR #205616)   Nathan Corbyn via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to spacemit-x60 (PR #211502)   Pengcheng Wang via llvm-commits
• [llvm] [LICM] Allow hoisting of InsertElementInst's past non-hoistable InsertElementInsts (PR #211414)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to spacemit-x60 (PR #211502)   via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   David Sherwood via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Luke Lau via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold fp_to_int(fmul) for FPR results (PR #210987)   Kieran B via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Ralf Jung via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Matthew Devereau via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Matthew Devereau via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Yonah Goldberg via llvm-commits
• [llvm] [AMDGPU] Use global_prefetch_b8 for GFX1250 unclaused VMEM workaround (PR #210874)   Jay Foad via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Matthew Devereau via llvm-commits
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• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
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• [llvm] [AArch64][SelectionDAG] Fold fp_to_int(fmul) for FPR results (PR #210987)   via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Florian Hahn via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Antonio Frighetto via llvm-commits
• [llvm] 58cebee - [RISCV][P-ext] Support Packed "Q-format" Multiplication (#211236)   via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   Florian Hahn via llvm-commits
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• [llvm] [Mips] Legalize vector UNDEF instead of expanding to zero BUILD_VECTOR (PR #211503)   via llvm-commits
• [llvm] [AMDGPU] Fix llvm.amdgcn.ballot with return width != wavefront size (PR #211493)   Jay Foad via llvm-commits
• [llvm] [Mips] Legalize vector UNDEF instead of expanding to zero BUILD_VECTOR (PR #211503)   via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed "Q-format" Multiplication (PR #211236)   via llvm-commits
• [llvm] [Mips] Legalize vector UNDEF instead of expanding to zero BUILD_VECTOR (PR #211503)   via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move widening decisions to VPlanWideningDecisions.cpp (NFC) (PR #209887)   David Sherwood via llvm-commits
• [llvm] [GlobalISel] avoid G_TRUNC with floating-point G_MERGE_VALUES source (PR #206733)   Kacper Doga via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [MergeFuncs] Account for elementwise loads and atomicrmw in FunctionComparator (PR #211478)   Harrison Hao via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [MergeFuncs] Account for elementwise loads in FunctionComparator (PR #211478)   Harrison Hao via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   David Green via llvm-commits
• [llvm] [IR] Reject inlining strictfp alwaysinline callee into non-strictfp caller (PR #210701)   LLVM Continuous Integration via llvm-commits
• [llvm] [MergeFuncs] Account for elementwise loads and atomicrmw in FunctionComparator (PR #211478)   Yonah Goldberg via llvm-commits
• [llvm] [PassBuilder] Add extra ModuleInliner/SROA/SimplifyCFG/LICM to late FullLTO passes (PR #197678)   Momchil Velikov via llvm-commits
• [llvm] [VPlan] Use control flow to implement MaskedCond and preserve SSA (PR #201784)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use CFG to mask early exit loops with side-effects. NFC (PR #203263)   Luke Lau via llvm-commits
• [llvm] [AArch64][SelectionDAG] Fold fp_to_int(fmul) for FPR results (PR #210987)   Kieran B via llvm-commits
• [llvm] [MergeFuncs] Account for elementwise loads and atomicrmw in FunctionComparator (PR #211478)   Harrison Hao via llvm-commits
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• [llvm] [AArch64][CodeGen] Fold fp_to_int(fmul) for FPR results (PR #210987)   Kieran B via llvm-commits
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• [llvm] [CostModel][X86] Add PCLMUL cost table (PR #211113)   Simon Pilgrim via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [CostModel][X86] Add PCLMUL cost table (PR #211113)   Simon Pilgrim via llvm-commits
• [llvm] [CostModel][X86] Add PCLMUL cost table (PR #211113)   Simon Pilgrim via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand bounded memcpy/memmove as masked lo… (PR #211216)   via llvm-commits
• [llvm] [AMDGPU] Fix llvm.amdgcn.ballot with return width != wavefront size (PR #211493)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Fix llvm.amdgcn.ballot with return width != wavefront size (PR #211493)   Arseniy Obolenskiy via llvm-commits
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• [llvm] [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (PR #195402)   Paulius Velesko via llvm-commits
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• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   David Green via llvm-commits
• [llvm] [CodeGen][ARM] Keep undef REG_SEQUENCE operands live for full-register uses without LIS (PR #203178)   via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   Luke Lau via llvm-commits
• [llvm] [AArch64] Fix volatile flags in mops tests (PR #211511)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AArch64] Fix volatile flags in mops tests (NFC) (PR #211511)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AArch64] Fix volatile flags in mops tests (NFC) (PR #211511)   via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   Simon Pilgrim via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AArch64] Fix volatile flags in mops tests (NFC) (PR #211511)   Cullen Rhodes via llvm-commits
• [llvm] [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (PR #195402)   Paulius Velesko via llvm-commits
• [llvm] [AArch64] Fix volatile flags in mops tests (NFC) (PR #211511)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AArch64] Fix volatile flags in mops tests (NFC) (PR #211511)   Ömer Sinan Ağacan via llvm-commits
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• [llvm] [AArch64] Fix volatile flags in mops tests (NFC) (PR #211511)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [AA] Make getSyncEffects sync-scope aware for pointer arguments (PR #211486)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   Florian Hahn via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   Florian Hahn via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   Florian Hahn via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   David Green via llvm-commits
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• [llvm] [libsycl][Unit] Tighten mock liboffload API argument checks (PR #211035)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   Madhur Amilkanthwar via llvm-commits
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• [llvm] [libsycl][Unit] Tighten mock liboffload API argument checks (PR #211035)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl][Unit] Tighten mock liboffload API argument checks (PR #211035)   Kseniya Tikhomirova via llvm-commits
• [llvm] [AArch64] Use LD1/ST1 in strict-align mode (PR #211513)   Oliver Stannard via llvm-commits
• [llvm] [AArch64] Use LD1/ST1 in strict-align mode (PR #211513)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
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• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
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• [llvm] [docs][tools][DirectX] Document DXContainer debug info parts (PR #204021)   Vladislav Dzhidzhoev via llvm-commits
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• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   David Sherwood via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   David Green via llvm-commits
• [llvm] [VectorCombine] foldShuffleToIdentity - ensure we push any created instructions to the WorkList (PR #211508)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to spacemit-x60 (PR #211502)   Mark Zhuang via llvm-commits
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• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   David Green via llvm-commits
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• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Orlando Cazalet-Hyams via llvm-commits
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• [llvm] [CostModel][X86] Add PCLMUL cost table (PR #211113)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   Luke Lau via llvm-commits
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• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to spacemit-x60 (PR #211502)   Luke Lau via llvm-commits
• [clang] [llvm] [clang][NFC] fold ExpressionTraits and TypeTraits helpers into BuiltinTraits.h (PR #210838)   Matthias Wippich via llvm-commits
• [llvm] [AA] Make getSyncEffects sync-scope aware for pointer arguments (PR #211486)   via llvm-commits
• [llvm] Fix unresolved symbol XCoreMCRegisterClassStorage (PR #211420)   Giles Payne via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   via llvm-commits
• [llvm] 280099e - [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (#208807)   via llvm-commits
• [llvm] [VPlan] Widen reverse unit-stride accesses in makeMemOpWideningDesc (NFCI) (PR #208807)   Florian Hahn via llvm-commits
• [llvm] c66c625 - [RISCV] Add TuneNoDefaultUnroll to spacemit-x60 (#211502)   via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to spacemit-x60 (PR #211502)   Pengcheng Wang via llvm-commits
• [llvm] [VectorCombine] foldShuffleToIdentity - ensure we push any created instructions to the WorkList (PR #211508)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Add a ctpop cost with CSSC (PR #211189)   Hari Limaye via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   David Green via llvm-commits
• [llvm] [AArch64] Add SME clustering (PR #211483)   David Green via llvm-commits
• [llvm] [VPlan][UTC] Add `-vplan-print-instance` filter option (PR #211424)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [VectorCombine] foldShuffleToIdentity - ensure we push any created instructions to the WorkList (PR #211508)   Nikita Popov via llvm-commits
• [polly] [Polly] Fix memory leak in DependenceAnalysis::Result::abandonDepende… (PR #211514)   Karthika Devi C via llvm-commits
• [polly] [Polly] Fix memory leak in DependenceAnalysis::Result::abandonDepende… (PR #211514)   Karthika Devi C via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Properly report strided access preventing store-to-load forwarding (PR #208791)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Properly report strided access preventing store-to-load forwarding (PR #208791)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LAA] Properly report strided access preventing store-to-load forwarding (PR #208791)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   via llvm-commits
• [llvm] [AllocToken] Merge !alloc_token metadata across optimization passes (PR #211516)   Marco Elver via llvm-commits
• [compiler-rt] [compiler-rt] FreeBSD kernel headers in baremetal libprofile (PR #211278)   Dimitry Andric via llvm-commits
• [llvm] [VectorCombine] foldShuffleToIdentity - ensure we push any created instructions to the WorkList (PR #211508)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleToIdentity - ensure we push any created instructions to the WorkList (PR #211508)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][InstCombine] Add infrastructure to allow simplification of SVE compare intrinsics. (PR #211249)   Matthew Devereau via llvm-commits
• [llvm] [LLVM][InstCombine] Add infrastructure to allow simplification of SVE compare intrinsics. (PR #211249)   Matthew Devereau via llvm-commits
• [llvm] [LLVM][InstCombine] Add infrastructure to allow simplification of SVE compare intrinsics. (PR #211249)   Matthew Devereau via llvm-commits
• [llvm] [LLVM][InstCombine] Add infrastructure to allow simplification of SVE compare intrinsics. (PR #211249)   Matthew Devereau via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [OFFLOAD][L0] Restore function pointer lookup. (PR #211520)   Alex Duran via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [OFFLOAD][L0] Restore function pointer lookup. (PR #211520)   via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [AArch64][SelectionDAG] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Henry Linjamäki via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] [AArch64][CodeGen] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   Alex Duran via llvm-commits
• [llvm] [VectorCombine] Check load offsets in APInt before narrowing shuffle indices (PR #210904)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][InstCombine] Add infrastructure to allow simplification of SVE compare intrinsics. (PR #211249)   Paul Walker via llvm-commits
• [llvm] cc1dd6b - [LoopUnroll] Make the list of supported recurrence kinds inclusive. (#210957)   via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   David Green via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] a6be842 - [InstCombine] Fix typo in assert message for Fp state (#211244)   via llvm-commits
• [llvm] [InstCombine] Fix typo in assert message for Fp state (PR #211244)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fix typo in assert message for Fp state (PR #211244)   via llvm-commits
• [llvm] 1c825be - [VectorCombine] Check load offsets in APInt before narrowing shuffle indices (#210904)   via llvm-commits
• [llvm] [VectorCombine] Check load offsets in APInt before narrowing shuffle indices (PR #210904)   via llvm-commits
• [clang] [llvm] PowerPC: Rename "float-abi" module flag to "long-double-type" (PR #210817)   QIU Chaofan via llvm-commits
• [compiler-rt] [sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (PR #211468)   via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [AArch64][CodeGen] Avoid cross-bank copy for NEON vcvtfp2fx result (PR #210275)   Kieran B via llvm-commits
• [compiler-rt] [sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (PR #211468)   via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   Alex Duran via llvm-commits
• [llvm] [AArch64] Fix volatile flags in mops tests (NFC) (PR #211511)   via llvm-commits
• [llvm] [OFFLOAD][L0] Restore function pointer lookup. (PR #211520)   Łukasz Plewa via llvm-commits
• [llvm] [OFFLOAD][L0] Restore function pointer lookup. (PR #211520)   Łukasz Plewa via llvm-commits
• [llvm] [X86] Remove TuningFastSHLDRotate from X86_64V3Tuning and X86_64V4Tuning (PR #211217)   Simon Pilgrim via llvm-commits
• [llvm] [RISC-V] Use an optional offset operand instead of zero-offset InstAliases (PR #210901)   Alexander Richardson via llvm-commits
• [llvm] [LLVM][InstCombine] Add infrastructure to allow simplification of SVE compare intrinsics. (PR #211249)   Matthew Devereau via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Fix volatile flags in mops tests (NFC) (PR #211511)   Ömer Sinan Ağacan via llvm-commits
• [llvm] Add !metadata_section_kind global variable metadata (PR #211524)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] Add !metadata_section_kind global variable metadata (PR #211524)   via llvm-commits
• [llvm] Add !metadata_section_kind global variable metadata (PR #211524)   via llvm-commits
• [llvm] [AArch64][ISel] Recover ADDHN from OR comparison masks (PR #210943)   Hari Limaye via llvm-commits
• [llvm] [AArch64][ISel] Recover ADDHN from OR comparison masks (PR #210943)   Hari Limaye via llvm-commits
• [llvm] [AArch64][ISel] Recover ADDHN from OR comparison masks (PR #210943)   Hari Limaye via llvm-commits
• [llvm] [AArch64][ISel] Recover ADDHN from OR comparison masks (PR #210943)   Hari Limaye via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   David Green via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand bounded memcpy/memmove as masked lo… (PR #211216)   via llvm-commits
• [compiler-rt] [llvm] [tsan] add fetch_max, fetch_min, fetch_umax, fetch_umin (PR #211388)   Mauri de Souza Meneguzzo via llvm-commits
• [llvm] [Offload] Add olElfIsCompatibleWithDevice (PR #211378)   Alex Duran via llvm-commits
• [llvm] [Offload] Add numLanes device info to liboffload (PR #211380)   Alex Duran via llvm-commits
• [llvm] [LoopUnroll] Make the list of supported recurrence kinds inclusive. (PR #210957)   via llvm-commits
• [clang] [llvm] [dyndbg][Clang] Implement nested-ELF dynamic debugging support (PR #194860)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [OFFLOAD][L0] Restore function pointer lookup. (PR #211520)   Alex Duran via llvm-commits
• [llvm] [dyndbg] Create .debug_llvm_dyndbg section without any section flags (PR #194855)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [dyndbg] Create .debug_llvm_dyndbg section without any section flags (PR #194855)   Orlando Cazalet-Hyams via llvm-commits
• [libcxx] [libunwind] [llvm] [libc++] Update macOS and AppleClang (PR #193711)   Nikolas Klauser via llvm-commits
• [llvm] [PowerPC][SDAG] fix bitcast on ppc_f128 swapping the two halves (PR #208969)   Folkert de Vries via llvm-commits
• [clang] [llvm] [dyndbg][Clang] Implement nested-ELF dynamic debugging support (PR #194860)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [llvm-exegesis] Add RawPerfEvent raw PMU counter path in createCounter (PR #208364)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [clang][coverage] Add opt-in call continuation counters for coverage (PR #201079)   Ankur raj via llvm-commits
• [clang] [llvm] [clang][coverage] Add opt-in call continuation counters for coverage (PR #201079)   Ankur raj via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   Abid Qadeer via llvm-commits
• [llvm] [OFFLOAD][L0] Add NUM_LANES info (PR #211526)   Alex Duran via llvm-commits
• [llvm] ad1b243 - [VectorCombine] foldShuffleToIdentity - ensure we push any created instructions to the WorkList (#211508)   via llvm-commits
• [llvm] [VectorCombine] foldShuffleToIdentity - ensure we push any created instructions to the WorkList (PR #211508)   Simon Pilgrim via llvm-commits
• [llvm] [OFFLOAD][L0] Add NUM_LANES info (PR #211526)   via llvm-commits
• [llvm] [OFFLOAD][L0] Add NUM_LANES info (PR #211526)   Łukasz Plewa via llvm-commits
• [clang] [llvm] [dyndbg][Clang] Implement nested-ELF dynamic debugging support (PR #194860)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Luke Lau via llvm-commits
• [llvm] [OFFLOAD][L0] Restore function pointer lookup. (PR #211520)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD][L0] Restore function pointer lookup. (PR #211520)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD][L0] Add NUM_LANES info (PR #211526)   Alex Duran via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   Simon Pilgrim via llvm-commits
• [llvm] [OFFLOAD][L0] Restore function pointer lookup. (PR #211520)   Łukasz Plewa via llvm-commits
• [llvm] [AArch64] Remove assembler-only register classes (PR #211527)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Remove assembler-only register classes (PR #211527)   via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   Simon Pilgrim via llvm-commits
• [clang] [llvm] clang/AMDGPU: Fix handling of subarch triples with no -mcpu (PR #211467)   Joseph Huber via llvm-commits
• [llvm] [VectorCombine] foldShuffleToIdentity - ensure we push any created instructions to the WorkList (PR #211508)   LLVM Continuous Integration via llvm-commits
• [llvm] fd67f99 - clang/AMDGPU: Fix handling of subarch triples with no -mcpu (#211467)   via llvm-commits
• [clang] [llvm] clang/AMDGPU: Fix handling of subarch triples with no -mcpu (PR #211467)   Matt Arsenault via llvm-commits
• [llvm] [offload] Split olMemAlloc to separate functions (PR #209196)   Łukasz Plewa via llvm-commits
• [llvm] [TableGen] Add register-info statistics (PR #211528)   Cullen Rhodes via llvm-commits
• [llvm] [TableGen] Add register-info statistics (PR #211528)   via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   Ashutosh Nema via llvm-commits
• [llvm] [SelectionDAG] Improve shifted range checks with add offsets (PR #207955)   Simon Pilgrim via llvm-commits
• [llvm] 5f31853 - [AArch64] Fix volatile flags in mops tests (NFC) (#211511)   via llvm-commits
• [llvm] [AArch64] Fix volatile flags in mops tests (NFC) (PR #211511)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   Rito Takeuchi via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [offload] add parameterized unit tests (PR #209115)   Jan Trusiłło via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   via llvm-commits
• [llvm] [X86][CostModel] Add vXi64 divide/remainder-by-constant costs (PR #208491)   Rito Takeuchi via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   via llvm-commits
• [clang] [llvm] [Clang][AIX] Add -mloadtime-comment-vars flag to preserve identifying variables (PR #187986)   Aaron Ballman via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   via llvm-commits
• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86][PartialReduction] Lower zext-byte add reductions to vpsadbw (PR #201076)   via llvm-commits
• [llvm] [TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (PR #206274)   Simon Pilgrim via llvm-commits
• [llvm] [TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (PR #206274)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (PR #206274)   Simon Pilgrim via llvm-commits
• [llvm] [IndVarSimplify] Add experimental pointer IV elimination (PR #209413)   via llvm-commits
• [llvm] 144595f - [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (#209351)   via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   Simon Pilgrim via llvm-commits
• [llvm] [IndVarSimplify] Add experimental pointer IV elimination (PR #209413)   via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   via llvm-commits
• [llvm] [IndVarSimplify] Add experimental pointer IV elimination (PR #209413)   via llvm-commits
• [llvm] [IndVarSimplify] Add support to simplify pointer IV to integer IV (PR #209413)   via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Antonio Frighetto via llvm-commits
• [llvm] [IndVarSimplify] Add support to simplify pointer IV to integer IV (PR #209413)   via llvm-commits
• [compiler-rt] [llvm] [tsan] add fetch_max, fetch_min, fetch_umax, fetch_umin (PR #211388)   Mauri de Souza Meneguzzo via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   Alexey Bataev via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [InstSimplify] Guard and/or implied-cond folds against poison (PR #211534)   Akshat Dalal via llvm-commits
• [llvm] 8fb7dfe - [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (#211198)   via llvm-commits
• [llvm] [SPIR-V] Cache PartialOrderingVisitor in Splitter instead of rebuilding per call (PR #211198)   Arseniy Obolenskiy via llvm-commits
• [llvm] [InstSimplify] Guard and/or implied-cond folds against poison (PR #211534)   via llvm-commits
• [polly] [Polly] Fix memory leak in DependenceAnalysis::Result::abandonDepende… (PR #211514)   Michael Kruse via llvm-commits
• [llvm] [X86] Narrow vXi32/vXi64 usubsat to vpsubusb/vpsubusw when LHS is known to fit in fewer bits (PR #206592)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Narrow vXi32/vXi64 usubsat to vpsubusb/vpsubusw when LHS is known to fit in fewer bits (PR #206592)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Narrow vXi32/vXi64 usubsat to vpsubusb/vpsubusw when LHS is known to fit in fewer bits (PR #206592)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Narrow vXi32/vXi64 usubsat to vpsubusb/vpsubusw when LHS is known to fit in fewer bits (PR #206592)   Simon Pilgrim via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Lukas Sommer via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Simon Pilgrim via llvm-commits
• [polly] a65df8a - [Polly] Fix memory leak in DependenceAnalysis::Result::abandonDepende… (#211514)   via llvm-commits
• [polly] [Polly] Fix memory leak in DependenceAnalysis::Result::abandonDepende… (PR #211514)   Karthika Devi C via llvm-commits
• [llvm] [X86] Remove TuningFastSHLDRotate from X86_64V3Tuning and X86_64V4Tuning (PR #211217)   Phoebe Wang via llvm-commits
• [llvm] [offload] Add `dlwrap::loaded` function to check for optional symbols (PR #210737)   via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Florian Hahn via llvm-commits
• [llvm] eb992b7 - [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (#195402)   via llvm-commits
• [llvm] [SPIRV] Lower llvm.ldexp via OpenCL/GLSL ldexp ext-inst (PR #195402)   Dmitry Sidorov via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pankaj Gode via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   Spencer Bryngelson via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   Spencer Bryngelson via llvm-commits
• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Spencer Bryngelson via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pankaj Gode via llvm-commits
• [llvm] [Transforms][Utils] Add LoopSplitUtils for iteration-space loop splitting (PR #205995)   via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [AArch64] Avoid deinterleaved load of factor 4 when feeding to uitofp. (PR #210894)   David Green via llvm-commits
• [llvm] [AArch64] Avoid deinterleaved load of factor 4 when feeding to uitofp. (PR #210894)   David Green via llvm-commits
• [llvm] [AArch64] Avoid deinterleaved load of factor 4 when feeding to uitofp. (PR #210894)   David Green via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Paul Walker via llvm-commits
• [llvm] [libsycl][Unit] Tighten mock liboffload API argument checks (PR #211035)   Sergey Semenov via llvm-commits
• [llvm] [libsycl][Unit] Tighten mock liboffload API argument checks (PR #211035)   Sergey Semenov via llvm-commits
• [llvm] [libsycl][Unit] Tighten mock liboffload API argument checks (PR #211035)   Sergey Semenov via llvm-commits
• [clang] [llvm] [LoongArch] Support i128 operands for LSX inline assembly (PR #211464)   via llvm-commits
• [llvm] [SPIR-V] Avoid rescanning use lists to check for Block decoration (PR #211320)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] d4427f7 - [llubi][NFC] Use context-aware value printer (#211275)   via llvm-commits
• [llvm] [llubi][NFC] Use context-aware value printer (PR #211275)   Yingwei Zheng via llvm-commits
• [llvm] [libsycl][Unit] Tighten mock liboffload API argument checks (PR #211035)   Sergey Semenov via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Ralf Jung via llvm-commits
• [llvm] [DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (PR #211536)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Durgadoss R via llvm-commits
• [llvm] [DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (PR #211536)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64] Add SME clustering (PR #211483)   Tomer Shafir via llvm-commits
• [llvm] [DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (PR #211536)   via llvm-commits
• [llvm] [DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (PR #211536)   via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pengcheng Wang via llvm-commits
• [llvm] [dyndbg] Add Dynamic Debugging docs (PR #210001)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [dyndbg] Add Dynamic Debugging docs (PR #210001)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [SimplifyCFG] Simplify switch default branch when branch proves operand value (PR #206597)   Sayan Sivakumaran via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   via llvm-commits
• [llvm] Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211427)   Sayan Sivakumaran via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeArray. (PR #211537)   Diego Novillo via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Durgadoss R via llvm-commits
• [llvm] [Offload] Add olCreateContext / olDestroyContext / olGetContextInfo API (PR #209144)   Łukasz Plewa via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Paul Walker via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Paul Walker via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Paul Walker via llvm-commits
• [llvm] [llvm-calc-occupancy] Add an AMDGPU occupancy calculator tool (PR #208727)   via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeArray. (PR #211537)   via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Durgadoss R via llvm-commits
• [llvm] [NFC][SPIR-V] Remove unused LoopInfo member from Structurizer Splitter (PR #211538)   Arseniy Obolenskiy via llvm-commits
• [llvm] e635f27 - [TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (#206274)   via llvm-commits
• [llvm] [TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (PR #206274)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Durgadoss R via llvm-commits
• [llvm] [X86] Remove TuningFastSHLDRotate from X86_64V3Tuning and X86_64V4Tuning (PR #211217)   Simon Pilgrim via llvm-commits
• [llvm] [DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (PR #211536)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [TLI] Add x86 libmvec mappings for GLIBC 2.35 vector functions (PR #206274)   via llvm-commits
• [llvm] [NFC][SPIR-V] Remove unused LoopInfo member from Structurizer Splitter (PR #211538)   via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Durgadoss R via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand bounded memcpy/memmove as masked lo… (PR #211216)   via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Simon Pilgrim via llvm-commits
• [llvm] [DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (PR #211536)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo][DwarfDebug] Move emission of types from beginModule() to endModule() (7/7) (PR #211536)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   David Green via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   David Green via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   David Green via llvm-commits
• [lld] [lld][MachO] Skip ObjC category merging without class metadata (PR #211431)   Karim Alweheshy via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Antonio Frighetto via llvm-commits
• [lld] [lld][MachO] Preserve class-address addends in ObjC category merging (PR #211431)   Karim Alweheshy via llvm-commits
• [flang] [llvm] [flang][OpenMP] Inline the firstprivate array copy instead of calling Assign() (PR #211543)   Spencer Bryngelson via llvm-commits
• [llvm] [NFC][SPIR-V] Reuse PartialOrderingVisitor DominatorTree in structurizer splitter (PR #211544)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   via llvm-commits
• [llvm] [Nomination] Update HighTec representatives of the Security Group (PR #206457)   Ahmed Bougacha via llvm-commits
• [llvm] 70b6743 - [AArch64] Add a ctpop cost with CSSC (#211189)   via llvm-commits
• [llvm] [AArch64] Add a ctpop cost with CSSC (PR #211189)   David Green via llvm-commits
• [llvm] [AMDGPU][TTI] Refine gfx9 packed FP32 SLP costs for pair formation and shuffles (PR #208572)   Akash Dutta via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   Krzysztof Parzyszek via llvm-commits
• [llvm] [SelectionDAG][AArch64][X86] Don't scalarize vector smul.fix.sat/umul.fix.sat (PR #209351)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Reuse NeoverseN1 and N2 scheduling models for A76/A77/A78. (PR #211209)   via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Mark SP-only register classes as non-allocatable (PR #211549)   Cullen Rhodes via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   via llvm-commits
• [llvm] [IR] Slightly optimize getElementAsInteger() (PR #211550)   Nikita Popov via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand bounded memcpy/memmove as masked lo… (PR #211216)   via llvm-commits
• [llvm] [NFC][SPIR-V] Remove unused LoopInfo member from structurizer splitter (PR #211538)   Arseniy Obolenskiy via llvm-commits
• [llvm] [IR] Slightly optimize getElementAsInteger() (PR #211550)   Alexis Engelke via llvm-commits
• [llvm] [NFC][AMDGPU] Use SIInstrFlags predicates in AMDGPUAsmParser (PR #210998)   Valery Pykhtin via llvm-commits
• [clang] [llvm] [LLVM][APFloat] Add APFloat support for 8-bit UE5M3 type (PR #210720)   Durgadoss R via llvm-commits
• [llvm] [IR] Slightly optimize getElementAsInteger() (PR #211550)   Nikita Popov via llvm-commits
• [llvm] [AArch64][SME2] Add stridedorcontiguous pseudos for multi-vector-stores (PR #211551)   Jacob Crawley via llvm-commits
• [flang] [llvm] [flang][OpenMP] Inline the firstprivate array copy instead of calling Assign() (PR #211543)   via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   David Green via llvm-commits
• [llvm] [NFC][SPIR-V] Reuse PartialOrderingVisitor DominatorTree in structurizer splitter (PR #211544)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (PR #211554)   Paul Walker via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Nikita Popov via llvm-commits
• [llvm] [IR] Slightly optimize getElementAsInteger() (PR #211550)   via llvm-commits
• [llvm] [AArch64] Mark SP-only register classes as non-allocatable (PR #211549)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (PR #211554)   via llvm-commits
• [llvm] [AArch64] Mark SP-only register classes as non-allocatable (PR #211549)   Benjamin Maxwell via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   via llvm-commits
• [llvm] [ValueTracking] Fix signed zero handling in minnum/maxnum matching (PR #210077)   Nikita Popov via llvm-commits
• [llvm] [SLP]Initial support for copyables in fmuladd intrinsic (PR #211245)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial support for copyables in fmuladd intrinsic (PR #211245)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial support for copyables in fmuladd intrinsic (PR #211245)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial support for copyables in fmuladd intrinsic (PR #211245)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial support for copyables in fmuladd intrinsic (PR #211245)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial support for copyables in fmuladd intrinsic (PR #211245)   Simon Pilgrim via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Nathan Corbyn via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   Spencer Bryngelson via llvm-commits
• [llvm] [AArch64][SVE] Prefer SVE over scalarization for masked load/store of bf16 vectors (PR #210986)   Paul Walker via llvm-commits
• [llvm] [Hexagon] Refresh stack aligna after late HVX spill (PR #204660)   via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] RegisterCoalescer: keep partial redefs valid when eliminating undef copies (PR #202599)   Aochang Liu via llvm-commits
• [llvm] [CodeGen] RegisterCoalescer: keep partial redefs valid when eliminating undef copies (PR #202599)   Aochang Liu via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   Ralf Jung via llvm-commits
• [clang] [llvm] [SystemZ] Do not extend integer arguments in z/OS XPLINK64 ABI (PR #206833)   Ulrich Weigand via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   Simon Pilgrim via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   Simon Pilgrim via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   Simon Pilgrim via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Mark SP-only register classes as non-allocatable (PR #211549)   Cullen Rhodes via llvm-commits
• [llvm] 6245690 - [PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (#204170)   via llvm-commits
• [llvm] [PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (PR #204170)   zhijian lin via llvm-commits
• [llvm] [GVN] Reorganise GVN.h/GVH.cpp to improve readability and maintainability (NFC) (PR #210334)   Nikita Popov via llvm-commits
• [llvm] b142e77 - [AMDGPU][GlobalISel] Don't combine uniform fmin/max into clamp/fmed3 (#211456)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Don't combine uniform fmin/max into clamp/fmed3 (PR #211456)   Syadus Sefat via llvm-commits
• [llvm] [DWARFLinker] Fix placement lost-update crash in parallel marking (PR #211009)   Jonas Devlieghere via llvm-commits
• [compiler-rt] Reland "[compiler-rt] [sanitizer_common] Fix SIGSEGV in ForEachMappedRegion for DSOs with custom image base" (PR #209576)   LLVM Continuous Integration via llvm-commits
• [llvm] [PowerPC] improve performance on the isNan and !isNan function in case of -ffp-model=strict (PR #204170)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Fix stale LiveIntervals regmask tables after MachineBasicBl… (PR #209610)   Nathan Corbyn via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [lld] [lld][MachO] Preserve class-address addends in ObjC category merging (PR #211431)   Karim Alweheshy via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   Spencer Bryngelson via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   Spencer Bryngelson via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   via llvm-commits
• [llvm] [AArch64] Accept __chkstk_darwin stack probes on Darwin (PR #210812)   Karim Alweheshy via llvm-commits
• [llvm] [Coroutines] Support typed retcon allocators (PR #211099)   Karim Alweheshy via llvm-commits
• [llvm] [LLVM] Auto-upgrade legacy coro.end results (PR #211081)   Karim Alweheshy via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Karim Alweheshy via llvm-commits
• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Michael Kruse via llvm-commits
• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Michael Kruse via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (PR #211554)   David Sherwood via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (PR #211554)   David Sherwood via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (PR #211554)   David Sherwood via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Fix SIPreAllocateWWMRegs to reserve AV-class WWM defs (PR #211560)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SLP]Combine fma and fmuladd into a single vector fma node (PR #211291)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Zach Goldthorpe via llvm-commits
• [llvm] [LV] Vectorize uncountable early exit store loops with combined conditions (PR #205109)   Florian Hahn via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Karim Alweheshy via llvm-commits
• [llvm] [SPIR-V] Fix SPIRVTools download step failing on rerun (PR #211561)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Karim Alweheshy via llvm-commits
• [llvm] [AA] Make getSyncEffects sync-scope aware for pointer arguments (PR #211486)   via llvm-commits
• [llvm] [llvm][AArch64] Eliminate redundant mov's sandwiching aut's in tail calls (PR #211105)   Nathan Corbyn via llvm-commits
• [llvm] [llvm][AArch64] Eliminate redundant mov's sandwiching aut's in tail calls (PR #211105)   Nathan Corbyn via llvm-commits
• [llvm] [llvm][AArch64] Eliminate redundant mov's sandwiching aut's in tail calls (PR #211105)   Nathan Corbyn via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (PR #211554)   Paul Walker via llvm-commits
• [llvm] ea99db7 - [SLP]Combine fma and fmuladd into a single vector fma node   via llvm-commits
• [llvm] [SLP]Combine fma and fmuladd into a single vector fma node (PR #211291)   Alexey Bataev via llvm-commits
• [llvm] [AA] Make getSyncEffects sync-scope aware for pointer arguments (PR #211486)   via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   Yingwei Zheng via llvm-commits
• [llvm] [X86] Select i8 ANDN via i32 promotion (PR #205050)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   Akshay K via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   Akshay K via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   Aiden Grossman via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   Aiden Grossman via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   Aiden Grossman via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Sean Clarke via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Matthew Devereau via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Matthew Devereau via llvm-commits
• [llvm] [Inliner] Don't apply the cold-callsite threshold in non-callable functions (PR #211255)   Spencer Bryngelson via llvm-commits
• [llvm] [OpenMP] Analyze the loop-body callback of the static-loop runtime entries (PR #211287)   Spencer Bryngelson via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Sean Clarke via llvm-commits
• [llvm] adding entries in getArbitraryFPFormatSizeInBits lookup (PR #211562)   Chirag Patel via llvm-commits
• [llvm] [SystemZ][z/OS] Implement emitCommonSymbol in MCGOFFStreamer (PR #210179)   Ulrich Weigand via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   via llvm-commits
• [llvm] [VPlan] Use DerivedIV in convertToStridedAccesses (PR #209611)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use DerivedIV in convertToStridedAccesses (PR #209611)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use DerivedIV in convertToStridedAccesses (PR #209611)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use DerivedIV in convertToStridedAccesses (PR #209611)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use DerivedIV in convertToStridedAccesses (PR #209611)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use DerivedIV in convertToStridedAccesses (PR #209611)   Mel Chen via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyMCLowerPrePass (PR #210440)   Aiden Grossman via llvm-commits
• [llvm] c281136 - [WebAssembly] Port WebAssemblyMCLowerPrePass   via llvm-commits
• [llvm] [WebAssembly] Port WebAssemblyMCLowerPrePass (PR #210440)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Fix v32f16 FMINIMUMNUM/FMAXIMUMNUM lowering in non-IEEE mode (PR #207896)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SLP] Account for fma fusion when vectorizing an ordered fadd reduction (PR #210399)   Dmitry Sidorov via llvm-commits
• [llvm] [GlobalISel] Legalize wide-memory extending loads via load + extension (PR #206276)   Ilpo Ruotsalainen via llvm-commits
• [llvm] [WebAssembly] Port AsmPrinter (PR #210448)   Aiden Grossman via llvm-commits
• [llvm] Fold (select_cc (select cond, x, y), x, a, b, eq) to (select cond, a, b) (PR #199688)   via llvm-commits
• [llvm] b9f17dd - [WebAssembly] Port AsmPrinter   via llvm-commits
• [llvm] [WebAssembly] Port AsmPrinter (PR #210448)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [libc++] Pin down the compiler in the various benchmark scripts and jobs (PR #211563)   Louis Dionne via llvm-commits
• [llvm] adding entries in getArbitraryFPFormatSizeInBits lookup (PR #211562)   via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Karim Alweheshy via llvm-commits
• [llvm] [AMDGPU] Add image_atomic_{min,max}_num_flt support to gfx13 (PR #211564)   Mariusz Sikora via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Aiden Grossman via llvm-commits
• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Michael Kruse via llvm-commits
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• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   Ralf Jung via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Paul Walker via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Sean Clarke via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   via llvm-commits
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• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Paul Walker via llvm-commits
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• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Spencer Bryngelson via llvm-commits
• [llvm] [AMDGPU] Add image_atomic_{min,max}_num_flt support to gfx13 (PR #211564)   via llvm-commits
• [llvm] [CodeGen] RegisterCoalescer: keep partial redefs valid when eliminating undef copies (PR #202599)   Matt Arsenault via llvm-commits
• [flang] [llvm] [flang][OpenMP] Inline the firstprivate array copy instead of calling Assign() (PR #211543)   Sairudra More via llvm-commits
• [llvm] [DAGCombine] Push freeze through sra (PR #208749)   Nikita Popov via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   Rito Takeuchi via llvm-commits
• [flang] [llvm] [flang][OpenMP] Inline the firstprivate array copy instead of calling Assign() (PR #211543)   Sairudra More via llvm-commits
• [flang] [llvm] [flang][OpenMP] Inline the firstprivate array copy instead of calling Assign() (PR #211543)   Sairudra More via llvm-commits
• [llvm] [CodeGen] Add MachineRegisterClassInfo analysis pass (PR #210826)   Matt Arsenault via llvm-commits
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• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   Rito Takeuchi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Don't combine uniform fmin/max into clamp/fmed3 (PR #211456)   Matt Arsenault via llvm-commits
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• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Spencer Bryngelson via llvm-commits
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• [llvm] [AMDGPU] Fix v32f16 FMINIMUMNUM/FMAXIMUMNUM lowering in non-IEEE mode (PR #207896)   Matt Arsenault via llvm-commits
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• [llvm] [AMDGPU] Fix SIPreAllocateWWMRegs to reserve AV-class WWM defs (PR #211560)   Matt Arsenault via llvm-commits
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• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   David Sherwood via llvm-commits
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• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   David Sherwood via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   David Sherwood via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   David Sherwood via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   David Sherwood via llvm-commits
• [llvm] [LV] Fold middle-block branch in post-dissolution removeBranchOnConst. (PR #204243)   David Sherwood via llvm-commits
• [llvm] [mlir] Reland [OMPIRBuilder] Don't use invalid debug loc in reduction fn. (PR #211566)   Abid Qadeer via llvm-commits
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• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   Simon Pilgrim via llvm-commits
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• [llvm] [AArch64][ISel] Prefer SVE over NEON for fixed-width ASL LSR (PR #199003)   Harry Ramsey via llvm-commits
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• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Aiden Grossman via llvm-commits
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• [clang] [llvm] clang/AMDGPU: Fix handling of subarch triples with no -mcpu (PR #211467)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] RegisterCoalescer: keep partial redefs valid when eliminating undef copies (PR #202599)   Aochang Liu via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Only combine fmin/max into clamp/fmed3 for vgpr-banked dst (PR #211456)   Syadus Sefat via llvm-commits
• [llvm] [TableGen] Add register-info statistics (PR #211528)   Matt Arsenault via llvm-commits
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• [llvm] [CodeGen][ARM] Add regression tests for #202263 (PR #202599)   Aochang Liu via llvm-commits
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• [llvm] [AArch64][ISel] Prefer SVE over NEON for fixed-width ASL LSR (PR #199003)   Harry Ramsey via llvm-commits
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• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Yingwei Zheng via llvm-commits
• [llvm] adding entries in getArbitraryFPFormatSizeInBits lookup (PR #211562)   Chirag Patel via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Only combine fmin/max into clamp/fmed3 for vgpr-banked dst (PR #211456)   Syadus Sefat via llvm-commits
• [llvm] [NFC][AMDGPU] Use SIInstrFlags predicates in AMDGPUAsmParser (PR #210998)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Only combine fmin/max into clamp/fmed3 for vgpr-banked dst (PR #211456)   Syadus Sefat via llvm-commits
• [llvm] [CodeGen][ARM] Add regression tests for #202263 (PR #202599)   Aochang Liu via llvm-commits
• [llvm] bb22aa8 - [IR] Slightly optimize getElementAsInteger() (#211550)   via llvm-commits
• [llvm] [IR] Slightly optimize getElementAsInteger() (PR #211550)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Add image_atomic_{min,max}_num_flt support to gfx13 (PR #211564)   Shilei Tian via llvm-commits
• [llvm] [AArch64] Add SME clustering (PR #211483)   Tomer Shafir via llvm-commits
• [llvm] [DAGCombine] Push freeze through sra (PR #208749)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Add SME clustering (PR #211483)   Tomer Shafir via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Add performance-expensive-value-or check (PR #200166)   Zeyi Xu via llvm-commits
• [llvm] [AArch64] Add SME compute clustering (PR #211483)   Tomer Shafir via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Florian Hahn via llvm-commits
• [llvm] [flang-rt] - Reduce ShallowCopy template instantiations to improve LTO time (PR #209915)   Michael Kruse via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Guo Chen via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
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• [llvm] [OpenMPOpt] Null generic-mode wrappers for SPMDized kernels (PR #207611)   Shilei Tian via llvm-commits
• [llvm] [OpenMPOpt] Null generic-mode wrappers for SPMDized kernels (PR #207611)   Shilei Tian via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   Rito Takeuchi via llvm-commits
• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Spencer Bryngelson via llvm-commits
• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Spencer Bryngelson via llvm-commits
• [llvm] PPC750cl, and initial support for paired singles (PR #211463)   Cynthia Coan via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   Rito Takeuchi via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   via llvm-commits
• [llvm] [AArch64] Mark SP-only register classes as non-allocatable (PR #211549)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU] Re-fold masked hi16 pack into v_or_b32_sdwa (PR #210735)   Barbara Mitic via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   Sean Clarke via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [SCEV] Prove max(X0..Xn) Pred RHS via per-operand decomposition. (PR #208546)   Nikita Popov via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Emil Pedersen via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Matthew Devereau via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   Tom Eccles via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   Tom Eccles via llvm-commits
• [llvm] [Hexagon] Lower fcmp oeq to vcmp_(s|h)f_eq. (PR #211570)   Fateme Hosseini via llvm-commits
• [llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)   via llvm-commits
• [llvm] [ConstantFolding]Fold llvm.powi via square-and-multiply (PR #210771)   Yingwei Zheng via llvm-commits
• [llvm] [mlir] Reland [OMPIRBuilder] Don't use invalid debug loc in reduction fn. (PR #211566)   Spencer Bryngelson via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   Spencer Bryngelson via llvm-commits
• [flang] [llvm] [OpenMPIRBuilder] Clear the debug location when emitting reduction helpers (PR #211395)   Spencer Bryngelson via llvm-commits
• [llvm] [SCEV] Reach MatchRangeCheckIdiom through zext in LoopGuards worklist (PR #210463)   Aleksandr Popov via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Jay Foad via llvm-commits
• [llvm] [ARM] support -mlong-calls -fPIC on arm32 #39970 (PR #147313)   via llvm-commits
• [llvm] [Hexagon] Lower fcmp oeq to vcmp_(s|h)f_eq. (PR #211570)   Fateme Hosseini via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AggressiveInstCombine] Avoid converting first table element when folding table-based cttz (PR #211202)   Yingwei Zheng via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   Ralf Jung via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   via llvm-commits
• [llvm] [Hexagon] Lower fcmp oeq to vcmp_(s|h)f_eq. (PR #211570)   Fateme Hosseini via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Piotr Fusik via llvm-commits
• [clang] [llvm] clang/AMDGPU: Fix handling of subarch triples with no -mcpu (PR #211467)   via llvm-commits
• [llvm] PPC750cl, and initial support for paired singles (PR #211463)   Cynthia Coan via llvm-commits
• [llvm] [AMDGPU] Add image_atomic_{min,max}_num_flt support to gfx13 (PR #211564)   Mirko Brkušanin via llvm-commits
• [llvm] [LoopInfo] Fix makeLoopInvariant to strip UB-implying attributes. (PR #211413)   Yingwei Zheng via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] [mlir] Reland [OMPIRBuilder] Don't use invalid debug loc in reduction fn. (PR #211566)   Abid Qadeer via llvm-commits
• [llvm] [mlir] Reland [OMPIRBuilder] Don't use invalid debug loc in reduction fn. (PR #211566)   via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   David Sherwood via llvm-commits
• [llvm] [NFC] Regenerate CHECK lines in scalable-strict-fadd.ll (PR #211573)   Kerry McLaughlin via llvm-commits
• [llvm] [Hexagon] Lower fcmp oeq to vcmp_(s|h)f_eq. (PR #211570)   via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   David Green via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] [NFC] Regenerate CHECK lines in scalable-strict-fadd.ll (PR #211573)   via llvm-commits
• [llvm] [NFC] Regenerate CHECK lines in scalable-strict-fadd.ll (PR #211573)   David Sherwood via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   Krzysztof Parzyszek via llvm-commits
• [llvm] [X86][CostModel] Cost scalar integer divide/remainder by a constant (PR #211529)   via llvm-commits
• [llvm] [Draft] Integrate EmitC-translated MLGO models (PR #209829)   ioana ghiban via llvm-commits
• [llvm] [NVPTXAsmPrinter] Allow self-referential device global initializers (PR #197838)   via llvm-commits
• [llvm] [LVI] Infer ranges from mul nuw square conditions (PR #173127)   Yingwei Zheng via llvm-commits
• [llvm] [LVI] Infer ranges from mul nuw square conditions (PR #173127)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   via llvm-commits
• [llvm] [AArch64] Select sqdmulh for smul.fix.sat with scale == eltbits-1 (PR #211574)   via llvm-commits
• [llvm] [Draft] Integrate EmitC-translated MLGO models (PR #209829)   ioana ghiban via llvm-commits
• [llvm] [NFC][AMDGPU] Remove reundant run lines from two test cases (PR #211575)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Remove reundant run lines from two test cases (PR #211575)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Only combine fmin/max into clamp/fmed3 for vgpr-banked dst (PR #211456)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix buffer addressing mode matching (PR #152584)   Shilei Tian via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   Ralf Jung via llvm-commits
• [llvm] [GlobalISel] Fix volatile flag handling in memmove legalizer (PR #206025)   Ömer Sinan Ağacan via llvm-commits
• [llvm] [gn build] Port e04cf35fc64c (PR #211576)   Nico Weber via llvm-commits
• [llvm] 2697ad1 - [gn build] Port e04cf35fc64c (#211576)   via llvm-commits
• [llvm] [gn build] Port e04cf35fc64c (PR #211576)   Nico Weber via llvm-commits
• [llvm] [LVI] Infer ranges from mul nuw square conditions (PR #173127)   Ken Matsui via llvm-commits
• [llvm] 9b3cc3c - [LVI] Infer ranges from mul nuw square conditions (#173127)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (PR #211554)   Sander de Smalen via llvm-commits
• [llvm] [LVI] Infer ranges from mul nuw square conditions (PR #173127)   Ken Matsui via llvm-commits
• [llvm] [mlir] [NVPTX] Add Rubin extensions to tcgen05.commit (PR #211577)   Rajat Bajpai via llvm-commits
• [llvm] [NFC][VPlan][Tests] Some CHECKs cleanup (PR #211425)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Select sqdmulh for smul.fix.sat with scale == eltbits-1 (PR #211574)   via llvm-commits
• [llvm] [AArch64] Select sqdmulh for smul.fix.sat with scale == eltbits-1 (PR #211574)   via llvm-commits
• [llvm] [NFC] Regenerate CHECK lines in scalable-strict-fadd.ll (PR #211573)   Florian Hahn via llvm-commits
• [llvm] [RegAlloc] Avoid split past block-prologue interference (PR #209704)   Lukas Sommer via llvm-commits
• [llvm] [AArch64] Select sqdmulh for smul.fix.sat with scale == eltbits-1 (PR #211579)   via llvm-commits
• [llvm] [LoopIdiom] Use costing to determine CRC strategy (PR #211040)   Sean Clarke via llvm-commits
• [llvm] [InstSimplify] Guard and/or implied-cond folds against poison (PR #211534)   Yingwei Zheng via llvm-commits
• [llvm] [mlir] Reland [OMPIRBuilder] Don't use invalid debug loc in reduction fn. (PR #211566)   Spencer Bryngelson via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   Luke Lau via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Aiden Grossman via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Aiden Grossman via llvm-commits
• [llvm] [SPIRV][NFCI] Refactor selection of atomic operations with pointer operands (PR #208294)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] AMDGPU: Mostly migrate mc tests to subarch triples (PR #211590)   Matt Arsenault via llvm-commits
• [libc] [llvm] Reapply "[libc] Port process utilities to hermetic mode and enable some tests" (PR #211484)   via llvm-commits
• [llvm] AMDGPU: Mostly migrate mc tests to subarch triples (PR #211590)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Mostly migrate mc tests to subarch triples (PR #211590)   Matt Arsenault via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] AMDGPU: Mostly migrate mc tests to subarch triples (PR #211590)   via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] [NFC][AMDGPU] Remove reundant run lines from two test cases (PR #211575)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Remove reundant run lines from two test cases (PR #211575)   Shilei Tian via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Add performance-expensive-value-or check (PR #200166)   Yanzuo Liu via llvm-commits
• [llvm] [NFC][AMDGPU] Remove reundant run lines from two test cases (PR #211575)   Shilei Tian via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   Luke Lau via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Add performance-expensive-value-or check (PR #200166)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Add performance-expensive-value-or check (PR #200166)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Add performance-expensive-value-or check (PR #200166)   via llvm-commits
• [llvm] [RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (PR #210429)   Luke Lau via llvm-commits
• [llvm] [LV] Use planner's TTI in executePlan instead of CM.TTI (NFC) (PR #211588)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (PR #210429)   Luke Lau via llvm-commits
• [llvm] [LV] Remove unused cost model from InnerLoopVectorizer (NFC) (PR #211594)   Florian Hahn via llvm-commits
• [compiler-rt] [XRay][test] Pin CPU affinity in fdr-mode.cpp to deflake UNWRITE checks (PR #211595)   Nikita Taranov via llvm-commits
• [llvm] [RISCV] Add custom lowering for fixed-vector `CLMUL`/`CLMULH` (PR #210429)   Luke Lau via llvm-commits
• [llvm] AMDGPU: Migrate disassembler tests to use subarch triples (PR #211596)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate disassembler tests to use subarch triples (PR #211596)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Migrate disassembler tests to use subarch triples (PR #211596)   Matt Arsenault via llvm-commits
• [llvm] [ARM] support -mlong-calls -fPIC on arm32 #39970 (PR #147313)   via llvm-commits
• [llvm] [AArch64][CodeGen] Fold fp_to_int(fmul) for FPR results (PR #210987)   Kieran B via llvm-commits
• [llvm] [NFC][AMDGPU] Remove reundant run lines from two test cases (PR #211575)   Jay Foad via llvm-commits
• [llvm] [VPlan][UTC] Add `-vplan-print-instance` filter option (PR #211424)   Andrei Elovikov via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   Tom Eccles via llvm-commits
• [llvm] Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211427)   Sayan Sivakumaran via llvm-commits
• [llvm] [SPIRV][NFCI] Refactor selection of atomic operations with pointer operands (PR #208294)   Nick Sarnie via llvm-commits
• [llvm] 45250b2 - [SPIRV][NFCI] Refactor selection of atomic operations with pointer operands (#208294)   via llvm-commits
• [llvm] [SPIRV][NFCI] Refactor selection of atomic operations with pointer operands (PR #208294)   Nick Sarnie via llvm-commits
• [llvm] [llvm][AArch64] Eliminate redundant mov's sandwiching aut's in tail calls (PR #211105)   Jon Roelofs via llvm-commits
• [llvm] [llvm][AArch64] Eliminate redundant mov's sandwiching aut's in tail calls (PR #211105)   Jon Roelofs via llvm-commits
• [llvm] a8bb2e0 - [MergeFuncs] Account for elementwise loads and atomicrmw in FunctionComparator (#211478)   via llvm-commits
• [llvm] [MergeFuncs] Account for elementwise loads and atomicrmw in FunctionComparator (PR #211478)   Harrison Hao via llvm-commits
• [llvm] c050c48 - [llvm][AArch64] Eliminate redundant mov's sandwiching aut's in tail calls (#211105)   via llvm-commits
• [llvm] [llvm][AArch64] Eliminate redundant mov's sandwiching aut's in tail calls (PR #211105)   Jon Roelofs via llvm-commits
• [llvm] AMDGPU: Migrate disassembler tests to use subarch triples (PR #211596)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   Hongyu Chen via llvm-commits
• [llvm] [NFC][AMDGPU] Fix redundant target feature datacachelinesize128 (PR #211586)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Fix redundant target feature datacachelinesize128 (PR #211586)   Shilei Tian via llvm-commits
• [llvm] d77e161 - [NFC][AMDGPU] Fix redundant target feature datacachelinesize128 (#211586)   via llvm-commits
• [llvm] [NFC][AMDGPU] Fix redundant target feature datacachelinesize128 (PR #211586)   Shilei Tian via llvm-commits
• [llvm] Add !metadata_section_kind global variable metadata (PR #211524)   Stephen Tozer via llvm-commits
• [llvm] [LCSSA] Avoid rewriting lifetime markers through PHIs (PR #210811)   Karim Alweheshy via llvm-commits
• [llvm] Add !metadata_section_kind global variable metadata (PR #211524)   Stephen Tozer via llvm-commits
• [llvm] [LV] Use planner's TTI in executePlan instead of CM.TTI (NFC) (PR #211588)   via llvm-commits
• [llvm] [SPIR-V] Fix SPIRVTools download step failing on rerun (PR #211561)   Natalie Chouinard via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [llvm] [AMDGPU] Select `V_MOV_B64_e32` directly if a target supports it (PR #206135)   Shilei Tian via llvm-commits
• [llvm] [OFFLOAD] Add level_zero to list of default plugins (PR #210070)   Alex Duran via llvm-commits
• [llvm] [LSR] VScale doesn't occupy a register if it's a legal offset (PR #206754)   Graham Hunter via llvm-commits
• [llvm] [llvm] Fixes for compiling LLVM as a DLL (PR #210746)   via llvm-commits
• [llvm] [SimplifyCFG] Remove conservative fcmp guard from speculativelyExecuteBB (PR #211611)   Guy David via llvm-commits
• [llvm] llvm-mca: Stop defaulting to "native" for the CPU (PR #211612)   Matt Arsenault via llvm-commits
• [llvm] llvm-mca: Stop defaulting to "native" for the CPU (PR #211612)   Matt Arsenault via llvm-commits
• [llvm] [X86] isFMAddSubOrFMSubAdd - remove unused SelectionDAG argument. NFC. (PR #211613)   Simon Pilgrim via llvm-commits
• [llvm] [X86] isFMAddSubOrFMSubAdd - remove unused SelectionDAG argument. NFC. (PR #211613)   Simon Pilgrim via llvm-commits
• [llvm] llvm-mca: Stop defaulting to "native" for the CPU (PR #211612)   Matt Arsenault via llvm-commits
• [llvm] [Transforms] Add DeadBranchElimination pass (PR #211176)   Raz Luvaton via llvm-commits
• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Aaron Ballman via llvm-commits
• [llvm] 04b71a3 - [AMDGPU] Regenerate failing packed-fp64.ll test (#211616)   via llvm-commits
• [llvm] [AMDGPU] Regenerate failing packed-fp64.ll test (PR #211616)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Preserve sign-sensitive width record across G_TRUNC replacement (PR #211626)   Faijul Amin via llvm-commits
• [llvm] [EarlyIfConversion] Extend data dependent analysis across multiple blocks (PR #180623)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Fixes for compiling LLVM as a DLL (PR #210746)   Saleem Abdulrasool via llvm-commits
• [llvm] [X86] Add pass to coalesce redundant vector constant materializations (PR #211619)   via llvm-commits
• [llvm] [llvm] Fixes for compiling LLVM as a DLL (PR #210746)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (PR #211468)   Thurston Dang via llvm-commits
• [compiler-rt] 8f64a48 - [sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (#211468)   via llvm-commits
• [compiler-rt] [sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (PR #211468)   Thurston Dang via llvm-commits
• [compiler-rt] [sanitizer_common] Don't crash in fopen64 interceptor when path is NULL (PR #211468)   via llvm-commits
• [llvm] [llvm] Fixes for compiling LLVM as a DLL (PR #210746)   Saleem Abdulrasool via llvm-commits
• [llvm] [CodeGen] Fix stale LiveIntervals regmask tables after MachineBasicBl… (PR #209610)   via llvm-commits
• [llvm] [GlobalISel] Add immediates to `LegalizerQuery` (PR #211101)   Demetrius Kanios via llvm-commits
• [llvm] [x32] Fix BLAKE3 assembly (PR #149617)   via llvm-commits
• [llvm] [LICM] Allow hoisting of InsertElementInst's past non-hoistable InsertElementInsts (PR #211414)   Ryan Buchner via llvm-commits
• [llvm] [offload][cmake] Add option to include offload unittests in check-all (PR #211633)   Joseph Huber via llvm-commits
• [llvm] AMDGPU: Mostly migrate mc tests to subarch triples (PR #211590)   Stanislav Mekhanoshin via llvm-commits
• [libunwind] [llvm] [libunwind][AArch64] Support .cfi_set_ra_state (PR #209950)   Jon Roelofs via llvm-commits
• [llvm] AMDGPU/GlobalISel: Legalize bf16 fpext (PR #210887)   Matt Arsenault via llvm-commits
• [llvm] [offload][cmake] Add option to include offload unittests in check-all (PR #211633)   Nick Sarnie via llvm-commits
• [llvm] [LoopPeel] Peel last iteration to enable load widening (PR #173420)   Guy David via llvm-commits
• [llvm] [LoopPeel] Peel last iteration to enable load widening (PR #173420)   Guy David via llvm-commits
• [llvm] 9439725 - AMDGPU: Migrate disassembler tests to use subarch triples (#211596)   via llvm-commits
• [llvm] AMDGPU: Migrate disassembler tests to use subarch triples (PR #211596)   Matt Arsenault via llvm-commits
• [llvm] [llvm-objdump] Fix output corruption when DWARF reg-name callback misses. (PR #200975)   via llvm-commits
• [llvm] Add !metadata_section_kind global variable metadata (PR #211524)   via llvm-commits
• [llvm] [MC][ARM] Use label state for Thumb function symbols (PR #211641)   via llvm-commits
• [llvm] [AMDGPU] Fix isCanonicalized to require canonical input for NaN-propa… (PR #208733)   Wooseok Lee via llvm-commits
• [llvm] [AMDGPU] Fix isCanonicalized to require canonical input for NaN-propa… (PR #208733)   Wooseok Lee via llvm-commits
• [llvm] [AMDGPU] Fix isCanonicalized to require canonical input for NaN-propa… (PR #208733)   Wooseok Lee via llvm-commits
• [llvm] MC: Remove virtual from isCPUStringValid (PR #211629)   Aiden Grossman via llvm-commits
• [clang] [llvm] [IR] Add flags operand to structured.gep (PR #200093)   Krzysztof Drewniak via llvm-commits
• [llvm] [X86] Add pass to coalesce redundant vector constant materializations (PR #211619)   via llvm-commits
• [clang] [llvm] [IR] Add flags operand to structured.gep (PR #200093)   Krzysztof Drewniak via llvm-commits
• [clang] [llvm] [IR] Add flags operand to structured.gep (PR #200093)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Sink async DMA out of s_cbranch_execz then-blocks (PR #196374)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   Sairudra More via llvm-commits
• [llvm] [X86] Add pass to coalesce redundant vector constant materializations (PR #211619)   via llvm-commits
• [llvm] [LV] Remove unused cost model from InnerLoopVectorizer (NFC) (PR #211594)   Florian Hahn via llvm-commits
• [llvm] 43bbb5b - [LV] Remove unused cost model from InnerLoopVectorizer (NFC) (#211594)   via llvm-commits
• [llvm] [LV] Remove unused cost model from InnerLoopVectorizer (NFC) (PR #211594)   Florian Hahn via llvm-commits
• [llvm] [x32] Fix BLAKE3 assembly (PR #149617)   Harald van Dijk via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   via llvm-commits
• [llvm] [AMDGPU] Sink async DMA out of s_cbranch_execz then-blocks (PR #196374)   Vigneshwar Jayakumar via llvm-commits
• [llvm] 2ace5ad - AMDGPU: Migrate llvm-mca tests to subarch triples (#211477)   via llvm-commits
• [llvm] AMDGPU: Migrate llvm-mca tests to subarch triples (PR #211477)   Matt Arsenault via llvm-commits
• [llvm] [LV] Use planner's Legal in executePlan instead of CM.Legal (NFC) (PR #211600)   Florian Hahn via llvm-commits
• [llvm] [llvm-objdump] Fix output corruption when DWARF reg-name callback misses. (PR #200975)   via llvm-commits
• [llvm] [X86] isFMAddSubOrFMSubAdd - remove unused SelectionDAG argument. NFC. (PR #211613)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fold trivial uniform G_AMDGPU_READANYLANE (PR #210449)   Anshil Gandhi via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Tim Besard via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Sam Elliott via llvm-commits
• [llvm] [NVPTX] Fix 32-bit frame index selection on 64-bit targets (PR #211656)   Artem Belevich via llvm-commits
• [clang] [llvm] [InstCombine] Relax singleUse for GEP(p,add(x,constant)) to 2 GEPs (PR #209551)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [InstCombine] Relax singleUse for GEP(p,add(x,constant)) to 2 GEPs (PR #209551)   Yingwei Zheng via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   via llvm-commits
• [lld] [ELF] Replace getThreadIndex with explicit shards in RelocScan. NFC (PR #208959)   Arthur Eubanks via llvm-commits
• [llvm] [NVPTX] Fix 32-bit frame index selection on 64-bit targets (PR #211656)   Artem Belevich via llvm-commits
• [llvm] [Bazel] Fixes 4a6858a (PR #211661)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fixes 4a6858a (PR #211661)   Jordan Rupprecht via llvm-commits
• [llvm] [NFC] Regenerate CHECK lines in scalable-strict-fadd.ll (PR #211573)   Florian Hahn via llvm-commits
• [lld] [ELF] Replace getThreadIndex with explicit shards in RelocScan. NFC (PR #208959)   Arthur Eubanks via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Implement the error directive (PR #206175)   Krzysztof Parzyszek via llvm-commits
• [llvm] [CI] Add documentation for self-hosted runners (PR #211622)   Aiden Grossman via llvm-commits
• [llvm] [CI] Add documentation for self-hosted runners (PR #211622)   Aiden Grossman via llvm-commits
• [llvm] [CI] Add documentation for self-hosted runners (PR #211622)   Aiden Grossman via llvm-commits
• [llvm] [SLP]Remove accidental commenting out the code (PR #211662)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Remove accidental commenting out the code (PR #211662)   via llvm-commits
• [llvm] [GlobalISel] Add immediates to `LegalizerQuery` (PR #211101)   Demetrius Kanios via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Aiden Grossman via llvm-commits
• [llvm] bdb0fd5 - [SLP]Remove accidental commenting out the code   via llvm-commits
• [llvm] [SLP]Remove accidental commenting out the code (PR #211662)   Alexey Bataev via llvm-commits
• [llvm] [libc++] Consistently install Python and dependencies across macOS CI jobs (PR #211659)   Aiden Grossman via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][OpenMP] Lower scan directive and inscan reduction modifier (PR #206747)   via llvm-commits
• [llvm] [SimplifyCFG] Remove conservative fcmp guard from speculativelyExecuteBB (PR #211611)   Guy David via llvm-commits
• [llvm] [runtimes][cmake] Probe Fortran intrinsic modules for the target triple (PR #211137)   Michael Kruse via llvm-commits
• [clang] [compiler-rt] [Driver][SYCL] Add compile-time device library linking for SPIR-V targets (PR #196656)   Srividya Sundaram via llvm-commits
• [llvm] [LFI][X86] Add control-flow rewrites (PR #210913)   Zachary Yedidia via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Hussam Alhassan via llvm-commits
• [llvm] 516a328 - [NVPTX] Respect local pointer width for %SPL (#211656)   via llvm-commits
• [llvm] [NVPTX] Respect local pointer width for %SPL (PR #211656)   Alex MacLean via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [llvm] [DirectX] Hoist illegal looking resource accesses generated from optimizations (PR #211687)   Finn Plummer via llvm-commits
• [llvm] [LFI][X86] Add control-flow rewrites (PR #210913)   Zachary Yedidia via llvm-commits
• [llvm] [DirectX] Hoist illegal looking resource accesses generated from optimizations (PR #211687)   Finn Plummer via llvm-commits
• [llvm] [LFI][X86] Add control-flow rewrites (PR #210913)   Zachary Yedidia via llvm-commits
• [llvm] [DirectX] Hoist illegal looking resource accesses generated from optimizations (PR #211687)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Hoist illegal looking resource accesses generated from optimizations (PR #211687)   via llvm-commits
• [clang] [llvm] [InstCombine] Relax singleUse for GEP(p,add(x,constant)) to 2 GEPs (PR #209551)   Abhay Kanhere via llvm-commits
• [clang] [lld] [llvm] [LLVM][WebAssembly] Implement branch hinting proposal (PR #146230)   Derek Schuff via llvm-commits
• [clang] [lld] [llvm] [LLVM][WebAssembly] Implement branch hinting proposal (PR #146230)   Derek Schuff via llvm-commits
• [llvm] [dsymutil] collect pseudoprobe sections from debug map into __LLVM segment (PR #206817)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Fix gfx1250 WMMA latencies (PR #202522)   Austin Kerbow via llvm-commits
• [llvm] [lit] Add --wtt-output option to report results in WTT (.wtl) format (PR #211066)   Yasser Khan via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   Phoebe Wang via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   Phoebe Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Add per-kernel kernarg preload count (PR #211059)   Yaxun Liu via llvm-commits
• [clang] [llvm] [LoongArch] Support i128 operands for LSX inline assembly (PR #211464)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Fix pre-GFX11 llvm.fptosi.sat.i16.f32 lowering (PR #211703)   Shilei Tian via llvm-commits
• [llvm] 30fb6a7 - [X86] Don't emit x87 register scrub when x87 is unavailable (#211146)   via llvm-commits
• [llvm] [X86] Don't emit x87 register scrub when x87 is unavailable (PR #211146)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Combine chained `V[SZ]EXT_VL` ops (PR #211583)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [llvm] [X86] Don't emit x87 register scrub when x87 is unavailable (PR #211146)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Untie tail folding from optimizeInductionLiveOutUsers. NFC (PR #207984)   Luke Lau via llvm-commits
• [llvm] [X86] Don't emit x87 register scrub when x87 is unavailable (PR #211146)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Combine chained `V[SZ]EXT_VL` ops (PR #211583)   Luke Lau via llvm-commits
• [libc] [llvm] [libc][cpp::string] Allocate fewer temp strings in operator= and += (PR #210895)   Jackson Stogel via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pengcheng Wang via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   via llvm-commits
• [llvm] [MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (PR #211715)   Pengcheng Wang via llvm-commits
• [llvm] [MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (PR #211715)   via llvm-commits
• [llvm] [MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (PR #211715)   via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   via llvm-commits
• [llvm] [MachineLICM] Use `RegisterClassInfo::getRegPressureSetLimit` (PR #211715)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] SIInsertWaitcnts: rebase async marks into the merged frame at CFG joins (PR #211688)   Yoonseo Choi via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Avoid wmma bank conflict for GFX11 and GFX12 (PR #205530)   via llvm-commits
• [llvm] [AMDGPU] exclude selection pattern for s_max/min_f32/16 for gfx1170 (PR #207308)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] 4f8de76 - [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (#184466)   via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Benjamin Luke via llvm-commits
• [llvm] workflows/release-documentation: Remove permission check from validation job (PR #211718)   Tom Stellard via llvm-commits
• [llvm] workflows/release-documentation: Remove permission check from validation job (PR #211718)   via llvm-commits
• [clang] [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] exclude selection pattern for s_max/min_f32/16 for gfx1170 (PR #207308)   via llvm-commits
• [llvm] workflows/release-documentation: Remove permission check from validation job (PR #211718)   Tom Stellard via llvm-commits
• [llvm] workflows/release-documentation: Remove permission check from validation job (PR #211718)   Tom Stellard via llvm-commits
• [llvm] [AMDGPU][X86][DAG] Avoid duplicate BinOp result from narrowing insert-extract sub-vector (PR #201056)   via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   via llvm-commits
• [llvm] workflows/release-documentation: Remove permission check from validation job (PR #211718)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] SIInsertWaitcnts: rebase async marks into the merged frame at CFG joins (PR #211688)   via llvm-commits
• [llvm] [ProfCheck] XFail 3 coro tests (PR #211719)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (PR #203150)   via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] workflows/release-binaries: Add missing action to checkout (PR #211720)   Tom Stellard via llvm-commits
• [llvm] workflows/release-binaries: Add missing action to checkout (PR #211720)   via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   Fangrui Song via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Sort thunks by their destination to allow quicker convergence (PR #209962)   Fangrui Song via llvm-commits
• [llvm] 1be72f0 - [AMDGPU] Fix gfx1250 WMMA latencies (#202522)   via llvm-commits
• [llvm] [AMDGPU] Fix gfx1250 WMMA latencies (PR #202522)   Austin Kerbow via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [VectorCombine] Support simplification to scalar store for multiple insertelt (PR #132820)   via llvm-commits
• [llvm] [MergeFunctions] Preserve instruction-level profile metadata during merging (PR #208009)   Alok Kumar Sharma via llvm-commits
• [llvm] [Pipeliner] Use VRMapPhi to generate phi in epilog (PR #211723)   Ikhlas Ajbar via llvm-commits
• [llvm] [Pipeliner] Use VRMapPhi to generate phi in epilog (PR #211723)   via llvm-commits
• [llvm] [ARM] Use .reloc for dso_local weak symbols in PIC mode instead of GOT indirection (PR #209660)   Petr Hosek via llvm-commits
• [llvm] [ARM] Use .reloc for dso_local weak symbols in PIC mode instead of GOT indirection (PR #209660)   Petr Hosek via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] Create symlink for llvm-link in libc docker image (PR #210929)   via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   chandan singh via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   chandan singh via llvm-commits
• [llvm] [AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (PR #203150)   via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   via llvm-commits
• [llvm] workflows/release-documentation: Fix variable name typo (PR #211729)   Tom Stellard via llvm-commits
• [llvm] workflows/release-documentation: Fix variable name typo (PR #211729)   via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Eric Christopher via llvm-commits
• [llvm] workflows/relase-tasks: Fix variable name typo (PR #211732)   Tom Stellard via llvm-commits
• [llvm] workflows/relase-tasks: Fix variable name typo (PR #211732)   via llvm-commits
• [libc] [llvm] Reapply "[libc] Port process utilities to hermetic mode and enable some tests" (PR #211484)   Pavel Labath via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Eric Christopher via llvm-commits
• [libc] [llvm] Reapply "[libc] Port process utilities to hermetic mode and enable some tests" (PR #211484)   Pavel Labath via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Paulius Velesko via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [llvm] [AMDGPU] Exclude CDNA parts from POPS exiting wave id pattern (PR #210892)   Arseniy Obolenskiy via llvm-commits
• [llvm] [UniformityAnalysis] Make BlockLabels transient and switch to SmallVector. NFC (PR #211734)   Fangrui Song via llvm-commits
• [llvm] [UniformityAnalysis] Make BlockLabels transient and switch to SmallVector. NFC (PR #211734)   Fangrui Song via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   chandan singh via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [polly] [ISL] Fix heap-use-after-free in cut_to_hyperplane (PR #211735)   Karthika Devi C via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   Henry Jiang via llvm-commits
• [polly] [ISL] Fix heap-use-after-free in cut_to_hyperplane (PR #211735)   via llvm-commits
• [llvm] [X86] Remove lowerToAddSubOrFMAddSub vectorization lowering code (PR #211666)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Fix SIFoldOperands miscompiling values that leave a divergent loop (PR #203256)   Arseniy Obolenskiy via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Piotr Fusik via llvm-commits
• [llvm] [AMDGPU] Fix gfx1250 WMMA latencies (PR #202522)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Add Apple SME compute clustering macro-fusion (PR #211483)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Add Apple SME compute clustering macro-fusion (PR #211483)   Amara Emerson via llvm-commits
• [llvm] 3cba294 - [TableGen] Add register-info statistics (#211528)   via llvm-commits
• [llvm] [TableGen] Add register-info statistics (PR #211528)   Cullen Rhodes via llvm-commits
• [llvm] [X86] Add pass to coalesce redundant vector constant materializations (PR #211619)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [llvm] [UBSan] Add -fsanitize=uninitialized-read check (ISO C 6.3.2.1p2) (PR #207529)   via llvm-commits
• [llvm] [llvm][AArch64] Fix the location of PAuth_LR AUT CFI (PR #211702)   Jack Styles via llvm-commits
• [libc] [llvm] Reapply "[libc] Port process utilities to hermetic mode and enable some tests" (PR #211484)   Pavel Labath via llvm-commits
• [llvm] [AMDGPU] Avoid crash on missing operands in wave32 MIR (PR #211739)   via llvm-commits
• [llvm] [AMDGPU] Avoid crash on missing operands in wave32 MIR (PR #211739)   via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   chandan singh via llvm-commits
• [llvm] aa590d1 - [SPIR-V] Fix SPIRVTools download step failing on rerun (#211561)   via llvm-commits
• [llvm] [SPIR-V] Fix SPIRVTools download step failing on rerun (PR #211561)   Arseniy Obolenskiy via llvm-commits
• [llvm] [VectorCombine] Allow shuffling with bitcast for not multiple offset for loadsize (PR #119139)   via llvm-commits
• [clang] [compiler-rt] [libcxx] [Clang] Support atomic operations on _BitInt(N) (PR #204815)   Xavier Roche via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in loop patterns in SGPR/VALU legalization (PR #211740)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in loop patterns in SGPR/VALU legalization (PR #211740)   via llvm-commits
• [llvm] 6e68094 - [UniformityAnalysis] Make BlockLabels transient and switch to SmallVector. NFC (#211734)   via llvm-commits
• [llvm] [UniformityAnalysis] Make BlockLabels transient and switch to SmallVector. NFC (PR #211734)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Zachary Yedidia via llvm-commits
• [llvm] [NFC][X86] Add getMemoryOperandIdx helper function (PR #211685)   Phoebe Wang via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Implement the error directive (PR #206175)   via llvm-commits
• [llvm] [BOLT][DebugInfo] Add DWARF64 support for BOLT (PR #206437)   via llvm-commits
• [libc] [llvm] [libc] Move generated elf header to include (PR #211428)   Pavel Labath via llvm-commits
• [llvm] [NFC][X86] Add getMemoryOperandIdx helper function (PR #211685)   Phoebe Wang via llvm-commits
• [llvm] [X86] Remove lowerToAddSubOrFMAddSub vectorization lowering code (PR #211666)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove lowerToAddSubOrFMAddSub vectorization lowering code (PR #211666)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][X86] Add getMemoryOperandIdx helper function (PR #211685)   Zachary Yedidia via llvm-commits
• [libc] [llvm] [libc] Convert readv, writev, and read_write tests to use pipes (PR #210725)   Pavel Labath via llvm-commits
• [llvm] [AArch64] Remove assembler-only register classes (PR #211527)   Cullen Rhodes via llvm-commits
• [llvm] [mlir] [mlir][vector] Prevent crashing on bitcast breakdown (PR #206683)   via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Xiaoyang Gong via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [AArch64] Remove assembler-only register classes (PR #211527)   Cullen Rhodes via llvm-commits
• [llvm] [mlir] [mlir][vector] Prevent crashing on bitcast breakdown (PR #206683)   via llvm-commits
• [llvm] [AArch64] Remove assembler-only register classes (PR #211527)   Cullen Rhodes via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AArch64] Remove assembler-only register classes (PR #211527)   via llvm-commits
• [llvm] [MC][DXContainer] Avoid reading moved-from ContentEntry (PR #211741)   via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [MC][DXContainer] Avoid reading moved-from ContentEntry (PR #211741)   via llvm-commits
• [llvm] [MC][DXContainer] Avoid reading moved-from ContentEntry (PR #211741)   via llvm-commits
• [llvm] [MC][DXContainer] Avoid reading moved-from ContentEntry (PR #211741)   via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [mlir] [LoopInfo] Store blocks using Euler tour representation (PR #211485)   Alexis Engelke via llvm-commits
• [llvm] [mlir] [LoopInfo] Store blocks using Euler tour representation (PR #211485)   Alexis Engelke via llvm-commits
• [llvm] [mlir] [LoopInfo] Store blocks using Euler tour representation (PR #211485)   Alexis Engelke via llvm-commits
• [llvm] [mlir] [LoopInfo] Store blocks using Euler tour representation (PR #211485)   Alexis Engelke via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] 1102d3f - [X86] Remove lowerToAddSubOrFMAddSub vectorization lowering code (#211666)   via llvm-commits
• [llvm] [X86] Remove lowerToAddSubOrFMAddSub vectorization lowering code (PR #211666)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] [lld][Bazel] Allow lld to build with Apple C++ toolchains (PR #211667)   Karim Alweheshy via llvm-commits
• [llvm] [AArch64] Mark SP-only register classes as non-allocatable (PR #211549)   Sander de Smalen via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Sam Elliott via llvm-commits
• [llvm] [mlir] [mlir][vector] Prevent crashing on bitcast breakdown (PR #206683)   via llvm-commits
• [llvm] 6a8775b - [LV] Get function from loop, TTI from LVP to call getMaxVScale (NFC) (#211670)   via llvm-commits
• [llvm] [LV] Get function from loop, TTI from LVP to call getMaxVScale (NFC) (PR #211670)   Florian Hahn via llvm-commits
• [llvm] [NFC][X86] Add getMemoryOperandIdx helper function (PR #211685)   Zachary Yedidia via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   via llvm-commits
• [llvm] [Mips] Legalize vector UNDEF instead of expanding to zero BUILD_VECTOR (PR #211503)   via llvm-commits
• [llvm] [UniformityAnalysis] Add CallbackVH tracking to keep UniformValues consistent on IR deletion (PR #187658)   Pankaj Dwivedi via llvm-commits
• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   Kareem Ergawy via llvm-commits
• [llvm] [MachineSink] Use RegisterClassInfo::getRegPressureSetLimit (PR #211746)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Avoid crash on missing operands in wave32 MIR (PR #211739)   Matt Arsenault via llvm-commits
• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   Kareem Ergawy via llvm-commits
• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   Kareem Ergawy via llvm-commits
• [llvm] [flang-rt] enable IsNamelistNameOrSlash lookahead for scalar namelist items (PR #211224)   Kareem Ergawy via llvm-commits
• [llvm] 1302d7b - [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (#211226)   via llvm-commits
• [llvm] [PseudoProbe] Avoid inserting probes between musttail/deoptimize calls and returns (PR #211226)   chandan singh via llvm-commits
• [llvm] [RISCV] Deduplicate frame base address materializations for large stack frames (PR #211748)   Yingying Wang via llvm-commits
• [llvm] AMDGPU: VALU data fast-forwarding needs no s_delay (PR #205481)   Reem Elkhouly via llvm-commits
• [llvm] [docs] Update BOLT Office Hours Zoom link (PR #211491)   Paschalis Mpeis via llvm-commits
• [llvm] [docs] Update BOLT Office Hours Zoom link (PR #211491)   Paschalis Mpeis via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   Ian Anderson via llvm-commits
• [llvm] [docs] Update BOLT Office Hours Zoom link (PR #211491)   Paschalis Mpeis via llvm-commits
• [llvm] [LV] Get function from loop, TTI from LVP to call getMaxVScale (NFC) (PR #211670)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][object][GOFF] refine Global flag conditions (PR #211632)   James Henderson via llvm-commits
• [llvm] [llvm][object][GOFF] refine Global flag conditions (PR #211632)   James Henderson via llvm-commits
• [llvm] [llvm][object][GOFF] refine Global flag conditions (PR #211632)   James Henderson via llvm-commits
• [llvm] [llvm][object][GOFF] refine Global flag conditions (PR #211632)   James Henderson via llvm-commits
• [llvm] [llvm][object][GOFF] refine Global flag conditions (PR #211632)   James Henderson via llvm-commits
• [llvm] [llvm][object][GOFF] refine Global flag conditions (PR #211632)   James Henderson via llvm-commits
• [llvm] [llvm][object][GOFF] refine Global flag conditions (PR #211632)   James Henderson via llvm-commits
• [llvm] 746ab98 - [docs] Update BOLT Office Hours Zoom link (#211491)   via llvm-commits
• [llvm] [docs] Update BOLT Office Hours Zoom link (PR #211491)   Paschalis Mpeis via llvm-commits
• [llvm] [MachineSink] Use RegisterClassInfo::getRegPressureSetLimit (PR #211746)   Matt Arsenault via llvm-commits
• [llvm] c3a9625 - [LangRef] Clarify interaction of noalias and synchronization (#211507)   via llvm-commits
• [llvm] [LangRef] Clarify interaction of noalias and synchronization (PR #211507)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Preserve store memoperands (PR #210936)   Kamlesh Kumar via llvm-commits
• [llvm] 9f42680 - [ValueTracking] Fix signed zero handling in minnum/maxnum matching (#210077)   via llvm-commits
• [llvm] [ValueTracking] Fix signed zero handling in minnum/maxnum matching (PR #210077)   Nikita Popov via llvm-commits
• [llvm] [IR] Allow nofree on return values (PR #203491)   Nikita Popov via llvm-commits
• [llvm] [IR] Allow nofree on return values (PR #203491)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [LLVM][CodeGen] Clean up uses of useSVEForFixedLengthVectorVT(). (PR #211605)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Preserve store memoperands (PR #210936)   Kamlesh Kumar via llvm-commits
• [llvm] [llvm] Fixes for compiling LLVM as a DLL (PR #210746)   Fabrice de Gans via llvm-commits
• [llvm] [AArch64] Mark ZT0 register class as non-allocatable (PR #211750)   Cullen Rhodes via llvm-commits
• [llvm] [MachineSink] Use RegisterClassInfo::getRegPressureSetLimit (PR #211746)   Pengcheng Wang via llvm-commits
• [llvm] [InstSimplify] Guard and/or implied-cond folds against poison (PR #211534)   Akshat Dalal via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] [AMDGPU] Add image_atomic_{min,max}_num_flt support to gfx13 (PR #211564)   Mirko Brkušanin via llvm-commits
• [llvm] [mlir] [LoopInfo] Store blocks using Euler tour representation (PR #211485)   Fangrui Song via llvm-commits
• [llvm] [VectorCombine] Fix infinite loop in foldShuffleToIdentity (PR #211717)   Simon Pilgrim via llvm-commits
• [llvm] a00f27d - [MachineSink] Use RegisterClassInfo::getRegPressureSetLimit (#211746)   via llvm-commits
• [llvm] [MachineSink] Use RegisterClassInfo::getRegPressureSetLimit (PR #211746)   Pengcheng Wang via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] [X86] Break false dependencies of compress/expand on Zen 6 (PR #211671)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   Jack Styles via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Support lowering preloaded kernel arguments (PR #205049)   Keshav Vinayak Jha via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Support lowering preloaded kernel arguments (PR #205049)   Keshav Vinayak Jha via llvm-commits
• [llvm] [mlir] Reland [OMPIRBuilder] Don't use invalid debug loc in reduction fn. (PR #211566)   Abid Qadeer via llvm-commits
• [llvm] [SPIR-V] Guard against infinite loop in decorateUsesAsNonUniform (PR #208224)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIR-V] Reuse PartialOrderingVisitor DominatorTree in structurizer splitter (PR #211544)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIR-V] Remove unused LoopInfo member from structurizer splitter (PR #211538)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [MachineSink] Use RegisterClassInfo::getRegPressureSetLimit (PR #211746)   via llvm-commits
• [llvm] [RISCV] Deduplicate frame base address materializations for large stack frames (PR #211748)   via llvm-commits
• [llvm] [MC][DXContainer] Initialize SourceNames::Header scalar fields (PR #211751)   via llvm-commits
• [llvm] [NFC][X86] Add getMemoryOperandIdx helper function (PR #211685)   Simon Pilgrim via llvm-commits
• [llvm] 2ae7310 - [AMDGPU] Add image_atomic_{min, max}_num_flt support to gfx13 (#211564)   via llvm-commits
• [llvm] [AMDGPU] Add image_atomic_{min,max}_num_flt support to gfx13 (PR #211564)   Mariusz Sikora via llvm-commits
• [llvm] fd14ad5 - [NFC][SPIR-V] Reuse PartialOrderingVisitor DominatorTree in structurizer splitter (#211544)   via llvm-commits
• [llvm] [NFC][SPIR-V] Reuse PartialOrderingVisitor DominatorTree in structurizer splitter (PR #211544)   Arseniy Obolenskiy via llvm-commits
• [llvm] 905ec41 - [NFC][SPIR-V] Remove unused LoopInfo member from structurizer splitter (#211538)   via llvm-commits
• [llvm] [X86][AsmParser] Support parentheses around scale and index register in Intel syntax (PR #211003)   Wiktor Ludwichowski via llvm-commits
• [llvm] [LoongArch] Simplify addReloc relocation handling. NFC (PR #211755)   via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   via llvm-commits
• [llvm] [AArch64] Mark ZT0 register class as non-allocatable (PR #211750)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Port Atomic-Optimizer to use Wave Reduction Intrinsics (PR #211757)   via llvm-commits
• [llvm] [CodeGen] Expand unsupported interleave to shuffles (PR #210494)   Kamlesh Kumar via llvm-commits
• [llvm] Revert "[AArch64] Enable Spillage Copy Elimination by default" (PR #211572)   via llvm-commits
• [llvm] [X86] Prefer SIMD min/max/abs for scalars when staying in XMM domain (PR #210654)   Shaurya Srivastava via llvm-commits
• [llvm] [AArch64] Mark ZT0 register class as non-allocatable (PR #211750)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Support lowering preloaded kernel arguments (PR #205049)   Keshav Vinayak Jha via llvm-commits
• [llvm] [AArch64] Add CAS instructions to NeoverseN2 schedule model (PR #211195)   David Green via llvm-commits
• [llvm] [AArch64] Add CAS instructions to NeoverseN2 schedule model (PR #211195)   David Green via llvm-commits
• [llvm] [AArch64] Add CAS instructions to NeoverseN2 schedule model (PR #211195)   David Green via llvm-commits
• [llvm] [MC][DXContainer] Initialize SourceNames::Header scalar fields (PR #211751)   via llvm-commits
• [llvm] [LoongArch] Simplify addReloc relocation handling. NFC (PR #211755)   via llvm-commits
• [llvm] [SelectionDAG] Look through addrspacecasts when raising stack object alignment (PR #201772)   Tim Besard via llvm-commits
• [llvm] [SelectionDAG] Look through addrspacecasts when raising stack object alignment (PR #201772)   Tim Besard via llvm-commits
• [llvm] [VectorCombine] Fold contiguous loads into a single vector load (PR #185736)   via llvm-commits
• [llvm] 0e0418f - [AArch64] Mark SP-only register classes as non-allocatable (#211549)   via llvm-commits
• [llvm] [AArch64] Mark SP-only register classes as non-allocatable (PR #211549)   Cullen Rhodes via llvm-commits
• [llvm] [docs] Update BOLT Office Hours Zoom link (PR #211491)   Paschalis Mpeis via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [llvm] [X86] Break false dependencies of compress/expand on Zen 6 (PR #211671)   via llvm-commits
• [llvm] [X86] Break false dependencies of compress/expand on Zen 6 (PR #211671)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add scheduler definitions for XiangShan-KunMingHu (PR #148581)   Lin Wang via llvm-commits
• [llvm] [Analysis] Add intra-procedural EscapeAnalysis (PR #169896)   Alexey Paznikov via llvm-commits
• [llvm] [TSan] Add dominance-based redundant instrumentation elimination (PR #169897)   Alexey Paznikov via llvm-commits
• [llvm] [TSan] Use EscapeAnalysis to eliminate redundant instrumentation (PR #192945)   Alexey Paznikov via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   Uday Kiriti via llvm-commits
• [llvm] [TSan] Add dominance-based redundant instrumentation elimination (PR #169897)   Alexey Paznikov via llvm-commits
• [llvm] [BOLT] Fix pwrite assertion failure via a new safePWrite wrapper (PR #198569)   Jinjie Huang via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Antonio Frighetto via llvm-commits
• [llvm] [VPlan] Drop redundant member LLVM_ABI annotations (PR #205767)   Fabrice de Gans via llvm-commits
• [llvm] [llvm][macho] Support the LC_TARGET_TRIPLE load command (PR #210276)   via llvm-commits
• [llvm] [TTI] Include scalarization overhead for icmp/fcmp result (PR #206697)   David Green via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   Uday Kiriti via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] [llvm][AArch64] Fix the location of PAuth_LR AUT CFI (PR #211702)   Nathan Corbyn via llvm-commits
• [llvm] [X86] Break false dependencies of compress/expand on Zen 6 (PR #211671)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Guard against infinite loop in decorateUsesAsNonUniform (PR #208224)   Arseniy Obolenskiy via llvm-commits
• [llvm] [X86] Break false dependencies of compress/expand on Zen 6 (PR #211671)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] [X86] Break false dependencies of compress/expand on Zen 6 (PR #211671)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Guard against infinite loop in decorateUsesAsNonUniform (PR #208224)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] 383e266 - [LV] Use SCEV to compute final value of complex induction variables (#195059)   via llvm-commits
• [llvm] [LV] Use SCEV to compute final value of complex induction variables (PR #195059)   Mel Chen via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   via llvm-commits
• [llvm] Implement support for NSDI DebugFunction opcode. (PR #211760)   Manuel Carrasco via llvm-commits
• [llvm] [dyndbg][AsmPrinter] Add tail padding attributes (PR #194852)   Orlando Cazalet-Hyams via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   Uday Kiriti via llvm-commits
• [llvm] [IndVarSimplify] Add support to simplify pointer IV to integer IV (PR #209413)   via llvm-commits
• [llvm] [KnownBits] Add reduceUMin/reduceUMax support (PR #211310)   via llvm-commits
• [clang] [llvm] [mlir] [polly] [llvm] Forward declare VirtualFileSystem (PR #211761)   Fabrice de Gans via llvm-commits
• [llvm] [llvm] Fixes for compiling LLVM as a DLL (PR #210746)   Fabrice de Gans via llvm-commits
• [llvm] [SPIRV] Preserve sign-sensitive width record across G_TRUNC replacement (PR #211626)   Michal Paszkowski via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   via llvm-commits
• [llvm] [SPIRV] Preserve sign-sensitive width record across G_TRUNC replacement (PR #211626)   Michal Paszkowski via llvm-commits
• [llvm] [dyndbg][AsmPrinter] Add tail padding attributes (PR #194852)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [llvm] [mlir] [polly] [llvm] Forward declare VirtualFileSystem (PR #211761)   via llvm-commits
• [llvm] [CodeGen] Expand unsupported interleave to shuffles (PR #210494)   Kamlesh Kumar via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Mishal Shah via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Support lowering preloaded kernel arguments (PR #205049)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Tim Besard via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Support lowering preloaded kernel arguments (PR #205049)   Matt Arsenault via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   via llvm-commits
• [llvm] [SPIR-V] Fix direct return of aggregate extractvalue (PR #209762)   Tim Besard via llvm-commits
• [llvm] [offload] Align style of level zero plugin with llvm coding standard (PR #211762)   via llvm-commits
• [llvm] [offload] Align style of level zero plugin with llvm coding standard (PR #211762)   via llvm-commits
• [llvm] [offload] Align style of level zero plugin with llvm coding standard (PR #211762)   via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Ramkumar Ramachandra via llvm-commits
• [llvm] [offload] Align style of level zero plugin with llvm coding standard (PR #211762)   via llvm-commits
• [llvm] [AMDGPU] Fix v32f16 FMINIMUMNUM/FMAXIMUMNUM lowering in non-IEEE mode (PR #207896)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Select `V_MOV_B64_e32` directly if a target supports it (PR #206135)   Jay Foad via llvm-commits
• [llvm] [X86] Break false dependencies of compress/expand on Zen 6 (PR #211671)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL InterlockedXor (PR #209254)   Alexander Johnston via llvm-commits
• [llvm] [SPIR-V] Lower nested aggregate insertvalue operands (PR #204239)   Tim Besard via llvm-commits
• [llvm] [SPIR-V] Lower nested aggregate insertvalue operands (PR #204239)   Tim Besard via llvm-commits
• [llvm] [SPIRV] Legalize i1 min/max before selection (PR #204231)   Tim Besard via llvm-commits
• [llvm] [SPIRV] Legalize i1 min/max before selection (PR #204231)   Tim Besard via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] Reapply "[VPlan] Re-use VPSlotTracker when printing recipes for costs… (PR #211763)   Florian Hahn via llvm-commits
• [llvm] Reapply "[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC)." (#209003) (PR #211763)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] Reapply "[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC)." (#209003) (PR #211763)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] ca6f270 - [LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to include min/max operations. (#211228)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Extend NEON->SVE splat imm isel to include min/max operations. (PR #211228)   Paul Walker via llvm-commits
• [llvm] [Coroutines] Support typed retcon allocators (PR #211099)   Karim Alweheshy via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Match (FM)ADDSUB patterns from target shuffles as well as ISD::VECTOR_SHUFFLE (PR #211764)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Match (FM)ADDSUB patterns from target shuffles as well as ISD::VECTOR_SHUFFLE (PR #211764)   Simon Pilgrim via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] Add !metadata_section_kind global variable metadata (PR #211524)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] Add !metadata_section_kind global variable metadata (PR #211524)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] 91da2c8 - [LLVM][InstCombine] Enable simplification of SVE predicate binops. (#211016)   via llvm-commits
• [llvm] [LLVM][InstCombine] Enable simplification of SVE predicate binops. (PR #211016)   Paul Walker via llvm-commits
• [llvm] [LV] Simplify VPCostContext ctor by using VFSelectionContext (NFC). (PR #211765)   Florian Hahn via llvm-commits
• [llvm] [NFC] Regenerate CHECK lines in scalable-strict-fadd.ll (PR #211573)   Kerry McLaughlin via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] [PromoteMemToReg] Insert store undef when removing lifetime markers (PR #191909)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] bda064c - [LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (#211554)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Use correct predicate when lowering fcmp intrinsics. (PR #211554)   Paul Walker via llvm-commits
• [llvm] 9e4d9f2 - [AMDGPU] Fix register pressure estimates for use-and-redefs (#211139)   via llvm-commits
• [llvm] [AMDGPU] Fix register pressure estimates for use-and-redefs (PR #211139)   Lucas Ramirez via llvm-commits
• [llvm] 2127dbb - [X86] Break false dependencies of compress/expand on Zen 6 (#211671)   via llvm-commits
• [llvm] [X86] Break false dependencies of compress/expand on Zen 6 (PR #211671)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix pre-GFX11 llvm.fptosi.sat.i16.f32 lowering (PR #211703)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][ISel] Prefer SVE over NEON for fixed-width ASL LSR (PR #199003)   Paul Walker via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Xiaoyang Gong via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   Asher Dobrescu via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand AddRecs in VPSCEVExpander (PR #209921)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Break false dependencies of compress/expand on Zen 6 (PR #211671)   via llvm-commits
• [llvm] [LV] Simplify VPCostContext ctor by using VFSelectionContext (NFC). (PR #211765)   Florian Hahn via llvm-commits
• [llvm] f8ad1cd - [AArch64] Add Apple SME compute clustering macro-fusion (#211483)   via llvm-commits
• [llvm] [AArch64] Add Apple SME compute clustering macro-fusion (PR #211483)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Add CAS instructions to NeoverseN2 schedule model (PR #211195)   Andrew Savonichev via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in loop patterns in SGPR/VALU legalization (PR #211740)   Matt Arsenault via llvm-commits
• [llvm] 5ae98c1 - [ExpandMemCmp] Check misaligned access per overlapping/tail load (#210707)   via llvm-commits
• [llvm] [ExpandMemCmp] Check misaligned access per overlapping/tail load (PR #210707)   Pengcheng Wang via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Fix sentinel assertion when broadcasting invoke results (PR #210464)   Florian Hahn via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Add CAS instructions to NeoverseN2 schedule model (PR #211195)   Andrew Savonichev via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] PHIEliminationImpl::LowerPHINode: Fix assertion failure when all phi operands are undefined (PR #209013)   via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Xiaoyang Gong via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Xiaoyang Gong via llvm-commits
• [llvm] [LV] Simplify VPCostContext ctor by using VFSelectionContext (NFC). (PR #211765)   Florian Hahn via llvm-commits
• [llvm] 9c75661 - [LV] Simplify VPCostContext ctor by using VFSelectionContext (NFC). (#211765)   via llvm-commits
• [llvm] [CodeGen] PHIEliminationImpl::LowerPHINode: Fix assertion failure when all phi operands are undefined (PR #209013)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] PHIEliminationImpl::LowerPHINode: Fix assertion failure when all phi operands are undefined (PR #209013)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] PHIEliminationImpl::LowerPHINode: Fix assertion failure when all phi operands are undefined (PR #209013)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] PHIEliminationImpl::LowerPHINode: Fix assertion failure when all phi operands are undefined (PR #209013)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] [IR] Make semantics of strictfp consistent v2 (PR #211769)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [clang] [llvm] [mlir] [IR] Make semantics of strictfp consistent v2 (PR #211769)   via llvm-commits
• [clang] [llvm] [mlir] [IR] Make semantics of strictfp consistent v2 (PR #211769)   via llvm-commits
• [clang] [llvm] [mlir] [IR] Make semantics of strictfp consistent v2 (PR #211769)   via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [mlir][vector] Prevent crashing on bitcast breakdown (PR #206683)   Andrzej Warzyński via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Alexey Bataev via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [llvm] [AArch64] Add CAS instructions to NeoverseN2 schedule model (PR #211195)   David Green via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Evgenii Kudriashov via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   Hongyu Chen via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] [OpenMP] Fix build error after 19857baa71 (PR #211771)   Krzysztof Parzyszek via llvm-commits
• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   Krzysztof Parzyszek via llvm-commits
• [llvm] [mlir] [mlir][vector] Prevent crashing on bitcast breakdown (PR #206683)   Diego Caballero via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] [OpenMP] Fix build error after 19857baa71 (PR #211771)   via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   via llvm-commits
• [llvm] [OpenMP] Fix build error after 19857baa71 (PR #211771)   Krzysztof Parzyszek via llvm-commits
• [llvm] [X86][AsmParser] Support parentheses around scale and index register in Intel syntax (PR #211003)   Evgenii Kudriashov via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Jeremy Morse via llvm-commits
• [llvm] [X86][AsmParser] Support parentheses around scale and index register in Intel syntax (PR #211003)   Evgenii Kudriashov via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeComposite and DebugTypeMember. (PR #211638)   Manuel Carrasco via llvm-commits
• [llvm] [OpenMP] Fix build error after 19857baa71 (PR #211771)   Krzysztof Parzyszek via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [llvm] [OpenMP] Fix build error after 19857baa71 (PR #211771)   Krzysztof Parzyszek via llvm-commits
• [llvm] b82563a - [OpenMP] Fix build error after 19857baa71 (#211771)   via llvm-commits
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• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   via llvm-commits
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• [llvm] [OpenMP] Implement EnumSet container (PR #211323)   LLVM Continuous Integration via llvm-commits
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• [llvm] dd1f975 - [VectorCombine] Fix infinite loop in foldShuffleToIdentity (#211717)   via llvm-commits
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• [llvm] remove references to hard-coded gc strategies (PR #94401)   Danila Malyutin via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Implement the error directive (PR #206175)   Caroline Newcombe via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Nikita Popov via llvm-commits
• [llvm] [AArch64][ISel] Recover ADDHN from OR comparison masks (PR #210943)   Harry Ramsey via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Nikita Popov via llvm-commits
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• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Alexis Engelke via llvm-commits
• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Alexis Engelke via llvm-commits
• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Alexis Engelke via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeArray. (PR #211537)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeArray. (PR #211537)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Matt Arsenault via llvm-commits
• [compiler-rt] [llvm] [ORC][MachO] Use a per-graph compact-unwind dso_base (PR #208931)   Lang Hames via llvm-commits
• [llvm] Implement support for NSDI DebugFunction opcode. (PR #211760)   Manuel Carrasco via llvm-commits
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• [llvm] Implement support for NSDI DebugFunction opcode. (PR #211760)   Manuel Carrasco via llvm-commits
• [llvm] Implement support for NSDI DebugFunction opcode. (PR #211760)   via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
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• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [llvm] Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211427)   Sayan Sivakumaran via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [llvm] Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211427)   via llvm-commits
• [llvm] [lld][Bazel] Allow lld to build with Apple C++ toolchains (PR #211667)   Karim Alweheshy via llvm-commits
• [llvm] 42176da - [llvm][AArch64] Fix the location of PAuth_LR AUT CFI (#211702)   via llvm-commits
• [llvm] [llvm][AArch64] Fix the location of PAuth_LR AUT CFI (PR #211702)   Jon Roelofs via llvm-commits
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• [llvm] Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211427)   Sayan Sivakumaran via llvm-commits
• [libc] [llvm] [libc][math] Impl bfloat16 lgamma function. (PR #199312)   Uday Kiriti via llvm-commits
• [llvm] [InstCombine] Fold `fcmp (fmul X, C1), C2` to `fcmp X, C2/C1` (PR #205003)   via llvm-commits
• [llvm] [AMDGPU] Fix pre-GFX11 llvm.fptosi.sat.i16.f32 lowering (PR #211703)   Igor Wodiany via llvm-commits
• [llvm] [llvm][AArch64] Add a test for -aarch64-cfi-llvm-set-ra-sign-state='s default (PR #211791)   Jon Roelofs via llvm-commits
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• [llvm] [SystemZ][z/OS] Add the OF_Text flag to read .ll files and parse assembly files (PR #211782)   Sean Perry via llvm-commits
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• [llvm] af795ff - [AMDGPU] Fix pre-GFX11 llvm.fptosi.sat.i16.f32 lowering (#211703)   via llvm-commits
• [llvm] [AMDGPU] Fix pre-GFX11 llvm.fptosi.sat.i16.f32 lowering (PR #211703)   Shilei Tian via llvm-commits
• [llvm] [X86][AsmParser] Support parentheses around scale and index register in Intel syntax (PR #211003)   Wiktor Ludwichowski via llvm-commits
• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Alexis Engelke via llvm-commits
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• [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Gábor Horváth via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Sean Clarke via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Matt Arsenault via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Fix zero-call-used-regs crash on targets without NEON (PR #211603)   Akshay K via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypeArray. (PR #211537)   Manuel Carrasco via llvm-commits
• [llvm] [mlir] [NVPTX] Add Rubin extensions to tcgen05.commit (PR #211577)   Rajat Bajpai via llvm-commits
• [llvm] [mlir] [NVPTX] Add Rubin extensions to tcgen05.commit (PR #211577)   Rajat Bajpai via llvm-commits
• [llvm] [mlir] [NVPTX] Add Rubin extensions to tcgen05.commit (PR #211577)   Rajat Bajpai via llvm-commits
• [llvm] [mlir] [NVPTX] Add Rubin extensions to tcgen05.commit (PR #211577)   Rajat Bajpai via llvm-commits
• [llvm] [mlir] [NVPTX] Add Rubin extensions to tcgen05.commit (PR #211577)   Rajat Bajpai via llvm-commits
• [llvm] [DebugInfo] Add bounds checks to debug-info parsers (PR #211797)   Matt Davis via llvm-commits
• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Matt Arsenault via llvm-commits
• [llvm] [X86] Truncate (v4i32 (vzext_movl (v2i64 bitcast (scalar_to_vector (i64 X))))) (PR #211798)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Truncate (v4i32 (vzext_movl (v2i64 bitcast (scalar_to_vector (i64 X))))) (PR #211798)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fix infinite loop in foldShuffleToIdentity (PR #211717)   LLVM Continuous Integration via llvm-commits
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• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Matt Arsenault via llvm-commits
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• [llvm] [AMDGPU] Select `V_MOV_B64_e32` directly if a target supports it (PR #206135)   Shilei Tian via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Sean Clarke via llvm-commits
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• [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Yanzuo Liu via llvm-commits
• [llvm] [LSR] VScale doesn't occupy a register if it's a legal offset (PR #206754)   Elvina Yakubova via llvm-commits
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• [llvm] [ConstantFolding]Fold llvm.powi via square-and-multiply (PR #210771)   Alexey Bataev via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Nikita Popov via llvm-commits
• [llvm] [OFFLOAD][L0] Properly consume errors is program validation (PR #211799)   Alex Duran via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in loop patterns in SGPR/VALU legalization (PR #211740)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic MapVector::erase in SIFixSGPRCopies (PR #211740)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Use erase_if for Kills transfer in SIOptimizeVGPRLiveRange (PR #211800)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in SIInstrWorklist (PR #211801)   Arseniy Obolenskiy via llvm-commits
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• [llvm] [AMDGPU] Avoid quadratic MapVector::erase in SIFixSGPRCopies (PR #211740)   Arseniy Obolenskiy via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Sean Clarke via llvm-commits
• [llvm] [TLI] Make VecDesc statically initializable (PR #211307)   Valery Chernov via llvm-commits
• [llvm] [AMDGPU] Select `V_MOV_B64_e32` directly if a target supports it (PR #206135)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Use erase_if for Kills transfer in SIOptimizeVGPRLiveRange (PR #211800)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
• [llvm] [OFFLOAD][L0] Properly consume errors is program validation (PR #211799)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD][L0] Properly consume errors is program validation (PR #211799)   Nick Sarnie via llvm-commits
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• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Sean Clarke via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in SIInstrWorklist (PR #211801)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in SIInstrWorklist (PR #211801)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   via llvm-commits
• [llvm] [AMDGPU] Added llvm-debuginfo-check (PR #149429)   Scott Linder via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Jack Styles via llvm-commits
• [llvm] [OFFLOAD][L0] Properly consume errors is program validation (PR #211799)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD][L0] Properly consume errors is program validation (PR #211799)   Łukasz Plewa via llvm-commits
• [llvm] [OFFLOAD][L0] Properly consume errors is program validation (PR #211799)   Alex Duran via llvm-commits
• [llvm] [CodeGen] PHIEliminationImpl::LowerPHINode: Fix assertion failure when all phi operands are undefined (PR #209013)   Matt Arsenault via llvm-commits
• [llvm] ee7ea10 - [CodeGen] PHIEliminationImpl::LowerPHINode: Fix assertion failure when all phi operands are undefined (#209013)   via llvm-commits
• [llvm] [CodeGen] PHIEliminationImpl::LowerPHINode: Fix assertion failure when all phi operands are undefined (PR #209013)   Matt Arsenault via llvm-commits
• [llvm] [ConstraintElim] Precommit additional tests (NFC). (PR #211802)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] Precommit additional tests (NFC). (PR #211802)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic MapVector::erase in SIFixSGPRCopies (PR #211740)   Matt Arsenault via llvm-commits
• [llvm] [LV][NFC] Add test for EE-loop with dereferenceable_or_null arg and deref assumption (PR #211803)   Aleksandr Popov via llvm-commits
• [llvm] [OFFLOAD][L0] Properly consume errors in program validation (PR #211799)   Alex Duran via llvm-commits
• [llvm] [LV][NFC] Add test for EE-loop with dereferenceable_or_null arg and deref assumption (PR #211803)   via llvm-commits
• [llvm] [AArch64] Extend optimizeCrossBlock() to handle select-family instruc… (PR #208369)   Mugundan S via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [Draft] Integrate EmitC-translated MLGO models (PR #209829)   ioana ghiban via llvm-commits
• [llvm] [LLVM] Respect `optnone` in `promote-args` and `deadargelim` (PR #211804)   Joseph Huber via llvm-commits
• [llvm] [LLVM] Respect `optnone` in `promote-args` and `deadargelim` (PR #211804)   via llvm-commits
• [llvm] [LV][NFC] Add test for EE-loop with dereferenceable_or_null arg and deref assumption (PR #211803)   Aleksandr Popov via llvm-commits
• [llvm] d1f2fc5 - [SystemZ][z/OS] Add the OF_Text flag to read .ll files and parse assembly files (#211782)   via llvm-commits
• [llvm] [SystemZ][z/OS] Add the OF_Text flag to read .ll files and parse assembly files (PR #211782)   Abhina Sree via llvm-commits
• [llvm] [LLVM] Respect `optnone` in `promote-args` and `deadargelim` (PR #211804)   Nikita Popov via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Sean Clarke via llvm-commits
• [llvm] [AMDGPU] SIInsertWaitcnts: rebase async marks into the merged frame at CFG joins (PR #211688)   Matt Arsenault via llvm-commits
• [llvm] [LLVM] Respect `optnone` in `promote-args` and `deadargelim` (PR #211804)   Joseph Huber via llvm-commits
• [llvm] [LLVM] Respect `optnone` in `promote-args` and `deadargelim` (PR #211804)   Matt Arsenault via llvm-commits
• [llvm] [LLVM] Respect `optnone` in `promote-args` and `deadargelim` (PR #211804)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Matt Arsenault via llvm-commits
• [llvm] [NFC][VPlan][Tests] Some CHECKs cleanup (PR #211425)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix incorrect grid_dims constant folding for reqd_work_group_size (PR #211285)   Wooseok Lee via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Sean Clarke via llvm-commits
• [llvm] [AMDGPU] Fix incorrect grid_dims constant folding for reqd_work_group_size (PR #211285)   Wooseok Lee via llvm-commits
• [llvm] [ADT] Skip initial empty string in StringTable iterator (PR #211808)   Alexis Engelke via llvm-commits
• [llvm] [InlineSpiller] Avoid spill hoisting interference (PR #211809)   Lukas Sommer via llvm-commits
• [llvm] [ADT] Skip initial empty string in StringTable iterator (PR #211808)   via llvm-commits
• [llvm] [InlineSpiller] Avoid spill hoisting interference (PR #211809)   via llvm-commits
• [llvm] [AMDGPU] Do not fold hidden_grid_dims load from reqd_work_group_size (PR #205866)   Wooseok Lee via llvm-commits
• [llvm] [AMDGPU] Do not fold hidden_grid_dims load from reqd_work_group_size (PR #205866)   Wooseok Lee via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add ElementSize information to continuous load, store and pseudo instructions (PR #204821)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add ElementSize information to fp compare, continuous/replicating load and store instructions (PR #204821)   Paul Walker via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Sean Clarke via llvm-commits
• [llvm] [IR][NFC] Remove vtables from AnalysisResultConcept (PR #211810)   Alexis Engelke via llvm-commits
• [llvm] [IR][NFC] Remove vtables from AnalysisResultConcept (PR #211810)   via llvm-commits
• [llvm] [InlineSpiller] Avoid spill hoisting interference (PR #211809)   Lukas Sommer via llvm-commits
• [llvm] [InlineSpiller] Avoid spill hoisting interference (PR #211809)   Matt Arsenault via llvm-commits
• [llvm] [libc++][CI] TEMP: investigate macOS LNT install failure (DO NOT MERGE) (PR #211783)   Louis Dionne via llvm-commits
• [llvm] [NFC][VPlan][Tests] Some CHECKs cleanup (PR #211425)   Andrei Elovikov via llvm-commits
• [llvm] 6636eb9 - [X86] Truncate (v4i32 (vzext_movl (v2i64 bitcast (scalar_to_vector (i64 X))))) (#211798)   via llvm-commits
• [llvm] [X86] Truncate (v4i32 (vzext_movl (v2i64 bitcast (scalar_to_vector (i64 X))))) (PR #211798)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][VPlan][Tests] Some CHECKs cleanup (PR #211425)   Andrei Elovikov via llvm-commits
• [llvm] [LLVM] Respect `optnone` in `promote-args` and `deadargelim` (PR #211804)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic MapVector::erase in SIFixSGPRCopies (PR #211740)   Arseniy Obolenskiy via llvm-commits
• [llvm] [InlineSpiller] Avoid spill hoisting interference (PR #211809)   Lukas Sommer via llvm-commits
• [llvm] [LoopFusion] Fix false-positive dependency blocking fusion of idempot… (PR #206401)   Ehsan Amiri via llvm-commits
• [llvm] [libc++] Fix Python selection in the macOS benchmark jobs (PR #211812)   Louis Dionne via llvm-commits
• [llvm] [libc++] Fix Python selection in the macOS benchmark jobs (PR #211812)   via llvm-commits
• [llvm] [libc++] Fix Python selection in the macOS benchmark jobs (PR #211812)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add ElementSize information to fp compare, continuous/replicating load and store instructions (PR #204821)   Paul Walker via llvm-commits
• [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Balázs Benics via llvm-commits
• [llvm] [LV] Prefer fixed VFs for epilogue vectorization (PR #211814)   Benjamin Maxwell via llvm-commits
• [llvm] a2d74bf - [flang][OpenMP] Implement the error directive (#206175)   via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Implement the error directive (PR #206175)   Caroline Newcombe via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add ElementSize information to fp compare, continuous/replicating load and store instructions (PR #204821)   Paul Walker via llvm-commits
• [llvm] [LV] Prefer fixed VFs for epilogue vectorization (PR #211814)   via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   Akshay K via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Add ElementSize information to fp compare, continuous/replicating load and store instructions (PR #204821)   Paul Walker via llvm-commits
• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Alexis Engelke via llvm-commits
• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Alexis Engelke via llvm-commits
• [llvm] [libc++] Fix Python selection in the macOS benchmark jobs (PR #211812)   Louis Dionne via llvm-commits
• [llvm] [libc++] Fix Python selection in the macOS benchmark jobs (PR #211812)   Louis Dionne via llvm-commits
• [llvm] [lld][Bazel] Allow lld to build with Apple C++ toolchains (PR #211667)   Karim Alweheshy via llvm-commits
• [llvm] [lld][Bazel] Allow lld to build with Apple C++ toolchains (PR #211667)   Karim Alweheshy via llvm-commits
• [llvm] [OFFLOAD][L0] Properly consume errors in program validation (PR #211799)   Alex Duran via llvm-commits
• [llvm] [AMDGPU] Improve MemorySSA walking in isClobberedInFunction (PR #211817)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix incorrect grid_dims constant folding for reqd_work_group_size (PR #211285)   Arseniy Obolenskiy via llvm-commits
• [llvm] 9ee615b - [AMDGPU] Fix incorrect grid_dims constant folding for reqd_work_group_size (#211285)   via llvm-commits
• [llvm] [AMDGPU] Fix incorrect grid_dims constant folding for reqd_work_group_size (PR #211285)   Arseniy Obolenskiy via llvm-commits
• [llvm] [libc++][CI] TEMP: investigate macOS LNT install failure (DO NOT MERGE) (PR #211783)   Louis Dionne via llvm-commits
• [llvm] [libc++][CI] TEMP: investigate macOS LNT install failure (DO NOT MERGE) (PR #211783)   Louis Dionne via llvm-commits
• [llvm] [offload] Split olMemAlloc to separate functions (PR #209196)   Łukasz Plewa via llvm-commits
• [llvm] [AMDGPU] Improve MemorySSA walking in isClobberedInFunction (PR #211817)   via llvm-commits
• [llvm] [offload] Split olMemAlloc to separate functions (PR #209196)   Joseph Huber via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Yingwei Zheng via llvm-commits
• [llvm] [Offload] Add olCreateContext / olDestroyContext / olGetContextInfo API (PR #209144)   Alex Duran via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Yingwei Zheng via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Nikita Popov via llvm-commits
• [llvm] [HashRecognize] Fix compiler hang on dense use-def chain (PR #211711)   Sean Clarke via llvm-commits
• [llvm] [VPlan] Drop redundant member LLVM_ABI annotations (PR #205767)   Saleem Abdulrasool via llvm-commits
• [clang] [llvm] [clang][CodeGen] Place constructor/destructor functions in .text.startup/.text… (PR #200221)   via llvm-commits
• [llvm] [IR][NFC] Remove vtables from AnalysisResultConcept (PR #211810)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL InterlockedXor (PR #209254)   Alexander Johnston via llvm-commits
• [llvm] [VPlan] Drop redundant member LLVM_ABI annotations (PR #205767)   Florian Hahn via llvm-commits
• [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Yanzuo Liu via llvm-commits
• [llvm] [LoopFlatten] Invalidate SCEV on unflattening bail (PR #211819)   Arda Serdar Pektezol via llvm-commits
• [llvm] 1f89652 - [ConstraintElim] Precommit additional tests (NFC). (#211802)   via llvm-commits
• [llvm] [ConstraintElim] Precommit additional tests (NFC). (PR #211802)   Florian Hahn via llvm-commits
• [llvm] [LoopFlatten] Invalidate SCEV on unflattening bail (PR #211819)   via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Louis Dionne via llvm-commits
• [llvm] [LoopFlatten] Invalidate SCEV on unflattening bail (PR #211819)   Arda Serdar Pektezol via llvm-commits
• [llvm] [LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (PR #211820)   Aleksandr Popov via llvm-commits
• [llvm] [LoopFlatten] Invalidate SCEV on unflattening bail (PR #211819)   Arda Serdar Pektezol via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Louis Dionne via llvm-commits
• [llvm] [LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (PR #211820)   via llvm-commits
• [llvm] [LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (PR #211820)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Alexander Richardson via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Antonio Frighetto via llvm-commits
• [llvm] cross-project-tests: Migrate amdgpu tests to use subarch triples (PR #210115)   Matt Arsenault via llvm-commits
• [llvm] [LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (PR #211820)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Guo Chen via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Guo Chen via llvm-commits
• [llvm] [LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (PR #211820)   Aleksandr Popov via llvm-commits
• [llvm] [AMDGPU] revert srl pattern for true16 mode (PR #208136)   Guo Chen via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Guo Chen via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Guo Chen via llvm-commits
• [llvm] [AArch64][CostModel] Lower wide fixed-length vector reductions cost (PR #211824)   Gaëtan Bossu via llvm-commits
• [llvm] 5018aeb - [VPlan] Drop redundant member LLVM_ABI annotations (#205767)   via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Drop redundant member LLVM_ABI annotations (PR #205767)   Fabrice de Gans via llvm-commits
• [llvm] [AArch64][CostModel] Lower wide fixed-length vector reductions cost (PR #211824)   via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Guo Chen via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Guo Chen via llvm-commits
• [llvm] [LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (PR #211820)   Florian Hahn via llvm-commits
• [llvm] [LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (PR #211820)   Florian Hahn via llvm-commits
• [llvm] [AArch64][CostModel] Lower wide fixed-length vector reductions cost (PR #211824)   via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Nikita Popov via llvm-commits
• [llvm] [offload][cmake] Add option to include offload unittests in check-all (PR #211633)   Nick Sarnie via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   Snehasish Kumar via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   Snehasish Kumar via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   Snehasish Kumar via llvm-commits
• [llvm] [offload][cmake] Add option to include offload unittests in check-all (PR #211633)   Joseph Huber via llvm-commits
• [llvm] f9b1295 - [AMDGPU] Use erase_if for Kills transfer in SIOptimizeVGPRLiveRange (#211800)   via llvm-commits
• [llvm] [AMDGPU] Use erase_if for Kills transfer in SIOptimizeVGPRLiveRange (PR #211800)   Arseniy Obolenskiy via llvm-commits
• [llvm] [DebugInfo][WebAssembly] Anchor stack locals to the frame base (PR #211826)   Jonas Devlieghere via llvm-commits
• [llvm] [NVPTX] Lower allocas to the local address space (PR #204346)   Drew Kersnar via llvm-commits
• [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Balázs Benics via llvm-commits
• [llvm] [DebugInfo][WebAssembly] Anchor stack locals to the frame base (PR #211826)   Jonas Devlieghere via llvm-commits
• [llvm] [AArch64][CostModel] Lower wide fixed-length vector reductions cost (PR #211824)   Gaëtan Bossu via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [llvm] [DebugInfo][WebAssembly] Anchor stack locals to the frame base (PR #211826)   via llvm-commits
• [llvm] [MC][NFC] Use EnumStrings for AtSpecifiers (PR #211827)   Alexis Engelke via llvm-commits
• [llvm] [MC][NFC] Use EnumStrings for AtSpecifiers (PR #211827)   via llvm-commits
• [llvm] [MC][NFC] Use EnumStrings for AtSpecifiers (PR #211827)   via llvm-commits
• [llvm] [offload][cmake] Add option to include offload unittests in check-all (PR #211633)   Nick Sarnie via llvm-commits
• [llvm] [offload][cmake] Add option to include offload unittests in check-all (PR #211633)   Nick Sarnie via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Support memory runtime alias checks (PR #209820)   Alexey Bataev via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Nikita Popov via llvm-commits
• [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Yanzuo Liu via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Eli Friedman via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   Akshay K via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   via llvm-commits
• [llvm] a443ddb - [NFC][VPlan][Tests] Some CHECKs cleanup (#211425)   via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Matt Arsenault via llvm-commits
• [llvm] [NFC][VPlan][Tests] Some CHECKs cleanup (PR #211425)   Andrei Elovikov via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL InterlockedXor (PR #209254)   Alexander Johnston via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Robert Imschweiler via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Robert Imschweiler via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][CostModel] Lower wide fixed-length vector reductions cost (PR #211824)   Gaëtan Bossu via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Robert Imschweiler via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Robert Imschweiler via llvm-commits
• [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Balázs Benics via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Balázs Benics via llvm-commits
• [llvm] [LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (PR #211820)   Aleksandr Popov via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Matt Arsenault via llvm-commits
• [llvm] [LAA] Use dereferenceable assumption for dereferenceable_or_null pointers (PR #211820)   Aleksandr Popov via llvm-commits
• [llvm] AMDGPU: Handle ISD::POISON in fp16SrcZerosHighBits and isCanonicalized (PR #211831)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle ISD::POISON in fp16SrcZerosHighBits and isCanonicalized (PR #211831)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle ISD::POISON in fp16SrcZerosHighBits and isCanonicalized (PR #211831)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Handle ISD::POISON in fp16SrcZerosHighBits and isCanonicalized (PR #211831)   via llvm-commits
• [llvm] [SelectionDAG] Stop forming minnum/maxnum in SDAGBuilder (PR #187738)   Matt Arsenault via llvm-commits
• [clang] [llvm] [InstCombine] Relax singleUse for GEP(p,add(x,constant)) to 2 GEPs (PR #209551)   Nikita Popov via llvm-commits
• [clang] [llvm] [InstCombine] Relax singleUse for GEP(p,add(x,constant)) to 2 GEPs (PR #209551)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc] Move generated elf header to include (PR #211428)   Alexey Samsonov via llvm-commits
• [llvm] cross-project-tests: Migrate amdgpu tests to use subarch triples (PR #210115)   Robert Imschweiler via llvm-commits
• [llvm] [LoopFlatten] Invalidate SCEV on unflattening bail (PR #211819)   Arda Serdar Pektezol via llvm-commits
• [llvm] [LoopFlatten] Invalidate SCEV on unflattening bail (PR #211819)   Arda Serdar Pektezol via llvm-commits
• [compiler-rt] [compiler-rt] FreeBSD kernel headers in baremetal libprofile (PR #211278)   Justin Cady via llvm-commits
• [llvm] cross-project-tests: Migrate amdgpu tests to use subarch triples (PR #210115)   Matt Arsenault via llvm-commits
• [llvm] [X86] Add pass to coalesce redundant vector constant materializations (PR #211619)   via llvm-commits
• [llvm] cross-project-tests: Migrate amdgpu tests to use subarch triples (PR #210115)   Matt Arsenault via llvm-commits
• [clang] [llvm] [clang][CodeGen] Place constructor/destructor functions in .text.startup/.text… (PR #200221)   via llvm-commits
• [llvm] fb42025 - [IR][NFC] Remove vtables from AnalysisResultConcept (#211810)   via llvm-commits
• [llvm] [IR][NFC] Remove vtables from AnalysisResultConcept (PR #211810)   Alexis Engelke via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in SIInstrWorklist (PR #211801)   Arseniy Obolenskiy via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in SIInstrWorklist (PR #211801)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL InterlockedXor (PR #209254)   Alexander Johnston via llvm-commits
• [llvm] f1bf19b - [AMDGPU] Avoid quadratic MapVector::erase in SIFixSGPRCopies (#211740)   via llvm-commits
• [llvm] [gn build] Port 10e0a2ee03b0 (PR #211834)   Nico Weber via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic MapVector::erase in SIFixSGPRCopies (PR #211740)   Arseniy Obolenskiy via llvm-commits
• [llvm] [gn build] Port 19857baa713d (PR #211835)   Nico Weber via llvm-commits
• [llvm] e6c604e - [gn build] Port 19857baa713d (#211835)   via llvm-commits
• [llvm] [mlir] [LoopInfo] Store blocks using Euler tour representation (PR #211485)   Alexis Engelke via llvm-commits
• [llvm] [gn build] Port 19857baa713d (PR #211835)   Nico Weber via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Matt Arsenault via llvm-commits
• [llvm] 13040fb - [gn build] Port 10e0a2ee03b0 (#211834)   via llvm-commits
• [llvm] [gn build] Port 10e0a2ee03b0 (PR #211834)   Nico Weber via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Joshua Cranmer via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Joshua Cranmer via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Joshua Cranmer via llvm-commits
• [clang] [llvm] [clang][CodeGen] Place constructor/destructor functions in .text.startup/.text… (PR #200221)   via llvm-commits
• [llvm] [ConstraintElim] use condition from latch in addInfoForInductions. (PR #210984)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL] Implement HLSL InterlockedXor (PR #209254)   Alexander Johnston via llvm-commits
• [compiler-rt] [compiler-rt] FreeBSD kernel headers in baremetal libprofile (PR #211278)   Eli Friedman via llvm-commits
• [llvm] [AMDGPU] revert srl pattern for true16 mode (PR #208136)   Joe Nash via llvm-commits
• [llvm] [mlir] [LoopInfo] Store blocks using Euler tour representation (PR #211485)   Alexis Engelke via llvm-commits
• [llvm] [LoopVectorize] Improve Vectorization of Low Trip Count Loops (PR #195823)   Florian Hahn via llvm-commits
• [llvm] [X86] Reuse already-materialized values when forming LEAs (PR #210739)   Alexey Bataev via llvm-commits
• [compiler-rt] [libc] [llvm] [compiler-rt][builtins] add libc-backed arithmetic builtins (PR #207092)   Simon Tatham via llvm-commits
• [compiler-rt] [libc] [llvm] [compiler-rt][builtins] add libc-backed arithmetic builtins (PR #207092)   via llvm-commits
• [llvm] Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211427)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in SIInstrWorklist (PR #211801)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [clang][CodeGen] Place constructor/destructor functions in .text.startup/.text… (PR #200221)   via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in SIInstrWorklist (PR #211801)   Arseniy Obolenskiy via llvm-commits
• [llvm] 165121e - Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (#211427)   via llvm-commits
• [llvm] Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211427)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in SIInstrWorklist (PR #211801)   Matt Arsenault via llvm-commits
• [llvm] [mlir] [NVPTX] Add Rubin extensions to tcgen05.commit (PR #211577)   Alex MacLean via llvm-commits
• [clang] [llvm] [mlir] [IR] Make semantics of strictfp consistent v2 (PR #211769)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Guo Chen via llvm-commits
• [llvm] [AMDGPU] Overwrite shouldCoalesce to stop merging imm mov with virtual reg with large valnos (PR #209608)   Guo Chen via llvm-commits
• [compiler-rt] [compiler-rt] FreeBSD kernel headers in baremetal libprofile (PR #211278)   Justin Cady via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Madhur Kumar via llvm-commits
• [llvm] [VPlan] Endow DerivedIV with IRFlags (PR #205908)   Florian Hahn via llvm-commits
• [llvm] [AArch64][CostModel] Lower wide fixed-length vector reductions cost (PR #211824)   Sander de Smalen via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] add libc-backed double/float-to-int builtins (PR #207543)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Zeyi Xu via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Matt Arsenault via llvm-commits
• [llvm] [SLP]Initial support for copyables in fmuladd intrinsic (PR #211245)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Florian Hahn via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed int-to-double/float builtins (PR #209900)   via llvm-commits
• [libcxx] [llvm] [libc++] Rename pre-commit CI workflows (PR #211844)   Louis Dionne via llvm-commits
• [llvm] b7fa8b2 - [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (#211530)   via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Nikita Popov via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   Simon Pilgrim via llvm-commits
• [compiler-rt] [llvm] [tsan] add fetch_max, fetch_min, fetch_umax, fetch_umin (PR #211388)   Mauri de Souza Meneguzzo via llvm-commits
• [llvm] [LoopFlatten] Invalidate SCEV on unflattening bail (PR #211819)   Arda Serdar Pektezol via llvm-commits
• [llvm] [LoopFlatten] Invalidate SCEV on unflattening bail (PR #211819)   via llvm-commits
• [llvm] [SelectionDAG] Improve shifted range checks with add offsets (PR #207955)   via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract InstructionsState (2/3) (PR #211461)   Alexey Bataev via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [lldb] [llvm] [mlir] [DebugInfo] Add symbolic branches to DIExpression (PR #210850)   Eric Christopher via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   Min-Yih Hsu via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   Min-Yih Hsu via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Steven Wu via llvm-commits
• [llvm] [AMDGPU][True16] Retain `hi16` subregisters through v2s copies (PR #211848)   Zach Goldthorpe via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [NVPTXAsmPrinter] Allow self-referential device global initializers (PR #197838)   via llvm-commits
• [llvm] 0dd2c57 - AMDGPU/GlobalISel: Add lowering for bf16 fpext (#210887)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Add lowering for bf16 fpext (PR #210887)   via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [AMDGPU] Handle True16 high-half 16-bit packing idiom with uniform operand (PR #211102)   Zach Goldthorpe via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Kerry McLaughlin via llvm-commits
• [llvm] [AMDGPU] Fix instruction size of LDS-DMA buffer loads (PR #211302)   Michael Halkenhäuser via llvm-commits
• [libcxx] [llvm] [libc++] Rename pre-commit CI workflows (PR #211844)   via llvm-commits
• [llvm] [AMDGPU][True16] Retain `hi16` subregisters through v2s copies (PR #211848)   Matt Arsenault via llvm-commits
• [llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)   Benjamin Maxwell via llvm-commits
• [llvm] [Hexagon] Fix KCFI check truncating type id (PR #211854)   Brian Cain via llvm-commits
• [llvm] [AMDGPU] SIInsertWaitcnts: rebase async marks into the merged frame at CFG joins (PR #211688)   Yoonseo Choi via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ryotaro Kasuga via llvm-commits
• [llvm] [CopyProf] Add CopyProf instrumentation passes. (PR #207385)   via llvm-commits
• [llvm] workflows/release-documentation: Fix indentation (PR #211319)   via llvm-commits
• [llvm] [AMDGPU] Fix isCanonicalized to require canonical input for NaN-propa… (PR #208733)   Wooseok Lee via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed floating-point extend/trunct builtins (PR #209984)   via llvm-commits
• [llvm] AMDGPU: Don't pack a build_vector with an undef/poison lane (PR #211871)   Matt Arsenault via llvm-commits
• [llvm] 9195346 - AMDGPU: Validate processor is consistent with subarch in TargetID parsing (#211828)   via llvm-commits
• [llvm] AMDGPU: Validate processor is consistent with subarch in TargetID parsing (PR #211828)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Reject unrecognized amdgpu subarch in TargetID parsing (PR #211866)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Don't pack a build_vector with an undef/poison lane (PR #211871)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Don't pack a build_vector with an undef/poison lane (PR #211871)   Matt Arsenault via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Alexey Bataev via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   Fangrui Song via llvm-commits
• [clang] [llvm] [AMDGPU] Add amdgcn builtin for s_prefetch_inst (PR #211642)   Gang Chen via llvm-commits
• [compiler-rt] [PGO][HIP] Support hipModuleLoad in offload PGO (PR #211875)   via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed floating-point extend/trunct builtins (PR #209984)   via llvm-commits
• [llvm] b6c6666 - [NVPTXAsmPrinter] Allow self-referential device global initializers (#197838)   via llvm-commits
• [llvm] [NVPTXAsmPrinter] Allow self-referential device global initializers (PR #197838)   Princeton Ferro via llvm-commits
• [clang] [llvm] [AMDGPU] Add amdgcn builtin for s_prefetch_inst (PR #211642)   Robert Imschweiler via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] add libc-backed double/float-to-int builtins (PR #207543)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add amdgcn builtin for s_prefetch_inst (PR #211642)   Robert Imschweiler via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Yonah Goldberg via llvm-commits
• [flang] [llvm] [flang][cuda] Use cuf.register_variable_static instead of CUFRegisterExternalVariable (PR #211886)   Valentin Clement バレンタイン クレメン via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed floating-point extend/trunct builtins (PR #209984)   via llvm-commits
• [llvm] [SPIRV] Emit FPFastMathMode for Call (PR #211879)   via llvm-commits
• [llvm] 43dbc63 - AMDGPU: Reject unrecognized amdgpu subarch in TargetID parsing (#211866)   via llvm-commits
• [llvm] AMDGPU: Reject unrecognized amdgpu subarch in TargetID parsing (PR #211866)   Matt Arsenault via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed floating-point extend/trunct builtins (PR #209984)   via llvm-commits
• [libcxx] [llvm] [libc++][CI] Add a Github workflow to test libc++ tools (PR #211067)   Louis Dionne via llvm-commits
• [llvm] AMDGPU: Don't pack a build_vector with an undef/poison lane (PR #211871)   Robert Imschweiler via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Yonah Goldberg via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed bfloat16 extend/truncate builtins (PR #211881)   via llvm-commits
• [compiler-rt] [libc] [compiler-rt][builtins] libc-backed float16 extend/truncate builtins (PR #211882)   via llvm-commits
• [llvm] AMDGPU: Don't pack a build_vector with an undef/poison lane (PR #211871)   Matt Arsenault via llvm-commits
• [compiler-rt] [scudo] Add unmap and eviction stats to Secondary (PR #210465)   Christopher Ferris via llvm-commits
• [llvm] [LangRef] Rewrite the elementwise atomic description and reject seq_cst elementwise atomics (PR #209931)   Yonah Goldberg via llvm-commits
• [libcxx] [llvm] [libc++] Rename pre-commit CI workflows (PR #211844)   Louis Dionne via llvm-commits
• [llvm] [HashRecognize] Fix two more compiler hangs on dense use-def chains (PR #211887)   Sean Clarke via llvm-commits
• [llvm] [SPIRV] Emit NonSemantic DebugTypedef (PR #211883)   via llvm-commits
• [llvm] [AMDGPU][True16] Retain `hi16` subregisters through v2s copies (PR #211848)   Zach Goldthorpe via llvm-commits
• [llvm] [AMDGPU][True16] Retain `hi16` subregisters through v2s copies (PR #211848)   Zach Goldthorpe via llvm-commits
• [llvm] [AMDGPU][True16] Retain `hi16` subregisters through v2s copies (PR #211848)   Zach Goldthorpe via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Jessica Clarke via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   via llvm-commits
• [llvm] [ProfileData] Split EagerSampleProfileNameTable by key type (NFC) (PR #211126)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU] Improve MemorySSA walking in isClobberedInFunction (PR #211817)   Krzysztof Drewniak via llvm-commits
• [compiler-rt] [llvm] [tsan] add fetch_max, fetch_min, fetch_umax, fetch_umin (PR #211388)   Mauri de Souza Meneguzzo via llvm-commits
• [llvm] f61e1fa - [Pipeliner] Use VRMapPhi to generate phi in epilog (#211723)   via llvm-commits
• [llvm] [Pipeliner] Use VRMapPhi to generate phi in epilog (PR #211723)   Ikhlas Ajbar via llvm-commits
• [flang] [llvm] [flang][cuda] Use cuf.register_variable_static instead of CUFRegisterExternalVariable (PR #211886)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [DebugInfo][WebAssembly] Anchor stack locals to the frame base (PR #211826)   Adrian Prantl via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental Smcsps and Sscsps support (PR #211712)   Sam Elliott via llvm-commits
• [llvm] [Hexagon] Lower vreduce(min|max)((imum)?) (PR #211898)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Lower vreduce(min|max)((imum)?) (PR #211898)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Lower vreduce(min|max)((imum)?) (PR #211898)   Fateme Hosseini via llvm-commits
• [llvm] [flang-rt] - Reduce ShallowCopy template instantiations to improve LTO time (PR #209915)   Pranav Bhandarkar via llvm-commits
• [llvm] [Hexagon] Lower vreduce(min|max)((imum)?) (PR #211898)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Lower vreduce(min|max)((imum)?) (PR #211898)   via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Kewen Meng via llvm-commits
• [llvm] [AMDGPU] Improve MemorySSA walking in isClobberedInFunction (PR #211817)   Krzysztof Drewniak via llvm-commits
• [llvm] [SCEV] Store type of expression inline, compute up front (NFC). (PR #211891)   Eli Friedman via llvm-commits
• [llvm] [SCEV] Store type of expression inline, compute up front (NFC). (PR #211891)   Eli Friedman via llvm-commits
• [llvm] [SCEV] Store type of expression inline, compute up front (NFC). (PR #211891)   Eli Friedman via llvm-commits
• [llvm] [SCEV] Store type of expression inline, compute up front (NFC). (PR #211891)   Eli Friedman via llvm-commits
• [llvm] [SCEV] Add missing scPtrToAddr to getCastExpr. (PR #211899)   Florian Hahn via llvm-commits
• [llvm] [SDAG][NVPTX] Cache control metadata support and lowering (PR #204067)   Alex MacLean via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [CVP] Add tests for single-user result refinement. (NFC) (PR #211901)   Florian Hahn via llvm-commits
• [llvm] [CVP] Add tests for single-user result refinement. (NFC) (PR #211901)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add missing scPtrToAddr to getCastExpr. (PR #211899)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU][GFX13] Remove support for LDS atomic add f64 (PR #211922)   via llvm-commits
• [llvm] [AMDGPU][True16] Retain `hi16` subregisters through v2s copies (PR #211848)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16] Retain `hi16` subregisters through v2s copies (PR #211848)   Joe Nash via llvm-commits
• [llvm] [Hexagon] Lower vreduce(min|max)((imum)?) (PR #211898)   Brian Cain via llvm-commits
• [llvm] [flang-rt][cuda] Keep device-context cleanup probe from leaking a last-error (PR #211910)   Zhen Wang via llvm-commits
• [llvm] [LV] Vectorize bounded (i % 2^N) loads in read only loops w/o RT checks. (PR #207279)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU][True16] Retain `hi16` subregisters through v2s copies (PR #211848)   Guo Chen via llvm-commits
• [llvm] [AMDGPU][GFX13] Remove support for LDS atomic add f64 (PR #211922)   Matt Arsenault via llvm-commits
• [llvm] [TailDuplication] recalculate NoPhis after pass (PR #211913)   Matt Arsenault via llvm-commits
• [llvm] [TailDuplication] recalculate NoPhis after pass (PR #211913)   Florian Mayer via llvm-commits
• [clang] [llvm] [clang][Modules][serialization] Deduplicate source location entries across loaded modules (PR #209795)   Ayokunle Amodu via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   via llvm-commits
• [llvm] [TailDuplication] recalculate NoPhis after pass (PR #211913)   Matt Arsenault via llvm-commits
• [llvm] [flang-rt][cuda] Keep device-context cleanup probe from leaking a last-error (PR #211910)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [TailDuplication] recalculate NoPhis after pass (PR #211913)   Florian Mayer via llvm-commits
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• [llvm] [AMDGPU][True16] Retain `hi16` subregisters through v2s copies (PR #211848)   Guo Chen via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   via llvm-commits
• [llvm] [Reland][X86] Remove redundant `cmp` before `adc` after `lzcnt` or `tzcnt` (PR #210069)   via llvm-commits
• [clang] [llvm] [Offload] Split frontend CUDA/HIP language assumptions from backend device (PR #210121)   via llvm-commits
• [llvm] [BOLT] Stop materializing .dwo DIE vectors early in the pipeline (PR #207292)   Rafael Auler via llvm-commits
• [llvm] [HLSL] Add UsedByAtomic64 shader flag (PR #211691)   Joshua Batista via llvm-commits
• [llvm] a65c720 - [ProfileData] Split EagerSampleProfileNameTable by key type (NFC) (#211126)   via llvm-commits
• [llvm] [ProfileData] Split EagerSampleProfileNameTable by key type (NFC) (PR #211126)   Kazu Hirata via llvm-commits
• [llvm] [AMDGPU][NFC] Add SingleSGPRReadFromTuple feature and rename related functions (PR #211933)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU][NFC] Add SingleSGPRReadFromTuple feature and rename related functions (PR #211933)   via llvm-commits
• [llvm] [AMDGPU][NFC] Add SingleSGPRReadFromTuple feature and rename related functions (PR #211933)   via llvm-commits
• [llvm] [llvm][object][GOFF] refine Global flag conditions (PR #211632)   David Tenty via llvm-commits
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• [llvm] [BOLT] Release pseudo-probe decoder after emit (PR #211935)   Rafael Auler via llvm-commits
• [clang] [llvm] [AMDGPU] Add amdgcn builtin for s_prefetch_inst (PR #211642)   Gang Chen via llvm-commits
• [llvm] [BOLT] Release pseudo-probe decoder after emit (PR #211935)   via llvm-commits
• [llvm] [BOLT] Release pseudo-probe decoder after emit (PR #211935)   via llvm-commits
• [llvm] [AMDGPU][NFC] Add SingleSGPRReadFromTuple feature and rename related functions (PR #211933)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU][NFC] Add SingleSGPRReadFromTuple feature and rename related functions (PR #211933)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][NFC] Add SingleSGPRReadFromTuple feature and rename related functions (PR #211933)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Track async events for vm_vsrc simplifications (PR #211333)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Track async events for vm_vsrc simplifications (PR #211333)   Jeffrey Byrnes via llvm-commits
• [llvm] [LAA] Fix off-by-EltSize in negative-step deref bounds check (PR #211964)   via llvm-commits
• [llvm] [IPO] Remove IR Outliner (PR #211971)   Sam Elliott via llvm-commits
• [llvm] [IPO] Remove IR Outliner (PR #211971)   via llvm-commits
• [llvm] [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (PR #211970)   Mircea Trofin via llvm-commits
• [libc] [llvm] [libc][cpp::string] Allocate fewer temp strings in operator= and += (PR #210895)   Jackson Stogel via llvm-commits
• [llvm] [TableGen] Check for EOF in prepSkipRegion to avoid preprocessor crash. (PR #208961)   Kevin Bravo via llvm-commits
• [llvm] 571a1de - [LoopInfo] Store blocks using Euler tour representation (#211485)   via llvm-commits
• [llvm] [mlir] [LoopInfo] Store blocks using Euler tour representation (PR #211485)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Add performance-expensive-value-or check (PR #200166)   LLVM Continuous Integration via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Xiaoyang Gong via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Xiaoyang Gong via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Xiaoyang Gong via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] Modify call to Knownbits::computeForAddSub when second operand is known to be negative (PR #210954)   Giles Payne via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [llvm] [AMDGPU][NFC] Add SingleSGPRReadFromTuple feature and rename related functions (PR #211933)   Changpeng Fang via llvm-commits
• [llvm] [AMDGPU][NFC] Rename packed instruction helper functions for clarity (PR #211933)   Changpeng Fang via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Vitaly Buka via llvm-commits
• [llvm] [VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask) (PR #211530)   via llvm-commits
• [llvm] [X86] Fold UNPCKL sign extension idioms to SIGN_EXTEND_VECTOR_INREG (PR #211979)   via llvm-commits
• [llvm] [X86] Fold UNPCKL sign extension idioms to SIGN_EXTEND_VECTOR_INREG (PR #211979)   via llvm-commits
• [llvm] [X86] Fold UNPCKL sign extension idioms to SIGN_EXTEND_VECTOR_INREG (PR #211979)   via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Harrison Hao via llvm-commits
• [llvm] PPC750cl, and initial support for paired singles (PR #211463)   via llvm-commits
• [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Yanzuo Liu via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Luke Lau via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Xiaoyang Gong via llvm-commits
• [llvm] [AMDGPU][NFC] Rename packed instruction helper functions for clarity (PR #211933)   Changpeng Fang via llvm-commits
• [llvm] [DebugInfo] Treat tag offsets as non-emitting (PR #211969)   Eric Christopher via llvm-commits
• [llvm] [DebugInfo] Treat tag offsets as non-emitting (PR #211969)   Eric Christopher via llvm-commits
• [libc] [llvm] [libc][cpp::string] Allocate fewer temp strings in operator= and += (PR #210895)   Alexey Samsonov via llvm-commits
• [llvm] [llvm-strings] Use small buffer instead of reading whole file (PR #163073)   via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomic stores (PR #210672)   Harrison Hao via llvm-commits
• [compiler-rt] [llvm] Remove debug leftovers (PR #211068)   LLVM Continuous Integration via llvm-commits
• [llvm] PPC750cl, and initial support for paired singles (PR #211463)   Cynthia Coan via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [llvm] [AMDGPU][NFC] Rename packed instruction helper functions for clarity (PR #211933)   Changpeng Fang via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Pengcheng Wang via llvm-commits
• [llvm] [VectorCombine] Avoid re-queuing bitcast operands of regenerated binops (PR #211985)   via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [llvm] [VectorCombine] Avoid re-queuing bitcast operands of regenerated binops (PR #211985)   via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Luke Lau via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [llvm] [VectorCombine] Avoid re-queuing bitcast operands of regenerated binops (PR #211985)   via llvm-commits
• [llvm] [VectorCombine] Avoid re-queuing bitcast operands of regenerated binops (PR #211985)   via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Mark Zhuang via llvm-commits
• [llvm] [IR][NFC] Remove vtables from analysis passes (PR #211864)   Alexis Engelke via llvm-commits
• [llvm] [IR][NFC] Remove vtables from analysis passes (PR #211864)   Alexis Engelke via llvm-commits
• [llvm] [AArch64] Add a OPERAND_IMM_UINT1 operand type (PR #211986)   David Green via llvm-commits
• [llvm] 9881786 - [AArch64] Add a OPERAND_IMM_UINT1 operand type (#211986)   via llvm-commits
• [llvm] [AArch64] Add a OPERAND_IMM_UINT1 operand type (PR #211986)   David Green via llvm-commits
• [llvm] [mlir] [LoopInfo] Store blocks using Euler tour representation (PR #211485)   Fangrui Song via llvm-commits
• [llvm] [FileCheck] Add split view diff option for FileCheck (PR #189269)   Shivam Gupta via llvm-commits
• [llvm] [FileCheck] Add split view diff option for FileCheck (PR #189269)   Shivam Gupta via llvm-commits
• [llvm] [FileCheck] Add variable substitution for diff option (PR #189273)   Shivam Gupta via llvm-commits
• [llvm] [FileCheck] Add check-label support for diff option (PR #189359)   Shivam Gupta via llvm-commits
• [llvm] [FileCheck] Add check-not support for diff option (PR #189357)   Shivam Gupta via llvm-commits
• [llvm] 02fa1be - [Passes] Replace PassInfoMixin with {Optional,Required}PassInfoMixin   via llvm-commits
• [llvm] [Passes] Replace PassInfoMixin with {Optional,Required}PassInfoMixin (PR #211874)   Aiden Grossman via llvm-commits
• [llvm] workflows/llvm-abi-tests: Cache the baseline abi (PR #211968)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [ASan] Instrument ptrtoaddr as pointer difference (PR #211988)   Alexis Engelke via llvm-commits
• [llvm] [ASan] Instrument ptrtoaddr as pointer difference (PR #211988)   via llvm-commits
• [llvm] [ASan] Instrument ptrtoaddr as pointer difference (PR #211988)   via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [IROutliner] Do not outline non-uniform constants (PR #195450)   Arda Serdar Pektezol via llvm-commits
• [llvm] [IROutliner] Do not outline non-uniform constants (PR #195450)   Arda Serdar Pektezol via llvm-commits
• [llvm] 9184bb0 - [IR][NFC] Remove vtables from analysis passes (#211864)   via llvm-commits
• [llvm] [IR][NFC] Remove vtables from analysis passes (PR #211864)   Alexis Engelke via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Alexis Engelke via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   via llvm-commits
• [llvm] TableGen: Add first class support for processor aliases (PR #211775)   Matt Arsenault via llvm-commits
• [llvm] [IPO] Remove IR Outliner (PR #211971)   Arda Serdar Pektezol via llvm-commits
• [clang] [llvm] [RegAlloc] [X86] Enable callee saved register optimization for x86 (PR #188609)   via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Vitaly Buka via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Add `#pragma omp flatten` loop directive + `depth` clause (PR #206977)   Amit Tiwari via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Yingwei Zheng via llvm-commits
• [llvm] [Docs] Reland Furo theme for LLVM docs (PR #211993)   Anshul Nigham via llvm-commits
• [llvm] [Docs] Reland Furo theme for LLVM docs (PR #211993)   via llvm-commits
• [llvm] Revert "[VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask)" (PR #211994)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask)" (PR #211994)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask)" (PR #211994)   via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [Docs] Reland Furo theme for LLVM docs (PR #211993)   Anshul Nigham via llvm-commits
• [llvm] [ProfileData] Implement contains in SampleProfileNameTable (NFC) (PR #211995)   Kazu Hirata via llvm-commits
• [llvm] [ProfileData] Implement contains in SampleProfileNameTable (NFC) (PR #211995)   via llvm-commits
• [llvm] [SCEV] Fix MSan uninitialized value in createSCEV (PR #211996)   Vitaly Buka via llvm-commits
• [llvm] [SCEV] Fix MSan uninitialized value in createSCEV (PR #211996)   via llvm-commits
• [llvm] [SCEV] Fix MSan uninitialized value in createSCEV (PR #211996)   Vitaly Buka via llvm-commits
• [llvm] 43da8ef - Revert "[VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask)" (#211994)   via llvm-commits
• [llvm] Revert "[VectorCombine] Fold binop(shuffle(V1, Mask), shuffle(V2, Mask)) -> shuffle(binop(V1, V2), Mask)" (PR #211994)   Simon Pilgrim via llvm-commits
• [llvm] [SCEV] Fix MSan uninitialized value in createSCEV (PR #211996)   Florian Hahn via llvm-commits
• [llvm] f539edf - [LTO] Include debug options in legacy ThinLTO cache keys (#211474)   via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   Zhaoxuan Jiang via llvm-commits
• [llvm] [LTO] Include debug options in legacy ThinLTO cache keys (PR #211474)   via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Add `#pragma omp flatten` loop directive + `depth` clause (PR #206977)   via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] b9c05ca - [SCEV] Fix MSan uninitialized value in createSCEV (#211996)   via llvm-commits
• [llvm] [SCEV] Fix MSan uninitialized value in createSCEV (PR #211996)   Vitaly Buka via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Florian Hahn via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Alexis Engelke via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Alexis Engelke via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Alexis Engelke via llvm-commits
• [llvm] [DomTreeConstr][NFC] Resize NodeInfos once on construction (PR #211998)   Alexis Engelke via llvm-commits
• [llvm] [DomTreeConstr][NFC] Resize NodeInfos once on construction (PR #211998)   via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Yingwei Zheng via llvm-commits
• [llvm] [TailRecElim] Introduce support for shift accumulator optimization (PR #181331)   Federico Bruzzone via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Fold select from implied or condition (PR #199148)   via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Alexis Engelke via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] 2755ffc - [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (#211991)   via llvm-commits
• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Alexis Engelke via llvm-commits
• [llvm] ec157b6 - [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (#211315)   via llvm-commits
• [llvm] [VPlan] Widen masked unit-stride consecutive accesses in VPlan. (PR #211315)   Florian Hahn via llvm-commits
• [llvm] DAG: Stop legalizing poison to undef (PR #211890)   Luke Lau via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   Nathan Corbyn via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   Nathan Corbyn via llvm-commits
• [llvm] [VPlan] Peek through nested phi incoming values in computeBlendMasks (PR #203164)   Luke Lau via llvm-commits
• [llvm] [VPlan] Peek through nested phi incoming values in computeBlendMasks (PR #203164)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use control flow to implement MaskedCond and preserve SSA (PR #201784)   Luke Lau via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [clang] [compiler-rt] [libcxx] [Clang] Support atomic operations on _BitInt(N) (PR #204815)   via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `turnSwitchRangeIntoICmp` (PR #212006)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `turnSwitchRangeIntoICmp` (PR #212006)   via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] Emit constant initializers for addrspace(1) globals (PR #212007)   Max Desiatov via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] Emit constant initializers for addrspace(1) globals (PR #212007)   Max Desiatov via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] Emit constant initializers for addrspace(1) globals (PR #212007)   via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] Emit constant initializers for addrspace(1) globals (PR #212007)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [VectorCombine] Avoid re-queuing bitcast operands of regenerated binops (PR #211985)   via llvm-commits
• [llvm] [DomTreeConstr][NFC] Resize NodeInfos once on construction (PR #211998)   via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   Nathan Corbyn via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (PR #212008)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (PR #212008)   via llvm-commits
• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212009)   Nathan Corbyn via llvm-commits
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• [llvm] [InstCombine] Fold icmp ptrtoaddr x, ptrtoaddr y -> icmp x, y (PR #211991)   Nikita Popov via llvm-commits
• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212009)   via llvm-commits
• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212009)   via llvm-commits
• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212009)   via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `turnSwitchRangeIntoICmp` (PR #212006)   Nikita Popov via llvm-commits
• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212009)   via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (PR #212008)   Nikita Popov via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (PR #212008)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (PR #212008)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (PR #212008)   Yingwei Zheng via llvm-commits
• [llvm] 291e0a4 - [SimplifyCFG] Fix DomTree update in `turnSwitchRangeIntoICmp` (#212006)   via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `turnSwitchRangeIntoICmp` (PR #212006)   Yingwei Zheng via llvm-commits
• [llvm] [ConstantFolding] Fix llvm.is.fpclass folding of x87 pseudo-NaN (PR #212011)   Aayush Mainali via llvm-commits
• [llvm] [ConstantFolding] Fix llvm.is.fpclass folding of x87 pseudo-NaN (PR #212011)   via llvm-commits
• [llvm] [ConstantFolding] Fix llvm.is.fpclass folding of x87 pseudo-NaN (PR #212011)   via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   Yingwei Zheng via llvm-commits
• [llvm] [DomTreeConstr][NFC] Resize NodeInfos once on construction (PR #211998)   Alexis Engelke via llvm-commits
• [llvm] [ConstantFolding] Fix llvm.is.fpclass folding of x87 pseudo-NaN (PR #212011)   Yingwei Zheng via llvm-commits
• [llvm] [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (PR #211970)   Weibo He via llvm-commits
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• [llvm] [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (PR #211970)   Weibo He via llvm-commits
• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212012)   via llvm-commits
• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212012)   via llvm-commits
• [llvm] [ConstantFolding] Fix llvm.is.fpclass folding of x87 pseudo-NaN (PR #212011)   Aayush Mainali via llvm-commits
• [llvm] 0bf3638 - Revert "[MachO] Preserve weak linkage for aliases" (#212009)   via llvm-commits
• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212009)   Nathan Corbyn via llvm-commits
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• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212012)   Nathan Corbyn via llvm-commits
• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   Folkert de Vries via llvm-commits
• [llvm] [ConstantFolding] Fix llvm.is.fpclass folding of x87 pseudo-NaN (PR #212011)   Aayush Mainali via llvm-commits
• [llvm] [ConstantFolding] Fix llvm.is.fpclass folding of x87 pseudo-NaN (PR #212011)   Aayush Mainali via llvm-commits
• [llvm] [SimplfiyCFG] Deduplicate edges in `hoistSuccIdenticalTerminatorToSwitchOrIf` (PR #212017)   Yingwei Zheng via llvm-commits
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• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   Folkert de Vries via llvm-commits
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• [llvm] [MachO] Refine alias n_desc flag ownership (name flags from alias, not aliasee) (PR #212001)   via llvm-commits
• [llvm] [llvm-mca] Skip instrumentation pass when -disable-im is set (PR #211759)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Add FMIN/FMAX clustering (PR #210906)   Tomer Shafir via llvm-commits
• [llvm] [DomTreeConstr][NFC] Resize NodeInfos once on construction (PR #211998)   Jakub Kuderski via llvm-commits
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• [llvm] Revert "[MachO] Preserve weak linkage for aliases" (PR #212009)   LLVM Continuous Integration via llvm-commits
• [llvm] [SCEV] Use DenseMap for constant lookup, bypassing FoldingSet (NFC) (PR #212022)   Florian Hahn via llvm-commits
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• [llvm] [SCEV] Use DenseMap for constant lookup, bypassing FoldingSet (NFC) (PR #212022)   Nikita Popov via llvm-commits
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• [llvm] [DomTreeConstr][NFC] Resize NodeInfos once on construction (PR #211998)   Alexis Engelke via llvm-commits
• [llvm] a273377 - [DomTreeConstr][NFC] Resize NodeInfos once on construction (#211998)   via llvm-commits
• [llvm] [DomTreeConstr][NFC] Resize NodeInfos once on construction (PR #211998)   Alexis Engelke via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Fangrui Song via llvm-commits
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• [llvm] [VPlan][NFC] Number blocks (PR #212023)   Alexis Engelke via llvm-commits
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• [llvm] [VPlan][NFC] Number blocks (PR #212023)   Fangrui Song via llvm-commits
• [llvm] [VPlan][NFC] Number blocks (PR #212023)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Fangrui Song via llvm-commits
• [llvm] [SimplfiyCFG] Deduplicate edges in `hoistSuccIdenticalTerminatorToSwitchOrIf` (PR #212017)   via llvm-commits
• [lld] [llvm] [X86][ELF][LLD] Add R_X86_64_PCNEXT32 relocation and MO_PCNEXT32 flag for code prefetching. (PR #211903)   Fangrui Song via llvm-commits
• [llvm] 5f787ac - [SimplfiyCFG] Deduplicate edges in `hoistSuccIdenticalTerminatorToSwitchOrIf` (#212017)   via llvm-commits
• [llvm] [SimplfiyCFG] Deduplicate edges in `hoistSuccIdenticalTerminatorToSwitchOrIf` (PR #212017)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Fix assertion in combineBinOpOfExtractToReduceTree on type mismatch (PR #202201)   Tanmay Gulhane via llvm-commits
• [llvm] [RISCV] Fix assertion in combineBinOpOfExtractToReduceTree on type mismatch (PR #202201)   Tanmay Gulhane via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Alexis Engelke via llvm-commits
• [llvm] cb175d2 - [MC][NFC] Use EnumStrings for AtSpecifiers (#211827)   via llvm-commits
• [llvm] [MC][NFC] Use EnumStrings for AtSpecifiers (PR #211827)   Alexis Engelke via llvm-commits
• [llvm] [VPlan][NFC] Number blocks (PR #212023)   Florian Hahn via llvm-commits
• [llvm] [VPlan][NFC] Number blocks (PR #212023)   Florian Hahn via llvm-commits
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• [llvm] [VPlan][NFC] Number blocks (PR #212023)   Alexis Engelke via llvm-commits
• [llvm] [VPlan][NFC] Number blocks (PR #212023)   Alexis Engelke via llvm-commits
• [llvm] [VPlan][NFC] Extend comments of VPlan block numbers (PR #212025)   Alexis Engelke via llvm-commits
• [llvm] [VPlan][NFC] Extend comments of VPlan block numbers (PR #212025)   Alexis Engelke via llvm-commits
• [llvm] [VPlan][NFC] Extend comments of VPlan block numbers (PR #212025)   Alexis Engelke via llvm-commits
• [llvm] [DomTree] Remove support for unnumbered graphs (PR #212026)   Alexis Engelke via llvm-commits
• [llvm] [DomTree] Remove support for unnumbered graphs (PR #212026)   Alexis Engelke via llvm-commits
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• [llvm] [DomTree] Remove support for unnumbered graphs (PR #212026)   via llvm-commits
• [llvm] [DomTree] Remove support for unnumbered graphs (PR #212026)   Alexis Engelke via llvm-commits
• [llvm] [DomTree] Remove support for unnumbered graphs (PR #212026)   Alexis Engelke via llvm-commits
• [llvm] AMDGPU/GlobalISel: Use integer as MMO type for loads and stores lowering (PR #210096)   LLVM Continuous Integration via llvm-commits
• [llvm] [IPO] Remove IR Outliner (PR #211971)   Nikita Popov via llvm-commits
• [llvm] [IPO] Remove IR Outliner (PR #211971)   Nikita Popov via llvm-commits
• [llvm] 5bc304c - [VPlan][NFC] Extend comments of VPlan block numbers (#212025)   via llvm-commits
• [llvm] [VPlan][NFC] Extend comments of VPlan block numbers (PR #212025)   Alexis Engelke via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Nathaniel McCallum via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Nathaniel McCallum via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Nathaniel McCallum via llvm-commits
• [llvm] [LoopVectorize][X86] Improve libmvec SSE/AVX/AVX-512 test coverage (PR #211863)   Ankit Kumar Tiwari via llvm-commits
• [llvm] [X86] Avoid call-frame pushes when FI LEA needs stack alignment padding (PR #212029)   Aayush Mainali via llvm-commits
• [llvm] [X86] Avoid call-frame pushes when FI LEA needs stack alignment padding (PR #212029)   via llvm-commits
• [llvm] [X86] Avoid call-frame pushes when FI LEA needs stack alignment padding (PR #212029)   Aayush Mainali via llvm-commits
• [llvm] [X86] Avoid call-frame pushes when FI LEA needs stack alignment padding (PR #212029)   via llvm-commits
• [llvm] [MachineVerifier] do not use !NoPHI to check if a MF has phi nodes (PR #211941)   Rahul Joshi via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (PR #212030)   Yingwei Zheng via llvm-commits
• [llvm] [Docs] Update contribution guide to remove the single-commit requirement (PR #212031)   via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (PR #212030)   via llvm-commits
• [llvm] [SLP] Vectorize zero-tested OR/UMax reductions (PR #205473)   via llvm-commits
• [llvm] [Docs] Update contribution guide to remove the single-commit requirement (PR #212031)   Alexis Engelke via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (PR #212030)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (PR #212030)   Antonio Frighetto via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (PR #212030)   Antonio Frighetto via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   Folkert de Vries via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   via llvm-commits
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• [llvm] [AArch64] InsertSelect: Fold both diamond arms into chained CSEL family instructions (PR #212033)   Mugundan S via llvm-commits
• [llvm] [AArch64] InsertSelect: Fold both diamond arms into chained CSEL family instructions (PR #212033)   Mugundan S via llvm-commits
• [clang] [llvm] [RISCV][P-ext] Support Packed Multiply High (PR #211223)   Craig Topper via llvm-commits
• [llvm] [SimplifyCFG] Don't create new unreachable BB in `turnSwitchRangeIntoICmp` (PR #212035)   Yingwei Zheng via llvm-commits
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• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (PR #212030)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchDefaultBranch` (PR #212030)   Yingwei Zheng via llvm-commits
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• [llvm] [llvm-strings] Use small buffer instead of reading whole file (PR #163073)   via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Yaxun Liu via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Yaxun Liu via llvm-commits
• [clang] [llvm] [HIPSPV] Add in-tree SPIR-V backend support for chipStar (PR #206910)   Yaxun Liu via llvm-commits
• [llvm] [DomTree] Remove support for unnumbered graphs (PR #212026)   Jakub Kuderski via llvm-commits
• [llvm] [polly] [SCEV] Remove ptrtoint expression (NFC). (PR #212038)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Remove ptrtoint expression (NFC). (PR #212038)   via llvm-commits
• [llvm] [polly] [SCEV] Remove ptrtoint expression (NFC). (PR #212038)   via llvm-commits
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• [llvm] [SCEV] Store type of expression inline, compute up front (NFC). (PR #211891)   Florian Hahn via llvm-commits
• [llvm] [Analysis] Adding convert_from_arbitrary_fp support in computeKnownFPClass. (PR #208585)   Chirag Patel via llvm-commits
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• [llvm] [polly] [SCEV] Remove ptrtoint expression (NFC). (PR #212038)   Nikita Popov via llvm-commits
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• [llvm] [SimplifyCFG] Don't create new unreachable BB in `turnSwitchRangeIntoICmp` (PR #212035)   Antonio Frighetto via llvm-commits
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• [llvm] [SimplifyCFG] Don't create new unreachable BB in `turnSwitchRangeIntoICmp` (PR #212035)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Don't create new unreachable BB in `turnSwitchRangeIntoICmp` (PR #212035)   Yingwei Zheng via llvm-commits
• [llvm] [SimplifyCFG] Don't create new unreachable BB in `turnSwitchRangeIntoICmp` (PR #212035)   Yingwei Zheng via llvm-commits
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• [llvm] [SimplifyCFG] Preserve !prof when hoisting/merging terminators and in… (PR #212043)   Mircea Trofin via llvm-commits
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• [llvm] [SimplifyCFG] Preserve !prof when hoisting/merging terminators and in… (PR #212043)   Mircea Trofin via llvm-commits
• [llvm] [SimplifyCFG] Preserve !prof when hoisting/merging terminators and in… (PR #212043)   Mircea Trofin via llvm-commits
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• [llvm] [llubi] Add support for byte types (PR #200672)   Ralf Jung via llvm-commits
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• [llvm] workflows/release-binaries: Add missing action to checkout (PR #211720)   Tom Stellard via llvm-commits
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• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   Folkert de Vries via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Craig Topper via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   Folkert de Vries via llvm-commits
• [llvm] [llvm][TableGen] Allow physical registers in patterns for GlobalISel emitter (PR #113127)   via llvm-commits
• [llvm] [RISCV] Deduplicate frame base address materializations for large stack frames (PR #211748)   Craig Topper via llvm-commits
• [llvm] [Xtensa] Add fp16 conversion support (PR #208206)   via llvm-commits
• [llvm] [RISCV] Deduplicate frame base address materializations for large stack frames (PR #211748)   Craig Topper via llvm-commits
• [llvm] [RISCV] Deduplicate frame base address materializations for large stack frames (PR #211748)   Craig Topper via llvm-commits
• [llvm] [RISCV] Deduplicate frame base address materializations for large stack frames (PR #211748)   Craig Topper via llvm-commits
• [llvm] [MachO] Preserve weak linkage for aliases (PR #198148)   Folkert de Vries via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Fangrui Song via llvm-commits
• [llvm] workflows/release-binaries: Always dump Wix log on Windows (PR #212056)   Tom Stellard via llvm-commits
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• [llvm] workflows: Add missing checkouts when using validate-release-version (PR #210471)   Tom Stellard via llvm-commits
• [llvm] workflows: Add missing checkouts when using validate-release-version (PR #210471)   via llvm-commits
• [llvm] [LAA] Fix off-by-EltSize in negative-step deref bounds check (PR #211964)   Aleksandr Popov via llvm-commits
• [llvm] [CodeGenPrepare] Fix BranchProbabilityInfo becoming out of date (PR #212058)   via llvm-commits
• [llvm] [CodeGenPrepare] Fix BranchProbabilityInfo becoming out of date (PR #212058)   via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Fangrui Song via llvm-commits
• [llvm] [CodeGenPrepare] Fix BranchProbabilityInfo becoming out of date (PR #212058)   via llvm-commits
• [llvm] [VectorCombine] Add builder-created instructions to the worklist (PR #212059)   Mingfei Guo via llvm-commits
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• [llvm] [CodeGenPrepare] Fix BranchProbabilityInfo becoming out of date (PR #212058)   via llvm-commits
• [llvm] [CodeGenPrepare] Fix BranchProbabilityInfo becoming out of date (PR #212058)   via llvm-commits
• [llvm] [BOLT] Fix strict mode bug in removal of block referenced by JT (PR #211940)   YongKang Zhu via llvm-commits
• [llvm] [VPlan] Add VPRegionBlock::getEntryBranchOnMask helper (NFC) (PR #212060)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add VPRegionBlock::getEntryBranchOnMask helper (NFC) (PR #212060)   Florian Hahn via llvm-commits
• [llvm] 353729b - [AMDGPU] Avoid quadratic erase in SIInstrWorklist (#211801)   via llvm-commits
• [llvm] [AMDGPU] Avoid quadratic erase in SIInstrWorklist (PR #211801)   Arseniy Obolenskiy via llvm-commits
• [llvm] [premerge] Route macOS build through a monolithic script to enable Job Summary (PR #211565)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LAA] Fix off-by-EltSize in negative-step deref bounds check (PR #211964)   via llvm-commits
• [llvm] [VectorCombine] Compact shuffle operands by eliminating unused elements (PR #176074)   Philip Ginsbach-Chen via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Fangrui Song via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   Henry Jiang via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   Henry Jiang via llvm-commits
• [llvm] [LV] Extract fixupHeaderPhiBackedges from VPlan::execute (NFC) (PR #212063)   Florian Hahn via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   Henry Jiang via llvm-commits
• [llvm] [LV] Extract fixupHeaderPhiBackedges from VPlan::execute (NFC) (PR #212063)   Florian Hahn via llvm-commits
• [llvm] 96a8547 - [VPlan] Add VPRegionBlock::getEntryBranchOnMask helper (NFC) (#212060)   via llvm-commits
• [llvm] [VPlan] Add VPRegionBlock::getEntryBranchOnMask helper (NFC) (PR #212060)   Florian Hahn via llvm-commits
• [llvm] [X86] Fix redundant zeroing operations when casting ints to FP vectors (PR #212065)   via llvm-commits
• [llvm] [X86] Fix redundant zeroing operations when casting ints to FP vectors (PR #212065)   via llvm-commits
• [clang] [llvm] [LLVM] Respect `optnone` in `promote-args` and `deadargelim` (PR #211804)   Nikita Popov via llvm-commits
• [llvm] [VectorCombine] Compact shuffle operands by eliminating unused elements (PR #176074)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Compact shuffle operands by eliminating unused elements (PR #176074)   Yingwei Zheng via llvm-commits
• [llvm] [X86] Fix redundant zeroing operations when casting ints to FP vectors (PR #212065)   via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Fangrui Song via llvm-commits
• [llvm] 0a7d5c7 - [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (#212062)   via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   Henry Jiang via llvm-commits
• [llvm] DAG: Use poison in getLoad/getStore for offsets (PR #212066)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use poison in getLoad/getStore for offsets (PR #212066)   Matt Arsenault via llvm-commits
• [llvm] a8a36f1 - [LV] Extract fixupHeaderPhiBackedges from VPlan::execute (NFC) (#212063)   via llvm-commits
• [llvm] [LV] Extract fixupHeaderPhiBackedges from VPlan::execute (NFC) (PR #212063)   Florian Hahn via llvm-commits
• [llvm] DAG: Use poison in getLoad/getStore for offsets (PR #212066)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use poison in getLoad/getStore for offsets (PR #212066)   Matt Arsenault via llvm-commits
• [llvm] DAG: Use poison in getLoad/getStore for offsets (PR #212066)   Matt Arsenault via llvm-commits
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• [llvm] DAG: Use poison for some load/store offsets in legalizer (PR #167756)   Matt Arsenault via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] Compact shuffle operands by eliminating unused elements (PR #176074)   Philip Ginsbach-Chen via llvm-commits
• [llvm] [ARM] Fix chkstk definition (PR #210940)   Martin Storsjö via llvm-commits
• [llvm] [ARM] Fix chkstk definition (PR #210940)   Martin Storsjö via llvm-commits
• [llvm] [ARM] Fix chkstk definition (PR #210940)   Martin Storsjö via llvm-commits
• [llvm] [AMDGPU] Use alias analysis for SMEM/VMEM WAR waitcnts (PR #206569)   Kevin Choi via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix redundant zeroing operations when casting ints to FP vectors (PR #212065)   via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Fangrui Song via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Lucas Chollet via llvm-commits
• [llvm] [Support] Join threads when stopping ThreadPoolExecutor (PR #166054)   Martin Storsjö via llvm-commits
• [llvm] [ARM] Fix chkstk definition (PR #210940)   via llvm-commits
• [clang] [llvm] [docs] Remove release notes for backported changes (PR #212069)   Martin Storsjö via llvm-commits
• [lld] [lld][docs] Document /DRIVER support (PR #211311)   Martin Storsjö via llvm-commits
• [llvm] [AMDGPU] Use alias analysis for SMEM/VMEM WAR waitcnts (PR #206569)   Kevin Choi via llvm-commits
• [lld] [lld][docs] Document /DRIVER support (PR #211311)   Tyler Gibbs via llvm-commits
• [llvm] [LV] Extract fixupHeaderPhiBackedges from VPlan::execute (NFC) (PR #212063)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Use alias analysis for SMEM/VMEM WAR waitcnts (PR #206569)   Kevin Choi via llvm-commits
• [llvm] [Support] Join threads when stopping ThreadPoolExecutor (PR #166054)   Mateusz Mikuła via llvm-commits
• [clang] [llvm] [AMDGPU] Add amdgcn builtin for s_prefetch_inst (PR #211642)   Gang Chen via llvm-commits
• [llvm] DAG: Use poison in getLoad/getStore for offsets (PR #212066)   via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   Fangrui Song via llvm-commits
• [llvm] [NVPTX] Emit some more PTX directives through target streamer (PR #212070)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Emit some more PTX directives through target streamer (PR #212070)   via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   Fangrui Song via llvm-commits
• [llvm] [VectorCombine] Compact shuffle operands by eliminating unused elements (PR #176074)   Philip Ginsbach-Chen via llvm-commits
• [lld] [ELF] Replace getAArch64ThunkDestVA with Thunk::getDestVA. NFC (PR #212071)   Fangrui Song via llvm-commits
• [lld] 40f8720 - [ELF] Replace getAArch64ThunkDestVA with Thunk::getDestVA. NFC (#212071)   via llvm-commits
• [lld] [ELF] Replace getAArch64ThunkDestVA with Thunk::getDestVA. NFC (PR #212071)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix redundant zeroing operations when casting ints to FP vectors (PR #212065)   via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   Fangrui Song via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   Fangrui Song via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   Fangrui Song via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   Fangrui Song via llvm-commits
• [lld] [ELF] Add -z sort-thunks to sort thunks by destination (PR #211721)   Fangrui Song via llvm-commits
• [lld] [lld] Don't drop RELR relocations for late-added GOT entries (PR #211911)   Fangrui Song via llvm-commits
• [lld] [lld] Don't drop RELR relocations for late-added GOT entries (PR #211911)   Fangrui Song via llvm-commits
• [lld] [lld] Don't drop RELR relocations for late-added GOT entries (PR #211911)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   via llvm-commits
• [llvm] [InstCombine] Fold zext(icmp ne X, C) to X - C when X is in (C, C+1) (PR #208914)   via llvm-commits
• [lld] [ELF] Retain .got for revertible no-PIC GOTPCRELX optimization (PR #212077)   Fangrui Song via llvm-commits
• [lld] dc26bf5 - [ELF] Retain .got for revertible no-PIC GOTPCRELX optimization (#212077)   via llvm-commits
• [lld] [ELF] Retain .got for revertible no-PIC GOTPCRELX optimization (PR #212077)   Fangrui Song via llvm-commits
• [lld] [lld] Don't drop RELR relocations for late-added GOT entries (PR #211911)   Fangrui Song via llvm-commits
• [lld] [ELF] Retain .rela.dyn for PPC64 PI long-branch thunks (PR #212078)   Fangrui Song via llvm-commits
• [lld] [ELF] Retain .rela.dyn for PPC64 PI long-branch thunks (PR #212078)   via llvm-commits
• [lld] [ELF] Retain .rela.dyn for PPC64 PI long-branch thunks (PR #212078)   via llvm-commits
• [llvm] [Github] Add myself and lforg37 as mlir wasmssa codeowners (PR #212079)   Ferdinand Lemaire via llvm-commits
• [llvm] [Github] Add myself and lforg37 as mlir wasmssa codeowners (PR #212079)   Ferdinand Lemaire via llvm-commits
• [llvm] [Bazel] Fixes abd6e74 (PR #212081)   via llvm-commits
• [llvm] [Github] Add myself and lforg37 as mlir wasmssa codeowners (PR #212079)   Ferdinand Lemaire via llvm-commits
• [lld] [ELF] Retain .rela.dyn for PPC64 PI long-branch thunks (PR #212078)   Fangrui Song via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   Douglas Yung via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   Douglas Yung via llvm-commits
• [llvm] [RISCV] computeKnownBits - add support for RISCVISD::VECREDUCE_ADD_VL (PR #210493)   Sabona Abdi via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   via llvm-commits
• [lld] [llvm] [X86][ELF][LLD] Add R_X86_64_PCNEXT32 relocation and MO_PCNEXT32 flag for code prefetching. (PR #211903)   Fangrui Song via llvm-commits
• [llvm] [LLVM] Remove 'LLVM_LIBC_GPU_BUILD' logic (PR #211265)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #189231)   Shivam Gupta via llvm-commits
• [llvm] [Utils] Add a python tool for test coverage of patches (PR #191721)   Shivam Gupta via llvm-commits
• [llvm] [Hexagon] Fix missing requires assert for swp-epilog-phi12.mir (PR #212062)   Ikhlas Ajbar via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fold trivial uniform G_AMDGPU_READANYLANE (PR #210449)   Anshil Gandhi via llvm-commits
• [lld] [llvm] [X86][ELF][LLD] Add R_X86_64_PCNEXT32 relocation and MO_PCNEXT32 flag for code prefetching. (PR #211903)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Eliminate READANYLANE round trips in mixed build_vector/merge (PR #210449)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Eliminate READANYLANE round trips in mixed build_vector/merge (PR #210449)   Anshil Gandhi via llvm-commits
• [llvm] [X86] Don't clobber x87 return values when zeroing call-used registers (PR #211129)   Phoebe Wang via llvm-commits
• [llvm] workflows/libclang-abi-tests: Fix missing environment variable (PR #211959)   Douglas Yung via llvm-commits
• [llvm] [X86] Add pass to coalesce redundant vector constant materializations (PR #211619)   Phoebe Wang via llvm-commits
• [llvm] [X86] Add pass to coalesce redundant vector constant materializations (PR #211619)   Phoebe Wang via llvm-commits
• [llvm] docs: Adjust HowToReleaseLLVM to include man page signing (PR #210092)   Douglas Yung via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Eliminate READANYLANE round trips in mixed build_vector/merge (PR #210449)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Eliminate READANYLANE round trips in mixed build_vector/merge (PR #210449)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Rebuild mixed-source merges in VGPR for readanylane (PR #211644)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Rebuild mixed-source merges in VGPR for readanylane (PR #211644)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Eliminate READANYLANE round trips in mixed build_vector/merge (PR #210449)   Anshil Gandhi via llvm-commits
• [llvm] workflows/relase-tasks: Fix variable name typo (PR #211732)   Douglas Yung via llvm-commits
• [llvm] [VectorCombine] Recognize reduction chains with equivalent bitcast sources (PR #212084)   via llvm-commits
• [llvm] [VectorCombine] Recognize reduction chains with equivalent bitcast sources (PR #212084)   via llvm-commits
• [llvm] workflows/release-documentation: Fix variable name typo (PR #211729)   Douglas Yung via llvm-commits
• [llvm] [LAA][NFC] Factor out MemoryDepChecker::isStoreLoadForwardingConflict (PR #212085)   via llvm-commits
• [llvm] [LAA][NFC] Factor out MemoryDepChecker::isStoreLoadForwardingConflict (PR #212085)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [SLP] Bail out on store-to-load forwarding hazards (PR #199606)   via llvm-commits
• [llvm] [LoongArch] Simplify addReloc relocation handling. NFC (PR #211755)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [InstCombine] Fold (X ^ (or disjoint Y, C1)) ^ C2 to (X ^ Y) ^ (C1 ^ C2) (PR #191638)   via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] workflows/release-documentation: Fix variable name typo (PR #211729)   Tom Stellard via llvm-commits
• [llvm] workflows/release-documentation: Fix variable name typo (PR #211729)   Tom Stellard via llvm-commits
• [llvm] [MachineCSE] Enhance MachineCSE simple PRE to find common subexpressi… (PR #129860)   via llvm-commits
• [llvm] workflows/release-documentation: Fix variable name typo (PR #211729)   via llvm-commits
• [llvm] workflows/relase-tasks: Fix variable name typo (PR #211732)   Tom Stellard via llvm-commits
• [llvm] workflows/relase-tasks: Fix variable name typo (PR #211732)   Tom Stellard via llvm-commits
• [llvm] [AArch64] InsertSelect: Fold both diamond arms into chained CSEL family instructions (PR #212033)   Mugundan S via llvm-commits
• [llvm] workflows/relase-tasks: Fix variable name typo (PR #211732)   via llvm-commits
• [llvm] workflows/libclang-abi-tests: Fix missing environment variable (PR #211959)   Tom Stellard via llvm-commits
• [llvm] workflows/libclang-abi-tests: Fix missing environment variable (PR #211959)   Tom Stellard via llvm-commits
• [llvm] workflows/libclang-abi-tests: Fix missing environment variable (PR #211959)   via llvm-commits
• [llvm] [polly] [SCEV] Remove ptrtoint expression (NFC). (PR #212038)   Alexander Richardson via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zilx extension (PR #209419)   Alexander Richardson via llvm-commits
• [llvm] [X86] Remove TuningFastSHLDRotate from X86_64V3Tuning and X86_64V4Tuning (PR #211217)   via llvm-commits
• [llvm] workflows/release-binaries: Add missing action to checkout (PR #211720)   Aiden Grossman via llvm-commits
• [llvm] [X86] Remove TuningFastSHLDRotate from X86_64V3Tuning and X86_64V4Tuning (PR #211217)   via llvm-commits
• [llvm] 6cdc7bd - [AArch64] Add CAS instructions to NeoverseN2 schedule model (#211195)   via llvm-commits
• [llvm] [AArch64] Add CAS instructions to NeoverseN2 schedule model (PR #211195)   Andrew Savonichev via llvm-commits
• [llvm] [AArch64] InsertSelect: Fold both diamond arms into chained CSEL family instructions (PR #212033)   via llvm-commits
• [clang] [compiler-rt] [libcxx] [Clang] Support atomic operations on _BitInt(N) (PR #204815)   Xavier Roche via llvm-commits
• [llvm] [RISC-V] Use an optional offset operand instead of zero-offset InstAliases (PR #210901)   Alexander Richardson via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   Yingwei Zheng via llvm-commits
• [llvm] [X86] Lower vector integer division and remainder through float division (PR #205263)   via llvm-commits
• [llvm] [llubi] Initial support for vector predication intrinsics (PR #212093)   Zhige Chen via llvm-commits
• [llvm] [SLP] Vectorize zero-tested OR/UMax reductions (PR #205473)   via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] [AArch64] Add CAS instructions to NeoverseN2 schedule model (PR #211195)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Remove unused GPR32arg register class (NFC) (PR #211778)   Benjamin Maxwell via llvm-commits
• [llvm] [llubi] Initial support for vector predication intrinsics (PR #212093)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Initial support for vector predication intrinsics (PR #212093)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Initial support for vector predication intrinsics (PR #212093)   Yingwei Zheng via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Alexis Engelke via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Alexis Engelke via llvm-commits
• [llvm] 5d582e4 - [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (#212000)   via llvm-commits
• [llvm] [LoopInfo] Identify loops with a single-pass DFS algorithm. NFC (PR #212000)   Fangrui Song via llvm-commits
• [llvm] [Bazel] Fixes abd6e74 (PR #212081)   Benjamin Kramer via llvm-commits
• [llvm] [Bazel] Fixes abd6e74 (PR #212081)   Benjamin Kramer via llvm-commits
• [llvm] [IR] Remove deprecated BranchInst (PR #212095)   Alexis Engelke via llvm-commits
• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   Karim Alweheshy via llvm-commits
• [llvm] [IR] Remove deprecated BranchInst (PR #212095)   via llvm-commits
• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   via llvm-commits
• [llvm] [AMDGPU][GISel] Remove redundant AND on scalar shift amounts (PR #212097)   Anshil Gandhi via llvm-commits
• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   Karim Alweheshy via llvm-commits
• [llvm] [AMDGPU][GISel] Remove redundant AND on scalar shift amounts (PR #212097)   via llvm-commits
• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   via llvm-commits
• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   via llvm-commits
• [llvm] [LoopInfo] Build dominator tree only for irreducible CFG (PR #212098)   Fangrui Song via llvm-commits
• [llvm] [LoopInfo] Build dominator tree only for irreducible CFG (PR #212098)   via llvm-commits
• [llvm] [AArch64] Replace some used of SDValue.getNode()-> with direct accesses. NFC (PR #212099)   David Green via llvm-commits
• [llvm] 75dff4f - [AArch64] Replace some used of SDValue.getNode()-> with direct accesses. NFC (#212099)   via llvm-commits
• [llvm] [AArch64] Replace some used of SDValue.getNode()-> with direct accesses. NFC (PR #212099)   David Green via llvm-commits
• [clang] [llvm] [docs] Remove release notes for backported changes (PR #212069)   Daniel Kiss via llvm-commits
• [llvm] [InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (PR #212101)   Alexis Engelke via llvm-commits
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• [llvm] DAG: Canonicalize undef shuffle operands and results to poison (PR #212102)   Matt Arsenault via llvm-commits
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• [llvm] [LoopInfo] Build dominator tree only for irreducible CFG (PR #212098)   Alexis Engelke via llvm-commits
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• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   Karim Alweheshy via llvm-commits
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• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   Karim Alweheshy via llvm-commits
• [llvm] [AArch64] Lower bitcast of wide <N x i1> masks without a stack spill in more cases (PR #203420)   Joe Isaacs via llvm-commits
• [llvm] [SCEV] Store type of expression inline, compute up front (NFC). (PR #211891)   Florian Hahn via llvm-commits
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• [llvm] [SCEV] Store type of expression inline, compute up front (NFC). (PR #211891)   Florian Hahn via llvm-commits
• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   Karim Alweheshy via llvm-commits
• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   Karim Alweheshy via llvm-commits
• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Jonas Paulsson via llvm-commits
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• [llvm] [AArch64] Replace some used of SDValue.getNode()-> with direct accesses. NFC (PR #212099)   LLVM Continuous Integration via llvm-commits
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• [llvm] [InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (PR #212101)   Alexis Engelke via llvm-commits
• [llvm] [InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (PR #212101)   Alexis Engelke via llvm-commits
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• [clang] [llvm] [docs] Remove release notes for backported changes (PR #212069)   LLVM Continuous Integration via llvm-commits
• [llvm] f5652b9 - [SCEV] Store type of expression inline, compute up front (NFC). (#211891)   via llvm-commits
• [llvm] [SCEV] Store type of expression inline, compute up front (NFC). (PR #211891)   Florian Hahn via llvm-commits
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• [llvm] [Support] Join threads when stopping ThreadPoolExecutor (PR #166054)   Martin Storsjö via llvm-commits
• [llvm] Reapply "[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC)." (#209003) (PR #211763)   Florian Hahn via llvm-commits
• [clang-tools-extra] [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Balázs Benics via llvm-commits
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• [llvm] [AArch64][MacroFusion] Add per cluster kind statistic (PR #212103)   Nathan Corbyn via llvm-commits
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• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Jonas Paulsson via llvm-commits
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• [llvm] [SystemZ] Improve handling of memmoves. (PR #196285)   Jonas Paulsson via llvm-commits
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• [llvm] [X86] Fix redundant zeroing operations when casting ints to FP vectors (PR #212065)   via llvm-commits
• [lld] [lld][MachO] Add initializers to temporal BP startup sorting (PR #212110)   Karim Alweheshy via llvm-commits
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• [llvm] [llvm][release] Build openmp as runtime in test-release.sh (PR #212111)   Rainer Orth via llvm-commits
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• [llvm] Cpu features cross platform (PR #205447)   Jared Wyles via llvm-commits
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• [llvm] [llvm][release] Build openmp as runtime in test-release.sh (PR #212111)   Rainer Orth via llvm-commits
• [llvm] [AArch64] InsertSelect: Fold both diamond arms into chained CSEL family instructions (PR #212033)   Mugundan S via llvm-commits
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• [llvm] [llubi] Add support for byte types (PR #200672)   Pedro Lobo via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Pedro Lobo via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Pedro Lobo via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Pedro Lobo via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Pedro Lobo via llvm-commits
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• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Ralf Jung via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Ralf Jung via llvm-commits
• [llvm] [llubi] Always use the specified align in memory allocation (PR #212049)   Ralf Jung via llvm-commits
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• [llvm] [SimplifyCFG] Don't create new unreachable BB in `turnSwitchRangeIntoICmp` (PR #212035)   Yingwei Zheng via llvm-commits
• [llvm] [CycleInfo] Store entries in the block layout. NFC (PR #210866)   LLVM Continuous Integration via llvm-commits
• [llvm] [CycleInfo] Store entries in the block layout. NFC (PR #210866)   LLVM Continuous Integration via llvm-commits
• [llvm] [CycleInfo] Store entries in the block layout. NFC (PR #210866)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][cpp::string] Allocate fewer temp strings in operator= and += (PR #210895)   Jackson Stogel via llvm-commits
• [llvm] 28c8e89 - [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (#211795)   via llvm-commits
• [clang-tools-extra] [llvm] [llvm][ADT] Mark llvm::IntrusiveRefCntPtr with the warn_unused attribute (PR #211795)   Balázs Benics via llvm-commits
• [llvm] [X86] Reapply #210739 with a fix (PR #212020)   Nikita Taranov via llvm-commits
• [libc] [llvm] [libc][cpp::string] Allocate fewer temp strings in operator= and += (PR #210895)   Jackson Stogel via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pankaj Gode via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pankaj Gode via llvm-commits
• [llvm] [InstSimplify] Fold trunc to constant when all result bits are known (PR #212123)   Timur Golubovich via llvm-commits
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• [llvm] [InstSimplify] Fold trunc to constant when all result bits are known (PR #212123)   Nikita Popov via llvm-commits
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• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [lld] [lld] Report temporal BP profile resolution (PR #212127)   Karim Alweheshy via llvm-commits
• [lld] [lld] Report temporal BP profile resolution (PR #212127)   Karim Alweheshy via llvm-commits
• [lld] [lld] Report temporal BP profile resolution (PR #212127)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Split DEFAULT into DEFAULT(dsa) and DEFAULT(variant) (PR #212128)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [flang][OpenMP] Split DEFAULT into DEFAULT(dsa) and DEFAULT(variant) (PR #212128)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Split DEFAULT into DEFAULT(dsa) and DEFAULT(variant) (PR #212128)   via llvm-commits
• [llvm] [IR] Remove deprecated BranchInst (PR #212095)   Nikita Popov via llvm-commits
• [flang] [llvm] [flang][OpenMP] Split DEFAULT into DEFAULT(dsa) and DEFAULT(variant) (PR #212128)   via llvm-commits
• [llvm] Reapply "[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC)." (#209003) (PR #211763)   Florian Hahn via llvm-commits
• [flang] [llvm] [flang][OpenMP] Split DEFAULT into DEFAULT(dsa) and DEFAULT(variant) (PR #212128)   Krzysztof Parzyszek via llvm-commits
• [llvm] [RISCV] Add baseline unit tests for ABI inference (PR #212129)   Alexander Richardson via llvm-commits
• [llvm] [RISCV] Add baseline unit tests for ABI inference (PR #212129)   via llvm-commits
• [llvm] [RISCV] Add baseline unit tests for ABI inference (PR #212129)   via llvm-commits
• [llvm] [X86] Reapply #210739 with a fix (PR #212020)   Nikita Taranov via llvm-commits
• [llvm] [X86] Reapply #210739 with a fix (PR #212020)   via llvm-commits
• [llvm] [ConstraintElim] Re-organize tests with decomposition failures (NFC). (PR #212130)   Florian Hahn via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [X86] Remove TuningFastSHLDRotate from BMI2 targets (PR #211217)   Simon Pilgrim via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [LoopVectorize][X86] Improve libmvec SSE/AVX/AVX-512 test coverage (PR #211863)   Simon Pilgrim via llvm-commits
• [llvm] [LoopVectorize][X86] Improve libmvec SSE/AVX/AVX-512 test coverage (PR #211863)   Simon Pilgrim via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Antonio Frighetto via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add support for byte types (PR #200672)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] foldShuffleChainsToReduce - add fmaximum/fminimum handling (PR #200818)   Simon Pilgrim via llvm-commits
• [llvm] [IR] Add nofreeobj parameter/return attribute (PR #206445)   Antonio Frighetto via llvm-commits
• [llvm] [X86] Fix invalid codegen when passing f80 arguments in __vectorcall (PR #203913)   via llvm-commits
• [llvm] [InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (PR #212101)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (PR #212101)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (PR #212101)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (PR #212101)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Handle icmp+ptrtoint/addr folds for non-int ptrs (PR #212101)   Yingwei Zheng via llvm-commits
• [llvm] [Support][IR] Modernize map insertions using try_emplace (PR #204977)   via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] Fold (select_cc (select cond, x, y), x, a, b, eq) to (select cond, a, b) (PR #199688)   via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] Fold (select_cc (select cond, x, y), x, a, b, eq) to (select cond, a, b) (PR #199688)   via llvm-commits
• [llvm] [SimplifyCFG] Preserve !prof when hoisting/merging terminators and in… (PR #212043)   via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [InstCombine] Fold select (A & Shift == 0 | B & Shift == 0), 0, Shift to Shift & A & B (PR #212132)   Shengxin Pei via llvm-commits
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• [llvm] [InstCombine] Fold select (A & Shift == 0 | B & Shift == 0), 0, Shift to Shift & A & B (PR #212132)   via llvm-commits
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• [llvm] [X86] Fix redundant zeroing operations when casting ints to FP vectors (PR #212065)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix redundant zeroing operations when casting ints to FP vectors (PR #212065)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fix redundant zeroing operations when casting ints to FP vectors (PR #212065)   Simon Pilgrim via llvm-commits
• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (PR #212008)   Nikita Popov via llvm-commits
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• [llvm] [SimplifyCFG] Fix DomTree update in `simplifySwitchWhenUMin` (PR #212008)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Declare TLSDESC clobbers for vector registers and CSRs per psABI (PR #205027)   via llvm-commits
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• [llvm] 14304ef - [IR] Remove deprecated BranchInst (#212095)   via llvm-commits
• [llvm] [IR] Remove deprecated BranchInst (PR #212095)   Alexis Engelke via llvm-commits
• [llvm] Fold (select_cc (select cond, x, y), x, a, b, eq) to (select cond, a, b) (PR #199688)   via llvm-commits
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• [llvm] Revert "gn build: Support building debug binaries from a release build directory." (PR #211294)   Nico Weber via llvm-commits
• [llvm] [CVP] Refine results of getConstantRangeAtUse for single users. (PR #211668)   Florian Hahn via llvm-commits
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• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [RISCV] computeKnownBits - add support for RISCVISD::VECREDUCE_ADD_VL (PR #210493)   Craig Topper via llvm-commits
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• [llvm] [DA] Rewrite Banerjee MIV test with SCEV-based interval arithmetic (PR #207662)   Ruoyu Qiu via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   via llvm-commits
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• [llvm] Reapply "[VPlan] Re-use VPSlotTracker when printing recipes for costs (NFC)." (#209003) (PR #211763)   Florian Hahn via llvm-commits
• [llvm] [mlir] [LoopInfo] Build dominator tree only for irreducible CFG (PR #212098)   Fangrui Song via llvm-commits
• [llvm] [polly] [SCEV] Remove ptrtoint expression (NFC). (PR #212038)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Align shrinkLoadForShuffles to register boundaries (PR #209775)   Timur Golubovich via llvm-commits
• [llvm] [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (PR #211970)   Jin Huang via llvm-commits
• [llvm] [RISCV] Declare TLSDESC clobbers for vector registers and CSRs per psABI (PR #205027)   Jessica Clarke via llvm-commits
• [lld] [lld] Report temporal BP profile resolution (PR #212127)   Karim Alweheshy via llvm-commits
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• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   Fangrui Song via llvm-commits
• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   via llvm-commits
• [llvm] [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (PR #211970)   Jin Huang via llvm-commits
• [llvm] [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (PR #211970)   Jin Huang via llvm-commits
• [llvm] [SimplifyCFG] Preserve !prof when hoisting/merging terminators and in… (PR #212043)   Mircea Trofin via llvm-commits
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• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [llvm] 814a883 - [SCEV] Remove ptrtoint expression (NFC). (#212038)   via llvm-commits
• [llvm] [polly] [SCEV] Remove ptrtoint expression (NFC). (PR #212038)   Florian Hahn via llvm-commits
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• [llvm] [polly] [SCEV] Remove ptrtoint expression (NFC). (PR #212038)   LLVM Continuous Integration via llvm-commits
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• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [llvm] [Inline] Promote bounded statically known indirect calls (PR #212148)   Kevin Choi via llvm-commits
• [llvm] [SCEV] Avoid building throwaway nodes in SCEVURem_match (NFC) (PR #212149)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Avoid building throwaway nodes in SCEVURem_match (NFC) (PR #212149)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Avoid building throwaway nodes in SCEVURem_match (NFC) (PR #212149)   Nikita Popov via llvm-commits
• [compiler-rt] [llvm] Remove debug leftovers (PR #211068)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][ELF] Fix dynamic relocations in .eh_frame (PR #210967)   Fangrui Song via llvm-commits
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• [lld] [lld][ELF] Fix dynamic relocations in .eh_frame (PR #210967)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Fix dynamic relocations in .eh_frame (PR #210967)   Fangrui Song via llvm-commits
• [lld] 4068f4d - [ELF] Fix dynamic relocations in .eh_frame (#210967)   via llvm-commits
• [lld] [lld][ELF] Fix dynamic relocations in .eh_frame (PR #210967)   Fangrui Song via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Alexey Bataev via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [lld] [llvm] Add initial support for Xtensa to LLD (PR #202926)   Fangrui Song via llvm-commits
• [clang] [libc] [llvm] [clang] Make __builtin_exp and __builtin_expf constexpr. (PR #199808)   Hubert Tong via llvm-commits
• [llvm] [RISCV] computeKnownBits - add support for RISCVISD::VECREDUCE_ADD_VL (PR #210493)   Sabona Abdi via llvm-commits
• [llvm] [RISCV] computeKnownBits - add support for RISCVISD::VECREDUCE_ADD_VL (PR #210493)   Sabona Abdi via llvm-commits
• [llvm] [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (PR #211970)   Jin Huang via llvm-commits
• [clang] [llvm] [mlir] [IR] Rename insertDbgValueIntrinsic -> insertDbgValue (PR #212151)   Marc Auberer via llvm-commits
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• [lld] [LLD][ELF] handle unnamed section group signatures (PR #209841)   Fangrui Song via llvm-commits
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• [llvm] [Inline] Promote bounded statically known indirect calls (PR #212148)   Kevin Choi via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Kirill A. Korinsky via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Kirill A. Korinsky via llvm-commits
• [llvm] [mlir] [LoopInfo] Build dominator tree only for irreducible CFG (PR #212098)   Fangrui Song via llvm-commits
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• [lld] [lld][MachO] Add initializers to temporal BP startup sorting (PR #212110)   Karim Alweheshy via llvm-commits
• [lld] [lld][MachO] Add initializer and +load roots to temporal BP sorting (PR #212110)   Karim Alweheshy via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [lld] [ELF, SPARC] Support ABS and RELATIVE dynamic relocations (PR #212155)   Fangrui Song via llvm-commits
• [lld] 6a2bdfe - [ELF,SPARC] Support ABS and RELATIVE dynamic relocations (#212155)   via llvm-commits
• [lld] [ELF, SPARC] Support ABS and RELATIVE dynamic relocations (PR #212155)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Copy metadata in select-to-masked.load fold (PR #211965)   via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Jared Wyles via llvm-commits
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• [llvm] [llvm][release] Build openmp as runtime in test-release.sh (PR #212111)   Douglas Yung via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Alexey Bataev via llvm-commits
• [llvm] [Inline] Promote bounded statically known indirect calls (PR #212148)   Shilei Tian via llvm-commits
• [llvm] [Inline] Promote bounded statically known indirect calls (PR #212148)   Shilei Tian via llvm-commits
• [llvm] [DAGCombiner] Transform extending BUILD_VECTOR(EXTRACT_VECTOR_ELT()) -> EXTRACT_SUBVECTOR(extend()) (PR #212156)   Usman Nadeem via llvm-commits
• [llvm] [DAGCombiner] Transform extending BUILD_VECTOR(EXTRACT_VECTOR_ELT()) -> EXTRACT_SUBVECTOR(extend()) (PR #212156)   via llvm-commits
• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   Jakub Kuderski via llvm-commits
• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   Jakub Kuderski via llvm-commits
• [lld] [ELF, SPARC] Support ABS and RELATIVE dynamic relocations (PR #212155)   LLVM Continuous Integration via llvm-commits
• [lld] [ELF,SPARC] Handle more relocation types and fix simm13 field writes (PR #212157)   Fangrui Song via llvm-commits
• [lld] af1a3d2 - [ELF,SPARC] Handle more relocation types and fix simm13 field writes (#212157)   via llvm-commits
• [lld] [ELF,SPARC] Handle more relocation types and fix simm13 field writes (PR #212157)   Fangrui Song via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [llvm] [Inline] Promote bounded statically known indirect calls (PR #212148)   Kevin Choi via llvm-commits
• [llvm] [Inline] Promote bounded statically known indirect calls (PR #212148)   Kevin Choi via llvm-commits
• [llvm] [X86] Reapply #210739 with a fix (PR #212020)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Improve s_delay_alu insertion for instructions with multiple defs (PR #210762)   Reem Elkhouly via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Jared Wyles via llvm-commits
• [llvm] [AMDGPU] Avoid wmma bank conflict for GFX11 and GFX12 (PR #205530)   via llvm-commits
• [llvm] [AMDGPU] exclude selection pattern for s_max/min_f32/16 for gfx1170 (PR #207308)   via llvm-commits
• [llvm] [AMDGPU][X86][DAG] Avoid duplicate BinOp result from narrowing insert-extract sub-vector (PR #201056)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Alexey Bataev via llvm-commits
• [llvm] e4205ab - [LoongArch] Simplify addReloc relocation handling. NFC (#211755)   via llvm-commits
• [llvm] [LoongArch] Simplify addReloc relocation handling. NFC (PR #211755)   via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (PR #203150)   via llvm-commits
• [llvm] [AMDGPU] Avoid wmma bank conflict for GFX11 and GFX12 (PR #205530)   via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Fangrui Song via llvm-commits
• [lldb] [llvm] [X86] Add dynamic tags support for llvm-readobj and lldb per psABI (PR #207661)   Phoebe Wang via llvm-commits
• [lldb] [llvm] [X86] Add dynamic tags support for llvm-readobj and lldb per psABI (PR #207661)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [lld] [ELF, SPARC] Add the GOT header entry and place R_SPARC_JMP_SLOT in .plt (PR #212161)   Fangrui Song via llvm-commits
• [lld] 43a704b - [ELF,SPARC] Add the GOT header entry and place R_SPARC_JMP_SLOT in .plt (#212161)   via llvm-commits
• [lld] [ELF, SPARC] Add the GOT header entry and place R_SPARC_JMP_SLOT in .plt (PR #212161)   Fangrui Song via llvm-commits
• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   Fangrui Song via llvm-commits
• [lld] [ELF, SPARC] Add the GOT header entry and place R_SPARC_JMP_SLOT in .plt (PR #212161)   LLVM Continuous Integration via llvm-commits
• [llvm] [LAA][NFC] Refactor deref no-wrap check; expose broken reverse-loop bounds (PR #211960)   Aleksandr Popov via llvm-commits
• [llvm] [LAA][NFC] Refactor deref no-wrap check; expose broken reverse-loop bounds (PR #211960)   Aleksandr Popov via llvm-commits
• [lld] [ELF, SPARC] Add the GOT header entry and place R_SPARC_JMP_SLOT in .plt (PR #212161)   LLVM Continuous Integration via llvm-commits
• [llvm] [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (PR #211970)   Chuanqi Xu via llvm-commits
• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   Fangrui Song via llvm-commits
• [llvm] [LAA] Fix off-by-EltSize in negative-step deref bounds check (PR #211964)   Aleksandr Popov via llvm-commits
• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   Fangrui Song via llvm-commits
• [llvm] AMDGPU: VALU data fast-forwarding needs no s_delay (PR #205481)   Reem Elkhouly via llvm-commits
• [llvm] [LAA] Fix off-by-EltSize in negative-step deref bounds check (PR #211964)   Aleksandr Popov via llvm-commits
• [llvm] [Coroutines] Support typed retcon allocators (PR #211099)   Chuanqi Xu via llvm-commits
• [llvm] 27bf172 - [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (#211970)   via llvm-commits
• [llvm] [profcheck][coro] Add Branch Weights in to select in replaceSwitchResumeCoroFree. (PR #211970)   Jin Huang via llvm-commits
• [llvm] 19cdc69 - [RISCV] Declare TLSDESC clobbers for vector registers and CSRs per psABI (#205027)   via llvm-commits
• [llvm] [RISCV] Declare TLSDESC clobbers for vector registers and CSRs per psABI (PR #205027)   Pengcheng Wang via llvm-commits
• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   Fangrui Song via llvm-commits
• [llvm] Select immediate binop optimization (PR #212163)   via llvm-commits
• [llvm] Select immediate binop optimization (PR #212163)   via llvm-commits
• [llvm] Select immediate binop optimization (PR #212163)   via llvm-commits
• [llvm] Select immediate binop optimization (PR #212163)   via llvm-commits
• [lld] [lld-macho] Include ICF safe thunks in balanced partitioning (PR #212096)   Karim Alweheshy via llvm-commits
• [llvm] [ConstantFolding] Fold vector.partial.reduce.add constants (PR #212112)   Jeong Jihyeon via llvm-commits
• [libc] [llvm] [libc] Fix libc GPU bitcode entrypoint library build on Windows (PR #210662)   via llvm-commits
• [llvm] AMDGPU: VALU data fast-forwarding needs no s_delay (PR #205481)   Reem Elkhouly via llvm-commits
• [libc] [llvm] [libc][realpath] Follow symlinks (PR #212164)   Jackson Stogel via llvm-commits
• [llvm] [ConstantFolding] Fix llvm.is.fpclass folding of x87 pseudo-NaN (PR #212011)   Oliver Hunt via llvm-commits
• [llvm] [llvm][cas] Fix OnDiskCASLoggerTest.cpp compilation on NetBSD (PR #212113)   Oliver Hunt via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Cpu features cross platform (PR #205447)   Lang Hames via llvm-commits
• [llvm] Select immediate binop optimization (PR #212163)   Keith Dunwoody via llvm-commits
• [lldb] [llvm] [X86] Add dynamic tags support for llvm-readobj and lldb per psABI (PR #207661)   Fangrui Song via llvm-commits
• [libc] [llvm] [libc][realpath] Follow symlinks (PR #212164)   Jackson Stogel via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Kirill A. Korinsky via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Kirill A. Korinsky via llvm-commits
• [llvm] 89c0b16 - [DomTree] Define the members calling the construction algorithms out of line. NFC (#212145)   via llvm-commits
• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   Fangrui Song via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Fangrui Song via llvm-commits
• [llvm] [LoopVectorize][X86] Improve libmvec SSE/AVX/AVX-512 test coverage (PR #211863)   Ankit Kumar Tiwari via llvm-commits
• [llvm] Reland "[SimplifyCFG] Simplify switch default branch when branch proves operand value" (PR #211427)   Sayan Sivakumaran via llvm-commits
• [lld] Enough LLD changes to bootstrap OpenBSD on sparc64 (PR #207609)   Kirill A. Korinsky via llvm-commits
• [llvm] [mlir] [LoopInfo] Build dominator tree only for irreducible CFG (PR #212098)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix miscompile of fptosi.sat.iN.f16 for NaN under avx512fp16 (PR #210556)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Pengcheng Wang via llvm-commits
• [lld] [llvm] [RISCV] Resolve an explicit I+E extension set to I (PR #212166)   Jim Lin via llvm-commits
• [llvm] [LoopVectorize][X86] Improve libmvec SSE/AVX/AVX-512 test coverage (PR #211863)   Ankit Kumar Tiwari via llvm-commits
• [lld] [llvm] [RISCV] Resolve an explicit I+E extension set to I (PR #212166)   via llvm-commits
• [llvm] [DomTree] Define the members calling the construction algorithms out of line. NFC (PR #212145)   LLVM Continuous Integration via llvm-commits
• [clang] [compiler-rt] [Driver][SYCL] Add compile-time device library linking for SPIR-V targets (PR #196656)   Srividya Sundaram via llvm-commits
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• [llvm] Update image sha256 for libc fullbuild tests (PR #212168)   via llvm-commits
• [llvm] [X86] Add pass to coalesce redundant vector constant materializations (PR #211619)   via llvm-commits
• [llvm] 8c57bdb - [X86] Add dynamic tags support for llvm-readobj and lldb per psABI (#207661)   via llvm-commits
• [lldb] [llvm] [X86] Add dynamic tags support for llvm-readobj and lldb per psABI (PR #207661)   Phoebe Wang via llvm-commits
• [llvm] [BOLT][AArch64] Add support for LDR relaxtion on LDRSl/LDRDl/LDRQl (PR #196983)   Shanzhi Chen via llvm-commits
• [llvm] [AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (PR #203150)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add macro fusion support for the Xqci extension instructions (PR #209542)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (PR #203150)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Adjust amdgpu fmax/fmin legalization for DAG (PR #203150)   Shilei Tian via llvm-commits
• [compiler-rt] [sanitizer_common][tests] Skip MemoryMapping::ParseUnixMemoryProfile … (PR #212114)   Vitaly Buka via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [llvm] [WIP][SLP] Allow external uses to exist as both an extract and a rematerialization during the pass (PR #211680)   Ryan Buchner via llvm-commits
• [lld] [ELF, SPARC] Add the GOT header entry and place R_SPARC_JMP_SLOT in .plt (PR #212161)   Dmitry Vasilyev via llvm-commits
• [llvm] [BOLT][AArch64] Add support for LDR relaxtion on LDRSl/LDRDl/LDRQl (PR #196983)   Shanzhi Chen via llvm-commits
• [llvm] [SPIRV] Preserve sign-sensitive width record across G_TRUNC replacement (PR #211626)   Michal Paszkowski via llvm-commits
• [llvm] Update image sha256 for libc fullbuild tests (PR #212168)   via llvm-commits
• [llvm] [llvm-profgen] Support AArch64 BRBE branch profiles (PR #209769)   Sergey Shcherbinin via llvm-commits
• [llvm] [X86] Remove TuningFastSHLDRotate from BMI2 targets (PR #211217)   via llvm-commits
• [llvm] [X86] Remove TuningFastSHLDRotate from BMI2 targets (PR #211217)   via llvm-commits
• [llvm] [llvm-profgen] Support AArch64 BRBE branch profiles (PR #209769)   Snehasish Kumar via llvm-commits
• [llvm] [llvm-profgen] Support AArch64 BRBE branch profiles (PR #209769)   Snehasish Kumar via llvm-commits
• [llvm] Introduction of typified section in ExtBinary format (PR #166553)   Snehasish Kumar via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Luke Lau via llvm-commits
• [llvm] [AArch64] Keep bitwise ops on wide vector elements in vector registers (PR #212172)   via llvm-commits
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• [llvm] [AArch64] Keep bitwise ops on wide vector elements in vector registers (PR #212172)   via llvm-commits
• [llvm] [llvm-profgen] Support AArch64 BRBE branch profiles (PR #209769)   Snehasish Kumar via llvm-commits
• [llvm] [llvm-profgen] Support AArch64 BRBE branch profiles (PR #209769)   Snehasish Kumar via llvm-commits
• [llvm] [llvm-profgen] Support AArch64 BRBE branch profiles (PR #209769)   Snehasish Kumar via llvm-commits
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• [llvm] [llubi] Initial support for vector predication intrinsics (PR #212093)   Zhige Chen via llvm-commits
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• [llvm] [RISCV] Combine chained `V[SZ]EXT_VL` ops (PR #211583)   Luke Lau via llvm-commits
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• [llvm] AMDGPU: Migrate misc. tests to subarch triples (PR #211585)   Matt Arsenault via llvm-commits
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• [compiler-rt] [llvm] [msan] Add interceptors for fortified memory functions (__memcpy_chk, etc.) (PR #206702)   Austin Schuh via llvm-commits
• [llvm] [AMDGPU] Improve codegen for copysign(x, fneg(y)) (PR #207178)   Madhur Kumar via llvm-commits
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• [llvm] [NFC][NVPTX] Introduce AS aware address matching in TableGen (PR #210309)   Rajat Bajpai via llvm-commits
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• [llvm] AMDGPU: Migrate misc. tests to subarch triples (PR #211585)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstraintElim] Skip decomposition if precondition does not hold. (PR #212140)   Florian Hahn via llvm-commits
• [llvm] [orc-rt] Session::HandlerTag -> orc_rt_ControllerHandlerTag (PR #212173)   Lang Hames via llvm-commits
• [llvm] [AMDGPU] Port Atomic-Optimizer to use Wave Reduction Intrinsics (PR #211757)   via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Port Atomic-Optimizer to use Wave Reduction Intrinsics (PR #211757)   via llvm-commits
• [llvm] AMDGPU: Migrate misc. tests to subarch triples (PR #211585)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Remove TuningFastVariableCrossLaneShuffle from X86_64V4Tuning (PR #212178)   via llvm-commits
• [llvm] [orc-rt] Add StringExtras::join from llvm/adt and tests (PR #212179)   Jared Wyles via llvm-commits
• [llvm] [X86] Remove TuningFastVariableCrossLaneShuffle from X86_64V4Tuning (PR #212178)   via llvm-commits
• [llvm] [llvm-ml] make TEXTEQU directive not to eagerly expand macros in arguments (PR #209526)   via llvm-commits
• [llvm] [X86] Remove TuningFastVariableCrossLaneShuffle from X86_64V4Tuning (PR #212178)   via llvm-commits
• [llvm] AMDGPU: Migrate misc. tests to subarch triples (PR #211585)   LLVM Continuous Integration via llvm-commits
• [llvm] workflows/release-binaries: Add missing action to checkout (PR #211720)   Cullen Rhodes via llvm-commits
• [llvm] 820b5cb - [AArch64] Mark ZT0 register class as non-allocatable (#211750)   via llvm-commits
• [llvm] [AArch64] Mark ZT0 register class as non-allocatable (PR #211750)   Cullen Rhodes via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract InstructionsState (2/3) (PR #211461)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SLP][modularisation][NFC] Extract InstructionsState (2/3) (PR #211461)   Madhur Amilkanthwar via llvm-commits
• [llvm] [orc-rt] Add StringExtras::join from llvm/adt and tests (PR #212179)   Jared Wyles via llvm-commits
• [llvm] [MacroFusion] Add RunPreRA/RunPostRA to select the scheduling stage (PR #212182)   Pengcheng Wang via llvm-commits
• [llvm] [MacroFusion] Add RunPreRA/RunPostRA to select the scheduling stage (PR #212182)   via llvm-commits
• [llvm] [RISCV] Add TuneNoDefaultUnroll to generic CPUs (PR #135318)   Mark Zhuang via llvm-commits
• [llvm] [AArch64] Remove unused GPR32arg register class (NFC) (PR #211778)   Cullen Rhodes via llvm-commits
• [llvm] [HashRecognize] Fix two more compiler hangs on dense use-def chains (PR #211887)   Piotr Fusik via llvm-commits
• [llvm] [HashRecognize] Fix compiler crash on missing latch compare instruction (PR #211895)   Piotr Fusik via llvm-commits
• [llvm] [Hexagon] Fix ISel error: LLVM: cannot select -fmaximum (PR #211283)   Santanu Das via llvm-commits
• [clang] [llvm] [RISCV] Add support for vector registers with -fzero-call-used-regs (PR #206206)   Lucas Chollet via llvm-commits