[llvm] [AArch64] Use LD1/ST1 in strict-align mode (PR #211513)
Oliver Stannard via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 23 03:19:02 PDT 2026
https://github.com/ostannard updated https://github.com/llvm/llvm-project/pull/211513
>From 2cbeb5275599bb1e01b34d2458c164094543c8d1 Mon Sep 17 00:00:00 2001
From: Oliver Stannard <oliver.stannard at arm.com>
Date: Tue, 23 Jun 2026 10:38:08 +0100
Subject: [PATCH 1/3] [AArch64] Add tests showing inefficient codegen
---
.../test/CodeGen/AArch64/vector-ldst-align.ll | 10027 ++++++++++++++++
.../CodeGen/AArch64/vector-ldst-offset.ll | 5024 +++++++-
2 files changed, 15049 insertions(+), 2 deletions(-)
create mode 100644 llvm/test/CodeGen/AArch64/vector-ldst-align.ll
diff --git a/llvm/test/CodeGen/AArch64/vector-ldst-align.ll b/llvm/test/CodeGen/AArch64/vector-ldst-align.ll
new file mode 100644
index 0000000000000..938a19de81589
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/vector-ldst-align.ll
@@ -0,0 +1,10027 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=aarch64-linux-gnu %s -o - | FileCheck %s --check-prefix=NOSTRICTALIGN
+; RUN: llc -mtriple=aarch64-linux-gnu %s -o - -mattr=+strict-align | FileCheck %s --check-prefix=STRICTALIGN
+; RUN: llc -mtriple=aarch64_be-linux-gnu %s -o - | FileCheck %s --check-prefix=NOSTRICTALIGN-BE
+; RUN: llc -mtriple=aarch64_be-linux-gnu %s -o - -mattr=+strict-align | FileCheck %s --check-prefix=STRICTALIGN-BE
+
+
+define <8 x i8> @load_v8i8_align1(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align1:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align1:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w9, [x0]
+; STRICTALIGN-NEXT: ldrb w10, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #4]!
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #8
+; STRICTALIGN-NEXT: ldrb w14, [x0, #2]
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #3]
+; STRICTALIGN-NEXT: lsl w14, w14, #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w10, w13, w12, lsl #8
+; STRICTALIGN-NEXT: orr w11, w14, w15, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w11, w10
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align1:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #4]!
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w14, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w15, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl x12, x12, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w10, w11, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x15, x14, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x13, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <8 x i8>, ptr %ptr, align 1
+ ret <8 x i8> %val
+}
+
+define void @store_v8i8_align1(ptr %ptr, <8 x i8> %val) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align1:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align1:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #16
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #8
+; STRICTALIGN-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-NEXT: lsr x10, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x0, #4]!
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align1:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0]
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x0, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ret
+ store <8 x i8> %val, ptr %ptr, align 1
+ ret void
+}
+
+define <8 x i8> @load_v8i8_align1_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align1_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align1_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: ldrb w9, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w10, [x0]
+; STRICTALIGN-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w12, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #4]!
+; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #8
+; STRICTALIGN-NEXT: ldrb w15, [x0, #2]
+; STRICTALIGN-NEXT: lsl x12, x12, #16
+; STRICTALIGN-NEXT: ldrb w16, [x0, #3]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: lsl w15, w15, #16
+; STRICTALIGN-NEXT: orr x10, x12, x11, lsl #24
+; STRICTALIGN-NEXT: orr w11, w14, w13, lsl #8
+; STRICTALIGN-NEXT: orr w12, w15, w16, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w10, w12, w11
+; STRICTALIGN-NEXT: orr x9, x9, x10, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x9
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align1_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #5]
+; STRICTALIGN-BE-NEXT: mov x13, x0
+; STRICTALIGN-BE-NEXT: ldrb w14, [x13, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x13, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x13, #3]
+; STRICTALIGN-BE-NEXT: lsl x12, x12, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w10, w11, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x13, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <8 x i8>, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <8 x i8> %val
+}
+
+define <8 x i8> @load_v8i8_align1_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align1_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align1_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #8]!
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align1_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w9
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <8 x i8>, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <8 x i8> %val
+}
+
+define void @store_v8i8_align1_post8(ptr %ptr, <8 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align1_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align1_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: add x11, x0, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: str x11, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align1_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0]
+; STRICTALIGN-BE-NEXT: add x9, x0, #8
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x0, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <8 x i8> %val, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i8_align1_pre8(ptr %ptr, <8 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align1_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align1_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: strb w8, [x0, #8]!
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x11, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w10, [x9, #4]!
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align1_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #8]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: strb w10, [x9, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x9, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <8 x i8> %val, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <8 x i8> @load_v8i8_align1_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align1_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align1_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ldrb w9, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w10, [x0]
+; STRICTALIGN-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w12, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #4]!
+; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #8
+; STRICTALIGN-NEXT: ldrb w15, [x0, #2]
+; STRICTALIGN-NEXT: lsl x12, x12, #16
+; STRICTALIGN-NEXT: ldrb w16, [x0, #3]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: lsl w15, w15, #16
+; STRICTALIGN-NEXT: orr x10, x12, x11, lsl #24
+; STRICTALIGN-NEXT: orr w11, w14, w13, lsl #8
+; STRICTALIGN-NEXT: orr w12, w15, w16, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w10, w12, w11
+; STRICTALIGN-NEXT: orr x9, x9, x10, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x9
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align1_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #5]
+; STRICTALIGN-BE-NEXT: mov x13, x0
+; STRICTALIGN-BE-NEXT: ldrb w14, [x13, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x13, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x13, #3]
+; STRICTALIGN-BE-NEXT: lsl x12, x12, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w10, w11, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x13, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i8>, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <8 x i8> %val
+}
+
+define <8 x i8> @load_v8i8_align1_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align1_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align1_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #16]!
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align1_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w9
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i8>, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <8 x i8> %val
+}
+
+define void @store_v8i8_align1_post16(ptr %ptr, <8 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align1_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align1_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: add x11, x0, #16
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: str x11, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align1_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0]
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x0, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i8> %val, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i8_align1_pre16(ptr %ptr, <8 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align1_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align1_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: strb w8, [x0, #16]!
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x11, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w10, [x9, #4]!
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align1_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: strb w10, [x9, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x9, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i8> %val, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <8 x i8> @load_v8i8_align8(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <8 x i8>, ptr %ptr, align 8
+ ret <8 x i8> %val
+}
+
+define void @store_v8i8_align8(ptr %ptr, <8 x i8> %val) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <8 x i8> %val, ptr %ptr, align 8
+ ret void
+}
+
+define <8 x i8> @load_v8i8_align8_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align8_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align8_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align8_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align8_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <8 x i8>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <8 x i8> %val
+}
+
+define <8 x i8> @load_v8i8_align8_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align8_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align8_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align8_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align8_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <8 x i8>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <8 x i8> %val
+}
+
+define void @store_v8i8_align8_post8(ptr %ptr, <8 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align8_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align8_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align8_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align8_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <8 x i8> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i8_align8_pre8(ptr %ptr, <8 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align8_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align8_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align8_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align8_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <8 x i8> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <8 x i8> @load_v8i8_align8_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i8>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <8 x i8> %val
+}
+
+define <8 x i8> @load_v8i8_align8_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i8_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i8_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i8_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i8_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i8>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <8 x i8> %val
+}
+
+define void @store_v8i8_align8_post16(ptr %ptr, <8 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i8> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i8_align8_pre16(ptr %ptr, <8 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i8_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i8_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i8_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i8_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i8> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <16 x i8> @load_v16i8_align1(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align1:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align1:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x13, x8, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: ldrb w9, [x8, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x8, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x8, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #8
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w8, w13, w8, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w8, w8, w11
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align1:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0]
+; STRICTALIGN-BE-NEXT: lsl w11, w11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x8, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x8, #4]!
+; STRICTALIGN-BE-NEXT: lsl w9, w9, #16
+; STRICTALIGN-BE-NEXT: lsl x11, x11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-BE-NEXT: orr w12, w13, w12, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x11, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr x8, x8, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w12
+; STRICTALIGN-BE-NEXT: orr x8, x10, x8
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <16 x i8>, ptr %ptr, align 1
+ ret <16 x i8> %val
+}
+
+define void @store_v16i8_align1(ptr %ptr, <16 x i8> %val) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align1:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align1:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x10, x12, #40
+; STRICTALIGN-NEXT: lsr x11, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w12, [x9, #8]!
+; STRICTALIGN-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-NEXT: lsr x10, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: strb w10, [x9, #2]
+; STRICTALIGN-NEXT: lsr x10, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-NEXT: lsr x10, x12, #56
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #48
+; STRICTALIGN-NEXT: strb w10, [x9, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align1:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #9]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: ldr x12, [sp]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #32
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #48
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #56
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #24
+; STRICTALIGN-BE-NEXT: strb w11, [x0]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #24
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #4]!
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x0, #3]
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #8
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #4]!
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ store <16 x i8> %val, ptr %ptr, align 1
+ ret void
+}
+
+define <16 x i8> @load_v16i8_align1_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align1_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align1_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x13, x8, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: ldrb w9, [x8, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x8, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x8, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #8
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w8, w13, w8, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w8, w8, w11
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align1_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0]
+; STRICTALIGN-BE-NEXT: lsl w11, w11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x8, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x8, #4]!
+; STRICTALIGN-BE-NEXT: lsl w9, w9, #16
+; STRICTALIGN-BE-NEXT: lsl x11, x11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-BE-NEXT: orr w12, w13, w12, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x11, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr x8, x8, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w12
+; STRICTALIGN-BE-NEXT: orr x8, x10, x8
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <16 x i8>, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <16 x i8> %val
+}
+
+define <16 x i8> @load_v16i8_align1_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align1_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align1_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #16]!
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrb w8, [x9, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x9, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x9, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x9, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x9, #2]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: ldrb w9, [x9, #3]
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x8, x8, x14, lsl #8
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w9, w13, w9, lsl #24
+; STRICTALIGN-NEXT: orr x8, x10, x8
+; STRICTALIGN-NEXT: orr w9, w9, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align1_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w9
+; STRICTALIGN-BE-NEXT: orr x9, x10, x11
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldrb w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x9, #2]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x9, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x9, #4]!
+; STRICTALIGN-BE-NEXT: lsl w12, w12, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x9, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x9, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #8
+; STRICTALIGN-BE-NEXT: orr w8, w12, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x9, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w10
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <16 x i8>, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <16 x i8> %val
+}
+
+define void @store_v16i8_align1_post16(ptr %ptr, <16 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align1_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align1_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x10, x12, #40
+; STRICTALIGN-NEXT: lsr x11, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w12, [x9, #8]!
+; STRICTALIGN-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-NEXT: lsr x10, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: strb w10, [x9, #2]
+; STRICTALIGN-NEXT: lsr x10, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-NEXT: lsr x10, x12, #56
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #48
+; STRICTALIGN-NEXT: strb w10, [x9, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: add x12, x0, #16
+; STRICTALIGN-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: str x12, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align1_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #9]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: ldr x12, [sp]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #32
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #48
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #56
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #24
+; STRICTALIGN-BE-NEXT: strb w11, [x0]
+; STRICTALIGN-BE-NEXT: add x11, x0, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #4]!
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x12, x8, #24
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x10, #4]!
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: str x11, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <16 x i8> %val, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v16i8_align1_pre16(ptr %ptr, <16 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align1_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align1_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w8, [x0, #16]!
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: lsr x13, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: lsr x9, x12, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-NEXT: lsr x9, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x8, #32
+; STRICTALIGN-NEXT: strb w12, [x10, #8]!
+; STRICTALIGN-NEXT: strb w13, [x10, #3]
+; STRICTALIGN-NEXT: lsr x13, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w13, [x9, #3]
+; STRICTALIGN-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-NEXT: lsr x8, x12, #56
+; STRICTALIGN-NEXT: lsr x9, x12, #48
+; STRICTALIGN-NEXT: strb w11, [x10, #4]!
+; STRICTALIGN-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align1_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #24
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: lsr x13, x12, #56
+; STRICTALIGN-BE-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #48
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x12, #16
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #32
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: strb w13, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x13, x12, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #8
+; STRICTALIGN-BE-NEXT: strb w8, [x9, #3]
+; STRICTALIGN-BE-NEXT: lsr x8, x12, #24
+; STRICTALIGN-BE-NEXT: strb w13, [x10, #2]
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #4]!
+; STRICTALIGN-BE-NEXT: lsr x8, x12, #8
+; STRICTALIGN-BE-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-BE-NEXT: strb w12, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <16 x i8> %val, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <16 x i8> @load_v16i8_align1_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align1_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align1_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x13, x8, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: ldrb w9, [x8, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x8, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x8, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #8
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w8, w13, w8, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w8, w8, w11
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align1_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0]
+; STRICTALIGN-BE-NEXT: lsl w11, w11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x8, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x8, #4]!
+; STRICTALIGN-BE-NEXT: lsl w9, w9, #16
+; STRICTALIGN-BE-NEXT: lsl x11, x11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-BE-NEXT: orr w12, w13, w12, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x11, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr x8, x8, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w12
+; STRICTALIGN-BE-NEXT: orr x8, x10, x8
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <16 x i8>, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <16 x i8> %val
+}
+
+define <16 x i8> @load_v16i8_align1_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align1_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align1_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #32]!
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrb w8, [x9, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x9, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x9, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x9, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x9, #2]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: ldrb w9, [x9, #3]
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x8, x8, x14, lsl #8
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w9, w13, w9, lsl #24
+; STRICTALIGN-NEXT: orr x8, x10, x8
+; STRICTALIGN-NEXT: orr w9, w9, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align1_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #32]!
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w9
+; STRICTALIGN-BE-NEXT: orr x9, x10, x11
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldrb w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x9, #2]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x9, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x9, #4]!
+; STRICTALIGN-BE-NEXT: lsl w12, w12, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x9, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x9, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #8
+; STRICTALIGN-BE-NEXT: orr w8, w12, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x9, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w10
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <16 x i8>, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <16 x i8> %val
+}
+
+define void @store_v16i8_align1_post32(ptr %ptr, <16 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align1_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align1_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x10, x12, #40
+; STRICTALIGN-NEXT: lsr x11, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w12, [x9, #8]!
+; STRICTALIGN-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-NEXT: lsr x10, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: strb w10, [x9, #2]
+; STRICTALIGN-NEXT: lsr x10, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-NEXT: lsr x10, x12, #56
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #48
+; STRICTALIGN-NEXT: strb w10, [x9, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: add x12, x0, #32
+; STRICTALIGN-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: str x12, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align1_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #9]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: ldr x12, [sp]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #32
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #48
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #56
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #24
+; STRICTALIGN-BE-NEXT: strb w11, [x0]
+; STRICTALIGN-BE-NEXT: add x11, x0, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #4]!
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x12, x8, #24
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x10, #4]!
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: str x11, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <16 x i8> %val, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v16i8_align1_pre32(ptr %ptr, <16 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align1_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align1_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w8, [x0, #32]!
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: lsr x13, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: lsr x9, x12, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-NEXT: lsr x9, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x8, #32
+; STRICTALIGN-NEXT: strb w12, [x10, #8]!
+; STRICTALIGN-NEXT: strb w13, [x10, #3]
+; STRICTALIGN-NEXT: lsr x13, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w13, [x9, #3]
+; STRICTALIGN-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-NEXT: lsr x8, x12, #56
+; STRICTALIGN-NEXT: lsr x9, x12, #48
+; STRICTALIGN-NEXT: strb w11, [x10, #4]!
+; STRICTALIGN-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align1_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #32]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #24
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: lsr x13, x12, #56
+; STRICTALIGN-BE-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #48
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x12, #16
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #32
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: strb w13, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x13, x12, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #8
+; STRICTALIGN-BE-NEXT: strb w8, [x9, #3]
+; STRICTALIGN-BE-NEXT: lsr x8, x12, #24
+; STRICTALIGN-BE-NEXT: strb w13, [x10, #2]
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #4]!
+; STRICTALIGN-BE-NEXT: lsr x8, x12, #8
+; STRICTALIGN-BE-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-BE-NEXT: strb w12, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <16 x i8> %val, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <16 x i8> @load_v16i8_align16(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <16 x i8>, ptr %ptr, align 16
+ ret <16 x i8> %val
+}
+
+define void @store_v16i8_align16(ptr %ptr, <16 x i8> %val) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <16 x i8> %val, ptr %ptr, align 16
+ ret void
+}
+
+define <16 x i8> @load_v16i8_align16_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align16_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align16_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align16_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align16_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <16 x i8>, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <16 x i8> %val
+}
+
+define <16 x i8> @load_v16i8_align16_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align16_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align16_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align16_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align16_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <16 x i8>, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <16 x i8> %val
+}
+
+define void @store_v16i8_align16_post16(ptr %ptr, <16 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align16_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align16_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align16_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align16_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <16 x i8> %val, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v16i8_align16_pre16(ptr %ptr, <16 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align16_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align16_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align16_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align16_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <16 x i8> %val, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <16 x i8> @load_v16i8_align16_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align16_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align16_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0], #32
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align16_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align16_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <16 x i8>, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <16 x i8> %val
+}
+
+define <16 x i8> @load_v16i8_align16_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v16i8_align16_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v16i8_align16_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v16i8_align16_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align16_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <16 x i8>, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <16 x i8> %val
+}
+
+define void @store_v16i8_align16_post32(ptr %ptr, <16 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align16_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align16_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0], #32
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align16_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align16_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <16 x i8> %val, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v16i8_align16_pre32(ptr %ptr, <16 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align16_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align16_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0, #32]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align16_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align16_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <16 x i8> %val, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i16> @load_v4i16_align1(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align1:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align1:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w9, [x0]
+; STRICTALIGN-NEXT: ldrb w10, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #4]!
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #8
+; STRICTALIGN-NEXT: ldrb w14, [x0, #2]
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #3]
+; STRICTALIGN-NEXT: lsl w14, w14, #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w10, w13, w12, lsl #8
+; STRICTALIGN-NEXT: orr w11, w14, w15, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w11, w10
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align1:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align1:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #4]!
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w14, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w15, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl x12, x12, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w10, w11, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x15, x14, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x13, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <4 x i16>, ptr %ptr, align 1
+ ret <4 x i16> %val
+}
+
+define void @store_v4i16_align1(ptr %ptr, <4 x i16> %val) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align1:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align1:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #16
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #8
+; STRICTALIGN-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-NEXT: lsr x10, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x0, #4]!
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align1:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align1:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0]
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x0, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ret
+ store <4 x i16> %val, ptr %ptr, align 1
+ ret void
+}
+
+define <4 x i16> @load_v4i16_align1_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align1_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align1_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: ldrb w9, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w10, [x0]
+; STRICTALIGN-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w12, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #4]!
+; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #8
+; STRICTALIGN-NEXT: ldrb w15, [x0, #2]
+; STRICTALIGN-NEXT: lsl x12, x12, #16
+; STRICTALIGN-NEXT: ldrb w16, [x0, #3]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: lsl w15, w15, #16
+; STRICTALIGN-NEXT: orr x10, x12, x11, lsl #24
+; STRICTALIGN-NEXT: orr w11, w14, w13, lsl #8
+; STRICTALIGN-NEXT: orr w12, w15, w16, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w10, w12, w11
+; STRICTALIGN-NEXT: orr x9, x9, x10, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x9
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align1_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align1_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #5]
+; STRICTALIGN-BE-NEXT: mov x13, x0
+; STRICTALIGN-BE-NEXT: ldrb w14, [x13, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x13, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x13, #3]
+; STRICTALIGN-BE-NEXT: lsl x12, x12, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w10, w11, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x13, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <4 x i16>, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define <4 x i16> @load_v4i16_align1_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align1_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align1_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #8]!
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align1_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align1_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w9
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <4 x i16>, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define void @store_v4i16_align1_post8(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align1_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align1_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: add x11, x0, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: str x11, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align1_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align1_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0]
+; STRICTALIGN-BE-NEXT: add x9, x0, #8
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x0, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <4 x i16> %val, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i16_align1_pre8(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align1_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align1_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: strb w8, [x0, #8]!
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x11, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w10, [x9, #4]!
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align1_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align1_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #8]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: strb w10, [x9, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x9, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <4 x i16> %val, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i16> @load_v4i16_align1_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align1_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align1_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ldrb w9, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w10, [x0]
+; STRICTALIGN-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w12, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #4]!
+; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #8
+; STRICTALIGN-NEXT: ldrb w15, [x0, #2]
+; STRICTALIGN-NEXT: lsl x12, x12, #16
+; STRICTALIGN-NEXT: ldrb w16, [x0, #3]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: lsl w15, w15, #16
+; STRICTALIGN-NEXT: orr x10, x12, x11, lsl #24
+; STRICTALIGN-NEXT: orr w11, w14, w13, lsl #8
+; STRICTALIGN-NEXT: orr w12, w15, w16, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w10, w12, w11
+; STRICTALIGN-NEXT: orr x9, x9, x10, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x9
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align1_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align1_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #5]
+; STRICTALIGN-BE-NEXT: mov x13, x0
+; STRICTALIGN-BE-NEXT: ldrb w14, [x13, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x13, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x13, #3]
+; STRICTALIGN-BE-NEXT: lsl x12, x12, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w10, w11, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x13, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i16>, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define <4 x i16> @load_v4i16_align1_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align1_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align1_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #16]!
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align1_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align1_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w9
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i16>, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define void @store_v4i16_align1_post16(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align1_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align1_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: add x11, x0, #16
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: str x11, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align1_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align1_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0]
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x0, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i16> %val, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i16_align1_pre16(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align1_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align1_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: strb w8, [x0, #16]!
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x11, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w10, [x9, #4]!
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align1_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align1_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: strb w10, [x9, #4]!
+; STRICTALIGN-BE-NEXT: str b0, [x9, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i16> %val, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i16> @load_v4i16_align2(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align2:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align2:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align2:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align2:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <4 x i16>, ptr %ptr, align 2
+ ret <4 x i16> %val
+}
+
+define void @store_v4i16_align2(ptr %ptr, <4 x i16> %val) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align2:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align2:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align2:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <4 x i16> %val, ptr %ptr, align 2
+ ret void
+}
+
+define <4 x i16> @load_v4i16_align2_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align2_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align2_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align2_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align2_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <4 x i16>, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define <4 x i16> @load_v4i16_align2_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align2_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align2_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #8]!
+; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align2_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align2_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <4 x i16>, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define void @store_v4i16_align2_post8(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align2_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align2_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: add x9, x0, #8
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align2_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: add x9, x0, #8
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <4 x i16> %val, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i16_align2_pre8(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align2_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align2_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0, #8]!
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align2_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <4 x i16> %val, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i16> @load_v4i16_align2_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align2_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align2_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align2_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align2_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i16>, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define <4 x i16> @load_v4i16_align2_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align2_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align2_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #16]!
+; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align2_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align2_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i16>, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define void @store_v4i16_align2_post16(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align2_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align2_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: add x9, x0, #16
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align2_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i16> %val, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i16_align2_pre16(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align2_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align2_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0, #16]!
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align2_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i16> %val, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i16> @load_v4i16_align8(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <4 x i16>, ptr %ptr, align 8
+ ret <4 x i16> %val
+}
+
+define void @store_v4i16_align8(ptr %ptr, <4 x i16> %val) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <4 x i16> %val, ptr %ptr, align 8
+ ret void
+}
+
+define <4 x i16> @load_v4i16_align8_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align8_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align8_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align8_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align8_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <4 x i16>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define <4 x i16> @load_v4i16_align8_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align8_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align8_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align8_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align8_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <4 x i16>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define void @store_v4i16_align8_post8(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align8_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align8_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align8_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align8_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <4 x i16> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i16_align8_pre8(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align8_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align8_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align8_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align8_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <4 x i16> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i16> @load_v4i16_align8_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i16>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define <4 x i16> @load_v4i16_align8_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i16_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i16_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i16_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i16_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i16>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <4 x i16> %val
+}
+
+define void @store_v4i16_align8_post16(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i16> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i16_align8_pre16(ptr %ptr, <4 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i16_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i16_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i16_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i16_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i16> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <8 x i16> @load_v8i16_align1(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align1:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align1:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x13, x8, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: ldrb w9, [x8, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x8, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x8, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #8
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w8, w13, w8, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w8, w8, w11
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align1:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align1:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0]
+; STRICTALIGN-BE-NEXT: lsl w11, w11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x8, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x8, #4]!
+; STRICTALIGN-BE-NEXT: lsl w9, w9, #16
+; STRICTALIGN-BE-NEXT: lsl x11, x11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-BE-NEXT: orr w12, w13, w12, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x11, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr x8, x8, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w12
+; STRICTALIGN-BE-NEXT: orr x8, x10, x8
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <8 x i16>, ptr %ptr, align 1
+ ret <8 x i16> %val
+}
+
+define void @store_v8i16_align1(ptr %ptr, <8 x i16> %val) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align1:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align1:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x10, x12, #40
+; STRICTALIGN-NEXT: lsr x11, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w12, [x9, #8]!
+; STRICTALIGN-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-NEXT: lsr x10, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: strb w10, [x9, #2]
+; STRICTALIGN-NEXT: lsr x10, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-NEXT: lsr x10, x12, #56
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #48
+; STRICTALIGN-NEXT: strb w10, [x9, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align1:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align1:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #9]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: ldr x12, [sp]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #32
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #48
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #56
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #24
+; STRICTALIGN-BE-NEXT: strb w11, [x0]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #24
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #4]!
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x0, #3]
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #8
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #4]!
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ store <8 x i16> %val, ptr %ptr, align 1
+ ret void
+}
+
+define <8 x i16> @load_v8i16_align1_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align1_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align1_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x13, x8, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: ldrb w9, [x8, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x8, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x8, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #8
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w8, w13, w8, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w8, w8, w11
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align1_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align1_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0]
+; STRICTALIGN-BE-NEXT: lsl w11, w11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x8, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x8, #4]!
+; STRICTALIGN-BE-NEXT: lsl w9, w9, #16
+; STRICTALIGN-BE-NEXT: lsl x11, x11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-BE-NEXT: orr w12, w13, w12, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x11, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr x8, x8, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w12
+; STRICTALIGN-BE-NEXT: orr x8, x10, x8
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i16>, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define <8 x i16> @load_v8i16_align1_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align1_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align1_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #16]!
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrb w8, [x9, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x9, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x9, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x9, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x9, #2]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: ldrb w9, [x9, #3]
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x8, x8, x14, lsl #8
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w9, w13, w9, lsl #24
+; STRICTALIGN-NEXT: orr x8, x10, x8
+; STRICTALIGN-NEXT: orr w9, w9, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align1_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align1_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w9
+; STRICTALIGN-BE-NEXT: orr x9, x10, x11
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldrb w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x9, #2]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x9, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x9, #4]!
+; STRICTALIGN-BE-NEXT: lsl w12, w12, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x9, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x9, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #8
+; STRICTALIGN-BE-NEXT: orr w8, w12, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x9, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w10
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i16>, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define void @store_v8i16_align1_post16(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align1_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align1_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x10, x12, #40
+; STRICTALIGN-NEXT: lsr x11, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w12, [x9, #8]!
+; STRICTALIGN-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-NEXT: lsr x10, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: strb w10, [x9, #2]
+; STRICTALIGN-NEXT: lsr x10, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-NEXT: lsr x10, x12, #56
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #48
+; STRICTALIGN-NEXT: strb w10, [x9, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: add x12, x0, #16
+; STRICTALIGN-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: str x12, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align1_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align1_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #9]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: ldr x12, [sp]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #32
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #48
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #56
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #24
+; STRICTALIGN-BE-NEXT: strb w11, [x0]
+; STRICTALIGN-BE-NEXT: add x11, x0, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #4]!
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x12, x8, #24
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x10, #4]!
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: str x11, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i16> %val, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i16_align1_pre16(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align1_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align1_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w8, [x0, #16]!
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: lsr x13, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: lsr x9, x12, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-NEXT: lsr x9, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x8, #32
+; STRICTALIGN-NEXT: strb w12, [x10, #8]!
+; STRICTALIGN-NEXT: strb w13, [x10, #3]
+; STRICTALIGN-NEXT: lsr x13, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w13, [x9, #3]
+; STRICTALIGN-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-NEXT: lsr x8, x12, #56
+; STRICTALIGN-NEXT: lsr x9, x12, #48
+; STRICTALIGN-NEXT: strb w11, [x10, #4]!
+; STRICTALIGN-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align1_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align1_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #24
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: lsr x13, x12, #56
+; STRICTALIGN-BE-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #48
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x12, #16
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #32
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: strb w13, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x13, x12, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #8
+; STRICTALIGN-BE-NEXT: strb w8, [x9, #3]
+; STRICTALIGN-BE-NEXT: lsr x8, x12, #24
+; STRICTALIGN-BE-NEXT: strb w13, [x10, #2]
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #4]!
+; STRICTALIGN-BE-NEXT: lsr x8, x12, #8
+; STRICTALIGN-BE-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-BE-NEXT: strb w12, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i16> %val, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <8 x i16> @load_v8i16_align1_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align1_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align1_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x13, x8, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: ldrb w9, [x8, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x8, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x8, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x8, #2]
+; STRICTALIGN-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #8
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w8, w13, w8, lsl #24
+; STRICTALIGN-NEXT: orr x9, x10, x9
+; STRICTALIGN-NEXT: orr w8, w8, w11
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align1_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align1_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0]
+; STRICTALIGN-BE-NEXT: lsl w11, w11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x8, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x8, #4]!
+; STRICTALIGN-BE-NEXT: lsl w9, w9, #16
+; STRICTALIGN-BE-NEXT: lsl x11, x11, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x8, #2]
+; STRICTALIGN-BE-NEXT: ldrb w8, [x8, #3]
+; STRICTALIGN-BE-NEXT: orr w12, w13, w12, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w10, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x11, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr x8, x8, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w9, w9, w12
+; STRICTALIGN-BE-NEXT: orr x8, x10, x8
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <8 x i16>, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define <8 x i16> @load_v8i16_align1_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align1_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align1_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrb w8, [x0, #32]!
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
+; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
+; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
+; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
+; STRICTALIGN-NEXT: lsl x9, x9, #16
+; STRICTALIGN-NEXT: lsl w12, w12, #16
+; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
+; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
+; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
+; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
+; STRICTALIGN-NEXT: orr x8, x9, x8
+; STRICTALIGN-NEXT: orr w9, w10, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrb w8, [x9, #8]!
+; STRICTALIGN-NEXT: ldrb w10, [x9, #3]
+; STRICTALIGN-NEXT: ldrb w11, [x9, #2]
+; STRICTALIGN-NEXT: ldrb w12, [x9, #4]!
+; STRICTALIGN-NEXT: ldrb w13, [x9, #2]
+; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
+; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
+; STRICTALIGN-NEXT: lsl x11, x11, #16
+; STRICTALIGN-NEXT: ldrb w9, [x9, #3]
+; STRICTALIGN-NEXT: lsl w13, w13, #16
+; STRICTALIGN-NEXT: orr x8, x8, x14, lsl #8
+; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
+; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
+; STRICTALIGN-NEXT: orr w9, w13, w9, lsl #24
+; STRICTALIGN-NEXT: orr x8, x10, x8
+; STRICTALIGN-NEXT: orr w9, w9, w11
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align1_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align1_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #32]!
+; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: mov x12, x0
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
+; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
+; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x12, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x10, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w9
+; STRICTALIGN-BE-NEXT: orr x9, x10, x11
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldrb w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #9]
+; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #13]
+; STRICTALIGN-BE-NEXT: ldrb w10, [x9, #2]
+; STRICTALIGN-BE-NEXT: ldrb w11, [x9, #3]
+; STRICTALIGN-BE-NEXT: ldrb w14, [x9, #4]!
+; STRICTALIGN-BE-NEXT: lsl w12, w12, #16
+; STRICTALIGN-BE-NEXT: ldrb w15, [x9, #2]
+; STRICTALIGN-BE-NEXT: ldrb w9, [x9, #3]
+; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
+; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #8
+; STRICTALIGN-BE-NEXT: orr w8, w12, w8, lsl #24
+; STRICTALIGN-BE-NEXT: orr x9, x9, x15, lsl #8
+; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
+; STRICTALIGN-BE-NEXT: orr w8, w8, w10
+; STRICTALIGN-BE-NEXT: orr x9, x11, x9
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <8 x i16>, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define void @store_v8i16_align1_post32(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align1_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align1_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strb w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x10, x12, #40
+; STRICTALIGN-NEXT: lsr x11, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w12, [x9, #8]!
+; STRICTALIGN-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-NEXT: lsr x10, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x9, #3]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: strb w10, [x9, #2]
+; STRICTALIGN-NEXT: lsr x10, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-NEXT: lsr x10, x12, #56
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #48
+; STRICTALIGN-NEXT: strb w10, [x9, #3]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: add x12, x0, #32
+; STRICTALIGN-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-NEXT: lsr x9, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w10, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: str x12, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align1_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align1_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #9]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: ldr x12, [sp]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #32
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #40
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #48
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #56
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #24
+; STRICTALIGN-BE-NEXT: strb w11, [x0]
+; STRICTALIGN-BE-NEXT: add x11, x0, #32
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #4]!
+; STRICTALIGN-BE-NEXT: lsr x9, x12, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x12, x8, #24
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #8
+; STRICTALIGN-BE-NEXT: strb w12, [x10, #4]!
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-BE-NEXT: str x11, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <8 x i16> %val, ptr %ptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i16_align1_pre32(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align1_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align1_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: lsr x9, x8, #40
+; STRICTALIGN-NEXT: strb w8, [x0, #32]!
+; STRICTALIGN-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-NEXT: lsr x11, x8, #16
+; STRICTALIGN-NEXT: lsr x10, x8, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #5]
+; STRICTALIGN-NEXT: lsr x9, x8, #8
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x11, x12, #8
+; STRICTALIGN-NEXT: lsr x13, x12, #24
+; STRICTALIGN-NEXT: strb w9, [x0, #1]
+; STRICTALIGN-NEXT: lsr x9, x12, #40
+; STRICTALIGN-NEXT: strb w10, [x0, #3]
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: strb w9, [x0, #13]
+; STRICTALIGN-NEXT: lsr x9, x12, #16
+; STRICTALIGN-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-NEXT: lsr x11, x8, #32
+; STRICTALIGN-NEXT: strb w12, [x10, #8]!
+; STRICTALIGN-NEXT: strb w13, [x10, #3]
+; STRICTALIGN-NEXT: lsr x13, x8, #56
+; STRICTALIGN-NEXT: lsr x8, x8, #48
+; STRICTALIGN-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-NEXT: lsr x11, x12, #32
+; STRICTALIGN-NEXT: strb w13, [x9, #3]
+; STRICTALIGN-NEXT: strb w8, [x9, #2]
+; STRICTALIGN-NEXT: lsr x8, x12, #56
+; STRICTALIGN-NEXT: lsr x9, x12, #48
+; STRICTALIGN-NEXT: strb w11, [x10, #4]!
+; STRICTALIGN-NEXT: strb w8, [x10, #3]
+; STRICTALIGN-NEXT: strb w9, [x10, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align1_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align1_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #32]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
+; STRICTALIGN-BE-NEXT: ldr x12, [sp, #8]
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #24
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
+; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: lsr x13, x12, #56
+; STRICTALIGN-BE-NEXT: strb w11, [x9, #4]!
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #48
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
+; STRICTALIGN-BE-NEXT: lsr x10, x12, #16
+; STRICTALIGN-BE-NEXT: strb w11, [x0, #9]
+; STRICTALIGN-BE-NEXT: lsr x11, x12, #32
+; STRICTALIGN-BE-NEXT: strb w10, [x0, #13]
+; STRICTALIGN-BE-NEXT: mov x10, x0
+; STRICTALIGN-BE-NEXT: strb w13, [x10, #8]!
+; STRICTALIGN-BE-NEXT: lsr x13, x12, #40
+; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
+; STRICTALIGN-BE-NEXT: lsr x11, x8, #8
+; STRICTALIGN-BE-NEXT: strb w8, [x9, #3]
+; STRICTALIGN-BE-NEXT: lsr x8, x12, #24
+; STRICTALIGN-BE-NEXT: strb w13, [x10, #2]
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #4]!
+; STRICTALIGN-BE-NEXT: lsr x8, x12, #8
+; STRICTALIGN-BE-NEXT: strb w11, [x9, #2]
+; STRICTALIGN-BE-NEXT: strb w12, [x10, #3]
+; STRICTALIGN-BE-NEXT: strb w8, [x10, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <8 x i16> %val, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <8 x i16> @load_v8i16_align2(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align2:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align2:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #8]!
+; STRICTALIGN-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #16
+; STRICTALIGN-NEXT: orr w9, w11, w10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align2:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w11, [x8, #4]
+; STRICTALIGN-BE-NEXT: ldrh w8, [x8, #6]
+; STRICTALIGN-BE-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <8 x i16>, ptr %ptr, align 2
+ ret <8 x i16> %val
+}
+
+define void @store_v8i16_align2(ptr %ptr, <8 x i16> %val) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align2:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align2:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: lsr x8, x11, #48
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: lsr x9, x11, #32
+; STRICTALIGN-NEXT: strh w11, [x0, #8]!
+; STRICTALIGN-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align2:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: lsr x8, x11, #48
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #16
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: strh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ store <8 x i16> %val, ptr %ptr, align 2
+ ret void
+}
+
+define <8 x i16> @load_v8i16_align2_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align2_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align2_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: add x9, x0, #16
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #8]!
+; STRICTALIGN-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w12, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x10, x8, lsl #16
+; STRICTALIGN-NEXT: orr w10, w12, w11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align2_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w11, [x8, #4]
+; STRICTALIGN-BE-NEXT: ldrh w8, [x8, #6]
+; STRICTALIGN-BE-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i16>, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define <8 x i16> @load_v8i16_align2_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align2_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align2_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #16]!
+; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x9, #8]!
+; STRICTALIGN-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w11, [x9, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x9, #4]
+; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #16
+; STRICTALIGN-NEXT: orr w9, w9, w11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align2_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldrh w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w10, [x9, #4]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x9, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #10]
+; STRICTALIGN-BE-NEXT: orr x9, x9, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i16>, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define void @store_v8i16_align2_post16(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align2_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align2_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: lsr x8, x11, #48
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: lsr x10, x11, #32
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strh w11, [x9, #8]!
+; STRICTALIGN-NEXT: strh w8, [x9, #6]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: strh w10, [x9, #4]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align2_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: lsr x8, x11, #48
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: add x10, x0, #16
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #16
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: strh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x10, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i16> %val, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i16_align2_pre16(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align2_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align2_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0, #16]!
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: lsr x10, x11, #32
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: lsr x9, x11, #48
+; STRICTALIGN-NEXT: strh w11, [x8, #8]!
+; STRICTALIGN-NEXT: strh w9, [x8, #6]
+; STRICTALIGN-NEXT: strh w10, [x8, #4]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align2_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: ldr x10, [sp, #8]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x8, x10, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: strh w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: lsr x8, x10, #16
+; STRICTALIGN-BE-NEXT: strh w10, [x9, #6]
+; STRICTALIGN-BE-NEXT: strh w8, [x9, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i16> %val, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <8 x i16> @load_v8i16_align2_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align2_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align2_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: add x9, x0, #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #8]!
+; STRICTALIGN-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w12, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x10, x8, lsl #16
+; STRICTALIGN-NEXT: orr w10, w12, w11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align2_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w11, [x8, #4]
+; STRICTALIGN-BE-NEXT: ldrh w8, [x8, #6]
+; STRICTALIGN-BE-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <8 x i16>, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define <8 x i16> @load_v8i16_align2_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align2_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align2_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #32]!
+; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x9, #8]!
+; STRICTALIGN-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w11, [x9, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x9, #4]
+; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #16
+; STRICTALIGN-NEXT: orr w9, w9, w11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align2_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #32]!
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldrh w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w10, [x9, #4]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x9, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #10]
+; STRICTALIGN-BE-NEXT: orr x9, x9, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <8 x i16>, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define void @store_v8i16_align2_post32(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align2_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align2_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: lsr x8, x11, #48
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: lsr x10, x11, #32
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strh w11, [x9, #8]!
+; STRICTALIGN-NEXT: strh w8, [x9, #6]
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: strh w10, [x9, #4]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align2_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: lsr x8, x11, #48
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: add x10, x0, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #16
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: strh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x10, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <8 x i16> %val, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i16_align2_pre32(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align2_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align2_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0, #32]!
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: lsr x10, x11, #32
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: lsr x9, x11, #48
+; STRICTALIGN-NEXT: strh w11, [x8, #8]!
+; STRICTALIGN-NEXT: strh w9, [x8, #6]
+; STRICTALIGN-NEXT: strh w10, [x8, #4]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align2_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #32]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: ldr x10, [sp, #8]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x8, x10, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: strh w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: lsr x8, x10, #16
+; STRICTALIGN-BE-NEXT: strh w10, [x9, #6]
+; STRICTALIGN-BE-NEXT: strh w8, [x9, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <8 x i16> %val, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <8 x i16> @load_v8i16_align16(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <8 x i16>, ptr %ptr, align 16
+ ret <8 x i16> %val
+}
+
+define void @store_v8i16_align16(ptr %ptr, <8 x i16> %val) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <8 x i16> %val, ptr %ptr, align 16
+ ret void
+}
+
+define <8 x i16> @load_v8i16_align16_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align16_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align16_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align16_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align16_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i16>, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define <8 x i16> @load_v8i16_align16_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align16_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align16_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align16_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align16_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <8 x i16>, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define void @store_v8i16_align16_post16(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align16_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align16_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align16_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align16_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i16> %val, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i16_align16_pre16(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align16_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align16_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align16_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align16_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <8 x i16> %val, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <8 x i16> @load_v8i16_align16_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align16_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align16_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0], #32
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align16_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align16_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <8 x i16>, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define <8 x i16> @load_v8i16_align16_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v8i16_align16_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v8i16_align16_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v8i16_align16_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v8i16_align16_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <8 x i16>, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <8 x i16> %val
+}
+
+define void @store_v8i16_align16_post32(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align16_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align16_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0], #32
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align16_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align16_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <8 x i16> %val, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v8i16_align16_pre32(ptr %ptr, <8 x i16> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v8i16_align16_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v8i16_align16_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0, #32]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align16_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align16_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <8 x i16> %val, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i32> @load_v2i32_align2(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align2:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align2:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align2:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align2:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <2 x i32>, ptr %ptr, align 2
+ ret <2 x i32> %val
+}
+
+define void @store_v2i32_align2(ptr %ptr, <2 x i32> %val) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align2:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align2:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align2:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align2:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <2 x i32> %val, ptr %ptr, align 2
+ ret void
+}
+
+define <2 x i32> @load_v2i32_align2_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align2_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align2_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align2_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align2_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <2 x i32>, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define <2 x i32> @load_v2i32_align2_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align2_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align2_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #8]!
+; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align2_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align2_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <2 x i32>, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define void @store_v2i32_align2_post8(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align2_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align2_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: add x9, x0, #8
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align2_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align2_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: add x9, x0, #8
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <2 x i32> %val, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i32_align2_pre8(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align2_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align2_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0, #8]!
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align2_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align2_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <2 x i32> %val, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i32> @load_v2i32_align2_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align2_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align2_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align2_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align2_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i32>, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define <2 x i32> @load_v2i32_align2_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align2_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align2_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #16]!
+; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align2_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align2_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i32>, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define void @store_v2i32_align2_post16(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align2_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align2_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: add x9, x0, #16
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align2_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align2_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i32> %val, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i32_align2_pre16(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align2_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align2_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: strh w8, [x0, #16]!
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align2_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align2_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i32> %val, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i32> @load_v2i32_align4(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align4:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align4:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align4:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align4:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <2 x i32>, ptr %ptr, align 4
+ ret <2 x i32> %val
+}
+
+define void @store_v2i32_align4(ptr %ptr, <2 x i32> %val) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align4:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align4:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align4:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align4:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <2 x i32> %val, ptr %ptr, align 4
+ ret void
+}
+
+define <2 x i32> @load_v2i32_align4_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align4_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align4_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align4_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align4_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <2 x i32>, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define <2 x i32> @load_v2i32_align4_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align4_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align4_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w8, w9, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align4_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align4_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <2 x i32>, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define void @store_v2i32_align4_post8(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align4_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align4_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0]
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align4_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align4_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: add x9, x0, #8
+; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <2 x i32> %val, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i32_align4_pre8(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align4_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align4_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align4_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align4_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: str w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <2 x i32> %val, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i32> @load_v2i32_align4_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align4_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align4_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align4_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align4_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i32>, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define <2 x i32> @load_v2i32_align4_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align4_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align4_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w8, w9, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align4_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align4_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i32>, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define void @store_v2i32_align4_post16(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align4_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align4_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align4_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align4_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i32> %val, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i32_align4_pre16(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align4_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align4_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align4_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align4_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: str w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i32> %val, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i32> @load_v2i32_align8(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <2 x i32>, ptr %ptr, align 8
+ ret <2 x i32> %val
+}
+
+define void @store_v2i32_align8(ptr %ptr, <2 x i32> %val) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <2 x i32> %val, ptr %ptr, align 8
+ ret void
+}
+
+define <2 x i32> @load_v2i32_align8_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align8_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align8_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align8_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align8_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <2 x i32>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define <2 x i32> @load_v2i32_align8_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align8_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align8_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align8_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align8_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <2 x i32>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define void @store_v2i32_align8_post8(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align8_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align8_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align8_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align8_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <2 x i32> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i32_align8_pre8(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align8_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align8_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align8_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align8_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <2 x i32> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i32> @load_v2i32_align8_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i32>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define <2 x i32> @load_v2i32_align8_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i32_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i32_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i32_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i32_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i32>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <2 x i32> %val
+}
+
+define void @store_v2i32_align8_post16(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i32> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i32_align8_pre16(ptr %ptr, <2 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i32_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i32_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i32_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i32_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i32> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i32> @load_v4i32_align2(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align2:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align2:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #8]!
+; STRICTALIGN-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #16
+; STRICTALIGN-NEXT: orr w9, w11, w10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align2:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align2:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w11, [x8, #4]
+; STRICTALIGN-BE-NEXT: ldrh w8, [x8, #6]
+; STRICTALIGN-BE-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <4 x i32>, ptr %ptr, align 2
+ ret <4 x i32> %val
+}
+
+define void @store_v4i32_align2(ptr %ptr, <4 x i32> %val) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align2:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align2:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: lsr x8, x11, #48
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: lsr x9, x11, #32
+; STRICTALIGN-NEXT: strh w11, [x0, #8]!
+; STRICTALIGN-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align2:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align2:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: lsr x8, x11, #48
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #16
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: strh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ store <4 x i32> %val, ptr %ptr, align 2
+ ret void
+}
+
+define <4 x i32> @load_v4i32_align2_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align2_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align2_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: add x9, x0, #16
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #8]!
+; STRICTALIGN-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w12, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x10, x8, lsl #16
+; STRICTALIGN-NEXT: orr w10, w12, w11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align2_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align2_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w11, [x8, #4]
+; STRICTALIGN-BE-NEXT: ldrh w8, [x8, #6]
+; STRICTALIGN-BE-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i32>, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define <4 x i32> @load_v4i32_align2_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align2_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align2_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #16]!
+; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x9, #8]!
+; STRICTALIGN-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w11, [x9, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x9, #4]
+; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #16
+; STRICTALIGN-NEXT: orr w9, w9, w11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align2_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align2_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldrh w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w10, [x9, #4]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x9, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #10]
+; STRICTALIGN-BE-NEXT: orr x9, x9, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i32>, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define void @store_v4i32_align2_post16(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align2_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align2_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: lsr x8, x11, #48
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: lsr x10, x11, #32
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strh w11, [x9, #8]!
+; STRICTALIGN-NEXT: strh w8, [x9, #6]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: strh w10, [x9, #4]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align2_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align2_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: lsr x8, x11, #48
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: add x10, x0, #16
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #16
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: strh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x10, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i32> %val, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i32_align2_pre16(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align2_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align2_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0, #16]!
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: lsr x10, x11, #32
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: lsr x9, x11, #48
+; STRICTALIGN-NEXT: strh w11, [x8, #8]!
+; STRICTALIGN-NEXT: strh w9, [x8, #6]
+; STRICTALIGN-NEXT: strh w10, [x8, #4]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align2_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align2_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: ldr x10, [sp, #8]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x8, x10, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: strh w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: lsr x8, x10, #16
+; STRICTALIGN-BE-NEXT: strh w10, [x9, #6]
+; STRICTALIGN-BE-NEXT: strh w8, [x9, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i32> %val, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i32> @load_v4i32_align2_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align2_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align2_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
+; STRICTALIGN-NEXT: ldrh w11, [x0]
+; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: add x9, x0, #32
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #8]!
+; STRICTALIGN-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w12, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x10, x8, lsl #16
+; STRICTALIGN-NEXT: orr w10, w12, w11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align2_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align2_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: mov x8, x0
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x8, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w11, [x8, #4]
+; STRICTALIGN-BE-NEXT: ldrh w8, [x8, #6]
+; STRICTALIGN-BE-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <4 x i32>, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define <4 x i32> @load_v4i32_align2_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align2_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align2_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldrh w8, [x0, #32]!
+; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
+; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
+; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldrh w8, [x9, #8]!
+; STRICTALIGN-NEXT: ldrh w10, [x0, #10]
+; STRICTALIGN-NEXT: ldrh w11, [x9, #6]
+; STRICTALIGN-NEXT: ldrh w9, [x9, #4]
+; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #16
+; STRICTALIGN-NEXT: orr w9, w9, w11, lsl #16
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align2_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align2_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #32]!
+; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldrh w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: ldrh w10, [x9, #4]
+; STRICTALIGN-BE-NEXT: ldrh w9, [x9, #6]
+; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #10]
+; STRICTALIGN-BE-NEXT: orr x9, x9, x10, lsl #16
+; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <4 x i32>, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define void @store_v4i32_align2_post32(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align2_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align2_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0]
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: lsr x8, x11, #48
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: lsr x10, x11, #32
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: mov x9, x0
+; STRICTALIGN-NEXT: strh w11, [x9, #8]!
+; STRICTALIGN-NEXT: strh w8, [x9, #6]
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: strh w10, [x9, #4]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align2_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align2_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: lsr x8, x11, #48
+; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
+; STRICTALIGN-BE-NEXT: add x10, x0, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: lsr x9, x11, #16
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: strh w11, [x0, #6]
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x10, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <4 x i32> %val, ptr %ptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i32_align2_pre32(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align2_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align2_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: strh w8, [x0, #32]!
+; STRICTALIGN-NEXT: lsr x9, x8, #48
+; STRICTALIGN-NEXT: ldr x11, [sp, #8]
+; STRICTALIGN-NEXT: lsr x10, x8, #32
+; STRICTALIGN-NEXT: lsr x8, x8, #16
+; STRICTALIGN-NEXT: strh w9, [x0, #6]
+; STRICTALIGN-NEXT: lsr x9, x11, #16
+; STRICTALIGN-NEXT: strh w10, [x0, #4]
+; STRICTALIGN-NEXT: lsr x10, x11, #32
+; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: mov x8, x0
+; STRICTALIGN-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-NEXT: lsr x9, x11, #48
+; STRICTALIGN-NEXT: strh w11, [x8, #8]!
+; STRICTALIGN-NEXT: strh w9, [x8, #6]
+; STRICTALIGN-NEXT: strh w10, [x8, #4]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align2_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align2_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #32]!
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
+; STRICTALIGN-BE-NEXT: ldr x10, [sp, #8]
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
+; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: lsr x8, x10, #48
+; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
+; STRICTALIGN-BE-NEXT: mov x9, x0
+; STRICTALIGN-BE-NEXT: strh w8, [x9, #8]!
+; STRICTALIGN-BE-NEXT: lsr x8, x10, #16
+; STRICTALIGN-BE-NEXT: strh w10, [x9, #6]
+; STRICTALIGN-BE-NEXT: strh w8, [x9, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <4 x i32> %val, ptr %newptr, align 2
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i32> @load_v4i32_align4(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align4:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align4:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldp w9, w8, [x0, #8]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align4:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <4 x i32>, ptr %ptr, align 4
+ ret <4 x i32> %val
+}
+
+define void @store_v4i32_align4(ptr %ptr, <4 x i32> %val) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align4:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align4:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: str w8, [x0, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #12]
+; STRICTALIGN-NEXT: lsr x8, x9, #32
+; STRICTALIGN-NEXT: stp w9, w8, [x0]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align4:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str w8, [x0, #12]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x9, [sp]
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ store <4 x i32> %val, ptr %ptr, align 4
+ ret void
+}
+
+define <4 x i32> @load_v4i32_align4_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align4_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align4_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldp w9, w8, [x0, #8]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align4_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i32>, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define <4 x i32> @load_v4i32_align4_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align4_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align4_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr w8, [x0, #16]!
+; STRICTALIGN-NEXT: ldp w10, w9, [x0, #8]
+; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #32
+; STRICTALIGN-NEXT: str x9, [sp, #8]
+; STRICTALIGN-NEXT: ldr w9, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align4_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldp w9, w10, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #32
+; STRICTALIGN-BE-NEXT: str x9, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i32>, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define void @store_v4i32_align4_post16(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align4_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align4_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: str w8, [x0, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #12]
+; STRICTALIGN-NEXT: lsr x8, x9, #32
+; STRICTALIGN-NEXT: stp w9, w8, [x0]
+; STRICTALIGN-NEXT: add x9, x0, #16
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align4_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str w8, [x0, #12]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x9, [sp]
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i32> %val, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i32_align4_pre16(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align4_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align4_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #16]!
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp, #8]
+; STRICTALIGN-NEXT: lsr x10, x9, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0, #4]
+; STRICTALIGN-NEXT: str w10, [x0, #12]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align4_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x10, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
+; STRICTALIGN-BE-NEXT: str w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldr x9, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: str w9, [x0, #12]
+; STRICTALIGN-BE-NEXT: stp w10, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i32> %val, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i32> @load_v4i32_align4_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align4_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align4_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldp w9, w8, [x0, #8]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align4_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <4 x i32>, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define <4 x i32> @load_v4i32_align4_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align4_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align4_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr w8, [x0, #32]!
+; STRICTALIGN-NEXT: ldp w10, w9, [x0, #8]
+; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #32
+; STRICTALIGN-NEXT: str x9, [sp, #8]
+; STRICTALIGN-NEXT: ldr w9, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align4_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr w8, [x0, #32]!
+; STRICTALIGN-BE-NEXT: ldp w9, w10, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #32
+; STRICTALIGN-BE-NEXT: str x9, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <4 x i32>, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define void @store_v4i32_align4_post32(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align4_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align4_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: str w8, [x0, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #12]
+; STRICTALIGN-NEXT: lsr x8, x9, #32
+; STRICTALIGN-NEXT: stp w9, w8, [x0]
+; STRICTALIGN-NEXT: add x9, x0, #32
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align4_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str w8, [x0, #12]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x9, [sp]
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <4 x i32> %val, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i32_align4_pre32(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align4_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align4_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #32]!
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp, #8]
+; STRICTALIGN-NEXT: lsr x10, x9, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0, #4]
+; STRICTALIGN-NEXT: str w10, [x0, #12]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align4_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x10, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
+; STRICTALIGN-BE-NEXT: str w9, [x0, #32]!
+; STRICTALIGN-BE-NEXT: ldr x9, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: str w9, [x0, #12]
+; STRICTALIGN-BE-NEXT: stp w10, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <4 x i32> %val, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i32> @load_v4i32_align16(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <4 x i32>, ptr %ptr, align 16
+ ret <4 x i32> %val
+}
+
+define void @store_v4i32_align16(ptr %ptr, <4 x i32> %val) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <4 x i32> %val, ptr %ptr, align 16
+ ret void
+}
+
+define <4 x i32> @load_v4i32_align16_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align16_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align16_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align16_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align16_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i32>, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define <4 x i32> @load_v4i32_align16_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align16_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align16_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align16_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align16_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <4 x i32>, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define void @store_v4i32_align16_post16(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align16_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align16_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align16_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align16_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i32> %val, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i32_align16_pre16(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align16_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align16_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align16_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align16_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <4 x i32> %val, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <4 x i32> @load_v4i32_align16_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align16_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align16_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0], #32
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align16_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align16_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <4 x i32>, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define <4 x i32> @load_v4i32_align16_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v4i32_align16_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v4i32_align16_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v4i32_align16_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v4i32_align16_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <4 x i32>, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <4 x i32> %val
+}
+
+define void @store_v4i32_align16_post32(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align16_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align16_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0], #32
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align16_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align16_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <4 x i32> %val, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v4i32_align16_pre32(ptr %ptr, <4 x i32> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v4i32_align16_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v4i32_align16_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0, #32]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v4i32_align16_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v4i32_align16_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <4 x i32> %val, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <1 x i64> @load_v1i64_align4(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align4:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align4:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align4:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align4:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <1 x i64>, ptr %ptr, align 4
+ ret <1 x i64> %val
+}
+
+define void @store_v1i64_align4(ptr %ptr, <1 x i64> %val) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align4:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align4:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align4:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align4:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <1 x i64> %val, ptr %ptr, align 4
+ ret void
+}
+
+define <1 x i64> @load_v1i64_align4_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align4_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align4_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align4_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ld1 { v0.1d }, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align4_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <1 x i64>, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <1 x i64> %val
+}
+
+define <1 x i64> @load_v1i64_align4_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align4_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align4_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w8, w9, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align4_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #8
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align4_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <1 x i64>, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <1 x i64> %val
+}
+
+define void @store_v1i64_align4_post8(ptr %ptr, <1 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align4_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align4_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0]
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align4_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: st1 { v0.1d }, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align4_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <1 x i64> %val, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v1i64_align4_pre8(ptr %ptr, <1 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align4_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align4_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align4_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #8
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align4_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #8]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <1 x i64> %val, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <1 x i64> @load_v1i64_align4_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align4_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align4_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align4_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align4_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <1 x i64>, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <1 x i64> %val
+}
+
+define <1 x i64> @load_v1i64_align4_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align4_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align4_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldp w8, w9, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align4_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align4_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <1 x i64>, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <1 x i64> %val
+}
+
+define void @store_v1i64_align4_post16(ptr %ptr, <1 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align4_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align4_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align4_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align4_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <1 x i64> %val, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v1i64_align4_pre16(ptr %ptr, <1 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align4_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align4_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: fmov x8, d0
+; STRICTALIGN-NEXT: lsr x9, x8, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align4_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align4_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: fmov x8, d0
+; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <1 x i64> %val, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <1 x i64> @load_v1i64_align8(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <1 x i64>, ptr %ptr, align 8
+ ret <1 x i64> %val
+}
+
+define void @store_v1i64_align8(ptr %ptr, <1 x i64> %val) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str d0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <1 x i64> %val, ptr %ptr, align 8
+ ret void
+}
+
+define <1 x i64> @load_v1i64_align8_post8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align8_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align8_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align8_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ld1 { v0.1d }, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align8_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ld1 { v0.1d }, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <1 x i64>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <1 x i64> %val
+}
+
+define <1 x i64> @load_v1i64_align8_pre8(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align8_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align8_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align8_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #8]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #8
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align8_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0, #8]
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ %val = load <1 x i64>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <1 x i64> %val
+}
+
+define void @store_v1i64_align8_post8(ptr %ptr, <1 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align8_post8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #8
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align8_post8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align8_post8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: st1 { v0.1d }, [x0], #8
+; NOSTRICTALIGN-BE-NEXT: str x0, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align8_post8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: st1 { v0.1d }, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <1 x i64> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v1i64_align8_pre8(ptr %ptr, <1 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align8_pre8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #8]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align8_pre8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0, #8]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align8_pre8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #8
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #8]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align8_pre8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: str d0, [x0, #8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 8
+ store <1 x i64> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <1 x i64> @load_v1i64_align8_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <1 x i64>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <1 x i64> %val
+}
+
+define <1 x i64> @load_v1i64_align8_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v1i64_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v1i64_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr d0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v1i64_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr d0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v1i64_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr d0, [x0, #16]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <1 x i64>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <1 x i64> %val
+}
+
+define void @store_v1i64_align8_post16(ptr %ptr, <1 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str d0, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <1 x i64> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v1i64_align8_pre16(ptr %ptr, <1 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v1i64_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str d0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v1i64_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str d0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v1i64_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str d0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v1i64_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str d0, [x0, #16]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <1 x i64> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i64> @load_v2i64_align4(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align4:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align4:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldp w9, w8, [x0, #8]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align4:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align4:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <2 x i64>, ptr %ptr, align 4
+ ret <2 x i64> %val
+}
+
+define void @store_v2i64_align4(ptr %ptr, <2 x i64> %val) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align4:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align4:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: str w8, [x0, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #12]
+; STRICTALIGN-NEXT: lsr x8, x9, #32
+; STRICTALIGN-NEXT: stp w9, w8, [x0]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align4:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align4:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str w8, [x0, #12]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x9, [sp]
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ store <2 x i64> %val, ptr %ptr, align 4
+ ret void
+}
+
+define <2 x i64> @load_v2i64_align4_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align4_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align4_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldp w9, w8, [x0, #8]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align4_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align4_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i64>, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define <2 x i64> @load_v2i64_align4_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align4_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align4_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr w8, [x0, #16]!
+; STRICTALIGN-NEXT: ldp w10, w9, [x0, #8]
+; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #32
+; STRICTALIGN-NEXT: str x9, [sp, #8]
+; STRICTALIGN-NEXT: ldr w9, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align4_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align4_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr w8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldp w9, w10, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #32
+; STRICTALIGN-BE-NEXT: str x9, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i64>, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define void @store_v2i64_align4_post16(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align4_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align4_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: str w8, [x0, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #12]
+; STRICTALIGN-NEXT: lsr x8, x9, #32
+; STRICTALIGN-NEXT: stp w9, w8, [x0]
+; STRICTALIGN-NEXT: add x9, x0, #16
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align4_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align4_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str w8, [x0, #12]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x9, [sp]
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i64> %val, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i64_align4_pre16(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align4_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align4_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #16]!
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp, #8]
+; STRICTALIGN-NEXT: lsr x10, x9, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0, #4]
+; STRICTALIGN-NEXT: str w10, [x0, #12]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align4_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align4_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x10, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
+; STRICTALIGN-BE-NEXT: str w9, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldr x9, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: str w9, [x0, #12]
+; STRICTALIGN-BE-NEXT: stp w10, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i64> %val, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i64> @load_v2i64_align4_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align4_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align4_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldp w9, w8, [x0, #8]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldp w9, w8, [x0]
+; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align4_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align4_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <2 x i64>, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define <2 x i64> @load_v2i64_align4_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align4_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align4_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr w8, [x0, #32]!
+; STRICTALIGN-NEXT: ldp w10, w9, [x0, #8]
+; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #32
+; STRICTALIGN-NEXT: str x9, [sp, #8]
+; STRICTALIGN-NEXT: ldr w9, [x0, #4]
+; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align4_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align4_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr w8, [x0, #32]!
+; STRICTALIGN-BE-NEXT: ldp w9, w10, [x0, #8]
+; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #32
+; STRICTALIGN-BE-NEXT: str x9, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr w9, [x0, #4]
+; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <2 x i64>, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define void @store_v2i64_align4_post32(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align4_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align4_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: str w8, [x0, #8]
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #12]
+; STRICTALIGN-NEXT: lsr x8, x9, #32
+; STRICTALIGN-NEXT: stp w9, w8, [x0]
+; STRICTALIGN-NEXT: add x9, x0, #32
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align4_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align4_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str w8, [x0, #12]
+; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
+; STRICTALIGN-BE-NEXT: ldr x9, [sp]
+; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <2 x i64> %val, ptr %ptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i64_align4_pre32(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align4_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align4_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: str w8, [x0, #32]!
+; STRICTALIGN-NEXT: lsr x8, x8, #32
+; STRICTALIGN-NEXT: ldr x9, [sp, #8]
+; STRICTALIGN-NEXT: lsr x10, x9, #32
+; STRICTALIGN-NEXT: stp w8, w9, [x0, #4]
+; STRICTALIGN-NEXT: str w10, [x0, #12]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align4_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align4_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x10, [sp]
+; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
+; STRICTALIGN-BE-NEXT: str w9, [x0, #32]!
+; STRICTALIGN-BE-NEXT: ldr x9, [sp, #8]
+; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
+; STRICTALIGN-BE-NEXT: str w9, [x0, #12]
+; STRICTALIGN-BE-NEXT: stp w10, w8, [x0, #4]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <2 x i64> %val, ptr %newptr, align 4
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i64> @load_v2i64_align8(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr x8, [x0]
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr x8, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <2 x i64>, ptr %ptr, align 8
+ ret <2 x i64> %val
+}
+
+define void @store_v2i64_align8(ptr %ptr, <2 x i64> %val) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align8:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align8:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: str x8, [x0, #8]
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: str x8, [x0]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align8:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: str x8, [x0]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ store <2 x i64> %val, ptr %ptr, align 8
+ ret void
+}
+
+define <2 x i64> @load_v2i64_align8_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr x8, [x0]
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr x8, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i64>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define <2 x i64> @load_v2i64_align8_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr x8, [x0, #16]!
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr x8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i64>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define void @store_v2i64_align8_post16(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align8_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align8_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: add x9, x0, #16
+; STRICTALIGN-NEXT: str x8, [x0, #8]
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: str x8, [x0]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align8_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: add x9, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: str x8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i64> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i64_align8_pre16(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align8_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align8_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: str x8, [x0, #16]!
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: str x8, [x0, #8]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align8_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: str x8, [x0, #16]!
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i64> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i64> @load_v2i64_align8_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align8_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align8_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: sub sp, sp, #16
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr x8, [x0]
+; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align8_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: sub sp, sp, #16
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: ldr x8, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [sp]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <2 x i64>, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define <2 x i64> @load_v2i64_align8_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align8_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align8_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr x8, [x0, #32]!
+; STRICTALIGN-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ldr q0, [sp]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align8_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr x8, [x0, #32]!
+; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <2 x i64>, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define void @store_v2i64_align8_post32(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align8_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align8_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: add x9, x0, #32
+; STRICTALIGN-NEXT: str x8, [x0, #8]
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: str x8, [x0]
+; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align8_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: add x9, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: str x8, [x0]
+; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <2 x i64> %val, ptr %ptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i64_align8_pre32(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align8_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align8_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-NEXT: ldr x8, [sp]
+; STRICTALIGN-NEXT: str x8, [x0, #32]!
+; STRICTALIGN-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-NEXT: str x8, [x0, #8]
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align8_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
+; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
+; STRICTALIGN-BE-NEXT: ldr x8, [sp]
+; STRICTALIGN-BE-NEXT: str x8, [x0, #32]!
+; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
+; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <2 x i64> %val, ptr %newptr, align 8
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i64> @load_v2i64_align16(ptr %ptr) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ %val = load <2 x i64>, ptr %ptr, align 16
+ ret <2 x i64> %val
+}
+
+define void @store_v2i64_align16(ptr %ptr, <2 x i64> %val) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: ret
+ store <2 x i64> %val, ptr %ptr, align 16
+ ret void
+}
+
+define <2 x i64> @load_v2i64_align16_post16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align16_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align16_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align16_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align16_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i64>, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define <2 x i64> @load_v2i64_align16_pre16(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align16_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align16_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align16_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align16_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0, #16]
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ %val = load <2 x i64>, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define void @store_v2i64_align16_post16(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align16_post16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #16
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align16_post16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align16_post16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align16_post16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i64> %val, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i64_align16_pre16(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align16_pre16:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #16]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align16_pre16:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0, #16]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align16_pre16:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #16
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align16_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: str q0, [x0, #16]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 16
+ store <2 x i64> %val, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define <2 x i64> @load_v2i64_align16_post32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align16_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align16_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0], #32
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align16_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align16_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <2 x i64>, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define <2 x i64> @load_v2i64_align16_pre32(ptr %ptr, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: load_v2i64_align16_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: load_v2i64_align16_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ldr q0, [x0, #32]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: load_v2i64_align16_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v2i64_align16_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <2 x i64>, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret <2 x i64> %val
+}
+
+define void @store_v2i64_align16_post32(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align16_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align16_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0], #32
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align16_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align16_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str q0, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <2 x i64> %val, ptr %ptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
+
+define void @store_v2i64_align16_pre32(ptr %ptr, <2 x i64> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v2i64_align16_pre32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0, #32]!
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v2i64_align16_pre32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: str q0, [x0, #32]!
+; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v2i64_align16_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v2i64_align16_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ store <2 x i64> %val, ptr %newptr, align 16
+ store ptr %newptr, ptr %writeback
+ ret void
+}
diff --git a/llvm/test/CodeGen/AArch64/vector-ldst-offset.ll b/llvm/test/CodeGen/AArch64/vector-ldst-offset.ll
index b31ba46893bd3..af5d432147207 100644
--- a/llvm/test/CodeGen/AArch64/vector-ldst-offset.ll
+++ b/llvm/test/CodeGen/AArch64/vector-ldst-offset.ll
@@ -1,6 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=aarch64 < %s -o - | FileCheck %s --check-prefixes=CHECK-LE
-; RUN: llc -mtriple=aarch64_be < %s -o - | FileCheck %s --check-prefixes=CHECK-BE
+; RUN: llc -mtriple=aarch64 < %s -o - | FileCheck %s --check-prefixes=CHECK-LE
+; RUN: llc -mtriple=aarch64_be < %s -o - | FileCheck %s --check-prefixes=CHECK-BE
+; RUN: llc -mtriple=aarch64 < %s -o - -mattr=+strict-align | FileCheck %s --check-prefixes=CHECK-LE-SA
+; RUN: llc -mtriple=aarch64_be < %s -o - -mattr=+strict-align | FileCheck %s --check-prefixes=CHECK-BE-SA
; Check that we use the correct offset mode for vector loads and stores, and in
; particular for big-endian we use ld1/st1 which only allows postindex immediate
@@ -19,6 +21,37 @@ define [2 x ptr] @v8i8_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.8b }, [x0], #8
; CHECK-BE-NEXT: st1 { v0.8b }, [x1], #8
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i8_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i8_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i8>, ptr %ldptr, align 2
store <8 x i8> %val, ptr %stptr, align 2
@@ -43,6 +76,34 @@ define [2 x ptr] @v8i8_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.8b }, [x0]
; CHECK-BE-NEXT: st1 { v0.8b }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i8_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
+; CHECK-LE-SA-NEXT: lsr x8, x9, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i8_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 8
@@ -68,6 +129,37 @@ define [2 x ptr] @v8i8_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #16
; CHECK-BE-NEXT: st1 { v0.8b }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i8_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i8_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i8>, ptr %ldptr, align 2
store <8 x i8> %val, ptr %stptr, align 2
@@ -92,6 +184,34 @@ define [2 x ptr] @v8i8_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.8b }, [x0]
; CHECK-BE-NEXT: st1 { v0.8b }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i8_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x8, x9, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i8_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -120,6 +240,38 @@ define [2 x ptr] @v8i8_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.8b }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i8_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i8_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i8>, ptr %ldptr, align 2
store <8 x i8> %val, ptr %stptr, align 2
@@ -147,6 +299,36 @@ define [2 x ptr] @v8i8_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.8b }, [x0]
; CHECK-BE-NEXT: st1 { v0.8b }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i8_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w10, [x1]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #16
+; CHECK-LE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i8_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w11, [x1]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -169,6 +351,37 @@ define [2 x ptr] @v4i16_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4h }, [x0], #8
; CHECK-BE-NEXT: st1 { v0.4h }, [x1], #8
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i16_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i16_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x i16>, ptr %ldptr, align 2
store <4 x i16> %val, ptr %stptr, align 2
@@ -193,6 +406,34 @@ define [2 x ptr] @v4i16_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i16_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
+; CHECK-LE-SA-NEXT: lsr x8, x9, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i16_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 8
@@ -218,6 +459,37 @@ define [2 x ptr] @v4i16_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #16
; CHECK-BE-NEXT: st1 { v0.4h }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i16_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i16_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x i16>, ptr %ldptr, align 2
store <4 x i16> %val, ptr %stptr, align 2
@@ -242,6 +514,34 @@ define [2 x ptr] @v4i16_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i16_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x8, x9, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i16_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -270,6 +570,38 @@ define [2 x ptr] @v4i16_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.4h }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i16_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i16_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x i16>, ptr %ldptr, align 2
store <4 x i16> %val, ptr %stptr, align 2
@@ -297,6 +629,36 @@ define [2 x ptr] @v4i16_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i16_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w10, [x1]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #16
+; CHECK-LE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i16_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w11, [x1]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -319,6 +681,37 @@ define [2 x ptr] @v2i32_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2s }, [x0], #8
; CHECK-BE-NEXT: st1 { v0.2s }, [x1], #8
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i32_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i32_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x i32>, ptr %ldptr, align 2
store <2 x i32> %val, ptr %stptr, align 2
@@ -343,6 +736,34 @@ define [2 x ptr] @v2i32_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2s }, [x0]
; CHECK-BE-NEXT: st1 { v0.2s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i32_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
+; CHECK-LE-SA-NEXT: lsr x8, x9, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i32_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 8
@@ -368,6 +789,37 @@ define [2 x ptr] @v2i32_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #16
; CHECK-BE-NEXT: st1 { v0.2s }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i32_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i32_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x i32>, ptr %ldptr, align 2
store <2 x i32> %val, ptr %stptr, align 2
@@ -392,6 +844,34 @@ define [2 x ptr] @v2i32_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2s }, [x0]
; CHECK-BE-NEXT: st1 { v0.2s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i32_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x8, x9, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i32_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -420,6 +900,38 @@ define [2 x ptr] @v2i32_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.2s }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i32_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i32_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x i32>, ptr %ldptr, align 2
store <2 x i32> %val, ptr %stptr, align 2
@@ -447,6 +959,36 @@ define [2 x ptr] @v2i32_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.2s }, [x0]
; CHECK-BE-NEXT: st1 { v0.2s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i32_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w10, [x1]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #16
+; CHECK-LE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i32_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w11, [x1]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -469,6 +1011,37 @@ define [2 x ptr] @v1i64_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.1d }, [x0], #8
; CHECK-BE-NEXT: st1 { v0.1d }, [x1], #8
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1i64_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1i64_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <1 x i64>, ptr %ldptr, align 2
store <1 x i64> %val, ptr %stptr, align 2
@@ -493,6 +1066,34 @@ define [2 x ptr] @v1i64_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #8
; CHECK-BE-NEXT: str d0, [x8, #8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1i64_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
+; CHECK-LE-SA-NEXT: lsr x8, x9, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1i64_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 8
@@ -517,6 +1118,37 @@ define [2 x ptr] @v1i64_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #16
; CHECK-BE-NEXT: str d0, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1i64_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1i64_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <1 x i64>, ptr %ldptr, align 2
store <1 x i64> %val, ptr %stptr, align 2
@@ -541,6 +1173,34 @@ define [2 x ptr] @v1i64_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #16
; CHECK-BE-NEXT: str d0, [x8, #16]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1i64_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x8, x9, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1i64_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -569,6 +1229,38 @@ define [2 x ptr] @v1i64_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: str d0, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1i64_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: strh w11, [x1]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x10, x9, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1i64_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <1 x i64>, ptr %ldptr, align 2
store <1 x i64> %val, ptr %stptr, align 2
@@ -597,6 +1289,36 @@ define [2 x ptr] @v1i64_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: str d0, [x8, x2]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1i64_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-LE-SA-NEXT: strh w10, [x1]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #16
+; CHECK-LE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1i64_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w11, [x1]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -619,6 +1341,36 @@ define [2 x ptr] @v4f16_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4h }, [x0], #8
; CHECK-BE-NEXT: st1 { v0.4h }, [x1], #8
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f16_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: mov x10, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x0]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f16_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x half>, ptr %ldptr, align 2
store <4 x half> %val, ptr %stptr, align 2
@@ -643,6 +1395,33 @@ define [2 x ptr] @v4f16_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f16_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-LE-SA-NEXT: mov x9, x0
+; CHECK-LE-SA-NEXT: ldrh w11, [x9, #4]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w9, [x9, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
+; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f16_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 8
@@ -668,6 +1447,36 @@ define [2 x ptr] @v4f16_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #16
; CHECK-BE-NEXT: st1 { v0.4h }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f16_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: mov x10, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x0]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f16_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x half>, ptr %ldptr, align 2
store <4 x half> %val, ptr %stptr, align 2
@@ -692,6 +1501,33 @@ define [2 x ptr] @v4f16_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f16_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: mov x9, x0
+; CHECK-LE-SA-NEXT: ldrh w11, [x9, #4]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w9, [x9, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f16_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -720,6 +1556,37 @@ define [2 x ptr] @v4f16_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.4h }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f16_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: mov x10, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x0]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f16_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x half>, ptr %ldptr, align 2
store <4 x half> %val, ptr %stptr, align 2
@@ -747,6 +1614,35 @@ define [2 x ptr] @v4f16_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f16_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x8, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #2]
+; CHECK-LE-SA-NEXT: ldrh w10, [x8]
+; CHECK-LE-SA-NEXT: mov x0, x8
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #4]!
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #2]
+; CHECK-LE-SA-NEXT: strh w10, [x1]
+; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f16_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w11, [x1]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -769,6 +1665,36 @@ define [2 x ptr] @v2f32_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2s }, [x0], #8
; CHECK-BE-NEXT: st1 { v0.2s }, [x1], #8
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f32_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: mov x10, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x0]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f32_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x float>, ptr %ldptr, align 2
store <2 x float> %val, ptr %stptr, align 2
@@ -793,6 +1719,33 @@ define [2 x ptr] @v2f32_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2s }, [x0]
; CHECK-BE-NEXT: st1 { v0.2s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f32_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-LE-SA-NEXT: mov x9, x0
+; CHECK-LE-SA-NEXT: ldrh w11, [x9, #4]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w9, [x9, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
+; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f32_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 8
@@ -818,6 +1771,36 @@ define [2 x ptr] @v2f32_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #16
; CHECK-BE-NEXT: st1 { v0.2s }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f32_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: mov x10, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x0]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f32_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x float>, ptr %ldptr, align 2
store <2 x float> %val, ptr %stptr, align 2
@@ -842,6 +1825,33 @@ define [2 x ptr] @v2f32_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2s }, [x0]
; CHECK-BE-NEXT: st1 { v0.2s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f32_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: mov x9, x0
+; CHECK-LE-SA-NEXT: ldrh w11, [x9, #4]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w9, [x9, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f32_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -870,6 +1880,37 @@ define [2 x ptr] @v2f32_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.2s }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f32_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: mov x10, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x0]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f32_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x float>, ptr %ldptr, align 2
store <2 x float> %val, ptr %stptr, align 2
@@ -897,6 +1938,35 @@ define [2 x ptr] @v2f32_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.2s }, [x0]
; CHECK-BE-NEXT: st1 { v0.2s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f32_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x8, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #2]
+; CHECK-LE-SA-NEXT: ldrh w10, [x8]
+; CHECK-LE-SA-NEXT: mov x0, x8
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #4]!
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #2]
+; CHECK-LE-SA-NEXT: strh w10, [x1]
+; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f32_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w11, [x1]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -919,6 +1989,36 @@ define [2 x ptr] @v1f64_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.1d }, [x0], #8
; CHECK-BE-NEXT: st1 { v0.1d }, [x1], #8
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1f64_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: mov x10, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x0]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1f64_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <1 x double>, ptr %ldptr, align 2
store <1 x double> %val, ptr %stptr, align 2
@@ -943,6 +2043,33 @@ define [2 x ptr] @v1f64_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #8
; CHECK-BE-NEXT: str d0, [x8, #8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1f64_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-LE-SA-NEXT: mov x9, x0
+; CHECK-LE-SA-NEXT: ldrh w11, [x9, #4]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w9, [x9, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
+; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1f64_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 8
@@ -967,6 +2094,36 @@ define [2 x ptr] @v1f64_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #16
; CHECK-BE-NEXT: str d0, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1f64_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: mov x10, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x0]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1f64_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <1 x double>, ptr %ldptr, align 2
store <1 x double> %val, ptr %stptr, align 2
@@ -991,6 +2148,33 @@ define [2 x ptr] @v1f64_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #16
; CHECK-BE-NEXT: str d0, [x8, #16]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1f64_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: mov x9, x0
+; CHECK-LE-SA-NEXT: ldrh w11, [x9, #4]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w9, [x9, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1f64_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: lsr w9, w8, #16
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -1019,6 +2203,37 @@ define [2 x ptr] @v1f64_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: str d0, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1f64_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: mov x10, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x0]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
+; CHECK-LE-SA-NEXT: strh w9, [x1]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
+; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1f64_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w12, [x8]
+; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <1 x double>, ptr %ldptr, align 2
store <1 x double> %val, ptr %stptr, align 2
@@ -1047,6 +2262,35 @@ define [2 x ptr] @v1f64_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: str d0, [x8, x2]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v1f64_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x8, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #2]
+; CHECK-LE-SA-NEXT: ldrh w10, [x8]
+; CHECK-LE-SA-NEXT: mov x0, x8
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #4]!
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #2]
+; CHECK-LE-SA-NEXT: strh w10, [x1]
+; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
+; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v1f64_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: strh w11, [x1]
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -1069,6 +2313,97 @@ define [2 x ptr] @v16i8_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.16b }, [x0], #16
; CHECK-BE-NEXT: st1 { v0.16b }, [x1], #16
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v16i8_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v16i8_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x9]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <16 x i8>, ptr %ldptr, align 2
store <16 x i8> %val, ptr %stptr, align 2
@@ -1093,6 +2428,93 @@ define [2 x ptr] @v16i8_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.16b }, [x0]
; CHECK-BE-NEXT: st1 { v0.16b }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v16i8_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v16i8_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -1118,6 +2540,97 @@ define [2 x ptr] @v16i8_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #32
; CHECK-BE-NEXT: st1 { v0.16b }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v16i8_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v16i8_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x9]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <16 x i8>, ptr %ldptr, align 2
store <16 x i8> %val, ptr %stptr, align 2
@@ -1142,6 +2655,93 @@ define [2 x ptr] @v16i8_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.16b }, [x0]
; CHECK-BE-NEXT: st1 { v0.16b }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v16i8_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v16i8_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 32
@@ -1170,6 +2770,96 @@ define [2 x ptr] @v16i8_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.16b }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v16i8_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v16i8_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: str x8, [sp, #8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <16 x i8>, ptr %ldptr, align 2
store <16 x i8> %val, ptr %stptr, align 2
@@ -1197,6 +2887,96 @@ define [2 x ptr] @v16i8_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.16b }, [x0]
; CHECK-BE-NEXT: st1 { v0.16b }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v16i8_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v16i8_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: str x8, [sp, #8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -1219,6 +2999,97 @@ define [2 x ptr] @v8i16_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.8h }, [x0], #16
; CHECK-BE-NEXT: st1 { v0.8h }, [x1], #16
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i16_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i16_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i16>, ptr %ldptr, align 2
store <8 x i16> %val, ptr %stptr, align 2
@@ -1243,6 +3114,93 @@ define [2 x ptr] @v8i16_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.8h }, [x0]
; CHECK-BE-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i16_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i16_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -1268,6 +3226,97 @@ define [2 x ptr] @v8i16_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #32
; CHECK-BE-NEXT: st1 { v0.8h }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i16_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i16_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i16>, ptr %ldptr, align 2
store <8 x i16> %val, ptr %stptr, align 2
@@ -1292,6 +3341,93 @@ define [2 x ptr] @v8i16_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.8h }, [x0]
; CHECK-BE-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i16_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i16_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 32
@@ -1320,6 +3456,96 @@ define [2 x ptr] @v8i16_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.8h }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i16_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i16_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: str x8, [sp, #8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i16>, ptr %ldptr, align 2
store <8 x i16> %val, ptr %stptr, align 2
@@ -1347,6 +3573,96 @@ define [2 x ptr] @v8i16_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.8h }, [x0]
; CHECK-BE-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8i16_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i16_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: str x8, [sp, #8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -1369,6 +3685,97 @@ define [2 x ptr] @v4i32_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4s }, [x0], #16
; CHECK-BE-NEXT: st1 { v0.4s }, [x1], #16
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i32_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i32_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x i32>, ptr %ldptr, align 2
store <4 x i32> %val, ptr %stptr, align 2
@@ -1393,6 +3800,93 @@ define [2 x ptr] @v4i32_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4s }, [x0]
; CHECK-BE-NEXT: st1 { v0.4s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i32_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i32_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -1418,6 +3912,97 @@ define [2 x ptr] @v4i32_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #32
; CHECK-BE-NEXT: st1 { v0.4s }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i32_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i32_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x i32>, ptr %ldptr, align 2
store <4 x i32> %val, ptr %stptr, align 2
@@ -1442,6 +4027,93 @@ define [2 x ptr] @v4i32_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4s }, [x0]
; CHECK-BE-NEXT: st1 { v0.4s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i32_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i32_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 32
@@ -1470,6 +4142,96 @@ define [2 x ptr] @v4i32_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.4s }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i32_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i32_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: str x8, [sp, #8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x i32>, ptr %ldptr, align 2
store <4 x i32> %val, ptr %stptr, align 2
@@ -1497,6 +4259,96 @@ define [2 x ptr] @v4i32_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.4s }, [x0]
; CHECK-BE-NEXT: st1 { v0.4s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4i32_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4i32_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: str x8, [sp, #8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -1519,6 +4371,97 @@ define [2 x ptr] @v2i64_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2d }, [x0], #16
; CHECK-BE-NEXT: st1 { v0.2d }, [x1], #16
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i64_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i64_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x i64>, ptr %ldptr, align 2
store <2 x i64> %val, ptr %stptr, align 2
@@ -1543,6 +4486,93 @@ define [2 x ptr] @v2i64_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2d }, [x0]
; CHECK-BE-NEXT: st1 { v0.2d }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i64_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i64_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -1568,6 +4598,97 @@ define [2 x ptr] @v2i64_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #32
; CHECK-BE-NEXT: st1 { v0.2d }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i64_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i64_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x i64>, ptr %ldptr, align 2
store <2 x i64> %val, ptr %stptr, align 2
@@ -1592,6 +4713,93 @@ define [2 x ptr] @v2i64_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2d }, [x0]
; CHECK-BE-NEXT: st1 { v0.2d }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i64_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i64_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #8]
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 32
@@ -1620,6 +4828,96 @@ define [2 x ptr] @v2i64_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.2d }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i64_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i64_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: str x8, [sp, #8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x i64>, ptr %ldptr, align 2
store <2 x i64> %val, ptr %stptr, align 2
@@ -1647,6 +4945,96 @@ define [2 x ptr] @v2i64_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.2d }, [x0]
; CHECK-BE-NEXT: st1 { v0.2d }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2i64_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #8]
+; CHECK-LE-SA-NEXT: ldr q0, [sp]
+; CHECK-LE-SA-NEXT: str q0, [sp, #16]
+; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2i64_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: str x8, [sp, #8]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -1669,6 +5057,98 @@ define [2 x ptr] @v8f16_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.8h }, [x0], #16
; CHECK-BE-NEXT: st1 { v0.8h }, [x1], #16
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8f16_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8f16_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x half>, ptr %ldptr, align 2
store <8 x half> %val, ptr %stptr, align 2
@@ -1693,6 +5173,94 @@ define [2 x ptr] @v8f16_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.8h }, [x0]
; CHECK-BE-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8f16_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8f16_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #8]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -1718,6 +5286,98 @@ define [2 x ptr] @v8f16_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #32
; CHECK-BE-NEXT: st1 { v0.8h }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8f16_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8f16_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x half>, ptr %ldptr, align 2
store <8 x half> %val, ptr %stptr, align 2
@@ -1742,6 +5402,94 @@ define [2 x ptr] @v8f16_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.8h }, [x0]
; CHECK-BE-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8f16_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8f16_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #8]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 32
@@ -1770,6 +5518,98 @@ define [2 x ptr] @v8f16_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.8h }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8f16_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8f16_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: str x8, [sp, #24]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x half>, ptr %ldptr, align 2
store <8 x half> %val, ptr %stptr, align 2
@@ -1797,6 +5637,98 @@ define [2 x ptr] @v8f16_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.8h }, [x0]
; CHECK-BE-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v8f16_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8f16_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: str x8, [sp, #24]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -1819,6 +5751,98 @@ define [2 x ptr] @v4f32_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4s }, [x0], #16
; CHECK-BE-NEXT: st1 { v0.4s }, [x1], #16
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f32_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f32_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x float>, ptr %ldptr, align 2
store <4 x float> %val, ptr %stptr, align 2
@@ -1843,6 +5867,94 @@ define [2 x ptr] @v4f32_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4s }, [x0]
; CHECK-BE-NEXT: st1 { v0.4s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f32_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f32_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #8]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -1868,6 +5980,98 @@ define [2 x ptr] @v4f32_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #32
; CHECK-BE-NEXT: st1 { v0.4s }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f32_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f32_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x float>, ptr %ldptr, align 2
store <4 x float> %val, ptr %stptr, align 2
@@ -1892,6 +6096,94 @@ define [2 x ptr] @v4f32_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.4s }, [x0]
; CHECK-BE-NEXT: st1 { v0.4s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f32_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f32_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #8]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 32
@@ -1920,6 +6212,98 @@ define [2 x ptr] @v4f32_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.4s }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f32_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f32_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: str x8, [sp, #24]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x float>, ptr %ldptr, align 2
store <4 x float> %val, ptr %stptr, align 2
@@ -1947,6 +6331,98 @@ define [2 x ptr] @v4f32_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.4s }, [x0]
; CHECK-BE-NEXT: st1 { v0.4s }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v4f32_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v4f32_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: str x8, [sp, #24]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: ld1 { v0.4s }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.4s }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
@@ -1969,6 +6445,98 @@ define [2 x ptr] @v2f64_postidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2d }, [x0], #16
; CHECK-BE-NEXT: st1 { v0.2d }, [x1], #16
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f64_postidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f64_postidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x double>, ptr %ldptr, align 2
store <2 x double> %val, ptr %stptr, align 2
@@ -1993,6 +6561,94 @@ define [2 x ptr] @v2f64_preidx_same_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2d }, [x0]
; CHECK-BE-NEXT: st1 { v0.2d }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f64_preidx_same_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f64_preidx_same_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #8]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 16
@@ -2018,6 +6674,98 @@ define [2 x ptr] @v2f64_postidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: add x1, x1, #32
; CHECK-BE-NEXT: st1 { v0.2d }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f64_postidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f64_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w10, [x0]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x10, x0
+; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
+; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
+; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
+; CHECK-BE-SA-NEXT: str x10, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: mov x9, sp
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: ldr x9, [sp]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x10, x9, #16
+; CHECK-BE-SA-NEXT: lsr x11, x9, #32
+; CHECK-BE-SA-NEXT: ldr x12, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x9, x9, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-BE-SA-NEXT: strh w9, [x1]
+; CHECK-BE-SA-NEXT: lsr x9, x12, #48
+; CHECK-BE-SA-NEXT: lsr x10, x12, #32
+; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: lsr x9, x12, #16
+; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
+; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x double>, ptr %ldptr, align 2
store <2 x double> %val, ptr %stptr, align 2
@@ -2042,6 +6790,94 @@ define [2 x ptr] @v2f64_preidx_different_size(ptr %ldptr, ptr %stptr) {
; CHECK-BE-NEXT: ld1 { v0.2d }, [x0]
; CHECK-BE-NEXT: st1 { v0.2d }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f64_preidx_different_size:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
+; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f64_preidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
+; CHECK-BE-SA-NEXT: add x8, sp, #16
+; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x9, x0
+; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
+; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
+; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
+; CHECK-BE-SA-NEXT: str x9, [sp, #24]
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: ldr x10, [sp, #8]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #32
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x10, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: lsr x8, x10, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x10, #16
+; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 32
@@ -2070,6 +6906,98 @@ define [2 x ptr] @v2f64_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: add x1, x1, x2
; CHECK-BE-NEXT: st1 { v0.2d }, [x8]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f64_postidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f64_postidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: str x8, [sp, #24]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%val = load <2 x double>, ptr %ldptr, align 2
store <2 x double> %val, ptr %stptr, align 2
@@ -2097,6 +7025,98 @@ define [2 x ptr] @v2f64_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-BE-NEXT: ld1 { v0.2d }, [x0]
; CHECK-BE-NEXT: st1 { v0.2d }, [x1]
; CHECK-BE-NEXT: ret
+;
+; CHECK-LE-SA-LABEL: v2f64_preidx_reg:
+; CHECK-LE-SA: // %bb.0: // %entry
+; CHECK-LE-SA-NEXT: sub sp, sp, #32
+; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
+; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
+; CHECK-LE-SA-NEXT: ldrh w11, [x0]
+; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #16]
+; CHECK-LE-SA-NEXT: mov x8, x0
+; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
+; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
+; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
+; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-LE-SA-NEXT: str x8, [sp, #24]
+; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
+; CHECK-LE-SA-NEXT: str q0, [sp]
+; CHECK-LE-SA-NEXT: ldr x8, [sp]
+; CHECK-LE-SA-NEXT: strh w8, [x1]
+; CHECK-LE-SA-NEXT: lsr x9, x8, #48
+; CHECK-LE-SA-NEXT: lsr x10, x8, #32
+; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-LE-SA-NEXT: lsr x8, x8, #16
+; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: lsr x9, x11, #16
+; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
+; CHECK-LE-SA-NEXT: lsr x10, x11, #32
+; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-LE-SA-NEXT: lsr x8, x11, #48
+; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-LE-SA-NEXT: mov x9, x1
+; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
+; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
+; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
+; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v2f64_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: sub sp, sp, #32
+; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ldrh w8, [x0]
+; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
+; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
+; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
+; CHECK-BE-SA-NEXT: str x8, [sp, #16]
+; CHECK-BE-SA-NEXT: mov x8, x0
+; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
+; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
+; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
+; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
+; CHECK-BE-SA-NEXT: add x9, sp, #16
+; CHECK-BE-SA-NEXT: str x8, [sp, #24]
+; CHECK-BE-SA-NEXT: mov x8, sp
+; CHECK-BE-SA-NEXT: ld1 { v0.2d }, [x9]
+; CHECK-BE-SA-NEXT: st1 { v0.2d }, [x8]
+; CHECK-BE-SA-NEXT: ldr x8, [sp]
+; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-BE-SA-NEXT: lsr x9, x8, #16
+; CHECK-BE-SA-NEXT: lsr x10, x8, #32
+; CHECK-BE-SA-NEXT: ldr x11, [sp, #8]
+; CHECK-BE-SA-NEXT: lsr x8, x8, #48
+; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
+; CHECK-BE-SA-NEXT: lsr x9, x11, #32
+; CHECK-BE-SA-NEXT: strh w8, [x1]
+; CHECK-BE-SA-NEXT: lsr x8, x11, #48
+; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
+; CHECK-BE-SA-NEXT: mov x9, x1
+; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
+; CHECK-BE-SA-NEXT: lsr x8, x11, #16
+; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
+; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
+; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
%add.stptr = getelementptr inbounds nuw i8, ptr %stptr, i64 %off
>From 593c744ade529a509babd778907ba93344425ff0 Mon Sep 17 00:00:00 2001
From: Oliver Stannard <oliver.stannard at arm.com>
Date: Thu, 28 May 2026 14:43:32 +0100
Subject: [PATCH 2/3] [AArch64] Use LD1/ST1 in strict-align mode
When compiling with +strict-align, we currently scalarise all fixed
width vector loads and stores where the alignment is less than the
vector size, because the LDR/STR instructions require alignment matching
the vector size. However, the LD1/ST1 instructions only require the
alignment to match the size of the individual elements, so we can use
them in more cases.
This patch:
* Adds a check in allowsMisalignedMemoryAccesses, to prevent memory
accesses being scalarised when not needed.
* Doubles the tablegen patterns for the vector LDR/STR instructions, to
restrict them to vector-size aligned pointers in +strict-align mode,
and leave them unrestricted otherwise.
---
.../Target/AArch64/AArch64ISelDAGToDAG.cpp | 13 +-
.../Target/AArch64/AArch64ISelLowering.cpp | 26 +-
llvm/lib/Target/AArch64/AArch64ISelLowering.h | 2 +-
llvm/lib/Target/AArch64/AArch64InstrInfo.td | 506 ++-
.../test/CodeGen/AArch64/vector-ldst-align.ll | 2740 +++--------------
.../CodeGen/AArch64/vector-ldst-offset.ll | 2016 ++----------
6 files changed, 1123 insertions(+), 4180 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index 0862c5754da60..4535274a2db0c 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -1837,6 +1837,7 @@ bool AArch64DAGToDAGISel::tryIndexedLoad(SDNode *N) {
ISD::LoadExtType ExtType = LD->getExtensionType();
bool InsertTo64 = false;
+ bool OffsetIsXZR = false;
if (VT == MVT::i64)
Opcode = IsPre ? AArch64::LDRXpre : AArch64::LDRXpost;
else if (VT == MVT::i32) {
@@ -1884,9 +1885,13 @@ bool AArch64DAGToDAGISel::tryIndexedLoad(SDNode *N) {
} else if (VT == MVT::f32) {
Opcode = IsPre ? AArch64::LDRSpre : AArch64::LDRSpost;
} else if (VT == MVT::f64 ||
- (VT.is64BitVector() && Subtarget->isLittleEndian())) {
+ (VT.is64BitVector() && Subtarget->isLittleEndian() &&
+ (!Subtarget->requiresStrictAlign() ||
+ LD->getAlign() >= VT.getStoreSize()))) {
Opcode = IsPre ? AArch64::LDRDpre : AArch64::LDRDpost;
- } else if (VT.is128BitVector() && Subtarget->isLittleEndian()) {
+ } else if (VT.is128BitVector() && Subtarget->isLittleEndian() &&
+ (!Subtarget->requiresStrictAlign() ||
+ LD->getAlign() >= VT.getStoreSize())) {
Opcode = IsPre ? AArch64::LDRQpre : AArch64::LDRQpost;
} else if (VT.is64BitVector()) {
if (IsPre || OffsetVal != 8)
@@ -1907,6 +1912,7 @@ bool AArch64DAGToDAGISel::tryIndexedLoad(SDNode *N) {
default:
llvm_unreachable("Expected vector element to be a power of 2");
}
+ OffsetIsXZR = true;
} else if (VT.is128BitVector()) {
if (IsPre || OffsetVal != 16)
return false;
@@ -1926,13 +1932,14 @@ bool AArch64DAGToDAGISel::tryIndexedLoad(SDNode *N) {
default:
llvm_unreachable("Expected vector element to be a power of 2");
}
+ OffsetIsXZR = true;
} else
return false;
SDValue Chain = LD->getChain();
SDValue Base = LD->getBasePtr();
SDLoc dl(N);
// LD1 encodes an immediate offset by using XZR as the offset register.
- SDValue Offset = (VT.isVector() && !Subtarget->isLittleEndian())
+ SDValue Offset = OffsetIsXZR
? CurDAG->getRegister(AArch64::XZR, MVT::i64)
: CurDAG->getTargetConstant(OffsetVal, dl, MVT::i64);
SDValue Ops[] = { Base, Offset, Chain };
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 213a0042461ae..ed2aad99c0945 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2435,6 +2435,10 @@ void AArch64TargetLowering::addTypeForNEON(MVT VT) {
// When little-endian we can use ordinary d and q register loads/stores for
// vector types, but when big-endian we need to use structure load/store which
// only allow post-index addressing.
+ // With +strict-align, we also need to use LD1/ST1 when the alignment is
+ // less than the vector size, but we can still use LDR/STR for more-aligned
+ // accesses, so these are marked as legal here, and the invalid cases are
+ // rejected in getIndexedAddressParts.
if (Subtarget->isLittleEndian()) {
for (unsigned im = (unsigned)ISD::PRE_INC;
im != (unsigned)ISD::LAST_INDEXED_MODE; ++im) {
@@ -3153,6 +3157,15 @@ bool AArch64TargetLowering::allowsMisalignedMemoryAccesses(
return true;
}
+ // For NEON, we can use LD1/ST1 when the alignment is less than the size of
+ // the vector, but greater than or equal to the size of the elements.
+ if (Subtarget->requiresStrictAlign() && VT.isFixedLengthVector() &&
+ (VT.getSizeInBits() == 64 || VT.getSizeInBits() == 128)) {
+ unsigned ElementSizeBits = VT.getScalarSizeInBits();
+ if (ElementSizeBits % 8 == 0 && Alignment >= Align(ElementSizeBits / 8))
+ return true;
+ }
+
if (Subtarget->requiresStrictAlign())
return false;
@@ -31558,7 +31571,8 @@ bool AArch64TargetLowering::isIndexingLegal(MachineInstr &MI, Register Base,
bool AArch64TargetLowering::getIndexedAddressParts(SDNode *N, SDNode *Op,
SDValue &Base,
SDValue &Offset,
- SelectionDAG &DAG) const {
+ SelectionDAG &DAG,
+ ISD::MemIndexedMode AM) const {
if (Op->getOpcode() != ISD::ADD && Op->getOpcode() != ISD::SUB)
return false;
@@ -31602,6 +31616,12 @@ bool AArch64TargetLowering::getIndexedAddressParts(SDNode *N, SDNode *Op,
if (!Subtarget->isLittleEndian() && MemType.isVector() &&
(uint64_t)RHSC != MemType.getStoreSize())
return false;
+ // Likewise, when compiling with +strict-align we use LD1/ST1 when the
+ // alignment is less than the vector size.
+ if (Subtarget->requiresStrictAlign() && MemType.isVector() &&
+ cast<MemSDNode>(N)->getAlign() < MemType.getStoreSize() &&
+ ((uint64_t)RHSC != MemType.getStoreSize() || AM != ISD::POST_INC))
+ return false;
// Always emit pre-inc/post-inc addressing mode. Use negated constant offset
// when dealing with subtraction.
Offset = DAG.getConstant(RHSC, SDLoc(N), RHS->getValueType(0));
@@ -31634,7 +31654,7 @@ bool AArch64TargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
if (IsVolatile)
return false;
- if (!getIndexedAddressParts(N, Ptr.getNode(), Base, Offset, DAG))
+ if (!getIndexedAddressParts(N, Ptr.getNode(), Base, Offset, DAG, ISD::PRE_INC))
return false;
AM = ISD::PRE_INC;
return true;
@@ -31663,7 +31683,7 @@ bool AArch64TargetLowering::getPostIndexedAddressParts(
if (IsVolatile)
return false;
- if (!getIndexedAddressParts(N, Op, Base, Offset, DAG))
+ if (!getIndexedAddressParts(N, Op, Base, Offset, DAG, ISD::POST_INC))
return false;
// Post-indexing updates the base, so it's not a valid transform
// if that's not the same as the load's pointer.
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
index 9c2ea0faee5ec..840c75948cdb3 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
@@ -903,7 +903,7 @@ class AArch64TargetLowering : public TargetLowering {
bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override;
bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
bool getIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
- SDValue &Offset, SelectionDAG &DAG) const;
+ SDValue &Offset, SelectionDAG &DAG, ISD::MemIndexedMode AM) const;
bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset,
ISD::MemIndexedMode &AM,
SelectionDAG &DAG) const override;
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
index a660a3f11bdb2..bff10762c5639 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td
@@ -436,6 +436,10 @@ def AArch64LocalRecover : SDNode<"ISD::LOCAL_RECOVER",
def AllowMisalignedMemAccesses
: Predicate<"!Subtarget->requiresStrictAlign()">;
+def DisallowMisalignedMemAccesses
+ : Predicate<"Subtarget->requiresStrictAlign()">;
+def IsBEOrDisallowMisalignedMemAccesses
+ : Predicate<"!Subtarget->isLittleEndian() || Subtarget->requiresStrictAlign()">;
def UseWzrToVecMove : Predicate<"Subtarget->useWzrToVecMove()">;
@@ -762,6 +766,35 @@ def topbitsallzero64: PatLeaf<(i64 GPR64:$src), [{
return VT && VT->maskedValueIsZero(Reg, APInt::getHighBitsSet(64, 63)); }];
}
+// Loads and stores with a minimum alignment.
+class load_aligned<int align_bytes> : PatFrag<(ops node:$ptr), (unindexedload node:$ptr)> {
+ let IsLoad = true;
+ let IsNonExtLoad = true;
+ let MinAlignment = align_bytes;
+}
+class store_aligned<int align_bytes> : PatFrag<(ops node:$val, node:$ptr),
+ (unindexedstore node:$val, node:$ptr)> {
+ let IsStore = true;
+ let IsTruncStore = false;
+ let MinAlignment = align_bytes;
+}
+class pre_store_aligned<int align_bytes> : PatFrag<(ops node:$val, node:$base, node:$offset),
+ (istore node:$val, node:$base, node:$offset), [{
+ ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
+ Align A = cast<StoreSDNode>(N)->getAlign();
+ return (AM == ISD::PRE_INC || AM == ISD::PRE_DEC) && A >= }] # align_bytes # [{;
+}]> {
+ let MinAlignment = align_bytes;
+}
+class post_store_aligned<int align_bytes> : PatFrag<(ops node:$val, node:$ptr, node:$offset),
+ (istore node:$val, node:$ptr, node:$offset), [{
+ ISD::MemIndexedMode AM = cast<StoreSDNode>(N)->getAddressingMode();
+ Align A = cast<StoreSDNode>(N)->getAlign();
+ return (AM == ISD::POST_INC || AM == ISD::POST_DEC) && A >= }] # align_bytes # [{;
+}]> {
+ let MinAlignment = align_bytes;
+}
+
// Node definitions.
// Compare-and-branch
def AArch64CB : SDNode<"AArch64ISD::CB", SDT_AArch64cb, [SDNPHasChain]>;
@@ -3915,43 +3948,48 @@ defm LDRSW : Load32RO<0b10, 0, 0b10, GPR64, "ldrsw", i64, sextloadi32>;
// Pre-fetch.
defm PRFM : PrefetchRO<0b11, 0, 0b10, "prfm">;
-// Match all load 64 bits width whose type is compatible with FPR64
multiclass VecROLoadPat<ROAddrMode ro, ValueType VecTy,
- Instruction LOADW, Instruction LOADX> {
-
- def : Pat<(VecTy (load (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend))),
- (LOADW GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
+ Instruction LOADW, Instruction LOADX,
+ int vector_align, list<Predicate> preds> {
+ let Predicates = !listconcat([AllowMisalignedMemAccesses], preds) in {
+ def : Pat<(VecTy (load (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend))),
+ (LOADW GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
+
+ def : Pat<(VecTy (load (ro.Xpat GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend))),
+ (LOADX GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)>;
+ }
+ let Predicates = !listconcat([DisallowMisalignedMemAccesses], preds) in {
+ def : Pat<(VecTy (load_aligned<vector_align> (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend))),
+ (LOADW GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
- def : Pat<(VecTy (load (ro.Xpat GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend))),
- (LOADX GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)>;
+ def : Pat<(VecTy (load_aligned<vector_align> (ro.Xpat GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend))),
+ (LOADX GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)>;
+ }
}
-let AddedComplexity = 10 in {
-let Predicates = [IsLE] in {
- // We must do vector loads with LD1 in big-endian.
- defm : VecROLoadPat<ro64, v2i32, LDRDroW, LDRDroX>;
- defm : VecROLoadPat<ro64, v2f32, LDRDroW, LDRDroX>;
- defm : VecROLoadPat<ro64, v8i8, LDRDroW, LDRDroX>;
- defm : VecROLoadPat<ro64, v4i16, LDRDroW, LDRDroX>;
- defm : VecROLoadPat<ro64, v4f16, LDRDroW, LDRDroX>;
- defm : VecROLoadPat<ro64, v4bf16, LDRDroW, LDRDroX>;
-}
+// We must do vector loads with LD1 in big-endian, or when the alignment is
+// less than the size of the vector.
-defm : VecROLoadPat<ro64, v1i64, LDRDroW, LDRDroX>;
-defm : VecROLoadPat<ro64, v1f64, LDRDroW, LDRDroX>;
+// Match all load 64 bits width whose type is compatible with FPR64
+let AddedComplexity = 10 in {
+defm : VecROLoadPat<ro64, v2i32, LDRDroW, LDRDroX, 8, [IsLE]>;
+defm : VecROLoadPat<ro64, v2f32, LDRDroW, LDRDroX, 8, [IsLE]>;
+defm : VecROLoadPat<ro64, v8i8, LDRDroW, LDRDroX, 8, [IsLE]>;
+defm : VecROLoadPat<ro64, v4i16, LDRDroW, LDRDroX, 8, [IsLE]>;
+defm : VecROLoadPat<ro64, v4f16, LDRDroW, LDRDroX, 8, [IsLE]>;
+defm : VecROLoadPat<ro64, v4bf16, LDRDroW, LDRDroX, 8, [IsLE]>;
+defm : VecROLoadPat<ro64, v1i64, LDRDroW, LDRDroX, 8, []>;
+defm : VecROLoadPat<ro64, v1f64, LDRDroW, LDRDroX, 8, []>;
// Match all load 128 bits width whose type is compatible with FPR128
-let Predicates = [IsLE] in {
- // We must do vector loads with LD1 in big-endian.
- defm : VecROLoadPat<ro128, v2i64, LDRQroW, LDRQroX>;
- defm : VecROLoadPat<ro128, v2f64, LDRQroW, LDRQroX>;
- defm : VecROLoadPat<ro128, v4i32, LDRQroW, LDRQroX>;
- defm : VecROLoadPat<ro128, v4f32, LDRQroW, LDRQroX>;
- defm : VecROLoadPat<ro128, v8i16, LDRQroW, LDRQroX>;
- defm : VecROLoadPat<ro128, v8f16, LDRQroW, LDRQroX>;
- defm : VecROLoadPat<ro128, v8bf16, LDRQroW, LDRQroX>;
- defm : VecROLoadPat<ro128, v16i8, LDRQroW, LDRQroX>;
-}
+defm : VecROLoadPat<ro128, v2i64, LDRQroW, LDRQroX, 16, [IsLE]>;
+defm : VecROLoadPat<ro128, v2f64, LDRQroW, LDRQroX, 16, [IsLE]>;
+defm : VecROLoadPat<ro128, v4i32, LDRQroW, LDRQroX, 16, [IsLE]>;
+defm : VecROLoadPat<ro128, v4f32, LDRQroW, LDRQroX, 16, [IsLE]>;
+defm : VecROLoadPat<ro128, v8i16, LDRQroW, LDRQroX, 16, [IsLE]>;
+defm : VecROLoadPat<ro128, v8f16, LDRQroW, LDRQroX, 16, [IsLE]>;
+defm : VecROLoadPat<ro128, v8bf16, LDRQroW, LDRQroX, 16, [IsLE]>;
+defm : VecROLoadPat<ro128, v16i8, LDRQroW, LDRQroX, 16, [IsLE]>;
} // AddedComplexity = 10
// zextload -> i64
@@ -4034,9 +4072,11 @@ defm LDRQ : LoadUI<0b00, 1, 0b11, FPR128Op, uimm12s16, "ldr",
def : Pat <(bf16 (load (am_indexed16 GPR64sp:$Rn, uimm12s2:$offset))),
(LDRHui GPR64sp:$Rn, uimm12s2:$offset)>;
+// We must use LD1 to perform vector loads in big-endian, or when the
+// alignment is less than the vector size.
+
// Match all load 64 bits width whose type is compatible with FPR64
-let Predicates = [IsLE] in {
- // We must use LD1 to perform vector loads in big-endian.
+let Predicates = [IsLE, AllowMisalignedMemAccesses] in {
def : Pat<(v2f32 (load (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
(LDRDui GPR64sp:$Rn, uimm12s8:$offset)>;
def : Pat<(v8i8 (load (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
@@ -4055,9 +4095,23 @@ def : Pat<(v1f64 (load (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
def : Pat<(v1i64 (load (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
(LDRDui GPR64sp:$Rn, uimm12s8:$offset)>;
+let Predicates = [IsLE, DisallowMisalignedMemAccesses] in {
+ def : Pat<(v2f32 (load_aligned<8> (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
+ (LDRDui GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(v8i8 (load_aligned<8> (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
+ (LDRDui GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(v4i16 (load_aligned<8> (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
+ (LDRDui GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(v2i32 (load_aligned<8> (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
+ (LDRDui GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(v4f16 (load_aligned<8> (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
+ (LDRDui GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(v4bf16 (load_aligned<8> (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset))),
+ (LDRDui GPR64sp:$Rn, uimm12s8:$offset)>;
+}
+
// Match all load 128 bits width whose type is compatible with FPR128
-let Predicates = [IsLE] in {
- // We must use LD1 to perform vector loads in big-endian.
+let Predicates = [IsLE, AllowMisalignedMemAccesses] in {
def : Pat<(v4f32 (load (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
(LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
def : Pat<(v2f64 (load (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
@@ -4078,6 +4132,25 @@ let Predicates = [IsLE] in {
def : Pat<(f128 (load (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
(LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
+let Predicates = [IsLE, DisallowMisalignedMemAccesses] in {
+ def : Pat<(v4f32 (load_aligned<16> (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
+ (LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(v2f64 (load_aligned<16> (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
+ (LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(v16i8 (load_aligned<16> (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
+ (LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(v8i16 (load_aligned<16> (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
+ (LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(v4i32 (load_aligned<16> (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
+ (LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(v2i64 (load_aligned<16> (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
+ (LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(v8f16 (load_aligned<16> (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
+ (LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(v8bf16 (load_aligned<16> (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset))),
+ (LDRQui GPR64sp:$Rn, uimm12s16:$offset)>;
+}
+
defm LDRHH : LoadUI<0b01, 0, 0b01, GPR32, uimm12s2, "ldrh",
[(set GPR32:$Rt,
(zextloadi16 (am_indexed16 GPR64sp:$Rn,
@@ -4232,7 +4305,7 @@ def : Pat <(bf16 (load (am_unscaled16 GPR64sp:$Rn, simm9:$offset))),
(LDURHi GPR64sp:$Rn, simm9:$offset)>;
// Match all load 64 bits width whose type is compatible with FPR64
-let Predicates = [IsLE] in {
+let Predicates = [IsLE, AllowMisalignedMemAccesses] in {
def : Pat<(v2f32 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
(LDURDi GPR64sp:$Rn, simm9:$offset)>;
def : Pat<(v2i32 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
@@ -4249,8 +4322,21 @@ def : Pat<(v1f64 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
def : Pat<(v1i64 (load (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
(LDURDi GPR64sp:$Rn, simm9:$offset)>;
+let Predicates = [IsLE, DisallowMisalignedMemAccesses] in {
+ def : Pat<(v2f32 (load_aligned<8> (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
+ (LDURDi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v2i32 (load_aligned<8> (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
+ (LDURDi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v4i16 (load_aligned<8> (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
+ (LDURDi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v8i8 (load_aligned<8> (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
+ (LDURDi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v4f16 (load_aligned<8> (am_unscaled64 GPR64sp:$Rn, simm9:$offset))),
+ (LDURDi GPR64sp:$Rn, simm9:$offset)>;
+}
+
// Match all load 128 bits width whose type is compatible with FPR128
-let Predicates = [IsLE] in {
+let Predicates = [IsLE, AllowMisalignedMemAccesses] in {
def : Pat<(v2f64 (load (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
(LDURQi GPR64sp:$Rn, simm9:$offset)>;
def : Pat<(v2i64 (load (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
@@ -4267,6 +4353,23 @@ let Predicates = [IsLE] in {
(LDURQi GPR64sp:$Rn, simm9:$offset)>;
}
+let Predicates = [IsLE, DisallowMisalignedMemAccesses] in {
+ def : Pat<(v2f64 (load_aligned<16> (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
+ (LDURQi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v2i64 (load_aligned<16> (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
+ (LDURQi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v4f32 (load_aligned<16> (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
+ (LDURQi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v4i32 (load_aligned<16> (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
+ (LDURQi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v8i16 (load_aligned<16> (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
+ (LDURQi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v16i8 (load_aligned<16> (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
+ (LDURQi GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(v8f16 (load_aligned<16> (am_unscaled128 GPR64sp:$Rn, simm9:$offset))),
+ (LDURQi GPR64sp:$Rn, simm9:$offset)>;
+}
+
// anyext -> zext
def : Pat<(i32 (extloadi16 (am_unscaled16 GPR64sp:$Rn, simm9:$offset))),
(LDURHHi GPR64sp:$Rn, simm9:$offset)>;
@@ -4772,44 +4875,54 @@ let AddedComplexity = 10 in {
defm : TruncStoreFrom64ROPat<ro32, truncstorei32, STRWroW, STRWroX>;
}
+
multiclass VecROStorePat<ROAddrMode ro, ValueType VecTy, RegisterClass FPR,
- Instruction STRW, Instruction STRX> {
- def : Pat<(store (VecTy FPR:$Rt),
- (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)),
- (STRW FPR:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
+ Instruction STRW, Instruction STRX, int align_bytes,
+ list<Predicate> preds> {
+ let Predicates = !listconcat([AllowMisalignedMemAccesses], preds) in {
+ def : Pat<(store (VecTy FPR:$Rt),
+ (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)),
+ (STRW FPR:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
+
+ def : Pat<(store (VecTy FPR:$Rt),
+ (ro.Xpat GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)),
+ (STRX FPR:$Rt, GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)>;
+ }
+
+ let Predicates = !listconcat([DisallowMisalignedMemAccesses], preds) in {
+ def : Pat<(store_aligned<align_bytes> (VecTy FPR:$Rt),
+ (ro.Wpat GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)),
+ (STRW FPR:$Rt, GPR64sp:$Rn, GPR32:$Rm, ro.Wext:$extend)>;
- def : Pat<(store (VecTy FPR:$Rt),
- (ro.Xpat GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)),
- (STRX FPR:$Rt, GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)>;
+ def : Pat<(store_aligned<align_bytes> (VecTy FPR:$Rt),
+ (ro.Xpat GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)),
+ (STRX FPR:$Rt, GPR64sp:$Rn, GPR64:$Rm, ro.Xext:$extend)>;
+ }
}
+// We must use ST1 to store vectors in big-endian, or when the alignment is
+// less than the size of the vector.
let AddedComplexity = 10 in {
// Match all store 64 bits width whose type is compatible with FPR64
-let Predicates = [IsLE] in {
- // We must use ST1 to store vectors in big-endian.
- defm : VecROStorePat<ro64, v2i32, FPR64, STRDroW, STRDroX>;
- defm : VecROStorePat<ro64, v2f32, FPR64, STRDroW, STRDroX>;
- defm : VecROStorePat<ro64, v4i16, FPR64, STRDroW, STRDroX>;
- defm : VecROStorePat<ro64, v8i8, FPR64, STRDroW, STRDroX>;
- defm : VecROStorePat<ro64, v4f16, FPR64, STRDroW, STRDroX>;
- defm : VecROStorePat<ro64, v4bf16, FPR64, STRDroW, STRDroX>;
-}
+defm : VecROStorePat<ro64, v2i32, FPR64, STRDroW, STRDroX, 8, [IsLE]>;
+defm : VecROStorePat<ro64, v2f32, FPR64, STRDroW, STRDroX, 8, [IsLE]>;
+defm : VecROStorePat<ro64, v4i16, FPR64, STRDroW, STRDroX, 8, [IsLE]>;
+defm : VecROStorePat<ro64, v8i8, FPR64, STRDroW, STRDroX, 8, [IsLE]>;
+defm : VecROStorePat<ro64, v4f16, FPR64, STRDroW, STRDroX, 8, [IsLE]>;
+defm : VecROStorePat<ro64, v4bf16, FPR64, STRDroW, STRDroX, 8, [IsLE]>;
-defm : VecROStorePat<ro64, v1i64, FPR64, STRDroW, STRDroX>;
-defm : VecROStorePat<ro64, v1f64, FPR64, STRDroW, STRDroX>;
+defm : VecROStorePat<ro64, v1i64, FPR64, STRDroW, STRDroX, 8, []>;
+defm : VecROStorePat<ro64, v1f64, FPR64, STRDroW, STRDroX, 8, []>;
// Match all store 128 bits width whose type is compatible with FPR128
-let Predicates = [IsLE, UseSTRQro] in {
- // We must use ST1 to store vectors in big-endian.
- defm : VecROStorePat<ro128, v2i64, FPR128, STRQroW, STRQroX>;
- defm : VecROStorePat<ro128, v2f64, FPR128, STRQroW, STRQroX>;
- defm : VecROStorePat<ro128, v4i32, FPR128, STRQroW, STRQroX>;
- defm : VecROStorePat<ro128, v4f32, FPR128, STRQroW, STRQroX>;
- defm : VecROStorePat<ro128, v8i16, FPR128, STRQroW, STRQroX>;
- defm : VecROStorePat<ro128, v16i8, FPR128, STRQroW, STRQroX>;
- defm : VecROStorePat<ro128, v8f16, FPR128, STRQroW, STRQroX>;
- defm : VecROStorePat<ro128, v8bf16, FPR128, STRQroW, STRQroX>;
-}
+defm : VecROStorePat<ro128, v2i64, FPR128, STRQroW, STRQroX, 16, [IsLE, UseSTRQro]>;
+defm : VecROStorePat<ro128, v2f64, FPR128, STRQroW, STRQroX, 16, [IsLE, UseSTRQro]>;
+defm : VecROStorePat<ro128, v4i32, FPR128, STRQroW, STRQroX, 16, [IsLE, UseSTRQro]>;
+defm : VecROStorePat<ro128, v4f32, FPR128, STRQroW, STRQroX, 16, [IsLE, UseSTRQro]>;
+defm : VecROStorePat<ro128, v8i16, FPR128, STRQroW, STRQroX, 16, [IsLE, UseSTRQro]>;
+defm : VecROStorePat<ro128, v16i8, FPR128, STRQroW, STRQroX, 16, [IsLE, UseSTRQro]>;
+defm : VecROStorePat<ro128, v8f16, FPR128, STRQroW, STRQroX, 16, [IsLE, UseSTRQro]>;
+defm : VecROStorePat<ro128, v8bf16, FPR128, STRQroW, STRQroX, 16, [IsLE, UseSTRQro]>;
} // AddedComplexity = 10
// Match stores from lane 0 to the appropriate subreg's store.
@@ -4879,6 +4992,9 @@ def : Pat<(store (bf16 FPR16Op:$Rt),
let AddedComplexity = 10 in {
+// We must use ST1 to store vectors in big-endian, or when the aligmnment is
+// less than the size of the vector.
+
// Match all store 64 bits width whose type is compatible with FPR64
def : Pat<(store (v1i64 FPR64:$Rt),
(am_indexed64 GPR64sp:$Rn, uimm12s8:$offset)),
@@ -4887,8 +5003,7 @@ def : Pat<(store (v1f64 FPR64:$Rt),
(am_indexed64 GPR64sp:$Rn, uimm12s8:$offset)),
(STRDui FPR64:$Rt, GPR64sp:$Rn, uimm12s8:$offset)>;
-let Predicates = [IsLE] in {
- // We must use ST1 to store vectors in big-endian.
+let Predicates = [IsLE, AllowMisalignedMemAccesses] in {
def : Pat<(store (v2f32 FPR64:$Rt),
(am_indexed64 GPR64sp:$Rn, uimm12s8:$offset)),
(STRDui FPR64:$Rt, GPR64sp:$Rn, uimm12s8:$offset)>;
@@ -4909,13 +5024,33 @@ let Predicates = [IsLE] in {
(STRDui FPR64:$Rt, GPR64sp:$Rn, uimm12s8:$offset)>;
}
+let Predicates = [IsLE, DisallowMisalignedMemAccesses] in {
+ def : Pat<(store_aligned<8> (v2f32 FPR64:$Rt),
+ (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset)),
+ (STRDui FPR64:$Rt, GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(store_aligned<8> (v8i8 FPR64:$Rt),
+ (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset)),
+ (STRDui FPR64:$Rt, GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(store_aligned<8> (v4i16 FPR64:$Rt),
+ (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset)),
+ (STRDui FPR64:$Rt, GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(store_aligned<8> (v2i32 FPR64:$Rt),
+ (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset)),
+ (STRDui FPR64:$Rt, GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(store_aligned<8> (v4f16 FPR64:$Rt),
+ (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset)),
+ (STRDui FPR64:$Rt, GPR64sp:$Rn, uimm12s8:$offset)>;
+ def : Pat<(store_aligned<8> (v4bf16 FPR64:$Rt),
+ (am_indexed64 GPR64sp:$Rn, uimm12s8:$offset)),
+ (STRDui FPR64:$Rt, GPR64sp:$Rn, uimm12s8:$offset)>;
+}
+
// Match all store 128 bits width whose type is compatible with FPR128
def : Pat<(store (f128 FPR128:$Rt),
(am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
(STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
-let Predicates = [IsLE] in {
- // We must use ST1 to store vectors in big-endian.
+let Predicates = [IsLE, AllowMisalignedMemAccesses] in {
def : Pat<(store (v4f32 FPR128:$Rt),
(am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
(STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
@@ -4942,6 +5077,33 @@ let Predicates = [IsLE] in {
(STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
}
+let Predicates = [IsLE, DisallowMisalignedMemAccesses] in {
+ def : Pat<(store_aligned<16> (v4f32 FPR128:$Rt),
+ (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
+ (STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(store_aligned<16> (v2f64 FPR128:$Rt),
+ (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
+ (STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(store_aligned<16> (v16i8 FPR128:$Rt),
+ (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
+ (STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(store_aligned<16> (v8i16 FPR128:$Rt),
+ (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
+ (STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(store_aligned<16> (v4i32 FPR128:$Rt),
+ (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
+ (STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(store_aligned<16> (v2i64 FPR128:$Rt),
+ (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
+ (STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(store_aligned<16> (v8f16 FPR128:$Rt),
+ (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
+ (STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
+ def : Pat<(store_aligned<16> (v8bf16 FPR128:$Rt),
+ (am_indexed128 GPR64sp:$Rn, uimm12s16:$offset)),
+ (STRQui FPR128:$Rt, GPR64sp:$Rn, uimm12s16:$offset)>;
+}
+
// truncstorei32 of f64 bitcasted to i64
def : Pat<(truncstorei32 (i64 (bitconvert (f64 FPR64:$Rt))), (am_indexed32 GPR64sp:$Rn, uimm12s4:$offset)),
(STRSui (EXTRACT_SUBREG FPR64:$Rt, ssub), GPR64sp:$Rn, uimm12s4:$offset)>;
@@ -5058,8 +5220,9 @@ def : Pat<(store (v1i64 FPR64:$Rt), (am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
let AddedComplexity = 10 in {
-let Predicates = [IsLE] in {
- // We must use ST1 to store vectors in big-endian.
+// We must use ST1 to store vectors in big-endian, or when the alignment is
+// less than the size of the vector.
+let Predicates = [IsLE, AllowMisalignedMemAccesses] in {
def : Pat<(store (v2f32 FPR64:$Rt),
(am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
(STURDi FPR64:$Rt, GPR64sp:$Rn, simm9:$offset)>;
@@ -5080,12 +5243,34 @@ let Predicates = [IsLE] in {
(STURDi FPR64:$Rt, GPR64sp:$Rn, simm9:$offset)>;
}
+let Predicates = [IsLE, DisallowMisalignedMemAccesses] in {
+ def : Pat<(store_aligned<8> (v2f32 FPR64:$Rt),
+ (am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
+ (STURDi FPR64:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<8> (v8i8 FPR64:$Rt),
+ (am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
+ (STURDi FPR64:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<8> (v4i16 FPR64:$Rt),
+ (am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
+ (STURDi FPR64:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<8> (v2i32 FPR64:$Rt),
+ (am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
+ (STURDi FPR64:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<8> (v4f16 FPR64:$Rt),
+ (am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
+ (STURDi FPR64:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<8> (v4bf16 FPR64:$Rt),
+ (am_unscaled64 GPR64sp:$Rn, simm9:$offset)),
+ (STURDi FPR64:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+}
+
// Match all store 128 bits width whose type is compatible with FPR128
def : Pat<(store (f128 FPR128:$Rt), (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
(STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
-let Predicates = [IsLE] in {
- // We must use ST1 to store vectors in big-endian.
+// We must use ST1 to store vectors in big-endian, or when the alignment is
+// less than the size of the vector.
+let Predicates = [IsLE, AllowMisalignedMemAccesses] in {
def : Pat<(store (v4f32 FPR128:$Rt),
(am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
(STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
@@ -5115,6 +5300,36 @@ let Predicates = [IsLE] in {
(STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
}
+let Predicates = [IsLE, DisallowMisalignedMemAccesses] in {
+ def : Pat<(store_aligned<16> (v4f32 FPR128:$Rt),
+ (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
+ (STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<16> (v2f64 FPR128:$Rt),
+ (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
+ (STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<16> (v16i8 FPR128:$Rt),
+ (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
+ (STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<16> (v8i16 FPR128:$Rt),
+ (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
+ (STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<16> (v4i32 FPR128:$Rt),
+ (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
+ (STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<16> (v2i64 FPR128:$Rt),
+ (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
+ (STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<16> (v2f64 FPR128:$Rt),
+ (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
+ (STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<16> (v8f16 FPR128:$Rt),
+ (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
+ (STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+ def : Pat<(store_aligned<16> (v8bf16 FPR128:$Rt),
+ (am_unscaled128 GPR64sp:$Rn, simm9:$offset)),
+ (STURQi FPR128:$Rt, GPR64sp:$Rn, simm9:$offset)>;
+}
+
} // AddedComplexity = 10
// unscaled i64 truncating stores
@@ -5210,39 +5425,77 @@ def : Pat<(pre_truncsti8 GPR64:$Rt, GPR64sp:$addr, simm9:$off),
(STRBBpre (EXTRACT_SUBREG GPR64:$Rt, sub_32), GPR64sp:$addr,
simm9:$off)>;
-def : Pat<(pre_store (v8i8 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
- (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v4i16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
- (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v2i32 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
- (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v2f32 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
- (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v1i64 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
- (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v1f64 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
- (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v4f16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
- (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v4bf16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
- (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
-
-def : Pat<(pre_store (v16i8 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
- (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v8i16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
- (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v4i32 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
- (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v4f32 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
- (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v2i64 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
- (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v2f64 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
- (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v8f16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
- (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
-def : Pat<(pre_store (v8bf16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
- (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+let Predicates = [AllowMisalignedMemAccesses] in {
+ def : Pat<(pre_store (v8i8 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v4i16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v2i32 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v2f32 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v1i64 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v1f64 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v4f16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v4bf16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+
+ def : Pat<(pre_store (v16i8 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v8i16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v4i32 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v4f32 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v2i64 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v2f64 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v8f16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store (v8bf16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+}
+
+let Predicates = [DisallowMisalignedMemAccesses] in {
+ def : Pat<(pre_store_aligned<8> (v8i8 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<8> (v4i16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<8> (v2i32 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<8> (v2f32 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<8> (v1i64 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<8> (v1f64 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<8> (v4f16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<8> (v4bf16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpre FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+
+ def : Pat<(pre_store_aligned<16> (v16i8 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<16> (v8i16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<16> (v4i32 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<16> (v4f32 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<16> (v2i64 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<16> (v2f64 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<16> (v8f16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(pre_store_aligned<16> (v8bf16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpre FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+}
//---
// (immediate post-indexed)
@@ -5273,7 +5526,7 @@ def : Pat<(post_truncsti8 GPR64:$Rt, GPR64sp:$addr, simm9:$off),
def : Pat<(post_store (bf16 FPR16:$Rt), GPR64sp:$addr, simm9:$off),
(STRHpost FPR16:$Rt, GPR64sp:$addr, simm9:$off)>;
-let Predicates = [IsLE] in {
+let Predicates = [IsLE, AllowMisalignedMemAccesses] in {
// We must use ST1 to store vectors in big-endian.
def : Pat<(post_store(v8i8 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
(STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
@@ -5310,6 +5563,43 @@ let Predicates = [IsLE] in {
(STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
}
+let Predicates = [IsLE, DisallowMisalignedMemAccesses] in {
+ // We must use ST1 to store vectors in big-endian.
+ def : Pat<(post_store_aligned<8> (v8i8 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<8> (v4i16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<8> (v2i32 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<8> (v2f32 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<8> (v1i64 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<8> (v1f64 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<8> (v4f16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<8> (v4bf16 FPR64:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRDpost FPR64:$Rt, GPR64sp:$addr, simm9:$off)>;
+
+ def : Pat<(post_store_aligned<16> (v16i8 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<16> (v8i16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<16> (v4i32 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<16> (v4f32 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<16> (v2i64 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<16> (v2f64 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<16> (v8f16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+ def : Pat<(post_store_aligned<16> (v8bf16 FPR128:$Rt), GPR64sp:$addr, simm9:$off),
+ (STRQpost FPR128:$Rt, GPR64sp:$addr, simm9:$off)>;
+}
+
//===----------------------------------------------------------------------===//
// Load/store exclusive instructions.
//===----------------------------------------------------------------------===//
@@ -9859,7 +10149,7 @@ class St1PostPat<ValueType ty, Instruction INST, int off>
: Pat<(post_store ty:$Vt, GPR64sp:$Rn, (i64 off)),
(INST ty:$Vt, GPR64sp:$Rn, XZR)>;
-let Predicates = [IsBE] in {
+let Predicates = [IsBEOrDisallowMisalignedMemAccesses] in {
def : St1PostPat<v16i8, ST1Onev16b_POST, 16>;
def : St1PostPat<v8i16, ST1Onev8h_POST, 16>;
def : St1PostPat<v4i32, ST1Onev4s_POST, 16>;
diff --git a/llvm/test/CodeGen/AArch64/vector-ldst-align.ll b/llvm/test/CodeGen/AArch64/vector-ldst-align.ll
index 938a19de81589..34bec37ce9746 100644
--- a/llvm/test/CodeGen/AArch64/vector-ldst-align.ll
+++ b/llvm/test/CodeGen/AArch64/vector-ldst-align.ll
@@ -13,24 +13,7 @@ define <8 x i8> @load_v8i8_align1(ptr %ptr) {
;
; STRICTALIGN-LABEL: load_v8i8_align1:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w9, [x0]
-; STRICTALIGN-NEXT: ldrb w10, [x0, #3]
-; STRICTALIGN-NEXT: ldrb w11, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w12, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w13, [x0, #4]!
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #8
-; STRICTALIGN-NEXT: ldrb w14, [x0, #2]
-; STRICTALIGN-NEXT: lsl x11, x11, #16
-; STRICTALIGN-NEXT: ldrb w15, [x0, #3]
-; STRICTALIGN-NEXT: lsl w14, w14, #16
-; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #24
-; STRICTALIGN-NEXT: orr w10, w13, w12, lsl #8
-; STRICTALIGN-NEXT: orr w11, w14, w15, lsl #24
-; STRICTALIGN-NEXT: orr x8, x9, x8
-; STRICTALIGN-NEXT: orr w9, w11, w10
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ld1 { v0.8b }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1:
@@ -40,24 +23,8 @@ define <8 x i8> @load_v8i8_align1(ptr %ptr) {
;
; STRICTALIGN-BE-LABEL: load_v8i8_align1:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #5]
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0]
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #4]!
-; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
-; STRICTALIGN-BE-NEXT: ldrb w14, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w15, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsl x12, x12, #16
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
-; STRICTALIGN-BE-NEXT: orr w9, w10, w11, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x15, x14, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x12, x13, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ld1 { v0.8b }, [x0]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
; STRICTALIGN-BE-NEXT: ret
%val = load <8 x i8>, ptr %ptr, align 1
ret <8 x i8> %val
@@ -71,22 +38,7 @@ define void @store_v8i8_align1(ptr %ptr, <8 x i8> %val) {
;
; STRICTALIGN-LABEL: store_v8i8_align1:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: strb w8, [x0]
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: lsr x9, x8, #16
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: lsr x10, x8, #8
-; STRICTALIGN-NEXT: strb w9, [x0, #2]
-; STRICTALIGN-NEXT: lsr x9, x8, #32
-; STRICTALIGN-NEXT: strb w10, [x0, #1]
-; STRICTALIGN-NEXT: lsr x10, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w9, [x0, #4]!
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-NEXT: st1 { v0.8b }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1:
@@ -96,22 +48,8 @@ define void @store_v8i8_align1(ptr %ptr, <8 x i8> %val) {
;
; STRICTALIGN-BE-LABEL: store_v8i8_align1:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
-; STRICTALIGN-BE-NEXT: strb w9, [x0]
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #4]!
-; STRICTALIGN-BE-NEXT: str b0, [x0, #3]
-; STRICTALIGN-BE-NEXT: strb w8, [x0, #2]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
+; STRICTALIGN-BE-NEXT: st1 { v0.8b }, [x0]
; STRICTALIGN-BE-NEXT: ret
store <8 x i8> %val, ptr %ptr, align 1
ret void
@@ -126,26 +64,8 @@ define <8 x i8> @load_v8i8_align1_post8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v8i8_align1_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: add x8, x0, #8
-; STRICTALIGN-NEXT: ldrb w9, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w10, [x0]
-; STRICTALIGN-NEXT: ldrb w11, [x0, #3]
-; STRICTALIGN-NEXT: ldrb w12, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w13, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #4]!
-; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #8
-; STRICTALIGN-NEXT: ldrb w15, [x0, #2]
-; STRICTALIGN-NEXT: lsl x12, x12, #16
-; STRICTALIGN-NEXT: ldrb w16, [x0, #3]
-; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: lsl w15, w15, #16
-; STRICTALIGN-NEXT: orr x10, x12, x11, lsl #24
-; STRICTALIGN-NEXT: orr w11, w14, w13, lsl #8
-; STRICTALIGN-NEXT: orr w12, w15, w16, lsl #24
-; STRICTALIGN-NEXT: orr x9, x10, x9
-; STRICTALIGN-NEXT: orr w10, w12, w11
-; STRICTALIGN-NEXT: orr x9, x9, x10, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x9
+; STRICTALIGN-NEXT: ld1 { v0.8b }, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1_post8:
@@ -156,27 +76,9 @@ define <8 x i8> @load_v8i8_align1_post8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v8i8_align1_post8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #5]
-; STRICTALIGN-BE-NEXT: mov x13, x0
-; STRICTALIGN-BE-NEXT: ldrb w14, [x13, #4]!
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0]
-; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x13, #2]
-; STRICTALIGN-BE-NEXT: ldrb w13, [x13, #3]
-; STRICTALIGN-BE-NEXT: lsl x12, x12, #16
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
-; STRICTALIGN-BE-NEXT: orr w9, w10, w11, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x13, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x12, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
-; STRICTALIGN-BE-NEXT: add x8, x0, #8
-; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ld1 { v0.8b }, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
%val = load <8 x i8>, ptr %ptr, align 1
@@ -193,26 +95,9 @@ define <8 x i8> @load_v8i8_align1_pre8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v8i8_align1_pre8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrb w8, [x0, #8]!
-; STRICTALIGN-NEXT: mov x10, x0
-; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
-; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
-; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
-; STRICTALIGN-NEXT: lsl x9, x9, #16
-; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
-; STRICTALIGN-NEXT: lsl w12, w12, #16
-; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
-; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
-; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
-; STRICTALIGN-NEXT: orr x8, x9, x8
-; STRICTALIGN-NEXT: orr w9, w10, w11
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: ld1 { v0.8b }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1_pre8:
@@ -223,26 +108,10 @@ define <8 x i8> @load_v8i8_align1_pre8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v8i8_align1_pre8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #8]!
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: mov x12, x0
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
-; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
-; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x12, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w8, w9
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: ld1 { v0.8b }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
%val = load <8 x i8>, ptr %newptr, align 1
@@ -259,24 +128,8 @@ define void @store_v8i8_align1_post8(ptr %ptr, <8 x i8> %val, ptr %writeback) {
;
; STRICTALIGN-LABEL: store_v8i8_align1_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: lsr x11, x8, #16
-; STRICTALIGN-NEXT: strb w8, [x0]
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: lsr x9, x8, #8
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-NEXT: lsr x9, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-NEXT: add x11, x0, #8
-; STRICTALIGN-NEXT: strb w10, [x0, #4]!
-; STRICTALIGN-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-NEXT: strb w8, [x0, #2]
-; STRICTALIGN-NEXT: str x11, [x1]
+; STRICTALIGN-NEXT: st1 { v0.8b }, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1_post8:
@@ -287,24 +140,9 @@ define void @store_v8i8_align1_post8(ptr %ptr, <8 x i8> %val, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: store_v8i8_align1_post8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
-; STRICTALIGN-BE-NEXT: strb w9, [x0]
-; STRICTALIGN-BE-NEXT: add x9, x0, #8
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #4]!
-; STRICTALIGN-BE-NEXT: str b0, [x0, #3]
-; STRICTALIGN-BE-NEXT: strb w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
+; STRICTALIGN-BE-NEXT: st1 { v0.8b }, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
store <8 x i8> %val, ptr %ptr, align 1
@@ -321,24 +159,9 @@ define void @store_v8i8_align1_pre8(ptr %ptr, <8 x i8> %val, ptr %writeback) {
;
; STRICTALIGN-LABEL: store_v8i8_align1_pre8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: lsr x11, x8, #16
-; STRICTALIGN-NEXT: strb w8, [x0, #8]!
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: lsr x9, x8, #8
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-NEXT: lsr x11, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: strb w10, [x9, #4]!
-; STRICTALIGN-NEXT: strb w11, [x9, #3]
-; STRICTALIGN-NEXT: strb w8, [x9, #2]
-; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: st1 { v0.8b }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1_pre8:
@@ -349,24 +172,10 @@ define void @store_v8i8_align1_pre8(ptr %ptr, <8 x i8> %val, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: store_v8i8_align1_pre8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #8]!
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #40
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: strb w10, [x9, #4]!
-; STRICTALIGN-BE-NEXT: str b0, [x9, #3]
-; STRICTALIGN-BE-NEXT: strb w8, [x9, #2]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.8b }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
store <8 x i8> %val, ptr %newptr, align 1
@@ -383,26 +192,9 @@ define <8 x i8> @load_v8i8_align1_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v8i8_align1_post16:
; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: ld1 { v0.8b }, [x0]
; STRICTALIGN-NEXT: add x8, x0, #16
-; STRICTALIGN-NEXT: ldrb w9, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w10, [x0]
-; STRICTALIGN-NEXT: ldrb w11, [x0, #3]
-; STRICTALIGN-NEXT: ldrb w12, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w13, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #4]!
-; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #8
-; STRICTALIGN-NEXT: ldrb w15, [x0, #2]
-; STRICTALIGN-NEXT: lsl x12, x12, #16
-; STRICTALIGN-NEXT: ldrb w16, [x0, #3]
; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: lsl w15, w15, #16
-; STRICTALIGN-NEXT: orr x10, x12, x11, lsl #24
-; STRICTALIGN-NEXT: orr w11, w14, w13, lsl #8
-; STRICTALIGN-NEXT: orr w12, w15, w16, lsl #24
-; STRICTALIGN-NEXT: orr x9, x10, x9
-; STRICTALIGN-NEXT: orr w10, w12, w11
-; STRICTALIGN-NEXT: orr x9, x9, x10, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x9
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1_post16:
@@ -413,27 +205,10 @@ define <8 x i8> @load_v8i8_align1_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v8i8_align1_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #5]
-; STRICTALIGN-BE-NEXT: mov x13, x0
-; STRICTALIGN-BE-NEXT: ldrb w14, [x13, #4]!
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0]
-; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x13, #2]
-; STRICTALIGN-BE-NEXT: ldrb w13, [x13, #3]
-; STRICTALIGN-BE-NEXT: lsl x12, x12, #16
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
-; STRICTALIGN-BE-NEXT: orr w9, w10, w11, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x13, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x12, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ld1 { v0.8b }, [x0]
; STRICTALIGN-BE-NEXT: add x8, x0, #16
; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <8 x i8>, ptr %ptr, align 1
@@ -450,26 +225,9 @@ define <8 x i8> @load_v8i8_align1_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v8i8_align1_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrb w8, [x0, #16]!
-; STRICTALIGN-NEXT: mov x10, x0
-; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
-; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
-; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
-; STRICTALIGN-NEXT: lsl x9, x9, #16
-; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
-; STRICTALIGN-NEXT: lsl w12, w12, #16
-; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
-; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
-; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
-; STRICTALIGN-NEXT: orr x8, x9, x8
-; STRICTALIGN-NEXT: orr w9, w10, w11
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ld1 { v0.8b }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i8_align1_pre16:
@@ -480,26 +238,10 @@ define <8 x i8> @load_v8i8_align1_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v8i8_align1_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #16]!
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: mov x12, x0
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
-; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
-; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x12, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w8, w9
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.8b }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <8 x i8>, ptr %newptr, align 1
@@ -516,24 +258,9 @@ define void @store_v8i8_align1_post16(ptr %ptr, <8 x i8> %val, ptr %writeback) {
;
; STRICTALIGN-LABEL: store_v8i8_align1_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: lsr x11, x8, #16
-; STRICTALIGN-NEXT: strb w8, [x0]
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: lsr x9, x8, #8
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-NEXT: lsr x9, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-NEXT: add x11, x0, #16
-; STRICTALIGN-NEXT: strb w10, [x0, #4]!
-; STRICTALIGN-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-NEXT: strb w8, [x0, #2]
-; STRICTALIGN-NEXT: str x11, [x1]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.8b }, [x0]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1_post16:
@@ -544,24 +271,10 @@ define void @store_v8i8_align1_post16(ptr %ptr, <8 x i8> %val, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: store_v8i8_align1_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
-; STRICTALIGN-BE-NEXT: strb w9, [x0]
-; STRICTALIGN-BE-NEXT: add x9, x0, #16
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #4]!
-; STRICTALIGN-BE-NEXT: str b0, [x0, #3]
-; STRICTALIGN-BE-NEXT: strb w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: st1 { v0.8b }, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <8 x i8> %val, ptr %ptr, align 1
@@ -578,24 +291,9 @@ define void @store_v8i8_align1_pre16(ptr %ptr, <8 x i8> %val, ptr %writeback) {
;
; STRICTALIGN-LABEL: store_v8i8_align1_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: lsr x11, x8, #16
-; STRICTALIGN-NEXT: strb w8, [x0, #16]!
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: lsr x9, x8, #8
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-NEXT: lsr x11, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: strb w10, [x9, #4]!
-; STRICTALIGN-NEXT: strb w11, [x9, #3]
-; STRICTALIGN-NEXT: strb w8, [x9, #2]
-; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.8b }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v8i8_align1_pre16:
@@ -606,24 +304,10 @@ define void @store_v8i8_align1_pre16(ptr %ptr, <8 x i8> %val, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: store_v8i8_align1_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #16]!
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #32
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #40
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #24
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #8
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: strb w10, [x9, #4]!
-; STRICTALIGN-BE-NEXT: str b0, [x9, #3]
-; STRICTALIGN-BE-NEXT: strb w8, [x9, #2]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8b, v0.8b
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: st1 { v0.8b }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <8 x i8> %val, ptr %newptr, align 1
@@ -748,7 +432,7 @@ define void @store_v8i8_align8_post8(ptr %ptr, <8 x i8> %val, ptr %writeback) {
;
; STRICTALIGN-LABEL: store_v8i8_align8_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str d0, [x0], #8
+; STRICTALIGN-NEXT: st1 { v0.8b }, [x0], #8
; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
@@ -927,46 +611,7 @@ define <16 x i8> @load_v16i8_align1(ptr %ptr) {
;
; STRICTALIGN-LABEL: load_v16i8_align1:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: mov x10, x0
-; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
-; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
-; STRICTALIGN-NEXT: ldrb w13, [x0]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
-; STRICTALIGN-NEXT: lsl x9, x9, #16
-; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
-; STRICTALIGN-NEXT: lsl w12, w12, #16
-; STRICTALIGN-NEXT: orr x8, x13, x8, lsl #8
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
-; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
-; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
-; STRICTALIGN-NEXT: orr x8, x9, x8
-; STRICTALIGN-NEXT: orr w9, w10, w11
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: mov x8, x0
-; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
-; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
-; STRICTALIGN-NEXT: ldrb w9, [x8, #8]!
-; STRICTALIGN-NEXT: ldrb w10, [x8, #3]
-; STRICTALIGN-NEXT: ldrb w11, [x8, #2]
-; STRICTALIGN-NEXT: ldrb w12, [x8, #4]!
-; STRICTALIGN-NEXT: ldrb w13, [x8, #2]
-; STRICTALIGN-NEXT: ldrb w8, [x8, #3]
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #8
-; STRICTALIGN-NEXT: lsl x11, x11, #16
-; STRICTALIGN-NEXT: lsl w13, w13, #16
-; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
-; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
-; STRICTALIGN-NEXT: orr w8, w13, w8, lsl #24
-; STRICTALIGN-NEXT: orr x9, x10, x9
-; STRICTALIGN-NEXT: orr w8, w8, w11
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ld1 { v0.16b }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1:
@@ -976,46 +621,9 @@ define <16 x i8> @load_v16i8_align1(ptr %ptr) {
;
; STRICTALIGN-BE-LABEL: load_v16i8_align1:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #1]
-; STRICTALIGN-BE-NEXT: mov x12, x0
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0]
-; STRICTALIGN-BE-NEXT: lsl w11, w11, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
-; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
-; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #24
-; STRICTALIGN-BE-NEXT: orr x9, x12, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w10, w8
-; STRICTALIGN-BE-NEXT: orr x9, x11, x9
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: mov x8, x0
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #9]
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #13]
-; STRICTALIGN-BE-NEXT: ldrb w10, [x8, #8]!
-; STRICTALIGN-BE-NEXT: ldrb w12, [x8, #2]
-; STRICTALIGN-BE-NEXT: ldrb w13, [x8, #3]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x8, #4]!
-; STRICTALIGN-BE-NEXT: lsl w9, w9, #16
-; STRICTALIGN-BE-NEXT: lsl x11, x11, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x8, #2]
-; STRICTALIGN-BE-NEXT: ldrb w8, [x8, #3]
-; STRICTALIGN-BE-NEXT: orr w12, w13, w12, lsl #8
-; STRICTALIGN-BE-NEXT: orr w9, w9, w10, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x11, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr x8, x8, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr w9, w9, w12
-; STRICTALIGN-BE-NEXT: orr x8, x10, x8
-; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.16b }, [x0]
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%val = load <16 x i8>, ptr %ptr, align 1
ret <16 x i8> %val
@@ -1029,42 +637,7 @@ define void @store_v16i8_align1(ptr %ptr, <16 x i8> %val) {
;
; STRICTALIGN-LABEL: store_v16i8_align1:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: strb w8, [x0]
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: lsr x11, x8, #16
-; STRICTALIGN-NEXT: ldr x12, [sp, #8]
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-NEXT: lsr x10, x12, #40
-; STRICTALIGN-NEXT: lsr x11, x12, #24
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: strb w12, [x9, #8]!
-; STRICTALIGN-NEXT: strb w10, [x0, #13]
-; STRICTALIGN-NEXT: lsr x10, x12, #16
-; STRICTALIGN-NEXT: strb w11, [x9, #3]
-; STRICTALIGN-NEXT: lsr x11, x12, #8
-; STRICTALIGN-NEXT: strb w10, [x9, #2]
-; STRICTALIGN-NEXT: lsr x10, x8, #8
-; STRICTALIGN-NEXT: strb w11, [x0, #9]
-; STRICTALIGN-NEXT: lsr x11, x12, #32
-; STRICTALIGN-NEXT: strb w10, [x0, #1]
-; STRICTALIGN-NEXT: lsr x10, x12, #56
-; STRICTALIGN-NEXT: strb w11, [x9, #4]!
-; STRICTALIGN-NEXT: lsr x11, x12, #48
-; STRICTALIGN-NEXT: strb w10, [x9, #3]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: strb w11, [x9, #2]
-; STRICTALIGN-NEXT: lsr x9, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w10, [x0, #4]!
-; STRICTALIGN-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-NEXT: strb w8, [x0, #2]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: st1 { v0.16b }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1:
@@ -1074,42 +647,9 @@ define void @store_v16i8_align1(ptr %ptr, <16 x i8> %val) {
;
; STRICTALIGN-BE-LABEL: store_v16i8_align1:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #13]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #9]
-; STRICTALIGN-BE-NEXT: mov x10, x0
-; STRICTALIGN-BE-NEXT: ldr x12, [sp]
-; STRICTALIGN-BE-NEXT: strb w9, [x10, #8]!
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
-; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #16
-; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #32
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #40
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #48
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #56
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #24
-; STRICTALIGN-BE-NEXT: strb w11, [x0]
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #24
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #4]!
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #8
-; STRICTALIGN-BE-NEXT: strb w12, [x0, #3]
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #8
-; STRICTALIGN-BE-NEXT: strb w11, [x10, #4]!
-; STRICTALIGN-BE-NEXT: strb w8, [x10, #3]
-; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.16b }, [x0]
; STRICTALIGN-BE-NEXT: ret
store <16 x i8> %val, ptr %ptr, align 1
ret void
@@ -1124,49 +664,8 @@ define <16 x i8> @load_v16i8_align1_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v16i8_align1_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: mov x10, x0
-; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
-; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
-; STRICTALIGN-NEXT: ldrb w13, [x0]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
-; STRICTALIGN-NEXT: lsl x9, x9, #16
-; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
-; STRICTALIGN-NEXT: lsl w12, w12, #16
-; STRICTALIGN-NEXT: orr x8, x13, x8, lsl #8
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
-; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
-; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
-; STRICTALIGN-NEXT: orr x8, x9, x8
-; STRICTALIGN-NEXT: orr w9, w10, w11
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: mov x8, x0
-; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
-; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
-; STRICTALIGN-NEXT: ldrb w9, [x8, #8]!
-; STRICTALIGN-NEXT: ldrb w10, [x8, #3]
-; STRICTALIGN-NEXT: ldrb w11, [x8, #2]
-; STRICTALIGN-NEXT: ldrb w12, [x8, #4]!
-; STRICTALIGN-NEXT: ldrb w13, [x8, #2]
-; STRICTALIGN-NEXT: ldrb w8, [x8, #3]
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #8
-; STRICTALIGN-NEXT: lsl x11, x11, #16
-; STRICTALIGN-NEXT: lsl w13, w13, #16
-; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
-; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
-; STRICTALIGN-NEXT: orr w8, w13, w8, lsl #24
-; STRICTALIGN-NEXT: orr x9, x10, x9
-; STRICTALIGN-NEXT: orr w8, w8, w11
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: add x8, x0, #16
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ld1 { v0.16b }, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1_post16:
@@ -1178,48 +677,10 @@ define <16 x i8> @load_v16i8_align1_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v16i8_align1_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #1]
-; STRICTALIGN-BE-NEXT: mov x12, x0
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0]
-; STRICTALIGN-BE-NEXT: lsl w11, w11, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
-; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
-; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #24
-; STRICTALIGN-BE-NEXT: orr x9, x12, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w10, w8
-; STRICTALIGN-BE-NEXT: orr x9, x11, x9
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: mov x8, x0
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #9]
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #13]
-; STRICTALIGN-BE-NEXT: ldrb w10, [x8, #8]!
-; STRICTALIGN-BE-NEXT: ldrb w12, [x8, #2]
-; STRICTALIGN-BE-NEXT: ldrb w13, [x8, #3]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x8, #4]!
-; STRICTALIGN-BE-NEXT: lsl w9, w9, #16
-; STRICTALIGN-BE-NEXT: lsl x11, x11, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x8, #2]
-; STRICTALIGN-BE-NEXT: ldrb w8, [x8, #3]
-; STRICTALIGN-BE-NEXT: orr w12, w13, w12, lsl #8
-; STRICTALIGN-BE-NEXT: orr w9, w9, w10, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x11, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr x8, x8, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr w9, w9, w12
-; STRICTALIGN-BE-NEXT: orr x8, x10, x8
-; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-BE-NEXT: add x9, x0, #16
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.16b }, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <16 x i8>, ptr %ptr, align 1
@@ -1236,48 +697,9 @@ define <16 x i8> @load_v16i8_align1_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v16i8_align1_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrb w8, [x0, #16]!
-; STRICTALIGN-NEXT: mov x10, x0
-; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
-; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
-; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
-; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
-; STRICTALIGN-NEXT: lsl x9, x9, #16
-; STRICTALIGN-NEXT: lsl w12, w12, #16
-; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
-; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
-; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
-; STRICTALIGN-NEXT: orr x8, x9, x8
-; STRICTALIGN-NEXT: orr w9, w10, w11
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldrb w8, [x9, #8]!
-; STRICTALIGN-NEXT: ldrb w10, [x9, #3]
-; STRICTALIGN-NEXT: ldrb w11, [x9, #2]
-; STRICTALIGN-NEXT: ldrb w12, [x9, #4]!
-; STRICTALIGN-NEXT: ldrb w13, [x9, #2]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
-; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
-; STRICTALIGN-NEXT: lsl x11, x11, #16
-; STRICTALIGN-NEXT: ldrb w9, [x9, #3]
-; STRICTALIGN-NEXT: lsl w13, w13, #16
-; STRICTALIGN-NEXT: orr x8, x8, x14, lsl #8
-; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
-; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
-; STRICTALIGN-NEXT: orr w9, w13, w9, lsl #24
-; STRICTALIGN-NEXT: orr x8, x10, x8
-; STRICTALIGN-NEXT: orr w9, w9, w11
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ld1 { v0.16b }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1_pre16:
@@ -1289,47 +711,11 @@ define <16 x i8> @load_v16i8_align1_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v16i8_align1_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #16]!
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: mov x12, x0
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
-; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
-; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x12, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x13, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w8, w9
-; STRICTALIGN-BE-NEXT: orr x9, x10, x11
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldrb w8, [x9, #8]!
-; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #9]
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #13]
-; STRICTALIGN-BE-NEXT: ldrb w10, [x9, #2]
-; STRICTALIGN-BE-NEXT: ldrb w11, [x9, #3]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x9, #4]!
-; STRICTALIGN-BE-NEXT: lsl w12, w12, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x9, #2]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x9, #3]
-; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
-; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #8
-; STRICTALIGN-BE-NEXT: orr w8, w12, w8, lsl #24
-; STRICTALIGN-BE-NEXT: orr x9, x9, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w8, w10
-; STRICTALIGN-BE-NEXT: orr x9, x11, x9
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.16b }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <16 x i8>, ptr %newptr, align 1
@@ -1346,44 +732,8 @@ define void @store_v16i8_align1_post16(ptr %ptr, <16 x i8> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v16i8_align1_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: strb w8, [x0]
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: lsr x11, x8, #16
-; STRICTALIGN-NEXT: ldr x12, [sp, #8]
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-NEXT: lsr x10, x12, #40
-; STRICTALIGN-NEXT: lsr x11, x12, #24
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: strb w12, [x9, #8]!
-; STRICTALIGN-NEXT: strb w10, [x0, #13]
-; STRICTALIGN-NEXT: lsr x10, x12, #16
-; STRICTALIGN-NEXT: strb w11, [x9, #3]
-; STRICTALIGN-NEXT: lsr x11, x12, #8
-; STRICTALIGN-NEXT: strb w10, [x9, #2]
-; STRICTALIGN-NEXT: lsr x10, x8, #8
-; STRICTALIGN-NEXT: strb w11, [x0, #9]
-; STRICTALIGN-NEXT: lsr x11, x12, #32
-; STRICTALIGN-NEXT: strb w10, [x0, #1]
-; STRICTALIGN-NEXT: lsr x10, x12, #56
-; STRICTALIGN-NEXT: strb w11, [x9, #4]!
-; STRICTALIGN-NEXT: lsr x11, x12, #48
-; STRICTALIGN-NEXT: strb w10, [x9, #3]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: add x12, x0, #16
-; STRICTALIGN-NEXT: strb w11, [x9, #2]
-; STRICTALIGN-NEXT: lsr x9, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w10, [x0, #4]!
-; STRICTALIGN-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-NEXT: strb w8, [x0, #2]
-; STRICTALIGN-NEXT: str x12, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: st1 { v0.16b }, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1_post16:
@@ -1395,44 +745,10 @@ define void @store_v16i8_align1_post16(ptr %ptr, <16 x i8> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v16i8_align1_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #13]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #9]
-; STRICTALIGN-BE-NEXT: mov x10, x0
-; STRICTALIGN-BE-NEXT: ldr x12, [sp]
-; STRICTALIGN-BE-NEXT: strb w9, [x10, #8]!
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
-; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #16
-; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #32
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #40
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #48
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #56
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #24
-; STRICTALIGN-BE-NEXT: strb w11, [x0]
-; STRICTALIGN-BE-NEXT: add x11, x0, #16
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #4]!
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #8
-; STRICTALIGN-BE-NEXT: strb w12, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x12, x8, #24
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #8
-; STRICTALIGN-BE-NEXT: strb w12, [x10, #4]!
-; STRICTALIGN-BE-NEXT: strb w8, [x10, #3]
-; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-BE-NEXT: str x11, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.16b }, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <16 x i8> %val, ptr %ptr, align 1
@@ -1449,44 +765,9 @@ define void @store_v16i8_align1_pre16(ptr %ptr, <16 x i8> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v16i8_align1_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: strb w8, [x0, #16]!
-; STRICTALIGN-NEXT: ldr x12, [sp, #8]
-; STRICTALIGN-NEXT: lsr x11, x8, #16
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: lsr x9, x8, #8
-; STRICTALIGN-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-NEXT: lsr x11, x12, #8
-; STRICTALIGN-NEXT: lsr x13, x12, #24
-; STRICTALIGN-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-NEXT: lsr x9, x12, #40
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: mov x10, x0
-; STRICTALIGN-NEXT: strb w9, [x0, #13]
-; STRICTALIGN-NEXT: lsr x9, x12, #16
-; STRICTALIGN-NEXT: strb w11, [x0, #9]
-; STRICTALIGN-NEXT: lsr x11, x8, #32
-; STRICTALIGN-NEXT: strb w12, [x10, #8]!
-; STRICTALIGN-NEXT: strb w13, [x10, #3]
-; STRICTALIGN-NEXT: lsr x13, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: strb w11, [x9, #4]!
-; STRICTALIGN-NEXT: lsr x11, x12, #32
-; STRICTALIGN-NEXT: strb w13, [x9, #3]
-; STRICTALIGN-NEXT: strb w8, [x9, #2]
-; STRICTALIGN-NEXT: lsr x8, x12, #56
-; STRICTALIGN-NEXT: lsr x9, x12, #48
-; STRICTALIGN-NEXT: strb w11, [x10, #4]!
-; STRICTALIGN-NEXT: strb w8, [x10, #3]
-; STRICTALIGN-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.16b }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1_pre16:
@@ -1498,44 +779,11 @@ define void @store_v16i8_align1_pre16(ptr %ptr, <16 x i8> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v16i8_align1_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #16]!
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
-; STRICTALIGN-BE-NEXT: ldr x12, [sp, #8]
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #24
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: lsr x13, x12, #56
-; STRICTALIGN-BE-NEXT: strb w11, [x9, #4]!
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #48
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: lsr x10, x12, #16
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #9]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #32
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #13]
-; STRICTALIGN-BE-NEXT: mov x10, x0
-; STRICTALIGN-BE-NEXT: strb w13, [x10, #8]!
-; STRICTALIGN-BE-NEXT: lsr x13, x12, #40
-; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #8
-; STRICTALIGN-BE-NEXT: strb w8, [x9, #3]
-; STRICTALIGN-BE-NEXT: lsr x8, x12, #24
-; STRICTALIGN-BE-NEXT: strb w13, [x10, #2]
-; STRICTALIGN-BE-NEXT: strb w8, [x10, #4]!
-; STRICTALIGN-BE-NEXT: lsr x8, x12, #8
-; STRICTALIGN-BE-NEXT: strb w11, [x9, #2]
-; STRICTALIGN-BE-NEXT: strb w12, [x10, #3]
-; STRICTALIGN-BE-NEXT: strb w8, [x10, #2]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.16b }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <16 x i8> %val, ptr %newptr, align 1
@@ -1552,49 +800,9 @@ define <16 x i8> @load_v16i8_align1_post32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v16i8_align1_post32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: mov x10, x0
-; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w8, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
-; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
-; STRICTALIGN-NEXT: ldrb w13, [x0]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
-; STRICTALIGN-NEXT: lsl x9, x9, #16
-; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
-; STRICTALIGN-NEXT: lsl w12, w12, #16
-; STRICTALIGN-NEXT: orr x8, x13, x8, lsl #8
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
-; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
-; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
-; STRICTALIGN-NEXT: orr x8, x9, x8
-; STRICTALIGN-NEXT: orr w9, w10, w11
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: mov x8, x0
-; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
-; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
-; STRICTALIGN-NEXT: ldrb w9, [x8, #8]!
-; STRICTALIGN-NEXT: ldrb w10, [x8, #3]
-; STRICTALIGN-NEXT: ldrb w11, [x8, #2]
-; STRICTALIGN-NEXT: ldrb w12, [x8, #4]!
-; STRICTALIGN-NEXT: ldrb w13, [x8, #2]
-; STRICTALIGN-NEXT: ldrb w8, [x8, #3]
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #8
-; STRICTALIGN-NEXT: lsl x11, x11, #16
-; STRICTALIGN-NEXT: lsl w13, w13, #16
-; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
-; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
-; STRICTALIGN-NEXT: orr w8, w13, w8, lsl #24
-; STRICTALIGN-NEXT: orr x9, x10, x9
-; STRICTALIGN-NEXT: orr w8, w8, w11
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
+; STRICTALIGN-NEXT: ld1 { v0.16b }, [x0]
; STRICTALIGN-NEXT: add x8, x0, #32
-; STRICTALIGN-NEXT: ldr q0, [sp]
; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1_post32:
@@ -1606,48 +814,11 @@ define <16 x i8> @load_v16i8_align1_post32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v16i8_align1_post32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #1]
-; STRICTALIGN-BE-NEXT: mov x12, x0
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0]
-; STRICTALIGN-BE-NEXT: lsl w11, w11, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
-; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #8
-; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #24
-; STRICTALIGN-BE-NEXT: orr x9, x12, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w10, w8
-; STRICTALIGN-BE-NEXT: orr x9, x11, x9
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: mov x8, x0
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #9]
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #13]
-; STRICTALIGN-BE-NEXT: ldrb w10, [x8, #8]!
-; STRICTALIGN-BE-NEXT: ldrb w12, [x8, #2]
-; STRICTALIGN-BE-NEXT: ldrb w13, [x8, #3]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x8, #4]!
-; STRICTALIGN-BE-NEXT: lsl w9, w9, #16
-; STRICTALIGN-BE-NEXT: lsl x11, x11, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x8, #2]
-; STRICTALIGN-BE-NEXT: ldrb w8, [x8, #3]
-; STRICTALIGN-BE-NEXT: orr w12, w13, w12, lsl #8
-; STRICTALIGN-BE-NEXT: orr w9, w9, w10, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x11, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr x8, x8, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr w9, w9, w12
-; STRICTALIGN-BE-NEXT: orr x8, x10, x8
-; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-BE-NEXT: add x9, x0, #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.16b }, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
%val = load <16 x i8>, ptr %ptr, align 1
@@ -1664,203 +835,60 @@ define <16 x i8> @load_v16i8_align1_pre32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v16i8_align1_pre32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrb w8, [x0, #32]!
-; STRICTALIGN-NEXT: mov x10, x0
-; STRICTALIGN-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-NEXT: ldrb w11, [x10, #4]!
-; STRICTALIGN-NEXT: ldrb w12, [x10, #2]
-; STRICTALIGN-NEXT: ldrb w13, [x0, #1]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #3]
-; STRICTALIGN-NEXT: ldrb w15, [x0, #5]
-; STRICTALIGN-NEXT: ldrb w10, [x10, #3]
-; STRICTALIGN-NEXT: lsl x9, x9, #16
-; STRICTALIGN-NEXT: lsl w12, w12, #16
-; STRICTALIGN-NEXT: orr x8, x8, x13, lsl #8
-; STRICTALIGN-NEXT: orr w11, w11, w15, lsl #8
-; STRICTALIGN-NEXT: orr x9, x9, x14, lsl #24
-; STRICTALIGN-NEXT: orr w10, w12, w10, lsl #24
-; STRICTALIGN-NEXT: orr x8, x9, x8
-; STRICTALIGN-NEXT: orr w9, w10, w11
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldrb w8, [x9, #8]!
-; STRICTALIGN-NEXT: ldrb w10, [x9, #3]
-; STRICTALIGN-NEXT: ldrb w11, [x9, #2]
-; STRICTALIGN-NEXT: ldrb w12, [x9, #4]!
-; STRICTALIGN-NEXT: ldrb w13, [x9, #2]
-; STRICTALIGN-NEXT: ldrb w14, [x0, #9]
-; STRICTALIGN-NEXT: ldrb w15, [x0, #13]
-; STRICTALIGN-NEXT: lsl x11, x11, #16
-; STRICTALIGN-NEXT: ldrb w9, [x9, #3]
-; STRICTALIGN-NEXT: lsl w13, w13, #16
-; STRICTALIGN-NEXT: orr x8, x8, x14, lsl #8
-; STRICTALIGN-NEXT: orr x10, x11, x10, lsl #24
-; STRICTALIGN-NEXT: orr w11, w12, w15, lsl #8
-; STRICTALIGN-NEXT: orr w9, w13, w9, lsl #24
-; STRICTALIGN-NEXT: orr x8, x10, x8
-; STRICTALIGN-NEXT: orr w9, w9, w11
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: ld1 { v0.16b }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v16i8_align1_pre32:
; NOSTRICTALIGN-BE: // %bb.0:
; NOSTRICTALIGN-BE-NEXT: ldr q0, [x0, #32]
-; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
-; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
-; NOSTRICTALIGN-BE-NEXT: ret
-;
-; STRICTALIGN-BE-LABEL: load_v16i8_align1_pre32:
-; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrb w8, [x0, #32]!
-; STRICTALIGN-BE-NEXT: ldrb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: mov x12, x0
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #5]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x12, #4]!
-; STRICTALIGN-BE-NEXT: ldrb w11, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsl w10, w10, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x12, #2]
-; STRICTALIGN-BE-NEXT: ldrb w12, [x12, #3]
-; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
-; STRICTALIGN-BE-NEXT: orr w9, w11, w9, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x12, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr w8, w10, w8, lsl #24
-; STRICTALIGN-BE-NEXT: orr x10, x13, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w8, w9
-; STRICTALIGN-BE-NEXT: orr x9, x10, x11
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldrb w8, [x9, #8]!
-; STRICTALIGN-BE-NEXT: ldrb w12, [x0, #9]
-; STRICTALIGN-BE-NEXT: ldrb w13, [x0, #13]
-; STRICTALIGN-BE-NEXT: ldrb w10, [x9, #2]
-; STRICTALIGN-BE-NEXT: ldrb w11, [x9, #3]
-; STRICTALIGN-BE-NEXT: ldrb w14, [x9, #4]!
-; STRICTALIGN-BE-NEXT: lsl w12, w12, #16
-; STRICTALIGN-BE-NEXT: ldrb w15, [x9, #2]
-; STRICTALIGN-BE-NEXT: ldrb w9, [x9, #3]
-; STRICTALIGN-BE-NEXT: lsl x13, x13, #16
-; STRICTALIGN-BE-NEXT: orr w10, w11, w10, lsl #8
-; STRICTALIGN-BE-NEXT: orr w8, w12, w8, lsl #24
-; STRICTALIGN-BE-NEXT: orr x9, x9, x15, lsl #8
-; STRICTALIGN-BE-NEXT: orr x11, x13, x14, lsl #24
-; STRICTALIGN-BE-NEXT: orr w8, w8, w10
-; STRICTALIGN-BE-NEXT: orr x9, x11, x9
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
-; STRICTALIGN-BE-NEXT: ret
- %newptr = getelementptr i8, ptr %ptr, i64 32
- %val = load <16 x i8>, ptr %newptr, align 1
- store ptr %newptr, ptr %writeback
- ret <16 x i8> %val
-}
-
-define void @store_v16i8_align1_post32(ptr %ptr, <16 x i8> %val, ptr %writeback) {
-; NOSTRICTALIGN-LABEL: store_v16i8_align1_post32:
-; NOSTRICTALIGN: // %bb.0:
-; NOSTRICTALIGN-NEXT: str q0, [x0], #32
-; NOSTRICTALIGN-NEXT: str x0, [x1]
-; NOSTRICTALIGN-NEXT: ret
-;
-; STRICTALIGN-LABEL: store_v16i8_align1_post32:
-; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: strb w8, [x0]
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: lsr x11, x8, #16
-; STRICTALIGN-NEXT: ldr x12, [sp, #8]
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-NEXT: lsr x10, x12, #40
-; STRICTALIGN-NEXT: lsr x11, x12, #24
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: strb w12, [x9, #8]!
-; STRICTALIGN-NEXT: strb w10, [x0, #13]
-; STRICTALIGN-NEXT: lsr x10, x12, #16
-; STRICTALIGN-NEXT: strb w11, [x9, #3]
-; STRICTALIGN-NEXT: lsr x11, x12, #8
-; STRICTALIGN-NEXT: strb w10, [x9, #2]
-; STRICTALIGN-NEXT: lsr x10, x8, #8
-; STRICTALIGN-NEXT: strb w11, [x0, #9]
-; STRICTALIGN-NEXT: lsr x11, x12, #32
-; STRICTALIGN-NEXT: strb w10, [x0, #1]
-; STRICTALIGN-NEXT: lsr x10, x12, #56
-; STRICTALIGN-NEXT: strb w11, [x9, #4]!
-; STRICTALIGN-NEXT: lsr x11, x12, #48
-; STRICTALIGN-NEXT: strb w10, [x9, #3]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: add x12, x0, #32
-; STRICTALIGN-NEXT: strb w11, [x9, #2]
-; STRICTALIGN-NEXT: lsr x9, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w10, [x0, #4]!
-; STRICTALIGN-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-NEXT: strb w8, [x0, #2]
-; STRICTALIGN-NEXT: str x12, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
-; STRICTALIGN-NEXT: ret
-;
-; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1_post32:
-; NOSTRICTALIGN-BE: // %bb.0:
-; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
-; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
-; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
-; NOSTRICTALIGN-BE-NEXT: ret
-;
-; STRICTALIGN-BE-LABEL: store_v16i8_align1_post32:
-; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #13]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #9]
-; STRICTALIGN-BE-NEXT: mov x10, x0
-; STRICTALIGN-BE-NEXT: ldr x12, [sp]
-; STRICTALIGN-BE-NEXT: strb w9, [x10, #8]!
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
-; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #16
-; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #32
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #40
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #48
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #56
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #24
-; STRICTALIGN-BE-NEXT: strb w11, [x0]
-; STRICTALIGN-BE-NEXT: add x11, x0, #32
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #4]!
-; STRICTALIGN-BE-NEXT: lsr x9, x12, #8
-; STRICTALIGN-BE-NEXT: strb w12, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x12, x8, #24
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #8
-; STRICTALIGN-BE-NEXT: strb w12, [x10, #4]!
-; STRICTALIGN-BE-NEXT: strb w8, [x10, #3]
-; STRICTALIGN-BE-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-BE-NEXT: str x11, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: load_v16i8_align1_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ld1 { v0.16b }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: ret
+ %newptr = getelementptr i8, ptr %ptr, i64 32
+ %val = load <16 x i8>, ptr %newptr, align 1
+ store ptr %newptr, ptr %writeback
+ ret <16 x i8> %val
+}
+
+define void @store_v16i8_align1_post32(ptr %ptr, <16 x i8> %val, ptr %writeback) {
+; NOSTRICTALIGN-LABEL: store_v16i8_align1_post32:
+; NOSTRICTALIGN: // %bb.0:
+; NOSTRICTALIGN-NEXT: str q0, [x0], #32
+; NOSTRICTALIGN-NEXT: str x0, [x1]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: store_v16i8_align1_post32:
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: st1 { v0.16b }, [x0]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1_post32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v16i8_align1_post32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.16b }, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
store <16 x i8> %val, ptr %ptr, align 1
@@ -1877,44 +905,9 @@ define void @store_v16i8_align1_pre32(ptr %ptr, <16 x i8> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v16i8_align1_pre32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: lsr x9, x8, #40
-; STRICTALIGN-NEXT: strb w8, [x0, #32]!
-; STRICTALIGN-NEXT: ldr x12, [sp, #8]
-; STRICTALIGN-NEXT: lsr x11, x8, #16
-; STRICTALIGN-NEXT: lsr x10, x8, #24
-; STRICTALIGN-NEXT: strb w9, [x0, #5]
-; STRICTALIGN-NEXT: lsr x9, x8, #8
-; STRICTALIGN-NEXT: strb w11, [x0, #2]
-; STRICTALIGN-NEXT: lsr x11, x12, #8
-; STRICTALIGN-NEXT: lsr x13, x12, #24
-; STRICTALIGN-NEXT: strb w9, [x0, #1]
-; STRICTALIGN-NEXT: lsr x9, x12, #40
-; STRICTALIGN-NEXT: strb w10, [x0, #3]
-; STRICTALIGN-NEXT: mov x10, x0
-; STRICTALIGN-NEXT: strb w9, [x0, #13]
-; STRICTALIGN-NEXT: lsr x9, x12, #16
-; STRICTALIGN-NEXT: strb w11, [x0, #9]
-; STRICTALIGN-NEXT: lsr x11, x8, #32
-; STRICTALIGN-NEXT: strb w12, [x10, #8]!
-; STRICTALIGN-NEXT: strb w13, [x10, #3]
-; STRICTALIGN-NEXT: lsr x13, x8, #56
-; STRICTALIGN-NEXT: lsr x8, x8, #48
-; STRICTALIGN-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: strb w11, [x9, #4]!
-; STRICTALIGN-NEXT: lsr x11, x12, #32
-; STRICTALIGN-NEXT: strb w13, [x9, #3]
-; STRICTALIGN-NEXT: strb w8, [x9, #2]
-; STRICTALIGN-NEXT: lsr x8, x12, #56
-; STRICTALIGN-NEXT: lsr x9, x12, #48
-; STRICTALIGN-NEXT: strb w11, [x10, #4]!
-; STRICTALIGN-NEXT: strb w8, [x10, #3]
-; STRICTALIGN-NEXT: strb w9, [x10, #2]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: st1 { v0.16b }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v16i8_align1_pre32:
@@ -1926,44 +919,11 @@ define void @store_v16i8_align1_pre32(ptr %ptr, <16 x i8> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v16i8_align1_pre32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #56
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #32
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #32]!
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #40
-; STRICTALIGN-BE-NEXT: ldr x12, [sp, #8]
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #3]
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #24
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #5]
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #48
-; STRICTALIGN-BE-NEXT: strb w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: lsr x13, x12, #56
-; STRICTALIGN-BE-NEXT: strb w11, [x9, #4]!
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #48
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #1]
-; STRICTALIGN-BE-NEXT: lsr x10, x12, #16
-; STRICTALIGN-BE-NEXT: strb w11, [x0, #9]
-; STRICTALIGN-BE-NEXT: lsr x11, x12, #32
-; STRICTALIGN-BE-NEXT: strb w10, [x0, #13]
-; STRICTALIGN-BE-NEXT: mov x10, x0
-; STRICTALIGN-BE-NEXT: strb w13, [x10, #8]!
-; STRICTALIGN-BE-NEXT: lsr x13, x12, #40
-; STRICTALIGN-BE-NEXT: strb w11, [x10, #3]
-; STRICTALIGN-BE-NEXT: lsr x11, x8, #8
-; STRICTALIGN-BE-NEXT: strb w8, [x9, #3]
-; STRICTALIGN-BE-NEXT: lsr x8, x12, #24
-; STRICTALIGN-BE-NEXT: strb w13, [x10, #2]
-; STRICTALIGN-BE-NEXT: strb w8, [x10, #4]!
-; STRICTALIGN-BE-NEXT: lsr x8, x12, #8
-; STRICTALIGN-BE-NEXT: strb w11, [x9, #2]
-; STRICTALIGN-BE-NEXT: strb w12, [x10, #3]
-; STRICTALIGN-BE-NEXT: strb w8, [x10, #2]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.16b, v0.16b
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.16b }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
store <16 x i8> %val, ptr %newptr, align 1
@@ -2092,7 +1052,7 @@ define void @store_v16i8_align16_post16(ptr %ptr, <16 x i8> %val, ptr %writeback
;
; STRICTALIGN-LABEL: store_v16i8_align16_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [x0], #16
+; STRICTALIGN-NEXT: st1 { v0.16b }, [x0], #16
; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
@@ -2909,14 +1869,7 @@ define <4 x i16> @load_v4i16_align2(ptr %ptr) {
;
; STRICTALIGN-LABEL: load_v4i16_align2:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
-; STRICTALIGN-NEXT: ldrh w11, [x0]
-; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ld1 { v0.4h }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v4i16_align2:
@@ -2926,14 +1879,8 @@ define <4 x i16> @load_v4i16_align2(ptr %ptr) {
;
; STRICTALIGN-BE-LABEL: load_v4i16_align2:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ld1 { v0.4h }, [x0]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
; STRICTALIGN-BE-NEXT: ret
%val = load <4 x i16>, ptr %ptr, align 2
ret <4 x i16> %val
@@ -2947,14 +1894,7 @@ define void @store_v4i16_align2(ptr %ptr, <4 x i16> %val) {
;
; STRICTALIGN-LABEL: store_v4i16_align2:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: strh w8, [x0]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
+; STRICTALIGN-NEXT: st1 { v0.4h }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2:
@@ -2964,14 +1904,8 @@ define void @store_v4i16_align2(ptr %ptr, <4 x i16> %val) {
;
; STRICTALIGN-BE-LABEL: store_v4i16_align2:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
-; STRICTALIGN-BE-NEXT: strh w8, [x0]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
+; STRICTALIGN-BE-NEXT: st1 { v0.4h }, [x0]
; STRICTALIGN-BE-NEXT: ret
store <4 x i16> %val, ptr %ptr, align 2
ret void
@@ -2986,16 +1920,8 @@ define <4 x i16> @load_v4i16_align2_post8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v4i16_align2_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
-; STRICTALIGN-NEXT: ldrh w11, [x0]
-; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
-; STRICTALIGN-NEXT: add x8, x0, #8
-; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ld1 { v0.4h }, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v4i16_align2_post8:
@@ -3006,16 +1932,9 @@ define <4 x i16> @load_v4i16_align2_post8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v4i16_align2_post8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
-; STRICTALIGN-BE-NEXT: add x8, x0, #8
-; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ld1 { v0.4h }, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
%val = load <4 x i16>, ptr %ptr, align 2
@@ -3032,15 +1951,9 @@ define <4 x i16> @load_v4i16_align2_pre8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v4i16_align2_pre8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #8]!
-; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: ld1 { v0.4h }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v4i16_align2_pre8:
@@ -3051,15 +1964,10 @@ define <4 x i16> @load_v4i16_align2_pre8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v4i16_align2_pre8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #8]!
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
-; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: ld1 { v0.4h }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
%val = load <4 x i16>, ptr %newptr, align 2
@@ -3076,16 +1984,8 @@ define void @store_v4i16_align2_post8(ptr %ptr, <4 x i16> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v4i16_align2_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: strh w8, [x0]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: add x9, x0, #8
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: st1 { v0.4h }, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2_post8:
@@ -3096,16 +1996,9 @@ define void @store_v4i16_align2_post8(ptr %ptr, <4 x i16> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v4i16_align2_post8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: add x9, x0, #8
-; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
-; STRICTALIGN-BE-NEXT: strh w8, [x0]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
+; STRICTALIGN-BE-NEXT: st1 { v0.4h }, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
store <4 x i16> %val, ptr %ptr, align 2
@@ -3122,15 +2015,9 @@ define void @store_v4i16_align2_pre8(ptr %ptr, <4 x i16> %val, ptr %writeback) {
;
; STRICTALIGN-LABEL: store_v4i16_align2_pre8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: strh w8, [x0, #8]!
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: st1 { v0.4h }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2_pre8:
@@ -3141,15 +2028,10 @@ define void @store_v4i16_align2_pre8(ptr %ptr, <4 x i16> %val, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: store_v4i16_align2_pre8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #8]!
-; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
-; STRICTALIGN-BE-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.4h }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
store <4 x i16> %val, ptr %newptr, align 2
@@ -3166,14 +2048,7 @@ define <4 x i16> @load_v4i16_align2_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v4i16_align2_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
-; STRICTALIGN-NEXT: ldrh w11, [x0]
-; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ld1 { v0.4h }, [x0]
; STRICTALIGN-NEXT: add x8, x0, #16
; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
@@ -3185,17 +2060,11 @@ define <4 x i16> @load_v4i16_align2_post16(ptr %ptr, ptr %writeback) {
; NOSTRICTALIGN-BE-NEXT: ret
;
; STRICTALIGN-BE-LABEL: load_v4i16_align2_post16:
-; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: ld1 { v0.4h }, [x0]
; STRICTALIGN-BE-NEXT: add x8, x0, #16
; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <4 x i16>, ptr %ptr, align 2
@@ -3212,15 +2081,9 @@ define <4 x i16> @load_v4i16_align2_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v4i16_align2_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #16]!
-; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ld1 { v0.4h }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v4i16_align2_pre16:
@@ -3231,15 +2094,10 @@ define <4 x i16> @load_v4i16_align2_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v4i16_align2_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #16]!
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
-; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.4h }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <4 x i16>, ptr %newptr, align 2
@@ -3256,16 +2114,9 @@ define void @store_v4i16_align2_post16(ptr %ptr, <4 x i16> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v4i16_align2_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: strh w8, [x0]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: add x9, x0, #16
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-NEXT: str x9, [x1]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.4h }, [x0]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2_post16:
@@ -3276,16 +2127,10 @@ define void @store_v4i16_align2_post16(ptr %ptr, <4 x i16> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v4i16_align2_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: add x9, x0, #16
-; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
-; STRICTALIGN-BE-NEXT: strh w8, [x0]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: st1 { v0.4h }, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <4 x i16> %val, ptr %ptr, align 2
@@ -3302,15 +2147,9 @@ define void @store_v4i16_align2_pre16(ptr %ptr, <4 x i16> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v4i16_align2_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: strh w8, [x0, #16]!
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.4h }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i16_align2_pre16:
@@ -3321,15 +2160,10 @@ define void @store_v4i16_align2_pre16(ptr %ptr, <4 x i16> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v4i16_align2_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #16]!
-; STRICTALIGN-BE-NEXT: str h0, [x0, #6]
-; STRICTALIGN-BE-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4h, v0.4h
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: st1 { v0.4h }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <4 x i16> %val, ptr %newptr, align 2
@@ -3454,7 +2288,7 @@ define void @store_v4i16_align8_post8(ptr %ptr, <4 x i16> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v4i16_align8_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str d0, [x0], #8
+; STRICTALIGN-NEXT: st1 { v0.4h }, [x0], #8
; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
@@ -4685,24 +3519,7 @@ define <8 x i16> @load_v8i16_align2(ptr %ptr) {
;
; STRICTALIGN-LABEL: load_v8i16_align2:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
-; STRICTALIGN-NEXT: ldrh w11, [x0]
-; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldrh w8, [x0, #10]
-; STRICTALIGN-NEXT: ldrh w9, [x0, #8]!
-; STRICTALIGN-NEXT: ldrh w10, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w11, [x0, #4]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #16
-; STRICTALIGN-NEXT: orr w9, w11, w10, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ld1 { v0.8h }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2:
@@ -4712,25 +3529,9 @@ define <8 x i16> @load_v8i16_align2(ptr %ptr) {
;
; STRICTALIGN-BE-LABEL: load_v8i16_align2:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: mov x8, x0
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #10]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x8, #8]!
-; STRICTALIGN-BE-NEXT: ldrh w11, [x8, #4]
-; STRICTALIGN-BE-NEXT: ldrh w8, [x8, #6]
-; STRICTALIGN-BE-NEXT: orr w9, w10, w9, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x8, x11, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.8h }, [x0]
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%val = load <8 x i16>, ptr %ptr, align 2
ret <8 x i16> %val
@@ -4744,25 +3545,7 @@ define void @store_v8i16_align2(ptr %ptr, <8 x i16> %val) {
;
; STRICTALIGN-LABEL: store_v8i16_align2:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: strh w8, [x0]
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: ldr x11, [sp, #8]
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: lsr x9, x11, #16
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-NEXT: lsr x8, x11, #48
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-NEXT: lsr x9, x11, #32
-; STRICTALIGN-NEXT: strh w11, [x0, #8]!
-; STRICTALIGN-NEXT: strh w8, [x0, #6]
-; STRICTALIGN-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: st1 { v0.8h }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2:
@@ -4772,25 +3555,9 @@ define void @store_v8i16_align2(ptr %ptr, <8 x i16> %val) {
;
; STRICTALIGN-BE-LABEL: store_v8i16_align2:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
-; STRICTALIGN-BE-NEXT: ldr x11, [sp, #8]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x9, x11, #32
-; STRICTALIGN-BE-NEXT: strh w8, [x0]
-; STRICTALIGN-BE-NEXT: lsr x8, x11, #48
-; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-BE-NEXT: lsr x9, x11, #16
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #8]!
-; STRICTALIGN-BE-NEXT: strh w11, [x0, #6]
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.8h }, [x0]
; STRICTALIGN-BE-NEXT: ret
store <8 x i16> %val, ptr %ptr, align 2
ret void
@@ -4805,27 +3572,8 @@ define <8 x i16> @load_v8i16_align2_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v8i16_align2_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
-; STRICTALIGN-NEXT: ldrh w11, [x0]
-; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: add x9, x0, #16
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldrh w8, [x0, #10]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #8]!
-; STRICTALIGN-NEXT: ldrh w11, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w12, [x0, #4]
-; STRICTALIGN-NEXT: orr x8, x10, x8, lsl #16
-; STRICTALIGN-NEXT: orr w10, w12, w11, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x9, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ld1 { v0.8h }, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2_post16:
@@ -4837,27 +3585,10 @@ define <8 x i16> @load_v8i16_align2_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v8i16_align2_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: mov x8, x0
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #10]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x8, #8]!
-; STRICTALIGN-BE-NEXT: ldrh w11, [x8, #4]
-; STRICTALIGN-BE-NEXT: ldrh w8, [x8, #6]
-; STRICTALIGN-BE-NEXT: orr w9, w10, w9, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x8, x11, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-BE-NEXT: add x9, x0, #16
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.8h }, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <8 x i16>, ptr %ptr, align 2
@@ -4874,27 +3605,9 @@ define <8 x i16> @load_v8i16_align2_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v8i16_align2_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #16]!
-; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
-; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldrh w8, [x9, #8]!
-; STRICTALIGN-NEXT: ldrh w10, [x0, #10]
-; STRICTALIGN-NEXT: ldrh w11, [x9, #6]
-; STRICTALIGN-NEXT: ldrh w9, [x9, #4]
-; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #16
-; STRICTALIGN-NEXT: orr w9, w9, w11, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ld1 { v0.8h }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2_pre16:
@@ -4906,26 +3619,11 @@ define <8 x i16> @load_v8i16_align2_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v8i16_align2_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #16]!
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
-; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
-; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldrh w8, [x9, #8]!
-; STRICTALIGN-BE-NEXT: ldrh w10, [x9, #4]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x9, #6]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #10]
-; STRICTALIGN-BE-NEXT: orr x9, x9, x10, lsl #16
-; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.8h }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <8 x i16>, ptr %newptr, align 2
@@ -4942,28 +3640,8 @@ define void @store_v8i16_align2_post16(ptr %ptr, <8 x i16> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v8i16_align2_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: strh w8, [x0]
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: ldr x11, [sp, #8]
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: lsr x9, x11, #16
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-NEXT: lsr x8, x11, #48
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: lsr x10, x11, #32
-; STRICTALIGN-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: strh w11, [x9, #8]!
-; STRICTALIGN-NEXT: strh w8, [x9, #6]
-; STRICTALIGN-NEXT: add x8, x0, #16
-; STRICTALIGN-NEXT: strh w10, [x9, #4]
-; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: st1 { v0.8h }, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2_post16:
@@ -4975,27 +3653,10 @@ define void @store_v8i16_align2_post16(ptr %ptr, <8 x i16> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v8i16_align2_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
-; STRICTALIGN-BE-NEXT: ldr x11, [sp, #8]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x9, x11, #32
-; STRICTALIGN-BE-NEXT: strh w8, [x0]
-; STRICTALIGN-BE-NEXT: lsr x8, x11, #48
-; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
-; STRICTALIGN-BE-NEXT: add x10, x0, #16
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-BE-NEXT: lsr x9, x11, #16
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #8]!
-; STRICTALIGN-BE-NEXT: strh w11, [x0, #6]
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: str x10, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.8h }, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <8 x i16> %val, ptr %ptr, align 2
@@ -5012,27 +3673,9 @@ define void @store_v8i16_align2_pre16(ptr %ptr, <8 x i16> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v8i16_align2_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: strh w8, [x0, #16]!
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: ldr x11, [sp, #8]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: lsr x9, x11, #16
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: lsr x10, x11, #32
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-NEXT: mov x8, x0
-; STRICTALIGN-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-NEXT: lsr x9, x11, #48
-; STRICTALIGN-NEXT: strh w11, [x8, #8]!
-; STRICTALIGN-NEXT: strh w9, [x8, #6]
-; STRICTALIGN-NEXT: strh w10, [x8, #4]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.8h }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2_pre16:
@@ -5044,27 +3687,11 @@ define void @store_v8i16_align2_pre16(ptr %ptr, <8 x i16> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v8i16_align2_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #16]!
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: ldr x10, [sp, #8]
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x8, x10, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: strh w8, [x9, #8]!
-; STRICTALIGN-BE-NEXT: lsr x8, x10, #16
-; STRICTALIGN-BE-NEXT: strh w10, [x9, #6]
-; STRICTALIGN-BE-NEXT: strh w8, [x9, #4]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.8h }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <8 x i16> %val, ptr %newptr, align 2
@@ -5081,27 +3708,9 @@ define <8 x i16> @load_v8i16_align2_post32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v8i16_align2_post32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #2]
-; STRICTALIGN-NEXT: ldrh w11, [x0]
-; STRICTALIGN-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: add x9, x0, #32
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldrh w8, [x0, #10]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #8]!
-; STRICTALIGN-NEXT: ldrh w11, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w12, [x0, #4]
-; STRICTALIGN-NEXT: orr x8, x10, x8, lsl #16
-; STRICTALIGN-NEXT: orr w10, w12, w11, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x9, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ld1 { v0.8h }, [x0]
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2_post32:
@@ -5113,27 +3722,11 @@ define <8 x i16> @load_v8i16_align2_post32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v8i16_align2_post32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #2]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #6]
-; STRICTALIGN-BE-NEXT: orr w8, w9, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x9, x11, x10, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: mov x8, x0
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #10]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x8, #8]!
-; STRICTALIGN-BE-NEXT: ldrh w11, [x8, #4]
-; STRICTALIGN-BE-NEXT: ldrh w8, [x8, #6]
-; STRICTALIGN-BE-NEXT: orr w9, w10, w9, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x8, x11, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-BE-NEXT: add x9, x0, #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.8h }, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
%val = load <8 x i16>, ptr %ptr, align 2
@@ -5150,27 +3743,9 @@ define <8 x i16> @load_v8i16_align2_pre32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v8i16_align2_pre32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldrh w8, [x0, #32]!
-; STRICTALIGN-NEXT: ldrh w9, [x0, #6]
-; STRICTALIGN-NEXT: ldrh w10, [x0, #4]
-; STRICTALIGN-NEXT: ldrh w11, [x0, #2]
-; STRICTALIGN-NEXT: orr w9, w10, w9, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x11, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldrh w8, [x9, #8]!
-; STRICTALIGN-NEXT: ldrh w10, [x0, #10]
-; STRICTALIGN-NEXT: ldrh w11, [x9, #6]
-; STRICTALIGN-NEXT: ldrh w9, [x9, #4]
-; STRICTALIGN-NEXT: orr x8, x8, x10, lsl #16
-; STRICTALIGN-NEXT: orr w9, w9, w11, lsl #16
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: ld1 { v0.8h }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v8i16_align2_pre32:
@@ -5182,26 +3757,11 @@ define <8 x i16> @load_v8i16_align2_pre32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v8i16_align2_pre32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldrh w8, [x0, #32]!
-; STRICTALIGN-BE-NEXT: ldrh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: ldrh w10, [x0, #6]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #2]
-; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #16
-; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldrh w8, [x9, #8]!
-; STRICTALIGN-BE-NEXT: ldrh w10, [x9, #4]
-; STRICTALIGN-BE-NEXT: ldrh w9, [x9, #6]
-; STRICTALIGN-BE-NEXT: ldrh w11, [x0, #10]
-; STRICTALIGN-BE-NEXT: orr x9, x9, x10, lsl #16
-; STRICTALIGN-BE-NEXT: orr w8, w11, w8, lsl #16
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ld1 { v0.8h }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
%val = load <8 x i16>, ptr %newptr, align 2
@@ -5218,28 +3778,9 @@ define void @store_v8i16_align2_post32(ptr %ptr, <8 x i16> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v8i16_align2_post32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: strh w8, [x0]
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: ldr x11, [sp, #8]
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: lsr x9, x11, #16
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-NEXT: lsr x8, x11, #48
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: lsr x10, x11, #32
-; STRICTALIGN-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-NEXT: mov x9, x0
-; STRICTALIGN-NEXT: strh w11, [x9, #8]!
-; STRICTALIGN-NEXT: strh w8, [x9, #6]
; STRICTALIGN-NEXT: add x8, x0, #32
-; STRICTALIGN-NEXT: strh w10, [x9, #4]
+; STRICTALIGN-NEXT: st1 { v0.8h }, [x0]
; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2_post32:
@@ -5251,27 +3792,11 @@ define void @store_v8i16_align2_post32(ptr %ptr, <8 x i16> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v8i16_align2_post32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: lsr x10, x8, #32
-; STRICTALIGN-BE-NEXT: ldr x11, [sp, #8]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x9, x11, #32
-; STRICTALIGN-BE-NEXT: strh w8, [x0]
-; STRICTALIGN-BE-NEXT: lsr x8, x11, #48
-; STRICTALIGN-BE-NEXT: strh w10, [x0, #2]
-; STRICTALIGN-BE-NEXT: add x10, x0, #32
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-BE-NEXT: lsr x9, x11, #16
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #8]!
-; STRICTALIGN-BE-NEXT: strh w11, [x0, #6]
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: str x10, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.8h }, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
store <8 x i16> %val, ptr %ptr, align 2
@@ -5287,60 +3812,26 @@ define void @store_v8i16_align2_pre32(ptr %ptr, <8 x i16> %val, ptr %writeback)
; NOSTRICTALIGN-NEXT: ret
;
; STRICTALIGN-LABEL: store_v8i16_align2_pre32:
-; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: strh w8, [x0, #32]!
-; STRICTALIGN-NEXT: lsr x9, x8, #48
-; STRICTALIGN-NEXT: ldr x11, [sp, #8]
-; STRICTALIGN-NEXT: lsr x10, x8, #32
-; STRICTALIGN-NEXT: lsr x8, x8, #16
-; STRICTALIGN-NEXT: strh w9, [x0, #6]
-; STRICTALIGN-NEXT: lsr x9, x11, #16
-; STRICTALIGN-NEXT: strh w10, [x0, #4]
-; STRICTALIGN-NEXT: lsr x10, x11, #32
-; STRICTALIGN-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-NEXT: mov x8, x0
-; STRICTALIGN-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-NEXT: lsr x9, x11, #48
-; STRICTALIGN-NEXT: strh w11, [x8, #8]!
-; STRICTALIGN-NEXT: strh w9, [x8, #6]
-; STRICTALIGN-NEXT: strh w10, [x8, #4]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
-; STRICTALIGN-NEXT: ret
-;
-; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2_pre32:
-; NOSTRICTALIGN-BE: // %bb.0:
-; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
-; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
-; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
-; NOSTRICTALIGN-BE-NEXT: ret
-;
-; STRICTALIGN-BE-LABEL: store_v8i16_align2_pre32:
-; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #32]!
-; STRICTALIGN-BE-NEXT: lsr x9, x8, #16
-; STRICTALIGN-BE-NEXT: ldr x10, [sp, #8]
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #6]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
-; STRICTALIGN-BE-NEXT: strh w8, [x0, #2]
-; STRICTALIGN-BE-NEXT: lsr x8, x10, #48
-; STRICTALIGN-BE-NEXT: strh w9, [x0, #10]
-; STRICTALIGN-BE-NEXT: mov x9, x0
-; STRICTALIGN-BE-NEXT: strh w8, [x9, #8]!
-; STRICTALIGN-BE-NEXT: lsr x8, x10, #16
-; STRICTALIGN-BE-NEXT: strh w10, [x9, #6]
-; STRICTALIGN-BE-NEXT: strh w8, [x9, #4]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN: // %bb.0:
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: st1 { v0.8h }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ret
+;
+; NOSTRICTALIGN-BE-LABEL: store_v8i16_align2_pre32:
+; NOSTRICTALIGN-BE: // %bb.0:
+; NOSTRICTALIGN-BE-NEXT: add x8, x0, #32
+; NOSTRICTALIGN-BE-NEXT: str q0, [x0, #32]
+; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
+; NOSTRICTALIGN-BE-NEXT: ret
+;
+; STRICTALIGN-BE-LABEL: store_v8i16_align2_pre32:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: rev64 v0.8h, v0.8h
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.8h }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
store <8 x i16> %val, ptr %newptr, align 2
@@ -5469,7 +3960,7 @@ define void @store_v8i16_align16_post16(ptr %ptr, <8 x i16> %val, ptr %writeback
;
; STRICTALIGN-LABEL: store_v8i16_align16_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [x0], #16
+; STRICTALIGN-NEXT: st1 { v0.8h }, [x0], #16
; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
@@ -6096,9 +4587,7 @@ define <2 x i32> @load_v2i32_align4(ptr %ptr) {
;
; STRICTALIGN-LABEL: load_v2i32_align4:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldp w9, w8, [x0]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ld1 { v0.2s }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v2i32_align4:
@@ -6108,9 +4597,8 @@ define <2 x i32> @load_v2i32_align4(ptr %ptr) {
;
; STRICTALIGN-BE-LABEL: load_v2i32_align4:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ld1 { v0.2s }, [x0]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
; STRICTALIGN-BE-NEXT: ret
%val = load <2 x i32>, ptr %ptr, align 4
ret <2 x i32> %val
@@ -6124,9 +4612,7 @@ define void @store_v2i32_align4(ptr %ptr, <2 x i32> %val) {
;
; STRICTALIGN-LABEL: store_v2i32_align4:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #32
-; STRICTALIGN-NEXT: stp w8, w9, [x0]
+; STRICTALIGN-NEXT: st1 { v0.2s }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v2i32_align4:
@@ -6136,10 +4622,8 @@ define void @store_v2i32_align4(ptr %ptr, <2 x i32> %val) {
;
; STRICTALIGN-BE-LABEL: store_v2i32_align4:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: str w8, [x0]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
+; STRICTALIGN-BE-NEXT: st1 { v0.2s }, [x0]
; STRICTALIGN-BE-NEXT: ret
store <2 x i32> %val, ptr %ptr, align 4
ret void
@@ -6154,11 +4638,8 @@ define <2 x i32> @load_v2i32_align4_post8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v2i32_align4_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldp w9, w8, [x0]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
-; STRICTALIGN-NEXT: add x8, x0, #8
-; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: ld1 { v0.2s }, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v2i32_align4_post8:
@@ -6169,11 +4650,9 @@ define <2 x i32> @load_v2i32_align4_post8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v2i32_align4_post8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
-; STRICTALIGN-BE-NEXT: add x8, x0, #8
-; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ld1 { v0.2s }, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
%val = load <2 x i32>, ptr %ptr, align 4
@@ -6190,10 +4669,9 @@ define <2 x i32> @load_v2i32_align4_pre8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v2i32_align4_pre8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldp w8, w9, [x0, #8]!
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: ld1 { v0.2s }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v2i32_align4_pre8:
@@ -6204,10 +4682,10 @@ define <2 x i32> @load_v2i32_align4_pre8(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v2i32_align4_pre8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]!
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: ld1 { v0.2s }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
%val = load <2 x i32>, ptr %newptr, align 4
@@ -6224,11 +4702,8 @@ define void @store_v2i32_align4_post8(ptr %ptr, <2 x i32> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v2i32_align4_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #32
-; STRICTALIGN-NEXT: stp w8, w9, [x0]
-; STRICTALIGN-NEXT: add x8, x0, #8
-; STRICTALIGN-NEXT: str x8, [x1]
+; STRICTALIGN-NEXT: st1 { v0.2s }, [x0], #8
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v2i32_align4_post8:
@@ -6239,12 +4714,9 @@ define void @store_v2i32_align4_post8(ptr %ptr, <2 x i32> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v2i32_align4_post8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: add x9, x0, #8
-; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: str w8, [x0]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
+; STRICTALIGN-BE-NEXT: st1 { v0.2s }, [x0], #8
+; STRICTALIGN-BE-NEXT: str x0, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
store <2 x i32> %val, ptr %ptr, align 4
@@ -6261,10 +4733,9 @@ define void @store_v2i32_align4_pre8(ptr %ptr, <2 x i32> %val, ptr %writeback) {
;
; STRICTALIGN-LABEL: store_v2i32_align4_pre8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #32
-; STRICTALIGN-NEXT: stp w8, w9, [x0, #8]!
-; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add x8, x0, #8
+; STRICTALIGN-NEXT: st1 { v0.2s }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v2i32_align4_pre8:
@@ -6275,11 +4746,10 @@ define void @store_v2i32_align4_pre8(ptr %ptr, <2 x i32> %val, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: store_v2i32_align4_pre8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: str w8, [x0, #8]!
-; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
+; STRICTALIGN-BE-NEXT: add x8, x0, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.2s }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 8
store <2 x i32> %val, ptr %newptr, align 4
@@ -6296,9 +4766,7 @@ define <2 x i32> @load_v2i32_align4_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v2i32_align4_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldp w9, w8, [x0]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: ld1 { v0.2s }, [x0]
; STRICTALIGN-NEXT: add x8, x0, #16
; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
@@ -6311,11 +4779,10 @@ define <2 x i32> @load_v2i32_align4_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v2i32_align4_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: ld1 { v0.2s }, [x0]
; STRICTALIGN-BE-NEXT: add x8, x0, #16
; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <2 x i32>, ptr %ptr, align 4
@@ -6332,10 +4799,9 @@ define <2 x i32> @load_v2i32_align4_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v2i32_align4_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldp w8, w9, [x0, #16]!
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: fmov d0, x8
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ld1 { v0.2s }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v2i32_align4_pre16:
@@ -6346,10 +4812,10 @@ define <2 x i32> @load_v2i32_align4_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v2i32_align4_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #16]!
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: fmov d0, x8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.2s }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <2 x i32>, ptr %newptr, align 4
@@ -6366,10 +4832,8 @@ define void @store_v2i32_align4_post16(ptr %ptr, <2 x i32> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v2i32_align4_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #32
-; STRICTALIGN-NEXT: stp w8, w9, [x0]
; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.2s }, [x0]
; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
@@ -6381,12 +4845,10 @@ define void @store_v2i32_align4_post16(ptr %ptr, <2 x i32> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v2i32_align4_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: add x9, x0, #16
-; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: str w8, [x0]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: st1 { v0.2s }, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <2 x i32> %val, ptr %ptr, align 4
@@ -6403,10 +4865,9 @@ define void @store_v2i32_align4_pre16(ptr %ptr, <2 x i32> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v2i32_align4_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: fmov x8, d0
-; STRICTALIGN-NEXT: lsr x9, x8, #32
-; STRICTALIGN-NEXT: stp w8, w9, [x0, #16]!
-; STRICTALIGN-NEXT: str x0, [x1]
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.2s }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v2i32_align4_pre16:
@@ -6417,11 +4878,10 @@ define void @store_v2i32_align4_pre16(ptr %ptr, <2 x i32> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v2i32_align4_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: fmov x8, d0
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: str w8, [x0, #16]!
-; STRICTALIGN-BE-NEXT: str s0, [x0, #4]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.2s, v0.2s
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: st1 { v0.2s }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <2 x i32> %val, ptr %newptr, align 4
@@ -6546,7 +5006,7 @@ define void @store_v2i32_align8_post8(ptr %ptr, <2 x i32> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v2i32_align8_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str d0, [x0], #8
+; STRICTALIGN-NEXT: st1 { v0.2s }, [x0], #8
; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
@@ -7396,15 +5856,7 @@ define <4 x i32> @load_v4i32_align4(ptr %ptr) {
;
; STRICTALIGN-LABEL: load_v4i32_align4:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: sub sp, sp, #16
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldp w9, w8, [x0, #8]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldp w9, w8, [x0]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp]
-; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ld1 { v0.4s }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4:
@@ -7414,15 +5866,9 @@ define <4 x i32> @load_v4i32_align4(ptr %ptr) {
;
; STRICTALIGN-BE-LABEL: load_v4i32_align4:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: sub sp, sp, #16
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.4s }, [x0]
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%val = load <4 x i32>, ptr %ptr, align 4
ret <4 x i32> %val
@@ -7436,16 +5882,7 @@ define void @store_v4i32_align4(ptr %ptr, <4 x i32> %val) {
;
; STRICTALIGN-LABEL: store_v4i32_align4:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-NEXT: str w8, [x0, #8]
-; STRICTALIGN-NEXT: lsr x8, x8, #32
-; STRICTALIGN-NEXT: ldr x9, [sp]
-; STRICTALIGN-NEXT: str w8, [x0, #12]
-; STRICTALIGN-NEXT: lsr x8, x9, #32
-; STRICTALIGN-NEXT: stp w9, w8, [x0]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: st1 { v0.4s }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4:
@@ -7455,16 +5892,9 @@ define void @store_v4i32_align4(ptr %ptr, <4 x i32> %val) {
;
; STRICTALIGN-BE-LABEL: store_v4i32_align4:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str w8, [x0, #12]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: ldr x9, [sp]
-; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
-; STRICTALIGN-BE-NEXT: str w8, [x0]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.4s }, [x0]
; STRICTALIGN-BE-NEXT: ret
store <4 x i32> %val, ptr %ptr, align 4
ret void
@@ -7479,18 +5909,8 @@ define <4 x i32> @load_v4i32_align4_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v4i32_align4_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: sub sp, sp, #16
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldp w9, w8, [x0, #8]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldp w9, w8, [x0]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp]
-; STRICTALIGN-NEXT: add x8, x0, #16
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ld1 { v0.4s }, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4_post16:
@@ -7502,17 +5922,10 @@ define <4 x i32> @load_v4i32_align4_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v4i32_align4_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: sub sp, sp, #16
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: add x9, x0, #16
-; STRICTALIGN-BE-NEXT: str x8, [sp]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.4s }, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <4 x i32>, ptr %ptr, align 4
@@ -7529,18 +5942,9 @@ define <4 x i32> @load_v4i32_align4_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v4i32_align4_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: sub sp, sp, #16
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr w8, [x0, #16]!
-; STRICTALIGN-NEXT: ldp w10, w9, [x0, #8]
-; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #32
-; STRICTALIGN-NEXT: str x9, [sp, #8]
-; STRICTALIGN-NEXT: ldr w9, [x0, #4]
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ld1 { v0.4s }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4_pre16:
@@ -7552,17 +5956,11 @@ define <4 x i32> @load_v4i32_align4_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v4i32_align4_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: sub sp, sp, #16
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr w8, [x0, #16]!
-; STRICTALIGN-BE-NEXT: ldp w9, w10, [x0, #8]
-; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #32
-; STRICTALIGN-BE-NEXT: str x9, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldr w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.4s }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <4 x i32>, ptr %newptr, align 4
@@ -7579,18 +5977,8 @@ define void @store_v4i32_align4_post16(ptr %ptr, <4 x i32> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v4i32_align4_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-NEXT: str w8, [x0, #8]
-; STRICTALIGN-NEXT: lsr x8, x8, #32
-; STRICTALIGN-NEXT: ldr x9, [sp]
-; STRICTALIGN-NEXT: str w8, [x0, #12]
-; STRICTALIGN-NEXT: lsr x8, x9, #32
-; STRICTALIGN-NEXT: stp w9, w8, [x0]
-; STRICTALIGN-NEXT: add x9, x0, #16
-; STRICTALIGN-NEXT: str x9, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: st1 { v0.4s }, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4_post16:
@@ -7602,18 +5990,10 @@ define void @store_v4i32_align4_post16(ptr %ptr, <4 x i32> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v4i32_align4_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str w8, [x0, #12]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: ldr x9, [sp]
-; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
-; STRICTALIGN-BE-NEXT: add x9, x0, #16
-; STRICTALIGN-BE-NEXT: str w8, [x0]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.4s }, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <4 x i32> %val, ptr %ptr, align 4
@@ -7630,17 +6010,9 @@ define void @store_v4i32_align4_pre16(ptr %ptr, <4 x i32> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v4i32_align4_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: str w8, [x0, #16]!
-; STRICTALIGN-NEXT: lsr x8, x8, #32
-; STRICTALIGN-NEXT: ldr x9, [sp, #8]
-; STRICTALIGN-NEXT: lsr x10, x9, #32
-; STRICTALIGN-NEXT: stp w8, w9, [x0, #4]
-; STRICTALIGN-NEXT: str w10, [x0, #12]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.4s }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4_pre16:
@@ -7650,19 +6022,13 @@ define void @store_v4i32_align4_pre16(ptr %ptr, <4 x i32> %val, ptr %writeback)
; NOSTRICTALIGN-BE-NEXT: str x8, [x1]
; NOSTRICTALIGN-BE-NEXT: ret
;
-; STRICTALIGN-BE-LABEL: store_v4i32_align4_pre16:
-; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x10, [sp]
-; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
-; STRICTALIGN-BE-NEXT: str w9, [x0, #16]!
-; STRICTALIGN-BE-NEXT: ldr x9, [sp, #8]
-; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
-; STRICTALIGN-BE-NEXT: str w9, [x0, #12]
-; STRICTALIGN-BE-NEXT: stp w10, w8, [x0, #4]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-LABEL: store_v4i32_align4_pre16:
+; STRICTALIGN-BE: // %bb.0:
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.4s }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <4 x i32> %val, ptr %newptr, align 4
@@ -7679,18 +6045,9 @@ define <4 x i32> @load_v4i32_align4_post32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v4i32_align4_post32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: sub sp, sp, #16
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldp w9, w8, [x0, #8]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldp w9, w8, [x0]
-; STRICTALIGN-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: ld1 { v0.4s }, [x0]
; STRICTALIGN-NEXT: add x8, x0, #32
-; STRICTALIGN-NEXT: ldr q0, [sp]
; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4_post32:
@@ -7702,17 +6059,11 @@ define <4 x i32> @load_v4i32_align4_post32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v4i32_align4_post32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: sub sp, sp, #16
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0, #8]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldp w8, w9, [x0]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: add x9, x0, #32
-; STRICTALIGN-BE-NEXT: str x8, [sp]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.4s }, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
%val = load <4 x i32>, ptr %ptr, align 4
@@ -7729,18 +6080,9 @@ define <4 x i32> @load_v4i32_align4_pre32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v4i32_align4_pre32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: sub sp, sp, #16
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr w8, [x0, #32]!
-; STRICTALIGN-NEXT: ldp w10, w9, [x0, #8]
-; STRICTALIGN-NEXT: orr x9, x10, x9, lsl #32
-; STRICTALIGN-NEXT: str x9, [sp, #8]
-; STRICTALIGN-NEXT: ldr w9, [x0, #4]
-; STRICTALIGN-NEXT: orr x8, x8, x9, lsl #32
-; STRICTALIGN-NEXT: str x8, [sp]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: ld1 { v0.4s }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v4i32_align4_pre32:
@@ -7752,17 +6094,11 @@ define <4 x i32> @load_v4i32_align4_pre32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v4i32_align4_pre32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: sub sp, sp, #16
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr w8, [x0, #32]!
-; STRICTALIGN-BE-NEXT: ldp w9, w10, [x0, #8]
-; STRICTALIGN-BE-NEXT: orr x9, x10, x9, lsl #32
-; STRICTALIGN-BE-NEXT: str x9, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldr w9, [x0, #4]
-; STRICTALIGN-BE-NEXT: orr x8, x9, x8, lsl #32
-; STRICTALIGN-BE-NEXT: str x8, [sp]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ld1 { v0.4s }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
%val = load <4 x i32>, ptr %newptr, align 4
@@ -7779,18 +6115,9 @@ define void @store_v4i32_align4_post32(ptr %ptr, <4 x i32> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v4i32_align4_post32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-NEXT: str w8, [x0, #8]
-; STRICTALIGN-NEXT: lsr x8, x8, #32
-; STRICTALIGN-NEXT: ldr x9, [sp]
-; STRICTALIGN-NEXT: str w8, [x0, #12]
-; STRICTALIGN-NEXT: lsr x8, x9, #32
-; STRICTALIGN-NEXT: stp w9, w8, [x0]
-; STRICTALIGN-NEXT: add x9, x0, #32
-; STRICTALIGN-NEXT: str x9, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: st1 { v0.4s }, [x0]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4_post32:
@@ -7802,18 +6129,11 @@ define void @store_v4i32_align4_post32(ptr %ptr, <4 x i32> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v4i32_align4_post32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str w8, [x0, #12]
-; STRICTALIGN-BE-NEXT: lsr x8, x8, #32
-; STRICTALIGN-BE-NEXT: ldr x9, [sp]
-; STRICTALIGN-BE-NEXT: stp w9, w8, [x0, #4]
-; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
-; STRICTALIGN-BE-NEXT: add x9, x0, #32
-; STRICTALIGN-BE-NEXT: str w8, [x0]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.4s }, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
store <4 x i32> %val, ptr %ptr, align 4
@@ -7830,17 +6150,9 @@ define void @store_v4i32_align4_pre32(ptr %ptr, <4 x i32> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v4i32_align4_pre32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: str w8, [x0, #32]!
-; STRICTALIGN-NEXT: lsr x8, x8, #32
-; STRICTALIGN-NEXT: ldr x9, [sp, #8]
-; STRICTALIGN-NEXT: lsr x10, x9, #32
-; STRICTALIGN-NEXT: stp w8, w9, [x0, #4]
-; STRICTALIGN-NEXT: str w10, [x0, #12]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: st1 { v0.4s }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v4i32_align4_pre32:
@@ -7852,17 +6164,11 @@ define void @store_v4i32_align4_pre32(ptr %ptr, <4 x i32> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v4i32_align4_pre32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x10, [sp]
-; STRICTALIGN-BE-NEXT: lsr x9, x10, #32
-; STRICTALIGN-BE-NEXT: str w9, [x0, #32]!
-; STRICTALIGN-BE-NEXT: ldr x9, [sp, #8]
-; STRICTALIGN-BE-NEXT: lsr x8, x9, #32
-; STRICTALIGN-BE-NEXT: str w9, [x0, #12]
-; STRICTALIGN-BE-NEXT: stp w10, w8, [x0, #4]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: rev64 v0.4s, v0.4s
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.4s }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
store <4 x i32> %val, ptr %newptr, align 4
@@ -7991,7 +6297,7 @@ define void @store_v4i32_align16_post16(ptr %ptr, <4 x i32> %val, ptr %writeback
;
; STRICTALIGN-LABEL: store_v4i32_align16_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [x0], #16
+; STRICTALIGN-NEXT: st1 { v0.4s }, [x0], #16
; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
@@ -8635,7 +6941,7 @@ define void @store_v1i64_align8_post8(ptr %ptr, <1 x i64> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v1i64_align8_post8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str d0, [x0], #8
+; STRICTALIGN-NEXT: st1 { v0.1d }, [x0], #8
; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
@@ -9306,13 +7612,7 @@ define <2 x i64> @load_v2i64_align8(ptr %ptr) {
;
; STRICTALIGN-LABEL: load_v2i64_align8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: sub sp, sp, #16
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr x8, [x0]
-; STRICTALIGN-NEXT: str x8, [sp]
-; STRICTALIGN-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-NEXT: ld1 { v0.2d }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8:
@@ -9322,13 +7622,8 @@ define <2 x i64> @load_v2i64_align8(ptr %ptr) {
;
; STRICTALIGN-BE-LABEL: load_v2i64_align8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: sub sp, sp, #16
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldr x8, [x0]
-; STRICTALIGN-BE-NEXT: str x8, [sp]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.2d }, [x0]
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%val = load <2 x i64>, ptr %ptr, align 8
ret <2 x i64> %val
@@ -9342,13 +7637,7 @@ define void @store_v2i64_align8(ptr %ptr, <2 x i64> %val) {
;
; STRICTALIGN-LABEL: store_v2i64_align8:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-NEXT: str x8, [x0, #8]
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: str x8, [x0]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: st1 { v0.2d }, [x0]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8:
@@ -9358,13 +7647,8 @@ define void @store_v2i64_align8(ptr %ptr, <2 x i64> %val) {
;
; STRICTALIGN-BE-LABEL: store_v2i64_align8:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: str x8, [x0]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.2d }, [x0]
; STRICTALIGN-BE-NEXT: ret
store <2 x i64> %val, ptr %ptr, align 8
ret void
@@ -9379,16 +7663,8 @@ define <2 x i64> @load_v2i64_align8_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v2i64_align8_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: sub sp, sp, #16
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr x8, [x0]
-; STRICTALIGN-NEXT: str x8, [sp]
-; STRICTALIGN-NEXT: add x8, x0, #16
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: ld1 { v0.2d }, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8_post16:
@@ -9400,15 +7676,9 @@ define <2 x i64> @load_v2i64_align8_post16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v2i64_align8_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: sub sp, sp, #16
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: add x9, x0, #16
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldr x8, [x0]
-; STRICTALIGN-BE-NEXT: str x8, [sp]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.2d }, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <2 x i64>, ptr %ptr, align 8
@@ -9425,14 +7695,9 @@ define <2 x i64> @load_v2i64_align8_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v2i64_align8_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldr x8, [x0, #16]!
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: ld1 { v0.2d }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8_pre16:
@@ -9444,13 +7709,10 @@ define <2 x i64> @load_v2i64_align8_pre16(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v2i64_align8_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldr x8, [x0, #16]!
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.2d }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
%val = load <2 x i64>, ptr %newptr, align 8
@@ -9467,15 +7729,8 @@ define void @store_v2i64_align8_post16(ptr %ptr, <2 x i64> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v2i64_align8_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-NEXT: add x9, x0, #16
-; STRICTALIGN-NEXT: str x8, [x0, #8]
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: str x8, [x0]
-; STRICTALIGN-NEXT: str x9, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: st1 { v0.2d }, [x0], #16
+; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8_post16:
@@ -9487,15 +7742,9 @@ define void @store_v2i64_align8_post16(ptr %ptr, <2 x i64> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v2i64_align8_post16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: add x9, x0, #16
-; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: str x8, [x0]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: st1 { v0.2d }, [x0], #16
+; STRICTALIGN-BE-NEXT: str x0, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <2 x i64> %val, ptr %ptr, align 8
@@ -9512,14 +7761,9 @@ define void @store_v2i64_align8_pre16(ptr %ptr, <2 x i64> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v2i64_align8_pre16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: str x8, [x0, #16]!
-; STRICTALIGN-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-NEXT: str x8, [x0, #8]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #16
+; STRICTALIGN-NEXT: st1 { v0.2d }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8_pre16:
@@ -9531,14 +7775,10 @@ define void @store_v2i64_align8_pre16(ptr %ptr, <2 x i64> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v2i64_align8_pre16:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: str x8, [x0, #16]!
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: add x8, x0, #16
+; STRICTALIGN-BE-NEXT: st1 { v0.2d }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 16
store <2 x i64> %val, ptr %newptr, align 8
@@ -9555,16 +7795,9 @@ define <2 x i64> @load_v2i64_align8_post32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v2i64_align8_post32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: sub sp, sp, #16
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr x8, [x0]
-; STRICTALIGN-NEXT: str x8, [sp]
+; STRICTALIGN-NEXT: ld1 { v0.2d }, [x0]
; STRICTALIGN-NEXT: add x8, x0, #32
-; STRICTALIGN-NEXT: ldr q0, [sp]
; STRICTALIGN-NEXT: str x8, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8_post32:
@@ -9576,15 +7809,10 @@ define <2 x i64> @load_v2i64_align8_post32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v2i64_align8_post32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: sub sp, sp, #16
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: add x9, x0, #32
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: ldr x8, [x0]
-; STRICTALIGN-BE-NEXT: str x8, [sp]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: ld1 { v0.2d }, [x0]
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
%val = load <2 x i64>, ptr %ptr, align 8
@@ -9601,14 +7829,9 @@ define <2 x i64> @load_v2i64_align8_pre32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-LABEL: load_v2i64_align8_pre32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: ldr x8, [x0, #32]!
-; STRICTALIGN-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-NEXT: str x8, [sp, #8]
-; STRICTALIGN-NEXT: ldr q0, [sp]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: ld1 { v0.2d }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: load_v2i64_align8_pre32:
@@ -9620,13 +7843,10 @@ define <2 x i64> @load_v2i64_align8_pre32(ptr %ptr, ptr %writeback) {
;
; STRICTALIGN-BE-LABEL: load_v2i64_align8_pre32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: ldr x8, [x0, #32]!
-; STRICTALIGN-BE-NEXT: str x8, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: str x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: ldr q0, [sp], #16
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: ld1 { v0.2d }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
%val = load <2 x i64>, ptr %newptr, align 8
@@ -9643,15 +7863,9 @@ define void @store_v2i64_align8_post32(ptr %ptr, <2 x i64> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v2i64_align8_post32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-NEXT: add x9, x0, #32
-; STRICTALIGN-NEXT: str x8, [x0, #8]
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: str x8, [x0]
-; STRICTALIGN-NEXT: str x9, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: st1 { v0.2d }, [x0]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8_post32:
@@ -9663,15 +7877,10 @@ define void @store_v2i64_align8_post32(ptr %ptr, <2 x i64> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v2i64_align8_post32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: add x9, x0, #32
-; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: str x8, [x0]
-; STRICTALIGN-BE-NEXT: str x9, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: st1 { v0.2d }, [x0]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
store <2 x i64> %val, ptr %ptr, align 8
@@ -9688,14 +7897,9 @@ define void @store_v2i64_align8_pre32(ptr %ptr, <2 x i64> %val, ptr %writeback)
;
; STRICTALIGN-LABEL: store_v2i64_align8_pre32:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-NEXT: ldr x8, [sp]
-; STRICTALIGN-NEXT: str x8, [x0, #32]!
-; STRICTALIGN-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-NEXT: str x8, [x0, #8]
-; STRICTALIGN-NEXT: str x0, [x1]
-; STRICTALIGN-NEXT: add sp, sp, #16
+; STRICTALIGN-NEXT: add x8, x0, #32
+; STRICTALIGN-NEXT: st1 { v0.2d }, [x8]
+; STRICTALIGN-NEXT: str x8, [x1]
; STRICTALIGN-NEXT: ret
;
; NOSTRICTALIGN-BE-LABEL: store_v2i64_align8_pre32:
@@ -9707,14 +7911,10 @@ define void @store_v2i64_align8_pre32(ptr %ptr, <2 x i64> %val, ptr %writeback)
;
; STRICTALIGN-BE-LABEL: store_v2i64_align8_pre32:
; STRICTALIGN-BE: // %bb.0:
-; STRICTALIGN-BE-NEXT: str q0, [sp, #-16]!
-; STRICTALIGN-BE-NEXT: .cfi_def_cfa_offset 16
-; STRICTALIGN-BE-NEXT: ldr x8, [sp]
-; STRICTALIGN-BE-NEXT: str x8, [x0, #32]!
-; STRICTALIGN-BE-NEXT: ldr x8, [sp, #8]
-; STRICTALIGN-BE-NEXT: str x8, [x0, #8]
-; STRICTALIGN-BE-NEXT: str x0, [x1]
-; STRICTALIGN-BE-NEXT: add sp, sp, #16
+; STRICTALIGN-BE-NEXT: ext v0.16b, v0.16b, v0.16b, #8
+; STRICTALIGN-BE-NEXT: add x8, x0, #32
+; STRICTALIGN-BE-NEXT: st1 { v0.2d }, [x8]
+; STRICTALIGN-BE-NEXT: str x8, [x1]
; STRICTALIGN-BE-NEXT: ret
%newptr = getelementptr i8, ptr %ptr, i64 32
store <2 x i64> %val, ptr %newptr, align 8
@@ -9843,7 +8043,7 @@ define void @store_v2i64_align16_post16(ptr %ptr, <2 x i64> %val, ptr %writeback
;
; STRICTALIGN-LABEL: store_v2i64_align16_post16:
; STRICTALIGN: // %bb.0:
-; STRICTALIGN-NEXT: str q0, [x0], #16
+; STRICTALIGN-NEXT: st1 { v0.2d }, [x0], #16
; STRICTALIGN-NEXT: str x0, [x1]
; STRICTALIGN-NEXT: ret
;
diff --git a/llvm/test/CodeGen/AArch64/vector-ldst-offset.ll b/llvm/test/CodeGen/AArch64/vector-ldst-offset.ll
index af5d432147207..74715406d392d 100644
--- a/llvm/test/CodeGen/AArch64/vector-ldst-offset.ll
+++ b/llvm/test/CodeGen/AArch64/vector-ldst-offset.ll
@@ -24,33 +24,14 @@ define [2 x ptr] @v8i8_postidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8i8_postidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: mov x8, x1
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: add x0, x0, #8
-; CHECK-LE-SA-NEXT: strh w11, [x1]
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x10, x9, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-LE-SA-NEXT: add x1, x1, #8
-; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ld1 { v0.8b }, [x0], #8
+; CHECK-LE-SA-NEXT: st1 { v0.8b }, [x1], #8
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i8_postidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
-; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
-; CHECK-BE-SA-NEXT: add x1, x1, #8
-; CHECK-BE-SA-NEXT: strh w12, [x8]
-; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ld1 { v0.8b }, [x0], #8
+; CHECK-BE-SA-NEXT: st1 { v0.8b }, [x1], #8
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i8>, ptr %ldptr, align 2
@@ -79,30 +60,18 @@ define [2 x ptr] @v8i8_preidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8i8_preidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
-; CHECK-LE-SA-NEXT: lsr x8, x9, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: ld1 { v0.8b }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.8b }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i8_preidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: lsr w9, w8, #16
-; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: add x0, x0, #8
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: ld1 { v0.8b }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.8b }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
@@ -132,33 +101,20 @@ define [2 x ptr] @v8i8_postidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8i8_postidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ld1 { v0.8b }, [x0]
; CHECK-LE-SA-NEXT: mov x8, x1
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
; CHECK-LE-SA-NEXT: add x0, x0, #16
-; CHECK-LE-SA-NEXT: strh w11, [x1]
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x10, x9, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
; CHECK-LE-SA-NEXT: add x1, x1, #16
-; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: st1 { v0.8b }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i8_postidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: ld1 { v0.8b }, [x0]
; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
; CHECK-BE-SA-NEXT: add x1, x1, #16
-; CHECK-BE-SA-NEXT: strh w12, [x8]
-; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: st1 { v0.8b }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i8>, ptr %ldptr, align 2
@@ -187,30 +143,18 @@ define [2 x ptr] @v8i8_preidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8i8_preidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
-; CHECK-LE-SA-NEXT: lsr x8, x9, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: ld1 { v0.8b }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.8b }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i8_preidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: lsr w9, w8, #16
-; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.8b }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.8b }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
@@ -243,34 +187,20 @@ define [2 x ptr] @v8i8_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
;
; CHECK-LE-SA-LABEL: v8i8_postidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ld1 { v0.8b }, [x0]
; CHECK-LE-SA-NEXT: mov x8, x1
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
; CHECK-LE-SA-NEXT: add x0, x0, x2
-; CHECK-LE-SA-NEXT: strh w11, [x1]
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x10, x9, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: st1 { v0.8b }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i8_postidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: ld1 { v0.8b }, [x0]
; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0]
; CHECK-BE-SA-NEXT: add x0, x0, x2
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: strh w12, [x8]
-; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: st1 { v0.8b }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i8>, ptr %ldptr, align 2
@@ -304,30 +234,16 @@ define [2 x ptr] @v8i8_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-LE-SA: // %bb.0: // %entry
; CHECK-LE-SA-NEXT: add x0, x0, x2
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-LE-SA-NEXT: strh w10, [x1]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #16
-; CHECK-LE-SA-NEXT: strh w8, [x1, #4]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: ld1 { v0.8b }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.8b }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i8_preidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
; CHECK-BE-SA-NEXT: add x0, x0, x2
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-BE-SA-NEXT: strh w11, [x1]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ld1 { v0.8b }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.8b }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
@@ -354,33 +270,14 @@ define [2 x ptr] @v4i16_postidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v4i16_postidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: mov x8, x1
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: add x0, x0, #8
-; CHECK-LE-SA-NEXT: strh w11, [x1]
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x10, x9, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-LE-SA-NEXT: add x1, x1, #8
-; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0], #8
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x1], #8
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4i16_postidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
-; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
-; CHECK-BE-SA-NEXT: add x1, x1, #8
-; CHECK-BE-SA-NEXT: strh w12, [x8]
-; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0], #8
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x1], #8
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x i16>, ptr %ldptr, align 2
@@ -409,30 +306,18 @@ define [2 x ptr] @v4i16_preidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v4i16_preidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
-; CHECK-LE-SA-NEXT: lsr x8, x9, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4i16_preidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: lsr w9, w8, #16
-; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: add x0, x0, #8
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
@@ -462,33 +347,20 @@ define [2 x ptr] @v4i16_postidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v4i16_postidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
; CHECK-LE-SA-NEXT: mov x8, x1
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
; CHECK-LE-SA-NEXT: add x0, x0, #16
-; CHECK-LE-SA-NEXT: strh w11, [x1]
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x10, x9, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
; CHECK-LE-SA-NEXT: add x1, x1, #16
-; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4i16_postidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
; CHECK-BE-SA-NEXT: add x1, x1, #16
-; CHECK-BE-SA-NEXT: strh w12, [x8]
-; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x i16>, ptr %ldptr, align 2
@@ -517,30 +389,18 @@ define [2 x ptr] @v4i16_preidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v4i16_preidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
-; CHECK-LE-SA-NEXT: lsr x8, x9, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4i16_preidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: lsr w9, w8, #16
-; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
@@ -573,34 +433,20 @@ define [2 x ptr] @v4i16_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
;
; CHECK-LE-SA-LABEL: v4i16_postidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
; CHECK-LE-SA-NEXT: mov x8, x1
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
; CHECK-LE-SA-NEXT: add x0, x0, x2
-; CHECK-LE-SA-NEXT: strh w11, [x1]
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x10, x9, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #4]
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4i16_postidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0]
; CHECK-BE-SA-NEXT: add x0, x0, x2
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: strh w12, [x8]
-; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x i16>, ptr %ldptr, align 2
@@ -634,30 +480,16 @@ define [2 x ptr] @v4i16_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-LE-SA: // %bb.0: // %entry
; CHECK-LE-SA-NEXT: add x0, x0, x2
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-LE-SA-NEXT: strh w10, [x1]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #16
-; CHECK-LE-SA-NEXT: strh w8, [x1, #4]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4i16_preidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
; CHECK-BE-SA-NEXT: add x0, x0, x2
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-BE-SA-NEXT: strh w11, [x1]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
@@ -1344,32 +1176,14 @@ define [2 x ptr] @v4f16_postidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v4f16_postidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: mov x10, x0
-; CHECK-LE-SA-NEXT: ldrh w9, [x0]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
-; CHECK-LE-SA-NEXT: mov x8, x1
-; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
-; CHECK-LE-SA-NEXT: strh w9, [x1]
-; CHECK-LE-SA-NEXT: add x0, x0, #8
-; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
-; CHECK-LE-SA-NEXT: add x1, x1, #8
-; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
-; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0], #8
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x1], #8
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4f16_postidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
-; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0], #8
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
-; CHECK-BE-SA-NEXT: add x1, x1, #8
-; CHECK-BE-SA-NEXT: strh w12, [x8]
-; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0], #8
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x1], #8
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x half>, ptr %ldptr, align 2
@@ -1398,29 +1212,18 @@ define [2 x ptr] @v4f16_preidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v4f16_preidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #8]!
-; CHECK-LE-SA-NEXT: mov x9, x0
-; CHECK-LE-SA-NEXT: ldrh w11, [x9, #4]!
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w9, [x9, #2]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #8]!
-; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #8
+; CHECK-LE-SA-NEXT: add x1, x1, #8
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4f16_preidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w8, [x0, #8]!
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: lsr w9, w8, #16
-; CHECK-BE-SA-NEXT: strh w9, [x1, #8]!
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: add x0, x0, #8
+; CHECK-BE-SA-NEXT: add x1, x1, #8
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 8
@@ -1450,32 +1253,20 @@ define [2 x ptr] @v4f16_postidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v4f16_postidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: mov x10, x0
-; CHECK-LE-SA-NEXT: ldrh w9, [x0]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
; CHECK-LE-SA-NEXT: mov x8, x1
-; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
-; CHECK-LE-SA-NEXT: strh w9, [x1]
; CHECK-LE-SA-NEXT: add x0, x0, #16
-; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
; CHECK-LE-SA-NEXT: add x1, x1, #16
-; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
-; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4f16_postidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0], #16
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
; CHECK-BE-SA-NEXT: add x1, x1, #16
-; CHECK-BE-SA-NEXT: strh w12, [x8]
-; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x half>, ptr %ldptr, align 2
@@ -1504,29 +1295,18 @@ define [2 x ptr] @v4f16_preidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v4f16_preidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
-; CHECK-LE-SA-NEXT: mov x9, x0
-; CHECK-LE-SA-NEXT: ldrh w11, [x9, #4]!
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w9, [x9, #2]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
-; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4f16_preidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w8, [x0, #16]!
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: lsr w9, w8, #16
-; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w11, [x1, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
@@ -1559,33 +1339,20 @@ define [2 x ptr] @v4f16_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
;
; CHECK-LE-SA-LABEL: v4f16_postidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: mov x10, x0
-; CHECK-LE-SA-NEXT: ldrh w9, [x0]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w12, [x10, #4]!
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
; CHECK-LE-SA-NEXT: mov x8, x1
-; CHECK-LE-SA-NEXT: ldrh w10, [x10, #2]
-; CHECK-LE-SA-NEXT: strh w9, [x1]
; CHECK-LE-SA-NEXT: add x0, x0, x2
-; CHECK-LE-SA-NEXT: strh w11, [x1, #2]
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: strh w12, [x8, #4]
-; CHECK-LE-SA-NEXT: strh w10, [x8, #6]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4f16_postidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #6]
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0]
; CHECK-BE-SA-NEXT: add x0, x0, x2
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #6]
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: strh w12, [x8]
-; CHECK-BE-SA-NEXT: strh w11, [x8, #2]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <4 x half>, ptr %ldptr, align 2
@@ -1617,31 +1384,18 @@ define [2 x ptr] @v4f16_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
;
; CHECK-LE-SA-LABEL: v4f16_preidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: add x8, x0, x2
+; CHECK-LE-SA-NEXT: add x0, x0, x2
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #2]
-; CHECK-LE-SA-NEXT: ldrh w10, [x8]
-; CHECK-LE-SA-NEXT: mov x0, x8
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #4]!
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #2]
-; CHECK-LE-SA-NEXT: strh w10, [x1]
-; CHECK-LE-SA-NEXT: strh w11, [x1, #4]
-; CHECK-LE-SA-NEXT: strh w9, [x1, #2]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #6]
+; CHECK-LE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v4f16_preidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
; CHECK-BE-SA-NEXT: add x0, x0, x2
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: ldrh w8, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-BE-SA-NEXT: strh w11, [x1]
-; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
+; CHECK-BE-SA-NEXT: ld1 { v0.4h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.4h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
@@ -2316,93 +2070,14 @@ define [2 x ptr] @v16i8_postidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v16i8_postidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: add x0, x0, #16
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: add x1, x1, #16
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ld1 { v0.16b }, [x0], #16
+; CHECK-LE-SA-NEXT: st1 { v0.16b }, [x1], #16
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v16i8_postidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w10, [x0]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
-; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp]
-; CHECK-BE-SA-NEXT: mov x10, x0
-; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
-; CHECK-BE-SA-NEXT: add x0, x0, #16
-; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp, #8]
-; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x9]
-; CHECK-BE-SA-NEXT: add x9, sp, #16
-; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x9]
-; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x10, x9, #16
-; CHECK-BE-SA-NEXT: lsr x11, x9, #32
-; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
-; CHECK-BE-SA-NEXT: lsr x9, x9, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w9, [x1]
-; CHECK-BE-SA-NEXT: lsr x9, x12, #48
-; CHECK-BE-SA-NEXT: lsr x10, x12, #32
-; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: lsr x9, x12, #16
-; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
-; CHECK-BE-SA-NEXT: add x1, x1, #16
-; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x0], #16
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x1], #16
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <16 x i8>, ptr %ldptr, align 2
@@ -2431,89 +2106,18 @@ define [2 x ptr] @v16i8_preidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v16i8_preidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: ld1 { v0.16b }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.16b }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v16i8_preidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
-; CHECK-BE-SA-NEXT: mov x8, sp
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp]
-; CHECK-BE-SA-NEXT: mov x9, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
-; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp, #8]
-; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x8]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #32
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x10, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-BE-SA-NEXT: lsr x8, x10, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x10, #16
-; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
@@ -2543,93 +2147,20 @@ define [2 x ptr] @v16i8_postidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v16i8_postidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ld1 { v0.16b }, [x0]
+; CHECK-LE-SA-NEXT: mov x8, x1
; CHECK-LE-SA-NEXT: add x0, x0, #32
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
; CHECK-LE-SA-NEXT: add x1, x1, #32
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: st1 { v0.16b }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v16i8_postidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w10, [x0]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x0]
; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp]
-; CHECK-BE-SA-NEXT: mov x10, x0
-; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
; CHECK-BE-SA-NEXT: add x0, x0, #32
-; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp, #8]
-; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x9]
-; CHECK-BE-SA-NEXT: add x9, sp, #16
-; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x9]
-; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x10, x9, #16
-; CHECK-BE-SA-NEXT: lsr x11, x9, #32
-; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
-; CHECK-BE-SA-NEXT: lsr x9, x9, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w9, [x1]
-; CHECK-BE-SA-NEXT: lsr x9, x12, #48
-; CHECK-BE-SA-NEXT: lsr x10, x12, #32
-; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: lsr x9, x12, #16
-; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
; CHECK-BE-SA-NEXT: add x1, x1, #32
-; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <16 x i8>, ptr %ldptr, align 2
@@ -2658,89 +2189,18 @@ define [2 x ptr] @v16i8_preidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v16i8_preidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: ld1 { v0.16b }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.16b }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v16i8_preidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
-; CHECK-BE-SA-NEXT: mov x8, sp
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp]
-; CHECK-BE-SA-NEXT: mov x9, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
-; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp, #8]
-; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x8]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #32
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x10, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-BE-SA-NEXT: lsr x8, x10, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x10, #16
-; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
@@ -2773,92 +2233,20 @@ define [2 x ptr] @v16i8_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
;
; CHECK-LE-SA-LABEL: v16i8_postidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ld1 { v0.16b }, [x0]
+; CHECK-LE-SA-NEXT: mov x8, x1
; CHECK-LE-SA-NEXT: add x0, x0, x2
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: st1 { v0.16b }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v16i8_postidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w8, [x0]
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: mov x8, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x0]
+; CHECK-BE-SA-NEXT: mov x8, x1
; CHECK-BE-SA-NEXT: add x0, x0, x2
-; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
-; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
-; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: str x8, [sp, #8]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x9]
-; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: lsr x10, x8, #32
-; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x11, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1]
-; CHECK-BE-SA-NEXT: lsr x8, x11, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x11, #16
-; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <16 x i8>, ptr %ldptr, align 2
@@ -2891,91 +2279,17 @@ define [2 x ptr] @v16i8_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
; CHECK-LE-SA-LABEL: v16i8_preidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
; CHECK-LE-SA-NEXT: add x0, x0, x2
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ld1 { v0.16b }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.16b }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v16i8_preidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
; CHECK-BE-SA-NEXT: add x0, x0, x2
-; CHECK-BE-SA-NEXT: ldrh w8, [x0]
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: mov x8, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
-; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
-; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: str x8, [sp, #8]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x9]
-; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: lsr x10, x8, #32
-; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x11, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1]
-; CHECK-BE-SA-NEXT: lsr x8, x11, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x11, #16
-; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ld1 { v0.16b }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.16b }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
@@ -3002,93 +2316,14 @@ define [2 x ptr] @v8i16_postidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8i16_postidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: add x0, x0, #16
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: add x1, x1, #16
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0], #16
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x1], #16
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i16_postidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w10, [x0]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
-; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp]
-; CHECK-BE-SA-NEXT: mov x10, x0
-; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
-; CHECK-BE-SA-NEXT: add x0, x0, #16
-; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp, #8]
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: add x9, sp, #16
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x10, x9, #16
-; CHECK-BE-SA-NEXT: lsr x11, x9, #32
-; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
-; CHECK-BE-SA-NEXT: lsr x9, x9, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w9, [x1]
-; CHECK-BE-SA-NEXT: lsr x9, x12, #48
-; CHECK-BE-SA-NEXT: lsr x10, x12, #32
-; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: lsr x9, x12, #16
-; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
-; CHECK-BE-SA-NEXT: add x1, x1, #16
-; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0], #16
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x1], #16
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i16>, ptr %ldptr, align 2
@@ -3117,89 +2352,18 @@ define [2 x ptr] @v8i16_preidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8i16_preidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i16_preidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
-; CHECK-BE-SA-NEXT: mov x8, sp
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp]
-; CHECK-BE-SA-NEXT: mov x9, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
-; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp, #8]
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #32
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x10, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-BE-SA-NEXT: lsr x8, x10, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x10, #16
-; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
@@ -3229,93 +2393,20 @@ define [2 x ptr] @v8i16_postidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8i16_postidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: mov x8, x1
; CHECK-LE-SA-NEXT: add x0, x0, #32
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
; CHECK-LE-SA-NEXT: add x1, x1, #32
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i16_postidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w10, [x0]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp]
-; CHECK-BE-SA-NEXT: mov x10, x0
-; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
; CHECK-BE-SA-NEXT: add x0, x0, #32
-; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp, #8]
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: add x9, sp, #16
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: ldr x9, [sp, #16]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x10, x9, #16
-; CHECK-BE-SA-NEXT: lsr x11, x9, #32
-; CHECK-BE-SA-NEXT: ldr x12, [sp, #24]
-; CHECK-BE-SA-NEXT: lsr x9, x9, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w9, [x1]
-; CHECK-BE-SA-NEXT: lsr x9, x12, #48
-; CHECK-BE-SA-NEXT: lsr x10, x12, #32
-; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: lsr x9, x12, #16
-; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
; CHECK-BE-SA-NEXT: add x1, x1, #32
-; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i16>, ptr %ldptr, align 2
@@ -3344,89 +2435,18 @@ define [2 x ptr] @v8i16_preidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8i16_preidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i16_preidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
-; CHECK-BE-SA-NEXT: mov x8, sp
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp]
-; CHECK-BE-SA-NEXT: mov x9, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
-; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp, #8]
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: ldr x10, [sp, #24]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #32
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x10, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-BE-SA-NEXT: lsr x8, x10, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x10, #16
-; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
@@ -3459,92 +2479,20 @@ define [2 x ptr] @v8i16_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
;
; CHECK-LE-SA-LABEL: v8i16_postidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: mov x8, x1
; CHECK-LE-SA-NEXT: add x0, x0, x2
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8i16_postidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: ldrh w8, [x0]
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: mov x8, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-BE-SA-NEXT: mov x8, x1
; CHECK-BE-SA-NEXT: add x0, x0, x2
-; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
-; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
-; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: str x8, [sp, #8]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: lsr x10, x8, #32
-; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x11, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1]
-; CHECK-BE-SA-NEXT: lsr x8, x11, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x11, #16
-; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x i16>, ptr %ldptr, align 2
@@ -3576,92 +2524,18 @@ define [2 x ptr] @v8i16_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
;
; CHECK-LE-SA-LABEL: v8i16_preidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: add x0, x0, x2
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #8]
-; CHECK-LE-SA-NEXT: ldr q0, [sp]
-; CHECK-LE-SA-NEXT: str q0, [sp, #16]
-; CHECK-LE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
-; CHECK-LE-SA-NEXT: ret
-;
-; CHECK-BE-SA-LABEL: v8i16_preidx_reg:
-; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: add x0, x0, x2
-; CHECK-BE-SA-NEXT: ldrh w8, [x0]
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-BE-SA-NEXT: str x8, [sp, #-32]!
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: mov x8, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
-; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
-; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: str x8, [sp, #8]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp, #16]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: lsr x10, x8, #32
-; CHECK-BE-SA-NEXT: ldr x11, [sp, #24]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x11, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1]
-; CHECK-BE-SA-NEXT: lsr x8, x11, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x11, #16
-; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: add x0, x0, x2
+; CHECK-LE-SA-NEXT: add x1, x1, x2
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x1]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8i16_preidx_reg:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: add x0, x0, x2
+; CHECK-BE-SA-NEXT: add x1, x1, x2
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
@@ -5060,94 +3934,14 @@ define [2 x ptr] @v8f16_postidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8f16_postidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: sub sp, sp, #32
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #16]
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: add x0, x0, #16
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #24]
-; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
-; CHECK-LE-SA-NEXT: str q0, [sp]
-; CHECK-LE-SA-NEXT: ldr x8, [sp]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: add x1, x1, #16
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0], #16
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x1], #16
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8f16_postidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w10, [x0]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: add x9, sp, #16
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
-; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp, #16]
-; CHECK-BE-SA-NEXT: mov x10, x0
-; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
-; CHECK-BE-SA-NEXT: add x0, x0, #16
-; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp, #24]
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: ldr x9, [sp]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x10, x9, #16
-; CHECK-BE-SA-NEXT: lsr x11, x9, #32
-; CHECK-BE-SA-NEXT: ldr x12, [sp, #8]
-; CHECK-BE-SA-NEXT: lsr x9, x9, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w9, [x1]
-; CHECK-BE-SA-NEXT: lsr x9, x12, #48
-; CHECK-BE-SA-NEXT: lsr x10, x12, #32
-; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: lsr x9, x12, #16
-; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
-; CHECK-BE-SA-NEXT: add x1, x1, #16
-; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0], #16
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x1], #16
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x half>, ptr %ldptr, align 2
@@ -5176,90 +3970,18 @@ define [2 x ptr] @v8f16_preidx_same_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8f16_preidx_same_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: sub sp, sp, #32
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #16]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #16]
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #24]
-; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
-; CHECK-LE-SA-NEXT: str q0, [sp]
-; CHECK-LE-SA-NEXT: ldr x8, [sp]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #16]!
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: add x0, x0, #16
+; CHECK-LE-SA-NEXT: add x1, x1, #16
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8f16_preidx_same_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #16]!
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp, #16]
-; CHECK-BE-SA-NEXT: mov x9, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
-; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp, #24]
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: mov x8, sp
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #16]!
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: ldr x10, [sp, #8]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #32
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x10, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-BE-SA-NEXT: lsr x8, x10, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x10, #16
-; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: add x0, x0, #16
+; CHECK-BE-SA-NEXT: add x1, x1, #16
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 16
@@ -5289,94 +4011,20 @@ define [2 x ptr] @v8f16_postidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8f16_postidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: sub sp, sp, #32
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #16]
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: add x0, x0, #32
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #24]
-; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
-; CHECK-LE-SA-NEXT: str q0, [sp]
-; CHECK-LE-SA-NEXT: ldr x8, [sp]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: add x1, x1, #32
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
-; CHECK-LE-SA-NEXT: ret
-;
-; CHECK-BE-SA-LABEL: v8f16_postidx_different_size:
-; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w10, [x0]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-BE-SA-NEXT: add x9, sp, #16
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w13, [x0, #6]
-; CHECK-BE-SA-NEXT: mov x8, x1
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x11, x13, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp, #16]
-; CHECK-BE-SA-NEXT: mov x10, x0
-; CHECK-BE-SA-NEXT: ldrh w11, [x10, #8]!
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w13, [x10, #4]
-; CHECK-BE-SA-NEXT: ldrh w10, [x10, #6]
-; CHECK-BE-SA-NEXT: add x0, x0, #32
-; CHECK-BE-SA-NEXT: orr w11, w12, w11, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x13, lsl #16
-; CHECK-BE-SA-NEXT: orr x10, x10, x11, lsl #32
-; CHECK-BE-SA-NEXT: str x10, [sp, #24]
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: mov x9, sp
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: ldr x9, [sp]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x10, x9, #16
-; CHECK-BE-SA-NEXT: lsr x11, x9, #32
-; CHECK-BE-SA-NEXT: ldr x12, [sp, #8]
-; CHECK-BE-SA-NEXT: lsr x9, x9, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-BE-SA-NEXT: strh w9, [x1]
-; CHECK-BE-SA-NEXT: lsr x9, x12, #48
-; CHECK-BE-SA-NEXT: lsr x10, x12, #32
-; CHECK-BE-SA-NEXT: strh w11, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: lsr x9, x12, #16
-; CHECK-BE-SA-NEXT: strh w10, [x1, #10]
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: mov x8, x1
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x8]
+; CHECK-LE-SA-NEXT: ret
+;
+; CHECK-BE-SA-LABEL: v8f16_postidx_different_size:
+; CHECK-BE-SA: // %bb.0: // %entry
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-BE-SA-NEXT: mov x8, x1
+; CHECK-BE-SA-NEXT: add x0, x0, #32
; CHECK-BE-SA-NEXT: add x1, x1, #32
-; CHECK-BE-SA-NEXT: strh w12, [x8, #6]
-; CHECK-BE-SA-NEXT: strh w9, [x8, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x half>, ptr %ldptr, align 2
@@ -5405,90 +4053,18 @@ define [2 x ptr] @v8f16_preidx_different_size(ptr %ldptr, ptr %stptr) {
;
; CHECK-LE-SA-LABEL: v8f16_preidx_different_size:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: sub sp, sp, #32
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #32]!
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0, #2]
-; CHECK-LE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #16]
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #24]
-; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
-; CHECK-LE-SA-NEXT: str q0, [sp]
-; CHECK-LE-SA-NEXT: ldr x8, [sp]
-; CHECK-LE-SA-NEXT: strh w8, [x1, #32]!
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: add x0, x0, #32
+; CHECK-LE-SA-NEXT: add x1, x1, #32
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8f16_preidx_different_size:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #32]!
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: ldrh w12, [x0, #2]
-; CHECK-BE-SA-NEXT: add x8, sp, #16
-; CHECK-BE-SA-NEXT: orr x10, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr w9, w12, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x10, x9, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp, #16]
-; CHECK-BE-SA-NEXT: mov x9, x0
-; CHECK-BE-SA-NEXT: ldrh w10, [x9, #8]!
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w12, [x9, #4]
-; CHECK-BE-SA-NEXT: ldrh w9, [x9, #6]
-; CHECK-BE-SA-NEXT: orr w10, w11, w10, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x12, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x9, x10, lsl #32
-; CHECK-BE-SA-NEXT: str x9, [sp, #24]
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: mov x8, sp
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #32]!
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: ldr x10, [sp, #8]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #32
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x10, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-BE-SA-NEXT: lsr x8, x10, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x10, #16
-; CHECK-BE-SA-NEXT: strh w10, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: add x0, x0, #32
+; CHECK-BE-SA-NEXT: add x1, x1, #32
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 32
@@ -5521,94 +4097,20 @@ define [2 x ptr] @v8f16_postidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
;
; CHECK-LE-SA-LABEL: v8f16_postidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: sub sp, sp, #32
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #16]
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: mov x8, x1
; CHECK-LE-SA-NEXT: add x0, x0, x2
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #24]
-; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
-; CHECK-LE-SA-NEXT: str q0, [sp]
-; CHECK-LE-SA-NEXT: ldr x8, [sp]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x8]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8f16_postidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
-; CHECK-BE-SA-NEXT: ldrh w8, [x0]
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-BE-SA-NEXT: str x8, [sp, #16]
-; CHECK-BE-SA-NEXT: mov x8, x0
-; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
-; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-BE-SA-NEXT: mov x8, x1
; CHECK-BE-SA-NEXT: add x0, x0, x2
-; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-BE-SA-NEXT: add x9, sp, #16
-; CHECK-BE-SA-NEXT: str x8, [sp, #24]
-; CHECK-BE-SA-NEXT: mov x8, sp
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: lsr x10, x8, #32
-; CHECK-BE-SA-NEXT: ldr x11, [sp, #8]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x11, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1]
-; CHECK-BE-SA-NEXT: lsr x8, x11, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x11, #16
-; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
; CHECK-BE-SA-NEXT: ret
entry:
%val = load <8 x half>, ptr %ldptr, align 2
@@ -5640,94 +4142,18 @@ define [2 x ptr] @v8f16_preidx_reg(ptr %ldptr, ptr %stptr, i64 %off) {
;
; CHECK-LE-SA-LABEL: v8f16_preidx_reg:
; CHECK-LE-SA: // %bb.0: // %entry
-; CHECK-LE-SA-NEXT: sub sp, sp, #32
-; CHECK-LE-SA-NEXT: .cfi_def_cfa_offset 32
; CHECK-LE-SA-NEXT: add x0, x0, x2
; CHECK-LE-SA-NEXT: add x1, x1, x2
-; CHECK-LE-SA-NEXT: ldrh w8, [x0, #6]
-; CHECK-LE-SA-NEXT: ldrh w9, [x0, #4]
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #2]
-; CHECK-LE-SA-NEXT: ldrh w11, [x0]
-; CHECK-LE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-LE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #16]
-; CHECK-LE-SA-NEXT: mov x8, x0
-; CHECK-LE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-LE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-LE-SA-NEXT: ldrh w11, [x8, #6]
-; CHECK-LE-SA-NEXT: ldrh w8, [x8, #4]
-; CHECK-LE-SA-NEXT: orr x9, x9, x10, lsl #16
-; CHECK-LE-SA-NEXT: orr w8, w8, w11, lsl #16
-; CHECK-LE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-LE-SA-NEXT: str x8, [sp, #24]
-; CHECK-LE-SA-NEXT: ldr q0, [sp, #16]
-; CHECK-LE-SA-NEXT: str q0, [sp]
-; CHECK-LE-SA-NEXT: ldr x8, [sp]
-; CHECK-LE-SA-NEXT: strh w8, [x1]
-; CHECK-LE-SA-NEXT: lsr x9, x8, #48
-; CHECK-LE-SA-NEXT: lsr x10, x8, #32
-; CHECK-LE-SA-NEXT: ldr x11, [sp, #8]
-; CHECK-LE-SA-NEXT: lsr x8, x8, #16
-; CHECK-LE-SA-NEXT: strh w9, [x1, #6]
-; CHECK-LE-SA-NEXT: lsr x9, x11, #16
-; CHECK-LE-SA-NEXT: strh w10, [x1, #4]
-; CHECK-LE-SA-NEXT: lsr x10, x11, #32
-; CHECK-LE-SA-NEXT: strh w8, [x1, #2]
-; CHECK-LE-SA-NEXT: lsr x8, x11, #48
-; CHECK-LE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-LE-SA-NEXT: mov x9, x1
-; CHECK-LE-SA-NEXT: strh w11, [x9, #8]!
-; CHECK-LE-SA-NEXT: strh w8, [x9, #6]
-; CHECK-LE-SA-NEXT: strh w10, [x9, #4]
-; CHECK-LE-SA-NEXT: add sp, sp, #32
+; CHECK-LE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-LE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-LE-SA-NEXT: ret
;
; CHECK-BE-SA-LABEL: v8f16_preidx_reg:
; CHECK-BE-SA: // %bb.0: // %entry
-; CHECK-BE-SA-NEXT: sub sp, sp, #32
-; CHECK-BE-SA-NEXT: .cfi_def_cfa_offset 32
; CHECK-BE-SA-NEXT: add x0, x0, x2
; CHECK-BE-SA-NEXT: add x1, x1, x2
-; CHECK-BE-SA-NEXT: ldrh w8, [x0]
-; CHECK-BE-SA-NEXT: ldrh w9, [x0, #2]
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #4]
-; CHECK-BE-SA-NEXT: ldrh w11, [x0, #6]
-; CHECK-BE-SA-NEXT: orr w8, w9, w8, lsl #16
-; CHECK-BE-SA-NEXT: orr x9, x11, x10, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x9, x8, lsl #32
-; CHECK-BE-SA-NEXT: str x8, [sp, #16]
-; CHECK-BE-SA-NEXT: mov x8, x0
-; CHECK-BE-SA-NEXT: ldrh w9, [x8, #8]!
-; CHECK-BE-SA-NEXT: ldrh w10, [x0, #10]
-; CHECK-BE-SA-NEXT: ldrh w11, [x8, #4]
-; CHECK-BE-SA-NEXT: ldrh w8, [x8, #6]
-; CHECK-BE-SA-NEXT: orr w9, w10, w9, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x11, lsl #16
-; CHECK-BE-SA-NEXT: orr x8, x8, x9, lsl #32
-; CHECK-BE-SA-NEXT: add x9, sp, #16
-; CHECK-BE-SA-NEXT: str x8, [sp, #24]
-; CHECK-BE-SA-NEXT: mov x8, sp
-; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x9]
-; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x8]
-; CHECK-BE-SA-NEXT: ldr x8, [sp]
-; CHECK-BE-SA-NEXT: strh w8, [x1, #6]
-; CHECK-BE-SA-NEXT: lsr x9, x8, #16
-; CHECK-BE-SA-NEXT: lsr x10, x8, #32
-; CHECK-BE-SA-NEXT: ldr x11, [sp, #8]
-; CHECK-BE-SA-NEXT: lsr x8, x8, #48
-; CHECK-BE-SA-NEXT: strh w9, [x1, #4]
-; CHECK-BE-SA-NEXT: lsr x9, x11, #32
-; CHECK-BE-SA-NEXT: strh w8, [x1]
-; CHECK-BE-SA-NEXT: lsr x8, x11, #48
-; CHECK-BE-SA-NEXT: strh w10, [x1, #2]
-; CHECK-BE-SA-NEXT: strh w9, [x1, #10]
-; CHECK-BE-SA-NEXT: mov x9, x1
-; CHECK-BE-SA-NEXT: strh w8, [x9, #8]!
-; CHECK-BE-SA-NEXT: lsr x8, x11, #16
-; CHECK-BE-SA-NEXT: strh w11, [x9, #6]
-; CHECK-BE-SA-NEXT: strh w8, [x9, #4]
-; CHECK-BE-SA-NEXT: add sp, sp, #32
+; CHECK-BE-SA-NEXT: ld1 { v0.8h }, [x0]
+; CHECK-BE-SA-NEXT: st1 { v0.8h }, [x1]
; CHECK-BE-SA-NEXT: ret
entry:
%add.ldptr = getelementptr inbounds nuw i8, ptr %ldptr, i64 %off
>From 630879a448dbf6acd82f3a03044e671f41bf6205 Mon Sep 17 00:00:00 2001
From: Oliver Stannard <oliver.stannard at arm.com>
Date: Thu, 23 Jul 2026 11:18:40 +0100
Subject: [PATCH 3/3] clang-format
---
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 11 +++++------
llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 ++-
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index ed2aad99c0945..7e056febf6921 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -31568,11 +31568,9 @@ bool AArch64TargetLowering::isIndexingLegal(MachineInstr &MI, Register Base,
return isInt<9>(CstOffset->getSExtValue());
}
-bool AArch64TargetLowering::getIndexedAddressParts(SDNode *N, SDNode *Op,
- SDValue &Base,
- SDValue &Offset,
- SelectionDAG &DAG,
- ISD::MemIndexedMode AM) const {
+bool AArch64TargetLowering::getIndexedAddressParts(
+ SDNode *N, SDNode *Op, SDValue &Base, SDValue &Offset, SelectionDAG &DAG,
+ ISD::MemIndexedMode AM) const {
if (Op->getOpcode() != ISD::ADD && Op->getOpcode() != ISD::SUB)
return false;
@@ -31654,7 +31652,8 @@ bool AArch64TargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
if (IsVolatile)
return false;
- if (!getIndexedAddressParts(N, Ptr.getNode(), Base, Offset, DAG, ISD::PRE_INC))
+ if (!getIndexedAddressParts(N, Ptr.getNode(), Base, Offset, DAG,
+ ISD::PRE_INC))
return false;
AM = ISD::PRE_INC;
return true;
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.h b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
index 840c75948cdb3..1900bf1eca8ed 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.h
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.h
@@ -903,7 +903,8 @@ class AArch64TargetLowering : public TargetLowering {
bool isUsedByReturnOnly(SDNode *N, SDValue &Chain) const override;
bool mayBeEmittedAsTailCall(const CallInst *CI) const override;
bool getIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base,
- SDValue &Offset, SelectionDAG &DAG, ISD::MemIndexedMode AM) const;
+ SDValue &Offset, SelectionDAG &DAG,
+ ISD::MemIndexedMode AM) const;
bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, SDValue &Offset,
ISD::MemIndexedMode &AM,
SelectionDAG &DAG) const override;
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