[llvm] [AMDGPU] Using feature to define vmem cacheline size (PR #207884)
Sean Clarke via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 23 07:45:32 PDT 2026
xarkenz wrote:
Just a heads up, this PR seems to be causing a warning while building LLVM:
```
warning: Processor gfx12-generic contains duplicate feature 'datacachelinesize128'
```
I suspect this is due to the fact that `FeatureISAVersion12` contains `FeatureDataCacheLineSize128` (line 2187), but then `FeatureISAVersion12_Generic` is defined as:
```
def FeatureISAVersion12_Generic: FeatureSet<
!listconcat(FeatureISAVersion12.Features,
[FeatureDataCacheLineSize128,
FeatureRequiresCOV6])>;
```
...which includes a redundant `FeatureDataCacheLineSize128`.
https://github.com/llvm/llvm-project/pull/207884
More information about the llvm-commits
mailing list