[llvm] [LV] Use wide lane masks as the canonical form when tail-folding & interleaving (PR #209484)

David Sherwood via llvm-commits llvm-commits at lists.llvm.org
Thu Jul 23 03:18:14 PDT 2026


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@@ -147,29 +150,33 @@ addVPLaneMaskPhiAndUpdateExitBranch(VPlan &Plan) {
   // TODO: Check if dropping the flags is needed.
   TopRegion->clearCanonicalIVNUW(CanonicalIVIncrement);
   DebugLoc DL = CanonicalIVIncrement->getDebugLoc();
-  // We can't use StartV directly in the ActiveLaneMask VPInstruction, since
-  // we have to take unrolling into account. Each part needs to start at
-  //   Part * VF
+  // We can't use StartV directly in the WideActiveLaneMask
+  // VPInstruction, since we have to take unrolling into account.
+  // Each part needs to start at Part * VF
   auto *VecPreheader = Plan.getVectorPreheader();
   VPBuilder Builder(VecPreheader);
 
-  // Create the ActiveLaneMask instruction using the correct start values.
+  // Create the WideActiveLaneMask instruction using the correct
+  // start values.
   VPValue *TC = Plan.getTripCount();
   VPValue *VF = &Plan.getVF();
 
   auto *EntryIncrement =
       Builder.createOverflowingOp(VPInstruction::CanonicalIVIncrementForPart,
                                   {StartV, VF}, {}, DL, "index.part.next");
 
-  // Create the active lane mask instruction in the VPlan preheader.
+  // Create the wide active lane mask instruction in the VPlan preheader.
   VPValue *ALMMultiplier =
       Plan.getConstantInt(TopRegion->getCanonicalIVType(), 1);
-  auto *EntryALM = Builder.createNaryOp(VPInstruction::ActiveLaneMask,
+  auto *EntryALM = Builder.createNaryOp(VPInstruction::WideActiveLaneMask,
                                         {EntryIncrement, TC, ALMMultiplier}, DL,
                                         "active.lane.mask.entry");
+  EntryALM = Builder.createNaryOp(VPInstruction::ExtractVectorForPart,
----------------
david-arm wrote:

It might be worth having at least one wide active lane mask test where the inputs are constants, i.e. a loop with a trip count of 9, VF=4, IC=2. I'd expect in future that the two entry parts will be simplified to splats of (i1 1).

https://github.com/llvm/llvm-project/pull/209484


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