[llvm] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN (PR #210891)
Kane Wang via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 21 00:05:17 PDT 2026
https://github.com/ReVe1uv updated https://github.com/llvm/llvm-project/pull/210891
>From 837a85b7a4b41affe453594ff86b313cc3cfad8e Mon Sep 17 00:00:00 2001
From: Kane Wang <wangqiang1 at kylinos.cn>
Date: Tue, 21 Jul 2026 14:51:47 +0800
Subject: [PATCH] [RISCV][GlobalISel] Legalize G_ATOMICRMW_MAX/MIN/UMAX/UMIN
Add a legalizer rule that marks these legal at sXLen under +a (selecting
amomax.w/d, and amomax.b/h for sub-word under +zabha via the existing
widen-scalar-while-preserving-the-memoperand path), and handle the
llvm.riscv.masked.atomicrmw.{max,min,umax,umin} intrinsics the same way as
add/sub/xchg so sub-word values without +zabha use the LR/SC masking pseudos.
There is no __atomic_fetch_max/min libcall, so unlike add/and/or/xor the rule
does not libcall the no-A case; that case is already lowered by an IR-level
compare-exchange loop and never reaches GlobalISel, so the rule marks it
unsupported to keep the rule set well-defined.
Updates legalizer-info-validation.mir for the newly defined rules and adds
atomicrmw-max-min-umax-umin.ll and legalize-atomicrmw-max-min-umax-umin-rv{32,64}.mir.
---
.../Target/RISCV/GISel/RISCVLegalizerInfo.cpp | 10 +
.../GlobalISel/atomicrmw-max-min-umax-umin.ll | 13068 ++++++++++++++++
.../GlobalISel/legalizer-info-validation.mir | 19 +-
...alize-atomicrmw-max-min-umax-umin-rv32.mir | 367 +
...alize-atomicrmw-max-min-umax-umin-rv64.mir | 491 +
5 files changed, 13947 insertions(+), 8 deletions(-)
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-max-min-umax-umin-rv32.mir
create mode 100644 llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-max-min-umax-umin-rv64.mir
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index 8f1ac4509425d..1feef5cfc3b7a 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -748,6 +748,12 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
.clampScalar(0, sXLen, sXLen)
.lower();
+ getActionDefinitionsBuilder(
+ {G_ATOMICRMW_MAX, G_ATOMICRMW_MIN, G_ATOMICRMW_UMAX, G_ATOMICRMW_UMIN})
+ .legalFor(ST.hasStdExtA(), {{sXLen, p0}})
+ .clampScalar(0, sXLen, sXLen)
+ .unsupported();
+
LegalityPredicate InsertVectorEltPred = [=](const LegalityQuery &Query) {
LLT VecTy = Query.Types[0];
LLT EltTy = Query.Types[1];
@@ -833,6 +839,10 @@ bool RISCVLegalizerInfo::legalizeIntrinsic(LegalizerHelper &Helper,
case Intrinsic::riscv_masked_atomicrmw_add:
case Intrinsic::riscv_masked_atomicrmw_sub:
case Intrinsic::riscv_masked_atomicrmw_xchg:
+ case Intrinsic::riscv_masked_atomicrmw_max:
+ case Intrinsic::riscv_masked_atomicrmw_min:
+ case Intrinsic::riscv_masked_atomicrmw_umax:
+ case Intrinsic::riscv_masked_atomicrmw_umin:
case Intrinsic::riscv_masked_cmpxchg:
return true;
}
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll b/llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll
new file mode 100644
index 0000000000000..2e18b9b8ea5de
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/atomicrmw-max-min-umax-umin.ll
@@ -0,0 +1,13068 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -global-isel -mtriple=riscv32 -mattr=+a,+zabha < %s | FileCheck %s --check-prefixes=RV32IA-ZABHA
+; RUN: llc -global-isel -mtriple=riscv32 -mattr=+a < %s | FileCheck %s --check-prefixes=RV32IA
+; RUN: llc -global-isel -mtriple=riscv32 < %s | FileCheck %s --check-prefixes=RV32I
+; RUN: llc -global-isel -mtriple=riscv64 -mattr=+a,+zabha < %s | FileCheck %s --check-prefixes=RV64IA-ZABHA
+; RUN: llc -global-isel -mtriple=riscv64 -mattr=+a < %s | FileCheck %s --check-prefixes=RV64IA
+; RUN: llc -global-isel -mtriple=riscv64 < %s | FileCheck %s --check-prefixes=RV64I
+
+define i8 @atomicrmw_max_i8_monotonic(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i8_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.b a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i8_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB0_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB0_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB0_3: # in Loop: Header=BB0_1 Depth=1
+; RV32IA-NEXT: sc.w a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB0_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i8_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB0_2
+; RV32I-NEXT: .LBB0_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB0_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB0_4
+; RV32I-NEXT: .LBB0_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB0_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB0_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB0_1
+; RV32I-NEXT: .LBB0_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i8_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.b a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i8_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB0_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB0_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB0_3: # in Loop: Header=BB0_1 Depth=1
+; RV64IA-NEXT: sc.w a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB0_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i8_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB0_2
+; RV64I-NEXT: .LBB0_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB0_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB0_4
+; RV64I-NEXT: .LBB0_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB0_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB0_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB0_1
+; RV64I-NEXT: .LBB0_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i8 %val monotonic
+ ret i8 %res
+}
+
+define i16 @atomicrmw_max_i16_monotonic(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i16_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.h a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i16_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB1_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB1_3: # in Loop: Header=BB1_1 Depth=1
+; RV32IA-NEXT: sc.w a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB1_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i16_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB1_2
+; RV32I-NEXT: .LBB1_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB1_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB1_4
+; RV32I-NEXT: .LBB1_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB1_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB1_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB1_1
+; RV32I-NEXT: .LBB1_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i16_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.h a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i16_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB1_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB1_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB1_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB1_3: # in Loop: Header=BB1_1 Depth=1
+; RV64IA-NEXT: sc.w a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB1_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i16_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB1_2
+; RV64I-NEXT: .LBB1_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB1_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB1_4
+; RV64I-NEXT: .LBB1_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB1_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB1_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB1_1
+; RV64I-NEXT: .LBB1_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i16 %val monotonic
+ ret i16 %res
+}
+
+define i32 @atomicrmw_max_i32_monotonic(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i32_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.w a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i32_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomax.w a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i32_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB2_2
+; RV32I-NEXT: .LBB2_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB2_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB2_4
+; RV32I-NEXT: .LBB2_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s1, a1, .LBB2_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB2_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB2_1
+; RV32I-NEXT: .LBB2_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i32_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.w a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i32_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.w a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i32_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB2_2
+; RV64I-NEXT: .LBB2_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB2_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB2_4
+; RV64I-NEXT: .LBB2_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB2_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB2_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB2_1
+; RV64I-NEXT: .LBB2_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i32 %val monotonic
+ ret i32 %res
+}
+
+define i64 @atomicrmw_max_i64_monotonic(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i64_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB3_2
+; RV32IA-ZABHA-NEXT: .LBB3_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: li a4, 0
+; RV32IA-ZABHA-NEXT: li a5, 0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB3_7
+; RV32IA-ZABHA-NEXT: .LBB3_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB3_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB3_5
+; RV32IA-ZABHA-NEXT: .LBB3_4: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB3_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB3_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB3_1
+; RV32IA-ZABHA-NEXT: .LBB3_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i64_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB3_2
+; RV32IA-NEXT: .LBB3_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: li a4, 0
+; RV32IA-NEXT: li a5, 0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB3_7
+; RV32IA-NEXT: .LBB3_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB3_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-NEXT: slt a0, s2, a1
+; RV32IA-NEXT: j .LBB3_5
+; RV32IA-NEXT: .LBB3_4: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB3_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB3_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB3_1
+; RV32IA-NEXT: .LBB3_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i64_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB3_2
+; RV32I-NEXT: .LBB3_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: li a5, 0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB3_7
+; RV32I-NEXT: .LBB3_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB3_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32I-NEXT: slt a0, s2, a1
+; RV32I-NEXT: j .LBB3_5
+; RV32I-NEXT: .LBB3_4: # in Loop: Header=BB3_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB3_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB3_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB3_1
+; RV32I-NEXT: .LBB3_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i64_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.d a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i64_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.d a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i64_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB3_2
+; RV64I-NEXT: .LBB3_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB3_4
+; RV64I-NEXT: .LBB3_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s1, a1, .LBB3_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB3_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB3_1
+; RV64I-NEXT: .LBB3_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i64 %val monotonic
+ ret i64 %res
+}
+
+define i8 @atomicrmw_min_i8_monotonic(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i8_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.b a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i8_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB4_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB4_3: # in Loop: Header=BB4_1 Depth=1
+; RV32IA-NEXT: sc.w a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB4_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i8_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB4_2
+; RV32I-NEXT: .LBB4_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB4_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB4_4
+; RV32I-NEXT: .LBB4_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB4_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB4_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB4_1
+; RV32I-NEXT: .LBB4_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i8_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.b a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i8_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB4_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB4_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB4_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB4_3: # in Loop: Header=BB4_1 Depth=1
+; RV64IA-NEXT: sc.w a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB4_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i8_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB4_2
+; RV64I-NEXT: .LBB4_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB4_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB4_4
+; RV64I-NEXT: .LBB4_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB4_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB4_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB4_1
+; RV64I-NEXT: .LBB4_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i8 %val monotonic
+ ret i8 %res
+}
+
+define i16 @atomicrmw_min_i16_monotonic(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i16_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.h a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i16_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB5_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB5_3: # in Loop: Header=BB5_1 Depth=1
+; RV32IA-NEXT: sc.w a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB5_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i16_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB5_2
+; RV32I-NEXT: .LBB5_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB5_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB5_4
+; RV32I-NEXT: .LBB5_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB5_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB5_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB5_1
+; RV32I-NEXT: .LBB5_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i16_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.h a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i16_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB5_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB5_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB5_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB5_3: # in Loop: Header=BB5_1 Depth=1
+; RV64IA-NEXT: sc.w a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB5_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i16_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB5_2
+; RV64I-NEXT: .LBB5_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB5_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB5_4
+; RV64I-NEXT: .LBB5_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB5_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB5_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB5_1
+; RV64I-NEXT: .LBB5_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i16 %val monotonic
+ ret i16 %res
+}
+
+define i32 @atomicrmw_min_i32_monotonic(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i32_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.w a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i32_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomin.w a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i32_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB6_2
+; RV32I-NEXT: .LBB6_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB6_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB6_4
+; RV32I-NEXT: .LBB6_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a1, s1, .LBB6_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB6_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB6_1
+; RV32I-NEXT: .LBB6_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i32_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.w a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i32_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.w a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i32_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB6_2
+; RV64I-NEXT: .LBB6_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB6_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB6_4
+; RV64I-NEXT: .LBB6_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB6_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB6_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB6_1
+; RV64I-NEXT: .LBB6_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i32 %val monotonic
+ ret i32 %res
+}
+
+define i64 @atomicrmw_min_i64_monotonic(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i64_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB7_2
+; RV32IA-ZABHA-NEXT: .LBB7_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: li a4, 0
+; RV32IA-ZABHA-NEXT: li a5, 0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB7_7
+; RV32IA-ZABHA-NEXT: .LBB7_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB7_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB7_5
+; RV32IA-ZABHA-NEXT: .LBB7_4: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB7_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB7_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB7_1
+; RV32IA-ZABHA-NEXT: .LBB7_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i64_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB7_2
+; RV32IA-NEXT: .LBB7_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: li a4, 0
+; RV32IA-NEXT: li a5, 0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB7_7
+; RV32IA-NEXT: .LBB7_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB7_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-NEXT: slt a0, a1, s2
+; RV32IA-NEXT: j .LBB7_5
+; RV32IA-NEXT: .LBB7_4: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB7_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB7_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB7_1
+; RV32IA-NEXT: .LBB7_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i64_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB7_2
+; RV32I-NEXT: .LBB7_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: li a5, 0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB7_7
+; RV32I-NEXT: .LBB7_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB7_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32I-NEXT: slt a0, a1, s2
+; RV32I-NEXT: j .LBB7_5
+; RV32I-NEXT: .LBB7_4: # in Loop: Header=BB7_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB7_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB7_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB7_1
+; RV32I-NEXT: .LBB7_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i64_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.d a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i64_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.d a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i64_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB7_2
+; RV64I-NEXT: .LBB7_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB7_4
+; RV64I-NEXT: .LBB7_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a1, s1, .LBB7_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB7_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB7_1
+; RV64I-NEXT: .LBB7_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i64 %val monotonic
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umax_i8_monotonic(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i8_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.b a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i8_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB8_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB8_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB8_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB8_3: # in Loop: Header=BB8_1 Depth=1
+; RV32IA-NEXT: sc.w a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB8_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i8_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB8_2
+; RV32I-NEXT: .LBB8_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB8_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB8_4
+; RV32I-NEXT: .LBB8_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s2, a0, .LBB8_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB8_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB8_1
+; RV32I-NEXT: .LBB8_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i8_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.b a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i8_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB8_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB8_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB8_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB8_3: # in Loop: Header=BB8_1 Depth=1
+; RV64IA-NEXT: sc.w a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB8_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i8_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB8_2
+; RV64I-NEXT: .LBB8_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB8_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB8_4
+; RV64I-NEXT: .LBB8_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB8_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB8_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB8_1
+; RV64I-NEXT: .LBB8_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i8 %val monotonic
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umax_i16_monotonic(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i16_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.h a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i16_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB9_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB9_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB9_3: # in Loop: Header=BB9_1 Depth=1
+; RV32IA-NEXT: sc.w a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB9_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i16_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB9_2
+; RV32I-NEXT: .LBB9_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB9_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB9_4
+; RV32I-NEXT: .LBB9_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s3, a0, .LBB9_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB9_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB9_1
+; RV32I-NEXT: .LBB9_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i16_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.h a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i16_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB9_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB9_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB9_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB9_3: # in Loop: Header=BB9_1 Depth=1
+; RV64IA-NEXT: sc.w a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB9_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i16_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB9_2
+; RV64I-NEXT: .LBB9_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB9_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB9_4
+; RV64I-NEXT: .LBB9_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s3, a0, .LBB9_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB9_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB9_1
+; RV64I-NEXT: .LBB9_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i16 %val monotonic
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umax_i32_monotonic(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i32_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.w a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i32_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomaxu.w a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i32_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB10_2
+; RV32I-NEXT: .LBB10_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB10_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB10_4
+; RV32I-NEXT: .LBB10_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s1, a1, .LBB10_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB10_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB10_1
+; RV32I-NEXT: .LBB10_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i32_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.w a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i32_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.w a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i32_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB10_2
+; RV64I-NEXT: .LBB10_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB10_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB10_4
+; RV64I-NEXT: .LBB10_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB10_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB10_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB10_1
+; RV64I-NEXT: .LBB10_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i32 %val monotonic
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umax_i64_monotonic(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i64_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB11_2
+; RV32IA-ZABHA-NEXT: .LBB11_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: li a4, 0
+; RV32IA-ZABHA-NEXT: li a5, 0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB11_7
+; RV32IA-ZABHA-NEXT: .LBB11_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB11_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB11_5
+; RV32IA-ZABHA-NEXT: .LBB11_4: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB11_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB11_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB11_1
+; RV32IA-ZABHA-NEXT: .LBB11_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i64_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB11_2
+; RV32IA-NEXT: .LBB11_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: li a4, 0
+; RV32IA-NEXT: li a5, 0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB11_7
+; RV32IA-NEXT: .LBB11_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB11_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-NEXT: sltu a0, s2, a1
+; RV32IA-NEXT: j .LBB11_5
+; RV32IA-NEXT: .LBB11_4: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB11_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB11_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB11_1
+; RV32IA-NEXT: .LBB11_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i64_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB11_2
+; RV32I-NEXT: .LBB11_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: li a5, 0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB11_7
+; RV32I-NEXT: .LBB11_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB11_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32I-NEXT: sltu a0, s2, a1
+; RV32I-NEXT: j .LBB11_5
+; RV32I-NEXT: .LBB11_4: # in Loop: Header=BB11_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB11_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB11_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB11_1
+; RV32I-NEXT: .LBB11_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i64_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.d a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i64_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.d a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i64_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB11_2
+; RV64I-NEXT: .LBB11_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB11_4
+; RV64I-NEXT: .LBB11_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s1, a1, .LBB11_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB11_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB11_1
+; RV64I-NEXT: .LBB11_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i64 %val monotonic
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umin_i8_monotonic(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i8_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.b a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i8_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB12_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB12_3: # in Loop: Header=BB12_1 Depth=1
+; RV32IA-NEXT: sc.w a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB12_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i8_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB12_2
+; RV32I-NEXT: .LBB12_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB12_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB12_4
+; RV32I-NEXT: .LBB12_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s2, .LBB12_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB12_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB12_1
+; RV32I-NEXT: .LBB12_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i8_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.b a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i8_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB12_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB12_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB12_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB12_3: # in Loop: Header=BB12_1 Depth=1
+; RV64IA-NEXT: sc.w a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB12_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i8_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB12_2
+; RV64I-NEXT: .LBB12_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB12_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB12_4
+; RV64I-NEXT: .LBB12_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB12_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB12_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB12_1
+; RV64I-NEXT: .LBB12_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i8 %val monotonic
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umin_i16_monotonic(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i16_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.h a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i16_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB13_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB13_3: # in Loop: Header=BB13_1 Depth=1
+; RV32IA-NEXT: sc.w a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB13_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i16_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB13_2
+; RV32I-NEXT: .LBB13_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB13_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB13_4
+; RV32I-NEXT: .LBB13_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s3, .LBB13_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB13_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB13_1
+; RV32I-NEXT: .LBB13_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i16_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.h a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i16_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB13_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB13_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB13_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB13_3: # in Loop: Header=BB13_1 Depth=1
+; RV64IA-NEXT: sc.w a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB13_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i16_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB13_2
+; RV64I-NEXT: .LBB13_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB13_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB13_4
+; RV64I-NEXT: .LBB13_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s3, .LBB13_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB13_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB13_1
+; RV64I-NEXT: .LBB13_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i16 %val monotonic
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umin_i32_monotonic(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i32_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.w a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i32_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amominu.w a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i32_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB14_2
+; RV32I-NEXT: .LBB14_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB14_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a3, 0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB14_4
+; RV32I-NEXT: .LBB14_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a1, s1, .LBB14_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB14_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB14_1
+; RV32I-NEXT: .LBB14_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i32_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.w a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i32_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.w a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i32_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB14_2
+; RV64I-NEXT: .LBB14_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB14_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB14_4
+; RV64I-NEXT: .LBB14_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB14_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB14_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB14_1
+; RV64I-NEXT: .LBB14_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i32 %val monotonic
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umin_i64_monotonic(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i64_monotonic:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB15_2
+; RV32IA-ZABHA-NEXT: .LBB15_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: li a4, 0
+; RV32IA-ZABHA-NEXT: li a5, 0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB15_7
+; RV32IA-ZABHA-NEXT: .LBB15_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB15_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB15_5
+; RV32IA-ZABHA-NEXT: .LBB15_4: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB15_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB15_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB15_1
+; RV32IA-ZABHA-NEXT: .LBB15_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i64_monotonic:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB15_2
+; RV32IA-NEXT: .LBB15_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: li a4, 0
+; RV32IA-NEXT: li a5, 0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB15_7
+; RV32IA-NEXT: .LBB15_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB15_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-NEXT: sltu a0, a1, s2
+; RV32IA-NEXT: j .LBB15_5
+; RV32IA-NEXT: .LBB15_4: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB15_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB15_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB15_1
+; RV32IA-NEXT: .LBB15_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i64_monotonic:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB15_2
+; RV32I-NEXT: .LBB15_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: li a5, 0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB15_7
+; RV32I-NEXT: .LBB15_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB15_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32I-NEXT: sltu a0, a1, s2
+; RV32I-NEXT: j .LBB15_5
+; RV32I-NEXT: .LBB15_4: # in Loop: Header=BB15_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB15_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB15_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB15_1
+; RV32I-NEXT: .LBB15_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i64_monotonic:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.d a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i64_monotonic:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.d a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i64_monotonic:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB15_2
+; RV64I-NEXT: .LBB15_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a3, 0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB15_4
+; RV64I-NEXT: .LBB15_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a1, s1, .LBB15_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB15_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB15_1
+; RV64I-NEXT: .LBB15_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i64 %val monotonic
+ ret i64 %res
+}
+
+define i8 @atomicrmw_max_i8_acquire(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i8_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.b.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i8_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB16_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB16_3: # in Loop: Header=BB16_1 Depth=1
+; RV32IA-NEXT: sc.w a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB16_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i8_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB16_2
+; RV32I-NEXT: .LBB16_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB16_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB16_4
+; RV32I-NEXT: .LBB16_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB16_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB16_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB16_1
+; RV32I-NEXT: .LBB16_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i8_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.b.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i8_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB16_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB16_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB16_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB16_3: # in Loop: Header=BB16_1 Depth=1
+; RV64IA-NEXT: sc.w a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB16_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i8_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB16_2
+; RV64I-NEXT: .LBB16_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB16_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB16_4
+; RV64I-NEXT: .LBB16_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB16_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB16_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB16_1
+; RV64I-NEXT: .LBB16_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i8 %val acquire
+ ret i8 %res
+}
+
+define i16 @atomicrmw_max_i16_acquire(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i16_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.h.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i16_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB17_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB17_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB17_3: # in Loop: Header=BB17_1 Depth=1
+; RV32IA-NEXT: sc.w a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB17_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i16_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB17_2
+; RV32I-NEXT: .LBB17_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB17_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB17_4
+; RV32I-NEXT: .LBB17_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB17_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB17_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB17_1
+; RV32I-NEXT: .LBB17_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i16_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.h.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i16_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB17_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB17_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB17_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB17_3: # in Loop: Header=BB17_1 Depth=1
+; RV64IA-NEXT: sc.w a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB17_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i16_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB17_2
+; RV64I-NEXT: .LBB17_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB17_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB17_4
+; RV64I-NEXT: .LBB17_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB17_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB17_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB17_1
+; RV64I-NEXT: .LBB17_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i16 %val acquire
+ ret i16 %res
+}
+
+define i32 @atomicrmw_max_i32_acquire(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i32_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.w.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i32_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomax.w.aq a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i32_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB18_2
+; RV32I-NEXT: .LBB18_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB18_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB18_4
+; RV32I-NEXT: .LBB18_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s1, a1, .LBB18_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB18_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB18_1
+; RV32I-NEXT: .LBB18_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i32_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.w.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i32_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.w.aq a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i32_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB18_2
+; RV64I-NEXT: .LBB18_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB18_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB18_4
+; RV64I-NEXT: .LBB18_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB18_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB18_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB18_1
+; RV64I-NEXT: .LBB18_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i32 %val acquire
+ ret i32 %res
+}
+
+define i64 @atomicrmw_max_i64_acquire(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i64_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB19_2
+; RV32IA-ZABHA-NEXT: .LBB19_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 2
+; RV32IA-ZABHA-NEXT: li a5, 2
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB19_7
+; RV32IA-ZABHA-NEXT: .LBB19_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB19_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB19_5
+; RV32IA-ZABHA-NEXT: .LBB19_4: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB19_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB19_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB19_1
+; RV32IA-ZABHA-NEXT: .LBB19_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i64_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB19_2
+; RV32IA-NEXT: .LBB19_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 2
+; RV32IA-NEXT: li a5, 2
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB19_7
+; RV32IA-NEXT: .LBB19_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB19_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-NEXT: slt a0, s2, a1
+; RV32IA-NEXT: j .LBB19_5
+; RV32IA-NEXT: .LBB19_4: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB19_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB19_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB19_1
+; RV32IA-NEXT: .LBB19_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i64_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB19_2
+; RV32I-NEXT: .LBB19_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: li a5, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB19_7
+; RV32I-NEXT: .LBB19_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB19_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32I-NEXT: slt a0, s2, a1
+; RV32I-NEXT: j .LBB19_5
+; RV32I-NEXT: .LBB19_4: # in Loop: Header=BB19_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB19_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB19_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB19_1
+; RV32I-NEXT: .LBB19_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i64_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.d.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i64_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.d.aq a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i64_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB19_2
+; RV64I-NEXT: .LBB19_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB19_4
+; RV64I-NEXT: .LBB19_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s1, a1, .LBB19_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB19_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB19_1
+; RV64I-NEXT: .LBB19_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i64 %val acquire
+ ret i64 %res
+}
+
+define i8 @atomicrmw_min_i8_acquire(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i8_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.b.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i8_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB20_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB20_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB20_3: # in Loop: Header=BB20_1 Depth=1
+; RV32IA-NEXT: sc.w a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB20_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i8_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB20_2
+; RV32I-NEXT: .LBB20_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB20_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB20_4
+; RV32I-NEXT: .LBB20_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB20_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB20_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB20_1
+; RV32I-NEXT: .LBB20_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i8_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.b.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i8_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB20_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB20_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB20_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB20_3: # in Loop: Header=BB20_1 Depth=1
+; RV64IA-NEXT: sc.w a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB20_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i8_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB20_2
+; RV64I-NEXT: .LBB20_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB20_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB20_4
+; RV64I-NEXT: .LBB20_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB20_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB20_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB20_1
+; RV64I-NEXT: .LBB20_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i8 %val acquire
+ ret i8 %res
+}
+
+define i16 @atomicrmw_min_i16_acquire(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i16_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.h.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i16_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB21_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB21_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB21_3: # in Loop: Header=BB21_1 Depth=1
+; RV32IA-NEXT: sc.w a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB21_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i16_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB21_2
+; RV32I-NEXT: .LBB21_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB21_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB21_4
+; RV32I-NEXT: .LBB21_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB21_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB21_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB21_1
+; RV32I-NEXT: .LBB21_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i16_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.h.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i16_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB21_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB21_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB21_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB21_3: # in Loop: Header=BB21_1 Depth=1
+; RV64IA-NEXT: sc.w a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB21_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i16_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB21_2
+; RV64I-NEXT: .LBB21_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB21_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB21_4
+; RV64I-NEXT: .LBB21_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB21_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB21_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB21_1
+; RV64I-NEXT: .LBB21_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i16 %val acquire
+ ret i16 %res
+}
+
+define i32 @atomicrmw_min_i32_acquire(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i32_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.w.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i32_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomin.w.aq a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i32_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB22_2
+; RV32I-NEXT: .LBB22_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB22_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB22_4
+; RV32I-NEXT: .LBB22_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a1, s1, .LBB22_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB22_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB22_1
+; RV32I-NEXT: .LBB22_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i32_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.w.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i32_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.w.aq a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i32_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB22_2
+; RV64I-NEXT: .LBB22_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB22_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB22_4
+; RV64I-NEXT: .LBB22_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB22_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB22_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB22_1
+; RV64I-NEXT: .LBB22_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i32 %val acquire
+ ret i32 %res
+}
+
+define i64 @atomicrmw_min_i64_acquire(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i64_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB23_2
+; RV32IA-ZABHA-NEXT: .LBB23_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 2
+; RV32IA-ZABHA-NEXT: li a5, 2
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB23_7
+; RV32IA-ZABHA-NEXT: .LBB23_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB23_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB23_5
+; RV32IA-ZABHA-NEXT: .LBB23_4: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB23_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB23_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB23_1
+; RV32IA-ZABHA-NEXT: .LBB23_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i64_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB23_2
+; RV32IA-NEXT: .LBB23_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 2
+; RV32IA-NEXT: li a5, 2
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB23_7
+; RV32IA-NEXT: .LBB23_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB23_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-NEXT: slt a0, a1, s2
+; RV32IA-NEXT: j .LBB23_5
+; RV32IA-NEXT: .LBB23_4: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB23_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB23_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB23_1
+; RV32IA-NEXT: .LBB23_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i64_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB23_2
+; RV32I-NEXT: .LBB23_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: li a5, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB23_7
+; RV32I-NEXT: .LBB23_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB23_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32I-NEXT: slt a0, a1, s2
+; RV32I-NEXT: j .LBB23_5
+; RV32I-NEXT: .LBB23_4: # in Loop: Header=BB23_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB23_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB23_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB23_1
+; RV32I-NEXT: .LBB23_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i64_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.d.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i64_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.d.aq a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i64_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB23_2
+; RV64I-NEXT: .LBB23_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB23_4
+; RV64I-NEXT: .LBB23_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a1, s1, .LBB23_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB23_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB23_1
+; RV64I-NEXT: .LBB23_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i64 %val acquire
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umax_i8_acquire(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i8_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.b.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i8_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB24_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB24_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB24_3: # in Loop: Header=BB24_1 Depth=1
+; RV32IA-NEXT: sc.w a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB24_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i8_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB24_2
+; RV32I-NEXT: .LBB24_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB24_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB24_4
+; RV32I-NEXT: .LBB24_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s2, a0, .LBB24_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB24_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB24_1
+; RV32I-NEXT: .LBB24_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i8_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.b.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i8_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB24_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB24_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB24_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB24_3: # in Loop: Header=BB24_1 Depth=1
+; RV64IA-NEXT: sc.w a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB24_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i8_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB24_2
+; RV64I-NEXT: .LBB24_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB24_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB24_4
+; RV64I-NEXT: .LBB24_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB24_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB24_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB24_1
+; RV64I-NEXT: .LBB24_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i8 %val acquire
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umax_i16_acquire(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i16_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.h.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i16_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB25_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB25_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB25_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB25_3: # in Loop: Header=BB25_1 Depth=1
+; RV32IA-NEXT: sc.w a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB25_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i16_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB25_2
+; RV32I-NEXT: .LBB25_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB25_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB25_4
+; RV32I-NEXT: .LBB25_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s3, a0, .LBB25_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB25_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB25_1
+; RV32I-NEXT: .LBB25_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i16_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.h.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i16_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB25_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB25_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB25_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB25_3: # in Loop: Header=BB25_1 Depth=1
+; RV64IA-NEXT: sc.w a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB25_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i16_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB25_2
+; RV64I-NEXT: .LBB25_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB25_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB25_4
+; RV64I-NEXT: .LBB25_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s3, a0, .LBB25_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB25_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB25_1
+; RV64I-NEXT: .LBB25_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i16 %val acquire
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umax_i32_acquire(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i32_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.w.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i32_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomaxu.w.aq a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i32_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB26_2
+; RV32I-NEXT: .LBB26_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB26_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB26_4
+; RV32I-NEXT: .LBB26_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s1, a1, .LBB26_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB26_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB26_1
+; RV32I-NEXT: .LBB26_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i32_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.w.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i32_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.w.aq a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i32_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB26_2
+; RV64I-NEXT: .LBB26_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB26_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB26_4
+; RV64I-NEXT: .LBB26_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB26_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB26_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB26_1
+; RV64I-NEXT: .LBB26_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i32 %val acquire
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umax_i64_acquire(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i64_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB27_2
+; RV32IA-ZABHA-NEXT: .LBB27_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 2
+; RV32IA-ZABHA-NEXT: li a5, 2
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB27_7
+; RV32IA-ZABHA-NEXT: .LBB27_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB27_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB27_5
+; RV32IA-ZABHA-NEXT: .LBB27_4: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB27_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB27_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB27_1
+; RV32IA-ZABHA-NEXT: .LBB27_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i64_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB27_2
+; RV32IA-NEXT: .LBB27_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 2
+; RV32IA-NEXT: li a5, 2
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB27_7
+; RV32IA-NEXT: .LBB27_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB27_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-NEXT: sltu a0, s2, a1
+; RV32IA-NEXT: j .LBB27_5
+; RV32IA-NEXT: .LBB27_4: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB27_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB27_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB27_1
+; RV32IA-NEXT: .LBB27_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i64_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB27_2
+; RV32I-NEXT: .LBB27_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: li a5, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB27_7
+; RV32I-NEXT: .LBB27_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB27_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32I-NEXT: sltu a0, s2, a1
+; RV32I-NEXT: j .LBB27_5
+; RV32I-NEXT: .LBB27_4: # in Loop: Header=BB27_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB27_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB27_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB27_1
+; RV32I-NEXT: .LBB27_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i64_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.d.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i64_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.d.aq a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i64_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB27_2
+; RV64I-NEXT: .LBB27_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB27_4
+; RV64I-NEXT: .LBB27_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s1, a1, .LBB27_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB27_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB27_1
+; RV64I-NEXT: .LBB27_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i64 %val acquire
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umin_i8_acquire(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i8_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.b.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i8_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB28_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB28_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB28_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB28_3: # in Loop: Header=BB28_1 Depth=1
+; RV32IA-NEXT: sc.w a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB28_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i8_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB28_2
+; RV32I-NEXT: .LBB28_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB28_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB28_4
+; RV32I-NEXT: .LBB28_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s2, .LBB28_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB28_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB28_1
+; RV32I-NEXT: .LBB28_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i8_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.b.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i8_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB28_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB28_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB28_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB28_3: # in Loop: Header=BB28_1 Depth=1
+; RV64IA-NEXT: sc.w a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB28_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i8_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB28_2
+; RV64I-NEXT: .LBB28_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB28_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB28_4
+; RV64I-NEXT: .LBB28_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB28_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB28_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB28_1
+; RV64I-NEXT: .LBB28_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i8 %val acquire
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umin_i16_acquire(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i16_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.h.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i16_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB29_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB29_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB29_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB29_3: # in Loop: Header=BB29_1 Depth=1
+; RV32IA-NEXT: sc.w a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB29_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i16_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB29_2
+; RV32I-NEXT: .LBB29_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB29_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB29_4
+; RV32I-NEXT: .LBB29_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s3, .LBB29_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB29_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB29_1
+; RV32I-NEXT: .LBB29_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i16_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.h.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i16_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB29_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB29_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB29_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB29_3: # in Loop: Header=BB29_1 Depth=1
+; RV64IA-NEXT: sc.w a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB29_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i16_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB29_2
+; RV64I-NEXT: .LBB29_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB29_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB29_4
+; RV64I-NEXT: .LBB29_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s3, .LBB29_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB29_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB29_1
+; RV64I-NEXT: .LBB29_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i16 %val acquire
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umin_i32_acquire(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i32_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.w.aq a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i32_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amominu.w.aq a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i32_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB30_2
+; RV32I-NEXT: .LBB30_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB30_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 2
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB30_4
+; RV32I-NEXT: .LBB30_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a1, s1, .LBB30_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB30_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB30_1
+; RV32I-NEXT: .LBB30_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i32_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.w.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i32_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.w.aq a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i32_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB30_2
+; RV64I-NEXT: .LBB30_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB30_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB30_4
+; RV64I-NEXT: .LBB30_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB30_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB30_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB30_1
+; RV64I-NEXT: .LBB30_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i32 %val acquire
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umin_i64_acquire(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i64_acquire:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB31_2
+; RV32IA-ZABHA-NEXT: .LBB31_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 2
+; RV32IA-ZABHA-NEXT: li a5, 2
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB31_7
+; RV32IA-ZABHA-NEXT: .LBB31_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB31_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB31_5
+; RV32IA-ZABHA-NEXT: .LBB31_4: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB31_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB31_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB31_1
+; RV32IA-ZABHA-NEXT: .LBB31_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i64_acquire:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB31_2
+; RV32IA-NEXT: .LBB31_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 2
+; RV32IA-NEXT: li a5, 2
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB31_7
+; RV32IA-NEXT: .LBB31_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB31_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-NEXT: sltu a0, a1, s2
+; RV32IA-NEXT: j .LBB31_5
+; RV32IA-NEXT: .LBB31_4: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB31_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB31_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB31_1
+; RV32IA-NEXT: .LBB31_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i64_acquire:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB31_2
+; RV32I-NEXT: .LBB31_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: li a5, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB31_7
+; RV32I-NEXT: .LBB31_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB31_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32I-NEXT: sltu a0, a1, s2
+; RV32I-NEXT: j .LBB31_5
+; RV32I-NEXT: .LBB31_4: # in Loop: Header=BB31_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB31_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB31_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB31_1
+; RV32I-NEXT: .LBB31_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i64_acquire:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.d.aq a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i64_acquire:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.d.aq a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i64_acquire:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB31_2
+; RV64I-NEXT: .LBB31_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 2
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB31_4
+; RV64I-NEXT: .LBB31_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a1, s1, .LBB31_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB31_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB31_1
+; RV64I-NEXT: .LBB31_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i64 %val acquire
+ ret i64 %res
+}
+
+define i8 @atomicrmw_max_i8_release(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i8_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.b.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i8_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB32_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB32_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB32_3: # in Loop: Header=BB32_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB32_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i8_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB32_2
+; RV32I-NEXT: .LBB32_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB32_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB32_4
+; RV32I-NEXT: .LBB32_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB32_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB32_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB32_1
+; RV32I-NEXT: .LBB32_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i8_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.b.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i8_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB32_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB32_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB32_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB32_3: # in Loop: Header=BB32_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB32_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i8_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB32_2
+; RV64I-NEXT: .LBB32_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB32_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB32_4
+; RV64I-NEXT: .LBB32_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB32_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB32_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB32_1
+; RV64I-NEXT: .LBB32_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i8 %val release
+ ret i8 %res
+}
+
+define i16 @atomicrmw_max_i16_release(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i16_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.h.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i16_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB33_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB33_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB33_3: # in Loop: Header=BB33_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB33_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i16_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB33_2
+; RV32I-NEXT: .LBB33_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB33_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB33_4
+; RV32I-NEXT: .LBB33_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB33_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB33_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB33_1
+; RV32I-NEXT: .LBB33_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i16_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.h.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i16_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB33_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB33_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB33_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB33_3: # in Loop: Header=BB33_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB33_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i16_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB33_2
+; RV64I-NEXT: .LBB33_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB33_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB33_4
+; RV64I-NEXT: .LBB33_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB33_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB33_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB33_1
+; RV64I-NEXT: .LBB33_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i16 %val release
+ ret i16 %res
+}
+
+define i32 @atomicrmw_max_i32_release(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i32_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.w.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i32_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomax.w.rl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i32_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB34_2
+; RV32I-NEXT: .LBB34_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB34_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB34_4
+; RV32I-NEXT: .LBB34_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s1, a1, .LBB34_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB34_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB34_1
+; RV32I-NEXT: .LBB34_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i32_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.w.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i32_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.w.rl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i32_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB34_2
+; RV64I-NEXT: .LBB34_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB34_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB34_4
+; RV64I-NEXT: .LBB34_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB34_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB34_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB34_1
+; RV64I-NEXT: .LBB34_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i32 %val release
+ ret i32 %res
+}
+
+define i64 @atomicrmw_max_i64_release(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i64_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB35_2
+; RV32IA-ZABHA-NEXT: .LBB35_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 3
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: li a5, 0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB35_7
+; RV32IA-ZABHA-NEXT: .LBB35_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB35_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB35_5
+; RV32IA-ZABHA-NEXT: .LBB35_4: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB35_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB35_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB35_1
+; RV32IA-ZABHA-NEXT: .LBB35_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i64_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB35_2
+; RV32IA-NEXT: .LBB35_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 3
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: li a5, 0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB35_7
+; RV32IA-NEXT: .LBB35_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB35_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-NEXT: slt a0, s2, a1
+; RV32IA-NEXT: j .LBB35_5
+; RV32IA-NEXT: .LBB35_4: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB35_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB35_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB35_1
+; RV32IA-NEXT: .LBB35_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i64_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB35_2
+; RV32I-NEXT: .LBB35_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a5, 0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB35_7
+; RV32I-NEXT: .LBB35_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB35_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32I-NEXT: slt a0, s2, a1
+; RV32I-NEXT: j .LBB35_5
+; RV32I-NEXT: .LBB35_4: # in Loop: Header=BB35_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB35_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB35_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB35_1
+; RV32I-NEXT: .LBB35_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i64_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.d.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i64_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.d.rl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i64_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB35_2
+; RV64I-NEXT: .LBB35_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB35_4
+; RV64I-NEXT: .LBB35_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s1, a1, .LBB35_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB35_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB35_1
+; RV64I-NEXT: .LBB35_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i64 %val release
+ ret i64 %res
+}
+
+define i8 @atomicrmw_min_i8_release(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i8_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.b.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i8_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB36_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB36_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB36_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB36_3: # in Loop: Header=BB36_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB36_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i8_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB36_2
+; RV32I-NEXT: .LBB36_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB36_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB36_4
+; RV32I-NEXT: .LBB36_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB36_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB36_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB36_1
+; RV32I-NEXT: .LBB36_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i8_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.b.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i8_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB36_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB36_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB36_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB36_3: # in Loop: Header=BB36_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB36_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i8_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB36_2
+; RV64I-NEXT: .LBB36_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB36_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB36_4
+; RV64I-NEXT: .LBB36_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB36_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB36_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB36_1
+; RV64I-NEXT: .LBB36_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i8 %val release
+ ret i8 %res
+}
+
+define i16 @atomicrmw_min_i16_release(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i16_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.h.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i16_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB37_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB37_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB37_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB37_3: # in Loop: Header=BB37_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB37_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i16_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB37_2
+; RV32I-NEXT: .LBB37_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB37_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB37_4
+; RV32I-NEXT: .LBB37_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB37_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB37_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB37_1
+; RV32I-NEXT: .LBB37_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i16_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.h.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i16_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB37_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB37_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB37_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB37_3: # in Loop: Header=BB37_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB37_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i16_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB37_2
+; RV64I-NEXT: .LBB37_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB37_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB37_4
+; RV64I-NEXT: .LBB37_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB37_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB37_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB37_1
+; RV64I-NEXT: .LBB37_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i16 %val release
+ ret i16 %res
+}
+
+define i32 @atomicrmw_min_i32_release(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i32_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.w.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i32_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomin.w.rl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i32_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB38_2
+; RV32I-NEXT: .LBB38_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB38_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB38_4
+; RV32I-NEXT: .LBB38_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a1, s1, .LBB38_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB38_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB38_1
+; RV32I-NEXT: .LBB38_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i32_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.w.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i32_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.w.rl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i32_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB38_2
+; RV64I-NEXT: .LBB38_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB38_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB38_4
+; RV64I-NEXT: .LBB38_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB38_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB38_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB38_1
+; RV64I-NEXT: .LBB38_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i32 %val release
+ ret i32 %res
+}
+
+define i64 @atomicrmw_min_i64_release(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i64_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB39_2
+; RV32IA-ZABHA-NEXT: .LBB39_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 3
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: li a5, 0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB39_7
+; RV32IA-ZABHA-NEXT: .LBB39_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB39_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB39_5
+; RV32IA-ZABHA-NEXT: .LBB39_4: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB39_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB39_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB39_1
+; RV32IA-ZABHA-NEXT: .LBB39_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i64_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB39_2
+; RV32IA-NEXT: .LBB39_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 3
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: li a5, 0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB39_7
+; RV32IA-NEXT: .LBB39_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB39_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-NEXT: slt a0, a1, s2
+; RV32IA-NEXT: j .LBB39_5
+; RV32IA-NEXT: .LBB39_4: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB39_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB39_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB39_1
+; RV32IA-NEXT: .LBB39_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i64_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB39_2
+; RV32I-NEXT: .LBB39_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a5, 0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB39_7
+; RV32I-NEXT: .LBB39_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB39_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32I-NEXT: slt a0, a1, s2
+; RV32I-NEXT: j .LBB39_5
+; RV32I-NEXT: .LBB39_4: # in Loop: Header=BB39_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB39_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB39_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB39_1
+; RV32I-NEXT: .LBB39_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i64_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.d.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i64_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.d.rl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i64_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB39_2
+; RV64I-NEXT: .LBB39_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB39_4
+; RV64I-NEXT: .LBB39_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a1, s1, .LBB39_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB39_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB39_1
+; RV64I-NEXT: .LBB39_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i64 %val release
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umax_i8_release(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i8_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.b.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i8_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB40_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB40_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB40_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB40_3: # in Loop: Header=BB40_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB40_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i8_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB40_2
+; RV32I-NEXT: .LBB40_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB40_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB40_4
+; RV32I-NEXT: .LBB40_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s2, a0, .LBB40_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB40_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB40_1
+; RV32I-NEXT: .LBB40_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i8_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.b.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i8_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB40_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB40_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB40_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB40_3: # in Loop: Header=BB40_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB40_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i8_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB40_2
+; RV64I-NEXT: .LBB40_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB40_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB40_4
+; RV64I-NEXT: .LBB40_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB40_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB40_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB40_1
+; RV64I-NEXT: .LBB40_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i8 %val release
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umax_i16_release(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i16_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.h.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i16_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB41_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB41_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB41_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB41_3: # in Loop: Header=BB41_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB41_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i16_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB41_2
+; RV32I-NEXT: .LBB41_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB41_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB41_4
+; RV32I-NEXT: .LBB41_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s3, a0, .LBB41_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB41_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB41_1
+; RV32I-NEXT: .LBB41_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i16_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.h.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i16_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB41_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB41_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB41_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB41_3: # in Loop: Header=BB41_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB41_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i16_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB41_2
+; RV64I-NEXT: .LBB41_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB41_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB41_4
+; RV64I-NEXT: .LBB41_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s3, a0, .LBB41_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB41_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB41_1
+; RV64I-NEXT: .LBB41_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i16 %val release
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umax_i32_release(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i32_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.w.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i32_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomaxu.w.rl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i32_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB42_2
+; RV32I-NEXT: .LBB42_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB42_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB42_4
+; RV32I-NEXT: .LBB42_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s1, a1, .LBB42_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB42_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB42_1
+; RV32I-NEXT: .LBB42_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i32_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.w.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i32_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.w.rl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i32_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB42_2
+; RV64I-NEXT: .LBB42_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB42_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB42_4
+; RV64I-NEXT: .LBB42_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB42_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB42_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB42_1
+; RV64I-NEXT: .LBB42_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i32 %val release
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umax_i64_release(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i64_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB43_2
+; RV32IA-ZABHA-NEXT: .LBB43_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 3
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: li a5, 0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB43_7
+; RV32IA-ZABHA-NEXT: .LBB43_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB43_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB43_5
+; RV32IA-ZABHA-NEXT: .LBB43_4: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB43_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB43_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB43_1
+; RV32IA-ZABHA-NEXT: .LBB43_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i64_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB43_2
+; RV32IA-NEXT: .LBB43_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 3
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: li a5, 0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB43_7
+; RV32IA-NEXT: .LBB43_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB43_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-NEXT: sltu a0, s2, a1
+; RV32IA-NEXT: j .LBB43_5
+; RV32IA-NEXT: .LBB43_4: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB43_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB43_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB43_1
+; RV32IA-NEXT: .LBB43_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i64_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB43_2
+; RV32I-NEXT: .LBB43_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a5, 0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB43_7
+; RV32I-NEXT: .LBB43_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB43_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32I-NEXT: sltu a0, s2, a1
+; RV32I-NEXT: j .LBB43_5
+; RV32I-NEXT: .LBB43_4: # in Loop: Header=BB43_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB43_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB43_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB43_1
+; RV32I-NEXT: .LBB43_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i64_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.d.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i64_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.d.rl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i64_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB43_2
+; RV64I-NEXT: .LBB43_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB43_4
+; RV64I-NEXT: .LBB43_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s1, a1, .LBB43_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB43_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB43_1
+; RV64I-NEXT: .LBB43_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i64 %val release
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umin_i8_release(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i8_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.b.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i8_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB44_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB44_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB44_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB44_3: # in Loop: Header=BB44_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB44_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i8_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB44_2
+; RV32I-NEXT: .LBB44_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB44_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB44_4
+; RV32I-NEXT: .LBB44_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s2, .LBB44_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB44_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB44_1
+; RV32I-NEXT: .LBB44_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i8_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.b.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i8_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB44_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB44_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB44_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB44_3: # in Loop: Header=BB44_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB44_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i8_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB44_2
+; RV64I-NEXT: .LBB44_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB44_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB44_4
+; RV64I-NEXT: .LBB44_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB44_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB44_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB44_1
+; RV64I-NEXT: .LBB44_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i8 %val release
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umin_i16_release(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i16_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.h.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i16_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB45_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB45_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB45_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB45_3: # in Loop: Header=BB45_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB45_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i16_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB45_2
+; RV32I-NEXT: .LBB45_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB45_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB45_4
+; RV32I-NEXT: .LBB45_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s3, .LBB45_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB45_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB45_1
+; RV32I-NEXT: .LBB45_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i16_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.h.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i16_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB45_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB45_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB45_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB45_3: # in Loop: Header=BB45_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB45_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i16_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB45_2
+; RV64I-NEXT: .LBB45_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB45_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB45_4
+; RV64I-NEXT: .LBB45_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s3, .LBB45_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB45_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB45_1
+; RV64I-NEXT: .LBB45_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i16 %val release
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umin_i32_release(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i32_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.w.rl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i32_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amominu.w.rl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i32_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB46_2
+; RV32I-NEXT: .LBB46_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB46_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a4, 0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB46_4
+; RV32I-NEXT: .LBB46_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a1, s1, .LBB46_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB46_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB46_1
+; RV32I-NEXT: .LBB46_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i32_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.w.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i32_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.w.rl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i32_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB46_2
+; RV64I-NEXT: .LBB46_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB46_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB46_4
+; RV64I-NEXT: .LBB46_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB46_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB46_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB46_1
+; RV64I-NEXT: .LBB46_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i32 %val release
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umin_i64_release(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i64_release:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB47_2
+; RV32IA-ZABHA-NEXT: .LBB47_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 3
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: li a5, 0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB47_7
+; RV32IA-ZABHA-NEXT: .LBB47_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB47_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB47_5
+; RV32IA-ZABHA-NEXT: .LBB47_4: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB47_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB47_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB47_1
+; RV32IA-ZABHA-NEXT: .LBB47_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i64_release:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB47_2
+; RV32IA-NEXT: .LBB47_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 3
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: li a5, 0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB47_7
+; RV32IA-NEXT: .LBB47_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB47_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-NEXT: sltu a0, a1, s2
+; RV32IA-NEXT: j .LBB47_5
+; RV32IA-NEXT: .LBB47_4: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB47_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB47_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB47_1
+; RV32IA-NEXT: .LBB47_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i64_release:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB47_2
+; RV32I-NEXT: .LBB47_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 3
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: li a5, 0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB47_7
+; RV32I-NEXT: .LBB47_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB47_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32I-NEXT: sltu a0, a1, s2
+; RV32I-NEXT: j .LBB47_5
+; RV32I-NEXT: .LBB47_4: # in Loop: Header=BB47_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB47_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB47_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB47_1
+; RV32I-NEXT: .LBB47_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i64_release:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.d.rl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i64_release:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.d.rl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i64_release:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB47_2
+; RV64I-NEXT: .LBB47_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 3
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: li a4, 0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB47_4
+; RV64I-NEXT: .LBB47_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a1, s1, .LBB47_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB47_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB47_1
+; RV64I-NEXT: .LBB47_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i64 %val release
+ ret i64 %res
+}
+
+define i8 @atomicrmw_max_i8_acq_rel(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i8_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.b.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i8_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB48_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB48_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB48_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB48_3: # in Loop: Header=BB48_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB48_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i8_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB48_2
+; RV32I-NEXT: .LBB48_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB48_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB48_4
+; RV32I-NEXT: .LBB48_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB48_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB48_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB48_1
+; RV32I-NEXT: .LBB48_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i8_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.b.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i8_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB48_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB48_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB48_3: # in Loop: Header=BB48_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB48_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i8_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB48_2
+; RV64I-NEXT: .LBB48_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB48_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB48_4
+; RV64I-NEXT: .LBB48_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB48_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB48_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB48_1
+; RV64I-NEXT: .LBB48_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i8 %val acq_rel
+ ret i8 %res
+}
+
+define i16 @atomicrmw_max_i16_acq_rel(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i16_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.h.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i16_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB49_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB49_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB49_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB49_3: # in Loop: Header=BB49_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB49_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i16_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB49_2
+; RV32I-NEXT: .LBB49_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB49_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB49_4
+; RV32I-NEXT: .LBB49_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB49_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB49_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB49_1
+; RV32I-NEXT: .LBB49_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i16_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.h.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i16_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB49_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB49_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB49_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB49_3: # in Loop: Header=BB49_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB49_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i16_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB49_2
+; RV64I-NEXT: .LBB49_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB49_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB49_4
+; RV64I-NEXT: .LBB49_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB49_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB49_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB49_1
+; RV64I-NEXT: .LBB49_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i16 %val acq_rel
+ ret i16 %res
+}
+
+define i32 @atomicrmw_max_i32_acq_rel(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i32_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.w.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i32_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomax.w.aqrl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i32_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB50_2
+; RV32I-NEXT: .LBB50_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB50_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB50_4
+; RV32I-NEXT: .LBB50_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s1, a1, .LBB50_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB50_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB50_1
+; RV32I-NEXT: .LBB50_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i32_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.w.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i32_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.w.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i32_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB50_2
+; RV64I-NEXT: .LBB50_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB50_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB50_4
+; RV64I-NEXT: .LBB50_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB50_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB50_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB50_1
+; RV64I-NEXT: .LBB50_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i32 %val acq_rel
+ ret i32 %res
+}
+
+define i64 @atomicrmw_max_i64_acq_rel(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i64_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB51_2
+; RV32IA-ZABHA-NEXT: .LBB51_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 4
+; RV32IA-ZABHA-NEXT: li a5, 2
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB51_7
+; RV32IA-ZABHA-NEXT: .LBB51_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB51_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB51_5
+; RV32IA-ZABHA-NEXT: .LBB51_4: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB51_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB51_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB51_1
+; RV32IA-ZABHA-NEXT: .LBB51_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i64_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB51_2
+; RV32IA-NEXT: .LBB51_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 4
+; RV32IA-NEXT: li a5, 2
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB51_7
+; RV32IA-NEXT: .LBB51_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB51_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-NEXT: slt a0, s2, a1
+; RV32IA-NEXT: j .LBB51_5
+; RV32IA-NEXT: .LBB51_4: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB51_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB51_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB51_1
+; RV32IA-NEXT: .LBB51_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i64_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB51_2
+; RV32I-NEXT: .LBB51_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 4
+; RV32I-NEXT: li a5, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB51_7
+; RV32I-NEXT: .LBB51_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB51_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32I-NEXT: slt a0, s2, a1
+; RV32I-NEXT: j .LBB51_5
+; RV32I-NEXT: .LBB51_4: # in Loop: Header=BB51_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB51_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB51_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB51_1
+; RV32I-NEXT: .LBB51_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i64_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.d.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i64_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.d.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i64_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB51_2
+; RV64I-NEXT: .LBB51_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB51_4
+; RV64I-NEXT: .LBB51_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s1, a1, .LBB51_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB51_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB51_1
+; RV64I-NEXT: .LBB51_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i64 %val acq_rel
+ ret i64 %res
+}
+
+define i8 @atomicrmw_min_i8_acq_rel(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i8_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.b.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i8_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB52_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB52_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB52_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB52_3: # in Loop: Header=BB52_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB52_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i8_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB52_2
+; RV32I-NEXT: .LBB52_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB52_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB52_4
+; RV32I-NEXT: .LBB52_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB52_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB52_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB52_1
+; RV32I-NEXT: .LBB52_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i8_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.b.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i8_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB52_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB52_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB52_3: # in Loop: Header=BB52_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB52_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i8_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB52_2
+; RV64I-NEXT: .LBB52_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB52_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB52_4
+; RV64I-NEXT: .LBB52_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB52_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB52_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB52_1
+; RV64I-NEXT: .LBB52_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i8 %val acq_rel
+ ret i8 %res
+}
+
+define i16 @atomicrmw_min_i16_acq_rel(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i16_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.h.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i16_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB53_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB53_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB53_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB53_3: # in Loop: Header=BB53_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB53_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i16_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB53_2
+; RV32I-NEXT: .LBB53_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB53_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB53_4
+; RV32I-NEXT: .LBB53_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB53_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB53_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB53_1
+; RV32I-NEXT: .LBB53_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i16_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.h.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i16_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB53_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB53_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB53_3: # in Loop: Header=BB53_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB53_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i16_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB53_2
+; RV64I-NEXT: .LBB53_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB53_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB53_4
+; RV64I-NEXT: .LBB53_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB53_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB53_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB53_1
+; RV64I-NEXT: .LBB53_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i16 %val acq_rel
+ ret i16 %res
+}
+
+define i32 @atomicrmw_min_i32_acq_rel(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i32_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.w.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i32_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomin.w.aqrl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i32_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB54_2
+; RV32I-NEXT: .LBB54_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB54_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB54_4
+; RV32I-NEXT: .LBB54_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a1, s1, .LBB54_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB54_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB54_1
+; RV32I-NEXT: .LBB54_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i32_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.w.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i32_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.w.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i32_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB54_2
+; RV64I-NEXT: .LBB54_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB54_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB54_4
+; RV64I-NEXT: .LBB54_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB54_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB54_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB54_1
+; RV64I-NEXT: .LBB54_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i32 %val acq_rel
+ ret i32 %res
+}
+
+define i64 @atomicrmw_min_i64_acq_rel(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i64_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB55_2
+; RV32IA-ZABHA-NEXT: .LBB55_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 4
+; RV32IA-ZABHA-NEXT: li a5, 2
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB55_7
+; RV32IA-ZABHA-NEXT: .LBB55_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB55_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB55_5
+; RV32IA-ZABHA-NEXT: .LBB55_4: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB55_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB55_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB55_1
+; RV32IA-ZABHA-NEXT: .LBB55_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i64_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB55_2
+; RV32IA-NEXT: .LBB55_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 4
+; RV32IA-NEXT: li a5, 2
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB55_7
+; RV32IA-NEXT: .LBB55_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB55_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-NEXT: slt a0, a1, s2
+; RV32IA-NEXT: j .LBB55_5
+; RV32IA-NEXT: .LBB55_4: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB55_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB55_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB55_1
+; RV32IA-NEXT: .LBB55_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i64_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB55_2
+; RV32I-NEXT: .LBB55_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 4
+; RV32I-NEXT: li a5, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB55_7
+; RV32I-NEXT: .LBB55_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB55_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32I-NEXT: slt a0, a1, s2
+; RV32I-NEXT: j .LBB55_5
+; RV32I-NEXT: .LBB55_4: # in Loop: Header=BB55_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB55_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB55_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB55_1
+; RV32I-NEXT: .LBB55_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i64_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.d.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i64_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.d.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i64_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB55_2
+; RV64I-NEXT: .LBB55_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB55_4
+; RV64I-NEXT: .LBB55_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a1, s1, .LBB55_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB55_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB55_1
+; RV64I-NEXT: .LBB55_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i64 %val acq_rel
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umax_i8_acq_rel(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.b.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB56_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB56_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB56_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB56_3: # in Loop: Header=BB56_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB56_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB56_2
+; RV32I-NEXT: .LBB56_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB56_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB56_4
+; RV32I-NEXT: .LBB56_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s2, a0, .LBB56_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB56_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB56_1
+; RV32I-NEXT: .LBB56_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.b.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB56_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB56_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB56_3: # in Loop: Header=BB56_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB56_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i8_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB56_2
+; RV64I-NEXT: .LBB56_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB56_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB56_4
+; RV64I-NEXT: .LBB56_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB56_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB56_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB56_1
+; RV64I-NEXT: .LBB56_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i8 %val acq_rel
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umax_i16_acq_rel(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.h.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB57_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB57_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB57_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB57_3: # in Loop: Header=BB57_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB57_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB57_2
+; RV32I-NEXT: .LBB57_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB57_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB57_4
+; RV32I-NEXT: .LBB57_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s3, a0, .LBB57_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB57_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB57_1
+; RV32I-NEXT: .LBB57_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.h.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB57_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB57_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB57_3: # in Loop: Header=BB57_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB57_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i16_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB57_2
+; RV64I-NEXT: .LBB57_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB57_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB57_4
+; RV64I-NEXT: .LBB57_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s3, a0, .LBB57_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB57_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB57_1
+; RV64I-NEXT: .LBB57_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i16 %val acq_rel
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umax_i32_acq_rel(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i32_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i32_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i32_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB58_2
+; RV32I-NEXT: .LBB58_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB58_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB58_4
+; RV32I-NEXT: .LBB58_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s1, a1, .LBB58_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB58_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB58_1
+; RV32I-NEXT: .LBB58_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i32_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i32_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i32_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB58_2
+; RV64I-NEXT: .LBB58_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB58_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB58_4
+; RV64I-NEXT: .LBB58_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB58_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB58_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB58_1
+; RV64I-NEXT: .LBB58_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i32 %val acq_rel
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umax_i64_acq_rel(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i64_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB59_2
+; RV32IA-ZABHA-NEXT: .LBB59_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 4
+; RV32IA-ZABHA-NEXT: li a5, 2
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB59_7
+; RV32IA-ZABHA-NEXT: .LBB59_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB59_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB59_5
+; RV32IA-ZABHA-NEXT: .LBB59_4: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB59_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB59_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB59_1
+; RV32IA-ZABHA-NEXT: .LBB59_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i64_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB59_2
+; RV32IA-NEXT: .LBB59_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 4
+; RV32IA-NEXT: li a5, 2
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB59_7
+; RV32IA-NEXT: .LBB59_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB59_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-NEXT: sltu a0, s2, a1
+; RV32IA-NEXT: j .LBB59_5
+; RV32IA-NEXT: .LBB59_4: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB59_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB59_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB59_1
+; RV32IA-NEXT: .LBB59_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i64_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB59_2
+; RV32I-NEXT: .LBB59_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 4
+; RV32I-NEXT: li a5, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB59_7
+; RV32I-NEXT: .LBB59_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB59_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32I-NEXT: sltu a0, s2, a1
+; RV32I-NEXT: j .LBB59_5
+; RV32I-NEXT: .LBB59_4: # in Loop: Header=BB59_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB59_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB59_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB59_1
+; RV32I-NEXT: .LBB59_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i64_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.d.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i64_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.d.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i64_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB59_2
+; RV64I-NEXT: .LBB59_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB59_4
+; RV64I-NEXT: .LBB59_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s1, a1, .LBB59_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB59_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB59_1
+; RV64I-NEXT: .LBB59_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i64 %val acq_rel
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umin_i8_acq_rel(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.b.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB60_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB60_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB60_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB60_3: # in Loop: Header=BB60_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB60_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB60_2
+; RV32I-NEXT: .LBB60_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB60_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB60_4
+; RV32I-NEXT: .LBB60_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s2, .LBB60_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB60_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB60_1
+; RV32I-NEXT: .LBB60_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.b.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB60_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB60_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB60_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB60_3: # in Loop: Header=BB60_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB60_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i8_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB60_2
+; RV64I-NEXT: .LBB60_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB60_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB60_4
+; RV64I-NEXT: .LBB60_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB60_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB60_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB60_1
+; RV64I-NEXT: .LBB60_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i8 %val acq_rel
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umin_i16_acq_rel(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.h.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB61_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aq a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB61_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB61_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB61_3: # in Loop: Header=BB61_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB61_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB61_2
+; RV32I-NEXT: .LBB61_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB61_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB61_4
+; RV32I-NEXT: .LBB61_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s3, .LBB61_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB61_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB61_1
+; RV32I-NEXT: .LBB61_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.h.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB61_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aq a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB61_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB61_3: # in Loop: Header=BB61_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB61_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i16_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB61_2
+; RV64I-NEXT: .LBB61_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB61_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB61_4
+; RV64I-NEXT: .LBB61_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s3, .LBB61_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB61_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB61_1
+; RV64I-NEXT: .LBB61_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i16 %val acq_rel
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umin_i32_acq_rel(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i32_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.w.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i32_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amominu.w.aqrl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i32_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB62_2
+; RV32I-NEXT: .LBB62_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB62_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 4
+; RV32I-NEXT: li a4, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB62_4
+; RV32I-NEXT: .LBB62_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a1, s1, .LBB62_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB62_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB62_1
+; RV32I-NEXT: .LBB62_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i32_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.w.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i32_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.w.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i32_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB62_2
+; RV64I-NEXT: .LBB62_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB62_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB62_4
+; RV64I-NEXT: .LBB62_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB62_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB62_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB62_1
+; RV64I-NEXT: .LBB62_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i32 %val acq_rel
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umin_i64_acq_rel(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i64_acq_rel:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB63_2
+; RV32IA-ZABHA-NEXT: .LBB63_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 4
+; RV32IA-ZABHA-NEXT: li a5, 2
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB63_7
+; RV32IA-ZABHA-NEXT: .LBB63_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB63_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB63_5
+; RV32IA-ZABHA-NEXT: .LBB63_4: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB63_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB63_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB63_1
+; RV32IA-ZABHA-NEXT: .LBB63_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i64_acq_rel:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB63_2
+; RV32IA-NEXT: .LBB63_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 4
+; RV32IA-NEXT: li a5, 2
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB63_7
+; RV32IA-NEXT: .LBB63_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB63_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-NEXT: sltu a0, a1, s2
+; RV32IA-NEXT: j .LBB63_5
+; RV32IA-NEXT: .LBB63_4: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB63_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB63_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB63_1
+; RV32IA-NEXT: .LBB63_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i64_acq_rel:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB63_2
+; RV32I-NEXT: .LBB63_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 4
+; RV32I-NEXT: li a5, 2
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB63_7
+; RV32I-NEXT: .LBB63_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB63_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32I-NEXT: sltu a0, a1, s2
+; RV32I-NEXT: j .LBB63_5
+; RV32I-NEXT: .LBB63_4: # in Loop: Header=BB63_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB63_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB63_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB63_1
+; RV32I-NEXT: .LBB63_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i64_acq_rel:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.d.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i64_acq_rel:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.d.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i64_acq_rel:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB63_2
+; RV64I-NEXT: .LBB63_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 4
+; RV64I-NEXT: li a4, 2
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB63_4
+; RV64I-NEXT: .LBB63_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a1, s1, .LBB63_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB63_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB63_1
+; RV64I-NEXT: .LBB63_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i64 %val acq_rel
+ ret i64 %res
+}
+
+define i8 @atomicrmw_max_i8_seq_cst(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i8_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.b.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i8_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB64_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aqrl a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB64_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB64_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB64_3: # in Loop: Header=BB64_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB64_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i8_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB64_2
+; RV32I-NEXT: .LBB64_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB64_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB64_4
+; RV32I-NEXT: .LBB64_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB64_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB64_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB64_1
+; RV32I-NEXT: .LBB64_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i8_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.b.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i8_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB64_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aqrl a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB64_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB64_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB64_3: # in Loop: Header=BB64_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB64_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i8_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB64_2
+; RV64I-NEXT: .LBB64_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB64_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB64_4
+; RV64I-NEXT: .LBB64_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB64_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB64_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB64_1
+; RV64I-NEXT: .LBB64_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i8 %val seq_cst
+ ret i8 %res
+}
+
+define i16 @atomicrmw_max_i16_seq_cst(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i16_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.h.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i16_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB65_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aqrl a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a6, a1, .LBB65_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB65_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB65_3: # in Loop: Header=BB65_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB65_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i16_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB65_2
+; RV32I-NEXT: .LBB65_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB65_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB65_4
+; RV32I-NEXT: .LBB65_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s2, a0, .LBB65_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB65_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB65_1
+; RV32I-NEXT: .LBB65_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i16_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.h.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i16_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB65_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aqrl a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a6, a1, .LBB65_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB65_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB65_3: # in Loop: Header=BB65_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB65_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i16_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB65_2
+; RV64I-NEXT: .LBB65_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB65_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB65_4
+; RV64I-NEXT: .LBB65_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB65_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB65_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB65_1
+; RV64I-NEXT: .LBB65_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i16 %val seq_cst
+ ret i16 %res
+}
+
+define i32 @atomicrmw_max_i32_seq_cst(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i32_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomax.w.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i32_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomax.w.aqrl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i32_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB66_2
+; RV32I-NEXT: .LBB66_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB66_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB66_4
+; RV32I-NEXT: .LBB66_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt s1, a1, .LBB66_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB66_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB66_1
+; RV32I-NEXT: .LBB66_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i32_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.w.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i32_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.w.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i32_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB66_2
+; RV64I-NEXT: .LBB66_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB66_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB66_4
+; RV64I-NEXT: .LBB66_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s2, a0, .LBB66_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB66_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB66_1
+; RV64I-NEXT: .LBB66_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i32 %val seq_cst
+ ret i32 %res
+}
+
+define i64 @atomicrmw_max_i64_seq_cst(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_max_i64_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB67_2
+; RV32IA-ZABHA-NEXT: .LBB67_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 5
+; RV32IA-ZABHA-NEXT: li a5, 5
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB67_7
+; RV32IA-ZABHA-NEXT: .LBB67_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB67_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB67_5
+; RV32IA-ZABHA-NEXT: .LBB67_4: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB67_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB67_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB67_1
+; RV32IA-ZABHA-NEXT: .LBB67_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_max_i64_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB67_2
+; RV32IA-NEXT: .LBB67_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 5
+; RV32IA-NEXT: li a5, 5
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB67_7
+; RV32IA-NEXT: .LBB67_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB67_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-NEXT: slt a0, s2, a1
+; RV32IA-NEXT: j .LBB67_5
+; RV32IA-NEXT: .LBB67_4: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB67_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB67_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB67_1
+; RV32IA-NEXT: .LBB67_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_max_i64_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB67_2
+; RV32I-NEXT: .LBB67_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: li a5, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB67_7
+; RV32I-NEXT: .LBB67_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB67_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32I-NEXT: slt a0, s2, a1
+; RV32I-NEXT: j .LBB67_5
+; RV32I-NEXT: .LBB67_4: # in Loop: Header=BB67_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB67_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB67_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB67_1
+; RV32I-NEXT: .LBB67_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_max_i64_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomax.d.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_max_i64_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomax.d.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_max_i64_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB67_2
+; RV64I-NEXT: .LBB67_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB67_4
+; RV64I-NEXT: .LBB67_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt s1, a1, .LBB67_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB67_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB67_1
+; RV64I-NEXT: .LBB67_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw max ptr %ptr, i64 %val seq_cst
+ ret i64 %res
+}
+
+define i8 @atomicrmw_min_i8_seq_cst(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i8_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.b.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i8_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: li a3, 24
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 24
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 24
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB68_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aqrl a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB68_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB68_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB68_3: # in Loop: Header=BB68_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB68_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i8_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 24
+; RV32I-NEXT: srai s2, a0, 24
+; RV32I-NEXT: j .LBB68_2
+; RV32I-NEXT: .LBB68_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB68_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB68_4
+; RV32I-NEXT: .LBB68_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 24
+; RV32I-NEXT: srai a0, a0, 24
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB68_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB68_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB68_1
+; RV32I-NEXT: .LBB68_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i8_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.b.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i8_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: li a3, 56
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 56
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 56
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB68_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aqrl a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB68_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB68_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB68_3: # in Loop: Header=BB68_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB68_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i8_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 56
+; RV64I-NEXT: srai s2, a0, 56
+; RV64I-NEXT: j .LBB68_2
+; RV64I-NEXT: .LBB68_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB68_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB68_4
+; RV64I-NEXT: .LBB68_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 56
+; RV64I-NEXT: srai a0, a0, 56
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB68_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB68_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB68_1
+; RV64I-NEXT: .LBB68_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i8 %val seq_cst
+ ret i8 %res
+}
+
+define i16 @atomicrmw_min_i16_seq_cst(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i16_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.h.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i16_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: li a3, 16
+; RV32IA-NEXT: andi a4, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: slli a1, a1, 16
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: srai a1, a1, 16
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: sub a3, a3, a0
+; RV32IA-NEXT: .LBB69_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aqrl a5, (a4)
+; RV32IA-NEXT: and a6, a5, a2
+; RV32IA-NEXT: mv a7, a5
+; RV32IA-NEXT: sll a6, a6, a3
+; RV32IA-NEXT: sra a6, a6, a3
+; RV32IA-NEXT: bge a1, a6, .LBB69_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB69_1 Depth=1
+; RV32IA-NEXT: xor a7, a5, a1
+; RV32IA-NEXT: and a7, a7, a2
+; RV32IA-NEXT: xor a7, a5, a7
+; RV32IA-NEXT: .LBB69_3: # in Loop: Header=BB69_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV32IA-NEXT: bnez a7, .LBB69_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a5, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i16_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: slli a0, s1, 16
+; RV32I-NEXT: srai s2, a0, 16
+; RV32I-NEXT: j .LBB69_2
+; RV32I-NEXT: .LBB69_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB69_2 Depth=1
+; RV32I-NEXT: sh a1, 14(sp)
+; RV32I-NEXT: addi a1, sp, 14
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 14(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB69_4
+; RV32I-NEXT: .LBB69_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: slli a0, a1, 16
+; RV32I-NEXT: srai a0, a0, 16
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a0, s2, .LBB69_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB69_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB69_1
+; RV32I-NEXT: .LBB69_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i16_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.h.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i16_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: li a3, 48
+; RV64IA-NEXT: andi a4, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: slli a1, a1, 48
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: srai a1, a1, 48
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: sub a3, a3, a0
+; RV64IA-NEXT: .LBB69_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aqrl a5, (a4)
+; RV64IA-NEXT: and a6, a5, a2
+; RV64IA-NEXT: mv a7, a5
+; RV64IA-NEXT: sll a6, a6, a3
+; RV64IA-NEXT: sra a6, a6, a3
+; RV64IA-NEXT: bge a1, a6, .LBB69_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB69_1 Depth=1
+; RV64IA-NEXT: xor a7, a5, a1
+; RV64IA-NEXT: and a7, a7, a2
+; RV64IA-NEXT: xor a7, a5, a7
+; RV64IA-NEXT: .LBB69_3: # in Loop: Header=BB69_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a7, a7, (a4)
+; RV64IA-NEXT: bnez a7, .LBB69_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a5, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i16_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: slli a0, s1, 48
+; RV64I-NEXT: srai s2, a0, 48
+; RV64I-NEXT: j .LBB69_2
+; RV64I-NEXT: .LBB69_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB69_2 Depth=1
+; RV64I-NEXT: sh a1, 14(sp)
+; RV64I-NEXT: addi a1, sp, 14
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 14(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB69_4
+; RV64I-NEXT: .LBB69_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: slli a0, a1, 48
+; RV64I-NEXT: srai a0, a0, 48
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB69_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB69_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB69_1
+; RV64I-NEXT: .LBB69_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i16 %val seq_cst
+ ret i16 %res
+}
+
+define i32 @atomicrmw_min_i32_seq_cst(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i32_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomin.w.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i32_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomin.w.aqrl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i32_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB70_2
+; RV32I-NEXT: .LBB70_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB70_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB70_4
+; RV32I-NEXT: .LBB70_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: blt a1, s1, .LBB70_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB70_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB70_1
+; RV32I-NEXT: .LBB70_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i32_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.w.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i32_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.w.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i32_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB70_2
+; RV64I-NEXT: .LBB70_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB70_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB70_4
+; RV64I-NEXT: .LBB70_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a0, s2, .LBB70_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB70_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB70_1
+; RV64I-NEXT: .LBB70_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i32 %val seq_cst
+ ret i32 %res
+}
+
+define i64 @atomicrmw_min_i64_seq_cst(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_min_i64_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB71_2
+; RV32IA-ZABHA-NEXT: .LBB71_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 5
+; RV32IA-ZABHA-NEXT: li a5, 5
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB71_7
+; RV32IA-ZABHA-NEXT: .LBB71_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB71_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-ZABHA-NEXT: slt a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB71_5
+; RV32IA-ZABHA-NEXT: .LBB71_4: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB71_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB71_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB71_1
+; RV32IA-ZABHA-NEXT: .LBB71_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_min_i64_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB71_2
+; RV32IA-NEXT: .LBB71_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 5
+; RV32IA-NEXT: li a5, 5
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB71_7
+; RV32IA-NEXT: .LBB71_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB71_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-NEXT: slt a0, a1, s2
+; RV32IA-NEXT: j .LBB71_5
+; RV32IA-NEXT: .LBB71_4: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB71_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB71_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB71_1
+; RV32IA-NEXT: .LBB71_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_min_i64_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB71_2
+; RV32I-NEXT: .LBB71_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: li a5, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB71_7
+; RV32I-NEXT: .LBB71_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB71_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32I-NEXT: slt a0, a1, s2
+; RV32I-NEXT: j .LBB71_5
+; RV32I-NEXT: .LBB71_4: # in Loop: Header=BB71_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB71_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB71_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB71_1
+; RV32I-NEXT: .LBB71_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_min_i64_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomin.d.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_min_i64_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomin.d.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_min_i64_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB71_2
+; RV64I-NEXT: .LBB71_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB71_4
+; RV64I-NEXT: .LBB71_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: blt a1, s1, .LBB71_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB71_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB71_1
+; RV64I-NEXT: .LBB71_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw min ptr %ptr, i64 %val seq_cst
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umax_i8_seq_cst(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.b.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB72_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aqrl a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB72_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB72_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB72_3: # in Loop: Header=BB72_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB72_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB72_2
+; RV32I-NEXT: .LBB72_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB72_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB72_4
+; RV32I-NEXT: .LBB72_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s2, a0, .LBB72_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB72_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB72_1
+; RV32I-NEXT: .LBB72_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.b.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB72_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aqrl a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB72_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB72_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB72_3: # in Loop: Header=BB72_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB72_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i8_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB72_2
+; RV64I-NEXT: .LBB72_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB72_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB72_4
+; RV64I-NEXT: .LBB72_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB72_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB72_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB72_1
+; RV64I-NEXT: .LBB72_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i8 %val seq_cst
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umax_i16_seq_cst(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.h.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB73_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aqrl a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a5, a1, .LBB73_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB73_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB73_3: # in Loop: Header=BB73_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB73_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB73_2
+; RV32I-NEXT: .LBB73_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB73_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB73_4
+; RV32I-NEXT: .LBB73_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s3, a0, .LBB73_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB73_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB73_1
+; RV32I-NEXT: .LBB73_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.h.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB73_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aqrl a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a5, a1, .LBB73_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB73_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB73_3: # in Loop: Header=BB73_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB73_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i16_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB73_2
+; RV64I-NEXT: .LBB73_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB73_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB73_4
+; RV64I-NEXT: .LBB73_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s3, a0, .LBB73_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB73_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB73_1
+; RV64I-NEXT: .LBB73_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i16 %val seq_cst
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umax_i32_seq_cst(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i32_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i32_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i32_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB74_2
+; RV32I-NEXT: .LBB74_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB74_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB74_4
+; RV32I-NEXT: .LBB74_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu s1, a1, .LBB74_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB74_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB74_1
+; RV32I-NEXT: .LBB74_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i32_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i32_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.w.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i32_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB74_2
+; RV64I-NEXT: .LBB74_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB74_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB74_4
+; RV64I-NEXT: .LBB74_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s2, a0, .LBB74_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB74_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB74_1
+; RV64I-NEXT: .LBB74_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i32 %val seq_cst
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umax_i64_seq_cst(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umax_i64_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB75_2
+; RV32IA-ZABHA-NEXT: .LBB75_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 5
+; RV32IA-ZABHA-NEXT: li a5, 5
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB75_7
+; RV32IA-ZABHA-NEXT: .LBB75_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB75_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s2, a1
+; RV32IA-ZABHA-NEXT: j .LBB75_5
+; RV32IA-ZABHA-NEXT: .LBB75_4: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, s1, a4
+; RV32IA-ZABHA-NEXT: .LBB75_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB75_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB75_1
+; RV32IA-ZABHA-NEXT: .LBB75_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umax_i64_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB75_2
+; RV32IA-NEXT: .LBB75_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 5
+; RV32IA-NEXT: li a5, 5
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB75_7
+; RV32IA-NEXT: .LBB75_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB75_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-NEXT: sltu a0, s2, a1
+; RV32IA-NEXT: j .LBB75_5
+; RV32IA-NEXT: .LBB75_4: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-NEXT: sltu a0, s1, a4
+; RV32IA-NEXT: .LBB75_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB75_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB75_1
+; RV32IA-NEXT: .LBB75_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umax_i64_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB75_2
+; RV32I-NEXT: .LBB75_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: li a5, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB75_7
+; RV32I-NEXT: .LBB75_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB75_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32I-NEXT: sltu a0, s2, a1
+; RV32I-NEXT: j .LBB75_5
+; RV32I-NEXT: .LBB75_4: # in Loop: Header=BB75_2 Depth=1
+; RV32I-NEXT: sltu a0, s1, a4
+; RV32I-NEXT: .LBB75_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB75_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB75_1
+; RV32I-NEXT: .LBB75_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umax_i64_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amomaxu.d.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umax_i64_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amomaxu.d.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umax_i64_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB75_2
+; RV64I-NEXT: .LBB75_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB75_4
+; RV64I-NEXT: .LBB75_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu s1, a1, .LBB75_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB75_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB75_1
+; RV64I-NEXT: .LBB75_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umax ptr %ptr, i64 %val seq_cst
+ ret i64 %res
+}
+
+define i8 @atomicrmw_umin_i8_seq_cst(ptr %ptr, i8 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.b.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: li a2, 255
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: zext.b a1, a1
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB76_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aqrl a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB76_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB76_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB76_3: # in Loop: Header=BB76_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB76_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_1
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: zext.b s2, s1
+; RV32I-NEXT: j .LBB76_2
+; RV32I-NEXT: .LBB76_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB76_2 Depth=1
+; RV32I-NEXT: sb a1, 15(sp)
+; RV32I-NEXT: addi a1, sp, 15
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_1
+; RV32I-NEXT: lbu a1, 15(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB76_4
+; RV32I-NEXT: .LBB76_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: zext.b a0, a1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s2, .LBB76_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB76_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB76_1
+; RV32I-NEXT: .LBB76_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.b.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: li a2, 255
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: zext.b a1, a1
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB76_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aqrl a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB76_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB76_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB76_3: # in Loop: Header=BB76_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB76_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i8_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_1
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: zext.b s2, s1
+; RV64I-NEXT: j .LBB76_2
+; RV64I-NEXT: .LBB76_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB76_2 Depth=1
+; RV64I-NEXT: sb a1, 15(sp)
+; RV64I-NEXT: addi a1, sp, 15
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_1
+; RV64I-NEXT: lbu a1, 15(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB76_4
+; RV64I-NEXT: .LBB76_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: zext.b a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB76_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB76_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB76_1
+; RV64I-NEXT: .LBB76_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i8 %val seq_cst
+ ret i8 %res
+}
+
+define i16 @atomicrmw_umin_i16_seq_cst(ptr %ptr, i16 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.h.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: lui a2, 16
+; RV32IA-NEXT: addi a2, a2, -1
+; RV32IA-NEXT: andi a3, a0, -4
+; RV32IA-NEXT: andi a0, a0, 3
+; RV32IA-NEXT: slli a0, a0, 3
+; RV32IA-NEXT: and a1, a1, a2
+; RV32IA-NEXT: sll a2, a2, a0
+; RV32IA-NEXT: sll a1, a1, a0
+; RV32IA-NEXT: .LBB77_1: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: lr.w.aqrl a4, (a3)
+; RV32IA-NEXT: and a5, a4, a2
+; RV32IA-NEXT: mv a6, a4
+; RV32IA-NEXT: bgeu a1, a5, .LBB77_3
+; RV32IA-NEXT: # %bb.2: # in Loop: Header=BB77_1 Depth=1
+; RV32IA-NEXT: xor a6, a4, a1
+; RV32IA-NEXT: and a6, a6, a2
+; RV32IA-NEXT: xor a6, a4, a6
+; RV32IA-NEXT: .LBB77_3: # in Loop: Header=BB77_1 Depth=1
+; RV32IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV32IA-NEXT: bnez a6, .LBB77_1
+; RV32IA-NEXT: # %bb.4:
+; RV32IA-NEXT: srl a0, a4, a0
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_2
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: lui s2, 16
+; RV32I-NEXT: addi s2, s2, -1
+; RV32I-NEXT: and s3, s1, s2
+; RV32I-NEXT: j .LBB77_2
+; RV32I-NEXT: .LBB77_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB77_2 Depth=1
+; RV32I-NEXT: sh a1, 10(sp)
+; RV32I-NEXT: addi a1, sp, 10
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_2
+; RV32I-NEXT: lh a1, 10(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB77_4
+; RV32I-NEXT: .LBB77_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: and a0, a1, s2
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a0, s3, .LBB77_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB77_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB77_1
+; RV32I-NEXT: .LBB77_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.h.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: lui a2, 16
+; RV64IA-NEXT: addi a2, a2, -1
+; RV64IA-NEXT: andi a3, a0, -4
+; RV64IA-NEXT: andi a0, a0, 3
+; RV64IA-NEXT: slli a0, a0, 3
+; RV64IA-NEXT: and a1, a1, a2
+; RV64IA-NEXT: sllw a2, a2, a0
+; RV64IA-NEXT: sllw a1, a1, a0
+; RV64IA-NEXT: .LBB77_1: # =>This Inner Loop Header: Depth=1
+; RV64IA-NEXT: lr.w.aqrl a4, (a3)
+; RV64IA-NEXT: and a5, a4, a2
+; RV64IA-NEXT: mv a6, a4
+; RV64IA-NEXT: bgeu a1, a5, .LBB77_3
+; RV64IA-NEXT: # %bb.2: # in Loop: Header=BB77_1 Depth=1
+; RV64IA-NEXT: xor a6, a4, a1
+; RV64IA-NEXT: and a6, a6, a2
+; RV64IA-NEXT: xor a6, a4, a6
+; RV64IA-NEXT: .LBB77_3: # in Loop: Header=BB77_1 Depth=1
+; RV64IA-NEXT: sc.w.rl a6, a6, (a3)
+; RV64IA-NEXT: bnez a6, .LBB77_1
+; RV64IA-NEXT: # %bb.4:
+; RV64IA-NEXT: srlw a0, a4, a0
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i16_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_2
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: lui s2, 16
+; RV64I-NEXT: addi s2, s2, -1
+; RV64I-NEXT: and s3, s1, s2
+; RV64I-NEXT: j .LBB77_2
+; RV64I-NEXT: .LBB77_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB77_2 Depth=1
+; RV64I-NEXT: sh a1, 6(sp)
+; RV64I-NEXT: addi a1, sp, 6
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_2
+; RV64I-NEXT: lh a1, 6(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB77_4
+; RV64I-NEXT: .LBB77_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: and a0, a1, s2
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s3, .LBB77_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB77_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB77_1
+; RV64I-NEXT: .LBB77_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i16 %val seq_cst
+ ret i16 %res
+}
+
+define i32 @atomicrmw_umin_i32_seq_cst(ptr %ptr, i32 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i32_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: amominu.w.aqrl a0, a1, (a0)
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i32_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: amominu.w.aqrl a0, a1, (a0)
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i32_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_4
+; RV32I-NEXT: mv a1, a0
+; RV32I-NEXT: j .LBB78_2
+; RV32I-NEXT: .LBB78_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB78_2 Depth=1
+; RV32I-NEXT: sw a1, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a3, 5
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_4
+; RV32I-NEXT: lw a1, 0(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB78_4
+; RV32I-NEXT: .LBB78_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: mv a2, a1
+; RV32I-NEXT: bltu a1, s1, .LBB78_1
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB78_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: j .LBB78_1
+; RV32I-NEXT: .LBB78_4: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a1
+; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 16
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i32_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.w.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i32_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.w.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i32_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -48
+; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_4
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: sext.w s2, s1
+; RV64I-NEXT: j .LBB78_2
+; RV64I-NEXT: .LBB78_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB78_2 Depth=1
+; RV64I-NEXT: sw a1, 12(sp)
+; RV64I-NEXT: addi a1, sp, 12
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_4
+; RV64I-NEXT: lw a1, 12(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB78_4
+; RV64I-NEXT: .LBB78_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: sext.w a0, a1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a0, s2, .LBB78_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB78_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB78_1
+; RV64I-NEXT: .LBB78_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 48
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i32 %val seq_cst
+ ret i32 %res
+}
+
+define i64 @atomicrmw_umin_i64_seq_cst(ptr %ptr, i64 %val) nounwind {
+; RV32IA-ZABHA-LABEL: atomicrmw_umin_i64_seq_cst:
+; RV32IA-ZABHA: # %bb.0:
+; RV32IA-ZABHA-NEXT: addi sp, sp, -32
+; RV32IA-ZABHA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-ZABHA-NEXT: mv s0, a0
+; RV32IA-ZABHA-NEXT: mv s1, a1
+; RV32IA-ZABHA-NEXT: mv s2, a2
+; RV32IA-ZABHA-NEXT: mv s3, sp
+; RV32IA-ZABHA-NEXT: li a1, 0
+; RV32IA-ZABHA-NEXT: call __atomic_load_8
+; RV32IA-ZABHA-NEXT: mv a4, a0
+; RV32IA-ZABHA-NEXT: j .LBB79_2
+; RV32IA-ZABHA-NEXT: .LBB79_1: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-ZABHA-NEXT: sw a1, 4(s3)
+; RV32IA-ZABHA-NEXT: sw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: mv a1, sp
+; RV32IA-ZABHA-NEXT: li a4, 5
+; RV32IA-ZABHA-NEXT: li a5, 5
+; RV32IA-ZABHA-NEXT: mv a0, s0
+; RV32IA-ZABHA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-ZABHA-NEXT: lw a4, 0(sp)
+; RV32IA-ZABHA-NEXT: lw a1, 4(sp)
+; RV32IA-ZABHA-NEXT: xori a0, a0, 1
+; RV32IA-ZABHA-NEXT: beqz a0, .LBB79_7
+; RV32IA-ZABHA-NEXT: .LBB79_2: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-ZABHA-NEXT: beq a1, s2, .LBB79_4
+; RV32IA-ZABHA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a1, s2
+; RV32IA-ZABHA-NEXT: j .LBB79_5
+; RV32IA-ZABHA-NEXT: .LBB79_4: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-ZABHA-NEXT: sltu a0, a4, s1
+; RV32IA-ZABHA-NEXT: .LBB79_5: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, a4
+; RV32IA-ZABHA-NEXT: mv a3, a1
+; RV32IA-ZABHA-NEXT: bnez a0, .LBB79_1
+; RV32IA-ZABHA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-ZABHA-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-ZABHA-NEXT: mv a2, s1
+; RV32IA-ZABHA-NEXT: mv a3, s2
+; RV32IA-ZABHA-NEXT: j .LBB79_1
+; RV32IA-ZABHA-NEXT: .LBB79_7: # %atomicrmw.end
+; RV32IA-ZABHA-NEXT: mv a0, a4
+; RV32IA-ZABHA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-ZABHA-NEXT: addi sp, sp, 32
+; RV32IA-ZABHA-NEXT: ret
+;
+; RV32IA-LABEL: atomicrmw_umin_i64_seq_cst:
+; RV32IA: # %bb.0:
+; RV32IA-NEXT: addi sp, sp, -32
+; RV32IA-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32IA-NEXT: mv s0, a0
+; RV32IA-NEXT: mv s1, a1
+; RV32IA-NEXT: mv s2, a2
+; RV32IA-NEXT: mv s3, sp
+; RV32IA-NEXT: li a1, 0
+; RV32IA-NEXT: call __atomic_load_8
+; RV32IA-NEXT: mv a4, a0
+; RV32IA-NEXT: j .LBB79_2
+; RV32IA-NEXT: .LBB79_1: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-NEXT: sw a1, 4(s3)
+; RV32IA-NEXT: sw a4, 0(sp)
+; RV32IA-NEXT: mv a1, sp
+; RV32IA-NEXT: li a4, 5
+; RV32IA-NEXT: li a5, 5
+; RV32IA-NEXT: mv a0, s0
+; RV32IA-NEXT: call __atomic_compare_exchange_8
+; RV32IA-NEXT: lw a4, 0(sp)
+; RV32IA-NEXT: lw a1, 4(sp)
+; RV32IA-NEXT: xori a0, a0, 1
+; RV32IA-NEXT: beqz a0, .LBB79_7
+; RV32IA-NEXT: .LBB79_2: # %atomicrmw.start
+; RV32IA-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32IA-NEXT: beq a1, s2, .LBB79_4
+; RV32IA-NEXT: # %bb.3: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-NEXT: sltu a0, a1, s2
+; RV32IA-NEXT: j .LBB79_5
+; RV32IA-NEXT: .LBB79_4: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-NEXT: sltu a0, a4, s1
+; RV32IA-NEXT: .LBB79_5: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-NEXT: mv a2, a4
+; RV32IA-NEXT: mv a3, a1
+; RV32IA-NEXT: bnez a0, .LBB79_1
+; RV32IA-NEXT: # %bb.6: # %atomicrmw.start
+; RV32IA-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32IA-NEXT: mv a2, s1
+; RV32IA-NEXT: mv a3, s2
+; RV32IA-NEXT: j .LBB79_1
+; RV32IA-NEXT: .LBB79_7: # %atomicrmw.end
+; RV32IA-NEXT: mv a0, a4
+; RV32IA-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32IA-NEXT: addi sp, sp, 32
+; RV32IA-NEXT: ret
+;
+; RV32I-LABEL: atomicrmw_umin_i64_seq_cst:
+; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -32
+; RV32I-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s2, 16(sp) # 4-byte Folded Spill
+; RV32I-NEXT: sw s3, 12(sp) # 4-byte Folded Spill
+; RV32I-NEXT: mv s0, a0
+; RV32I-NEXT: mv s1, a1
+; RV32I-NEXT: mv s2, a2
+; RV32I-NEXT: mv s3, sp
+; RV32I-NEXT: li a1, 0
+; RV32I-NEXT: call __atomic_load_8
+; RV32I-NEXT: mv a4, a0
+; RV32I-NEXT: j .LBB79_2
+; RV32I-NEXT: .LBB79_1: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32I-NEXT: sw a1, 4(s3)
+; RV32I-NEXT: sw a4, 0(sp)
+; RV32I-NEXT: mv a1, sp
+; RV32I-NEXT: li a4, 5
+; RV32I-NEXT: li a5, 5
+; RV32I-NEXT: mv a0, s0
+; RV32I-NEXT: call __atomic_compare_exchange_8
+; RV32I-NEXT: lw a4, 0(sp)
+; RV32I-NEXT: lw a1, 4(sp)
+; RV32I-NEXT: xori a0, a0, 1
+; RV32I-NEXT: beqz a0, .LBB79_7
+; RV32I-NEXT: .LBB79_2: # %atomicrmw.start
+; RV32I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV32I-NEXT: beq a1, s2, .LBB79_4
+; RV32I-NEXT: # %bb.3: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32I-NEXT: sltu a0, a1, s2
+; RV32I-NEXT: j .LBB79_5
+; RV32I-NEXT: .LBB79_4: # in Loop: Header=BB79_2 Depth=1
+; RV32I-NEXT: sltu a0, a4, s1
+; RV32I-NEXT: .LBB79_5: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32I-NEXT: mv a2, a4
+; RV32I-NEXT: mv a3, a1
+; RV32I-NEXT: bnez a0, .LBB79_1
+; RV32I-NEXT: # %bb.6: # %atomicrmw.start
+; RV32I-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV32I-NEXT: mv a2, s1
+; RV32I-NEXT: mv a3, s2
+; RV32I-NEXT: j .LBB79_1
+; RV32I-NEXT: .LBB79_7: # %atomicrmw.end
+; RV32I-NEXT: mv a0, a4
+; RV32I-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s2, 16(sp) # 4-byte Folded Reload
+; RV32I-NEXT: lw s3, 12(sp) # 4-byte Folded Reload
+; RV32I-NEXT: addi sp, sp, 32
+; RV32I-NEXT: ret
+;
+; RV64IA-ZABHA-LABEL: atomicrmw_umin_i64_seq_cst:
+; RV64IA-ZABHA: # %bb.0:
+; RV64IA-ZABHA-NEXT: amominu.d.aqrl a0, a1, (a0)
+; RV64IA-ZABHA-NEXT: ret
+;
+; RV64IA-LABEL: atomicrmw_umin_i64_seq_cst:
+; RV64IA: # %bb.0:
+; RV64IA-NEXT: amominu.d.aqrl a0, a1, (a0)
+; RV64IA-NEXT: ret
+;
+; RV64I-LABEL: atomicrmw_umin_i64_seq_cst:
+; RV64I: # %bb.0:
+; RV64I-NEXT: addi sp, sp, -32
+; RV64I-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
+; RV64I-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
+; RV64I-NEXT: mv s0, a0
+; RV64I-NEXT: mv s1, a1
+; RV64I-NEXT: li a1, 0
+; RV64I-NEXT: call __atomic_load_8
+; RV64I-NEXT: mv a1, a0
+; RV64I-NEXT: j .LBB79_2
+; RV64I-NEXT: .LBB79_1: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV64I-NEXT: sd a1, 0(sp)
+; RV64I-NEXT: mv a1, sp
+; RV64I-NEXT: li a3, 5
+; RV64I-NEXT: li a4, 5
+; RV64I-NEXT: mv a0, s0
+; RV64I-NEXT: call __atomic_compare_exchange_8
+; RV64I-NEXT: ld a1, 0(sp)
+; RV64I-NEXT: xori a0, a0, 1
+; RV64I-NEXT: beqz a0, .LBB79_4
+; RV64I-NEXT: .LBB79_2: # %atomicrmw.start
+; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
+; RV64I-NEXT: mv a2, a1
+; RV64I-NEXT: bltu a1, s1, .LBB79_1
+; RV64I-NEXT: # %bb.3: # %atomicrmw.start
+; RV64I-NEXT: # in Loop: Header=BB79_2 Depth=1
+; RV64I-NEXT: mv a2, s1
+; RV64I-NEXT: j .LBB79_1
+; RV64I-NEXT: .LBB79_4: # %atomicrmw.end
+; RV64I-NEXT: mv a0, a1
+; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
+; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
+; RV64I-NEXT: addi sp, sp, 32
+; RV64I-NEXT: ret
+ %res = atomicrmw umin ptr %ptr, i64 %val seq_cst
+ ret i64 %res
+}
+
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
index 488c1c6f1fe45..d947ba524187e 100644
--- a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer-info-validation.mir
@@ -267,17 +267,20 @@
# DEBUG-NEXT: .. the first uncovered type index: 2, OK
# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
# DEBUG-NEXT: G_ATOMICRMW_MAX (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_ATOMICRMW_MIN (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
+# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_ATOMICRMW_UMAX (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
+# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_ATOMICRMW_UMIN (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
-# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
+# DEBUG-NEXT: .. opcode {{[0-9]+}} is aliased to {{[0-9]+}}
+# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_ATOMICRMW_FADD (opcode {{[0-9]+}}): 2 type indices
# DEBUG-NEXT: .. type index coverage check SKIPPED: no rules defined
# DEBUG-NEXT: .. imm index coverage check SKIPPED: no rules defined
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-max-min-umax-umin-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-max-min-umax-umin-rv32.mir
new file mode 100644
index 0000000000000..80e4abab2cc7f
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-max-min-umax-umin-rv32.mir
@@ -0,0 +1,367 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -mattr=+a,+zabha -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=RV32IA-ZABHA
+# RUN: llc -mtriple=riscv32 -mattr=+a -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=RV32IA
+---
+name: atomicrmw_max_i8_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_max_i8_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_max_i8_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s8) = G_TRUNC %1(s32)
+ %3:_(s8) = G_ATOMICRMW_MAX %0(p0), %2 :: (load store monotonic (s8))
+ %4:_(s32) = G_ANYEXT %3(s8)
+ $x10 = COPY %4(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_max_i16_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_max_i16_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_max_i16_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s16) = G_TRUNC %1(s32)
+ %3:_(s16) = G_ATOMICRMW_MAX %0(p0), %2 :: (load store monotonic (s16))
+ %4:_(s32) = G_ANYEXT %3(s16)
+ $x10 = COPY %4(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_max_i32_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_max_i32_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_max_i32_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s32) = G_ATOMICRMW_MAX %0(p0), %1 :: (load store monotonic (s32))
+ $x10 = COPY %2(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_min_i8_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_min_i8_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_min_i8_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s8) = G_TRUNC %1(s32)
+ %3:_(s8) = G_ATOMICRMW_MIN %0(p0), %2 :: (load store monotonic (s8))
+ %4:_(s32) = G_ANYEXT %3(s8)
+ $x10 = COPY %4(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_min_i16_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_min_i16_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_min_i16_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s16) = G_TRUNC %1(s32)
+ %3:_(s16) = G_ATOMICRMW_MIN %0(p0), %2 :: (load store monotonic (s16))
+ %4:_(s32) = G_ANYEXT %3(s16)
+ $x10 = COPY %4(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_min_i32_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_min_i32_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_min_i32_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s32) = G_ATOMICRMW_MIN %0(p0), %1 :: (load store monotonic (s32))
+ $x10 = COPY %2(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umax_i8_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_umax_i8_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_umax_i8_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s8) = G_TRUNC %1(s32)
+ %3:_(s8) = G_ATOMICRMW_UMAX %0(p0), %2 :: (load store monotonic (s8))
+ %4:_(s32) = G_ANYEXT %3(s8)
+ $x10 = COPY %4(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umax_i16_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_umax_i16_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_umax_i16_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s16) = G_TRUNC %1(s32)
+ %3:_(s16) = G_ATOMICRMW_UMAX %0(p0), %2 :: (load store monotonic (s16))
+ %4:_(s32) = G_ANYEXT %3(s16)
+ $x10 = COPY %4(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umax_i32_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_umax_i32_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_umax_i32_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s32) = G_ATOMICRMW_UMAX %0(p0), %1 :: (load store monotonic (s32))
+ $x10 = COPY %2(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umin_i8_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_umin_i8_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_umin_i8_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s8) = G_TRUNC %1(s32)
+ %3:_(s8) = G_ATOMICRMW_UMIN %0(p0), %2 :: (load store monotonic (s8))
+ %4:_(s32) = G_ANYEXT %3(s8)
+ $x10 = COPY %4(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umin_i16_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_umin_i16_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_umin_i16_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s16) = G_TRUNC %1(s32)
+ %3:_(s16) = G_ATOMICRMW_UMIN %0(p0), %2 :: (load store monotonic (s16))
+ %4:_(s32) = G_ANYEXT %3(s16)
+ $x10 = COPY %4(s32)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umin_i32_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV32IA-ZABHA-LABEL: name: atomicrmw_umin_i32_monotonic
+ ; RV32IA-ZABHA: liveins: $x10, $x11
+ ; RV32IA-ZABHA-NEXT: {{ $}}
+ ; RV32IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-ZABHA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV32IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s32)
+ ; RV32IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV32IA-LABEL: name: atomicrmw_umin_i32_monotonic
+ ; RV32IA: liveins: $x10, $x11
+ ; RV32IA-NEXT: {{ $}}
+ ; RV32IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV32IA-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $x11
+ ; RV32IA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s32) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV32IA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s32)
+ ; RV32IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s32) = COPY $x11
+ %2:_(s32) = G_ATOMICRMW_UMIN %0(p0), %1 :: (load store monotonic (s32))
+ $x10 = COPY %2(s32)
+ PseudoRET implicit $x10
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-max-min-umax-umin-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-max-min-umax-umin-rv64.mir
new file mode 100644
index 0000000000000..475a77f71f149
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-atomicrmw-max-min-umax-umin-rv64.mir
@@ -0,0 +1,491 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv64 -mattr=+a,+zabha -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=RV64IA-ZABHA
+# RUN: llc -mtriple=riscv64 -mattr=+a -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=RV64IA
+---
+name: atomicrmw_max_i8_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_max_i8_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_max_i8_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s8) = G_TRUNC %1(s64)
+ %3:_(s8) = G_ATOMICRMW_MAX %0(p0), %2 :: (load store monotonic (s8))
+ %4:_(s64) = G_ANYEXT %3(s8)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_max_i16_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_max_i16_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_max_i16_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s16) = G_TRUNC %1(s64)
+ %3:_(s16) = G_ATOMICRMW_MAX %0(p0), %2 :: (load store monotonic (s16))
+ %4:_(s64) = G_ANYEXT %3(s16)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_max_i32_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_max_i32_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_max_i32_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s32) = G_TRUNC %1(s64)
+ %3:_(s32) = G_ATOMICRMW_MAX %0(p0), %2 :: (load store monotonic (s32))
+ %4:_(s64) = G_ANYEXT %3(s32)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_max_i64_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_max_i64_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s64))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_max_i64_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_MAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_MAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s64))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_MAX]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s64) = G_ATOMICRMW_MAX %0(p0), %1 :: (load store monotonic (s64))
+ $x10 = COPY %2(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_min_i8_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_min_i8_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_min_i8_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s8) = G_TRUNC %1(s64)
+ %3:_(s8) = G_ATOMICRMW_MIN %0(p0), %2 :: (load store monotonic (s8))
+ %4:_(s64) = G_ANYEXT %3(s8)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_min_i16_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_min_i16_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_min_i16_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s16) = G_TRUNC %1(s64)
+ %3:_(s16) = G_ATOMICRMW_MIN %0(p0), %2 :: (load store monotonic (s16))
+ %4:_(s64) = G_ANYEXT %3(s16)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_min_i32_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_min_i32_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_min_i32_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s32) = G_TRUNC %1(s64)
+ %3:_(s32) = G_ATOMICRMW_MIN %0(p0), %2 :: (load store monotonic (s32))
+ %4:_(s64) = G_ANYEXT %3(s32)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_min_i64_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_min_i64_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s64))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_min_i64_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_MIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_MIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s64))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_MIN]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s64) = G_ATOMICRMW_MIN %0(p0), %1 :: (load store monotonic (s64))
+ $x10 = COPY %2(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umax_i8_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_umax_i8_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_umax_i8_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s8) = G_TRUNC %1(s64)
+ %3:_(s8) = G_ATOMICRMW_UMAX %0(p0), %2 :: (load store monotonic (s8))
+ %4:_(s64) = G_ANYEXT %3(s8)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umax_i16_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_umax_i16_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_umax_i16_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s16) = G_TRUNC %1(s64)
+ %3:_(s16) = G_ATOMICRMW_UMAX %0(p0), %2 :: (load store monotonic (s16))
+ %4:_(s64) = G_ANYEXT %3(s16)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umax_i32_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_umax_i32_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_umax_i32_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s32) = G_TRUNC %1(s64)
+ %3:_(s32) = G_ATOMICRMW_UMAX %0(p0), %2 :: (load store monotonic (s32))
+ %4:_(s64) = G_ANYEXT %3(s32)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umax_i64_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_umax_i64_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s64))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_umax_i64_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_UMAX:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMAX [[COPY]](p0), [[COPY1]] :: (load store monotonic (s64))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_UMAX]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s64) = G_ATOMICRMW_UMAX %0(p0), %1 :: (load store monotonic (s64))
+ $x10 = COPY %2(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umin_i8_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_umin_i8_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_umin_i8_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s8))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s8) = G_TRUNC %1(s64)
+ %3:_(s8) = G_ATOMICRMW_UMIN %0(p0), %2 :: (load store monotonic (s8))
+ %4:_(s64) = G_ANYEXT %3(s8)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umin_i16_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_umin_i16_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_umin_i16_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s16))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s16) = G_TRUNC %1(s64)
+ %3:_(s16) = G_ATOMICRMW_UMIN %0(p0), %2 :: (load store monotonic (s16))
+ %4:_(s64) = G_ANYEXT %3(s16)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umin_i32_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_umin_i32_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_umin_i32_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s32))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s32) = G_TRUNC %1(s64)
+ %3:_(s32) = G_ATOMICRMW_UMIN %0(p0), %2 :: (load store monotonic (s32))
+ %4:_(s64) = G_ANYEXT %3(s32)
+ $x10 = COPY %4(s64)
+ PseudoRET implicit $x10
+...
+---
+name: atomicrmw_umin_i64_monotonic
+body: |
+ bb.0.entry:
+ liveins: $x10, $x11
+
+ ; RV64IA-ZABHA-LABEL: name: atomicrmw_umin_i64_monotonic
+ ; RV64IA-ZABHA: liveins: $x10, $x11
+ ; RV64IA-ZABHA-NEXT: {{ $}}
+ ; RV64IA-ZABHA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-ZABHA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-ZABHA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s64))
+ ; RV64IA-ZABHA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s64)
+ ; RV64IA-ZABHA-NEXT: PseudoRET implicit $x10
+ ;
+ ; RV64IA-LABEL: name: atomicrmw_umin_i64_monotonic
+ ; RV64IA: liveins: $x10, $x11
+ ; RV64IA-NEXT: {{ $}}
+ ; RV64IA-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x10
+ ; RV64IA-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x11
+ ; RV64IA-NEXT: [[ATOMICRMW_UMIN:%[0-9]+]]:_(s64) = G_ATOMICRMW_UMIN [[COPY]](p0), [[COPY1]] :: (load store monotonic (s64))
+ ; RV64IA-NEXT: $x10 = COPY [[ATOMICRMW_UMIN]](s64)
+ ; RV64IA-NEXT: PseudoRET implicit $x10
+ %0:_(p0) = COPY $x10
+ %1:_(s64) = COPY $x11
+ %2:_(s64) = G_ATOMICRMW_UMIN %0(p0), %1 :: (load store monotonic (s64))
+ $x10 = COPY %2(s64)
+ PseudoRET implicit $x10
+...
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