[llvm] [AMDGPU] Fix performFMACombine FDOT2 fold ignoring denormal mode and signed zero (PR #205101)

[Wooseok Lee via llvm-commits]

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@@ -17937,9 +17937,18 @@ SDValue SITargetLowering::performFMACombine(SDNode *N,
       Op2.getOpcode() != ISD::FP_EXTEND)
     return SDValue();
 
-  // fdot2_f32_f16 always flushes fp32 denormal operand and output to zero,
-  // regardless of the denorm mode setting. Therefore,
-  // fp-contract is sufficient to allow generating fdot2.
+  // fdot2_f32_f16 unconditionally flushes the f32 accumulator input and
+  // output to zero, ignoring the hardware mode register. Only fold when the
+  // function's denormal-fp-math-f32 is PreserveSign for both inputs and
+  // outputs. IEEE and Dynamic are excluded because the mode requests denormal
+  // preservation.
+  const DenormalMode FP32DenormMode =
+      DAG.getMachineFunction().getDenormalMode(APFloat::IEEEsingle());
+  if (FP32DenormMode.Input != DenormalMode::PreserveSign ||
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wooseoklee wrote:

As Matt guided, I tested on real hardware and my assumption about the preserving the sign of zero of v_fma_mix instruction proves to be wrong. Both v_fma_mix_f32 and v_dotc2 under PreserveSign hardware flushes it to +0.0. Sorry for the confusion.

Then, we will just focus on the denormal, which makes the original gating with PreserveSign correct. I will remove the nsz flag checking code. 

https://github.com/llvm/llvm-project/pull/205101