[llvm] [NFC][AMDGPU] Remove reundant run lines from two test cases (PR #211575)
Shilei Tian via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 23 08:48:47 PDT 2026
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/211575
>From 6014b01dc0fe0a2ce6f26f09e26709fde6622e72 Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Thu, 23 Jul 2026 11:09:31 -0400
Subject: [PATCH] [NFC][AMDGPU] Remove reundant run lines from two test cases
---
.../llvm.amdgcn.raw.atomic.buffer.load.ll | 44 -------------------
.../llvm.amdgcn.raw.ptr.atomic.buffer.load.ll | 44 -------------------
2 files changed, 88 deletions(-)
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
index 2ebe047a0be59..edc28631f47b3 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.atomic.buffer.load.ll
@@ -1,8 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX11,GFX11-SDAG-TRUE16
; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX11,GFX11-SDAG-FAKE16
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL-TRUE16
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL-FAKE16
; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL
; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL
; RUN: llc < %s -mtriple=amdgpu12.50 -mattr=+real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX12,GFX12-SDAG-TRUE16
@@ -713,48 +711,6 @@ define amdgpu_kernel void @raw_atomic_buffer_load_v4i16(<4 x i32> %addr) {
; GFX11-SDAG-FAKE16-NEXT: ; %bb.2: ; %bb2
; GFX11-SDAG-FAKE16-NEXT: s_endpgm
;
-; GFX11-GISEL-TRUE16-LABEL: raw_atomic_buffer_load_v4i16:
-; GFX11-GISEL-TRUE16: ; %bb.0: ; %bb
-; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s4, 0
-; GFX11-GISEL-TRUE16-NEXT: .LBB7_1: ; %bb1
-; GFX11-GISEL-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-GISEL-TRUE16-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc
-; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-GISEL-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
-; GFX11-GISEL-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-GISEL-TRUE16-NEXT: s_pack_ll_b32_b16 s5, s5, s6
-; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, s5, v0
-; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4
-; GFX11-GISEL-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
-; GFX11-GISEL-TRUE16-NEXT: s_cbranch_execnz .LBB7_1
-; GFX11-GISEL-TRUE16-NEXT: ; %bb.2: ; %bb2
-; GFX11-GISEL-TRUE16-NEXT: s_endpgm
-;
-; GFX11-GISEL-FAKE16-LABEL: raw_atomic_buffer_load_v4i16:
-; GFX11-GISEL-FAKE16: ; %bb.0: ; %bb
-; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s4, 0
-; GFX11-GISEL-FAKE16-NEXT: .LBB7_1: ; %bb1
-; GFX11-GISEL-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-GISEL-FAKE16-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc
-; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-GISEL-FAKE16-NEXT: v_readfirstlane_b32 s5, v1
-; GFX11-GISEL-FAKE16-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-GISEL-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s6
-; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-GISEL-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, s5, v0
-; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s4, vcc_lo, s4
-; GFX11-GISEL-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
-; GFX11-GISEL-FAKE16-NEXT: s_cbranch_execnz .LBB7_1
-; GFX11-GISEL-FAKE16-NEXT: ; %bb.2: ; %bb2
-; GFX11-GISEL-FAKE16-NEXT: s_endpgm
-;
; GFX11-GISEL-LABEL: raw_atomic_buffer_load_v4i16:
; GFX11-GISEL: ; %bb.0: ; %bb
; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
index 509be564ff495..b15e0495408cd 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
@@ -1,8 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX11,GFX11-SDAG-TRUE16
; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX11,GFX11-SDAG-FAKE16
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL-TRUE16
-; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL-FAKE16
; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=+real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL
; RUN: llc < %s -mtriple=amdgpu11.00 -mattr=-real-true16 -global-isel=1 | FileCheck %s -check-prefixes=GFX11,GFX11-GISEL
; RUN: llc < %s -mtriple=amdgpu12.50 -mattr=+real-true16 -global-isel=0 | FileCheck %s -check-prefixes=GFX12,GFX12-SDAG-TRUE16
@@ -713,48 +711,6 @@ define amdgpu_kernel void @raw_ptr_atomic_buffer_load_v4i16(ptr addrspace(8) %pt
; GFX11-SDAG-FAKE16-NEXT: ; %bb.2: ; %bb2
; GFX11-SDAG-FAKE16-NEXT: s_endpgm
;
-; GFX11-GISEL-TRUE16-LABEL: raw_ptr_atomic_buffer_load_v4i16:
-; GFX11-GISEL-TRUE16: ; %bb.0: ; %bb
-; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-GISEL-TRUE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX11-GISEL-TRUE16-NEXT: s_mov_b32 s4, 0
-; GFX11-GISEL-TRUE16-NEXT: .LBB7_1: ; %bb1
-; GFX11-GISEL-TRUE16-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-GISEL-TRUE16-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc
-; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-GISEL-TRUE16-NEXT: v_readfirstlane_b32 s5, v1
-; GFX11-GISEL-TRUE16-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-GISEL-TRUE16-NEXT: s_pack_ll_b32_b16 s5, s5, s6
-; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-GISEL-TRUE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, s5, v0
-; GFX11-GISEL-TRUE16-NEXT: s_or_b32 s4, vcc_lo, s4
-; GFX11-GISEL-TRUE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
-; GFX11-GISEL-TRUE16-NEXT: s_cbranch_execnz .LBB7_1
-; GFX11-GISEL-TRUE16-NEXT: ; %bb.2: ; %bb2
-; GFX11-GISEL-TRUE16-NEXT: s_endpgm
-;
-; GFX11-GISEL-FAKE16-LABEL: raw_ptr_atomic_buffer_load_v4i16:
-; GFX11-GISEL-FAKE16: ; %bb.0: ; %bb
-; GFX11-GISEL-FAKE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
-; GFX11-GISEL-FAKE16-NEXT: v_and_b32_e32 v0, 0x3ff, v0
-; GFX11-GISEL-FAKE16-NEXT: s_mov_b32 s4, 0
-; GFX11-GISEL-FAKE16-NEXT: .LBB7_1: ; %bb1
-; GFX11-GISEL-FAKE16-NEXT: ; =>This Inner Loop Header: Depth=1
-; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
-; GFX11-GISEL-FAKE16-NEXT: buffer_load_b64 v[1:2], off, s[0:3], 0 offset:4 glc
-; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
-; GFX11-GISEL-FAKE16-NEXT: v_readfirstlane_b32 s5, v1
-; GFX11-GISEL-FAKE16-NEXT: v_readfirstlane_b32 s6, v2
-; GFX11-GISEL-FAKE16-NEXT: s_pack_ll_b32_b16 s5, s5, s6
-; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)
-; GFX11-GISEL-FAKE16-NEXT: v_cmp_ne_u32_e32 vcc_lo, s5, v0
-; GFX11-GISEL-FAKE16-NEXT: s_or_b32 s4, vcc_lo, s4
-; GFX11-GISEL-FAKE16-NEXT: s_and_not1_b32 exec_lo, exec_lo, s4
-; GFX11-GISEL-FAKE16-NEXT: s_cbranch_execnz .LBB7_1
-; GFX11-GISEL-FAKE16-NEXT: ; %bb.2: ; %bb2
-; GFX11-GISEL-FAKE16-NEXT: s_endpgm
-;
; GFX11-GISEL-LABEL: raw_ptr_atomic_buffer_load_v4i16:
; GFX11-GISEL: ; %bb.0: ; %bb
; GFX11-GISEL-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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