[clang] [llvm] [IR] Add fast-math flags to atomicrmw (PR #211267)
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Wed Jul 22 12:52:59 PDT 2026
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git-clang-format --diff origin/main HEAD --extensions c,h,cpp -- clang/test/CodeGen/fp-atomic-ops.c llvm/include/llvm/Bitcode/LLVMBitCodes.h llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h llvm/include/llvm/CodeGen/SelectionDAG.h llvm/include/llvm/IR/IRBuilder.h llvm/include/llvm/IR/Instructions.h llvm/include/llvm/IR/Operator.h llvm/include/llvm/Transforms/Utils/LowerAtomic.h llvm/lib/AsmParser/LLParser.cpp llvm/lib/Bitcode/Reader/BitcodeReader.cpp llvm/lib/Bitcode/Writer/BitcodeWriter.cpp llvm/lib/CodeGen/AtomicExpandPass.cpp llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp llvm/lib/IR/Instructions.cpp llvm/lib/IR/Operator.cpp llvm/lib/Transforms/Utils/LowerAtomic.cpp llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp llvm/unittests/IR/IRBuilderTest.cpp --diff_from_common_commit
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diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
index be83701d7..42103196e 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
@@ -1541,11 +1541,10 @@ public:
/// same type.
///
/// \return a MachineInstrBuilder for the newly created instruction.
- MachineInstrBuilder buildAtomicRMW(unsigned Opcode, const DstOp &OldValRes,
- const SrcOp &Addr, const SrcOp &Val,
- MachineMemOperand &MMO,
- std::optional<unsigned> Flags =
- std::nullopt);
+ MachineInstrBuilder
+ buildAtomicRMW(unsigned Opcode, const DstOp &OldValRes, const SrcOp &Addr,
+ const SrcOp &Val, MachineMemOperand &MMO,
+ std::optional<unsigned> Flags = std::nullopt);
/// Build and insert `OldValRes<def> = G_ATOMICRMW_XCHG Addr, Val, MMO`.
///
diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
index befdc5dd3..179369de2 100644
--- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -1395,9 +1395,9 @@ static int getDecodedBinaryOpcode(unsigned Val, Type *Ty) {
}
}
-static AtomicRMWInst::BinOp
-getDecodedRMWOperation(unsigned Val, bool &IsElementwise,
- bool &HasFastMathFlags) {
+static AtomicRMWInst::BinOp getDecodedRMWOperation(unsigned Val,
+ bool &IsElementwise,
+ bool &HasFastMathFlags) {
IsElementwise = Val & bitc::RMW_ELEMENTWISE_FLAG;
HasFastMathFlags = Val & bitc::RMW_FMF_FLAG;
switch (Val & ~(bitc::RMW_ELEMENTWISE_FLAG | bitc::RMW_FMF_FLAG)) {
@@ -6750,9 +6750,8 @@ Error BitcodeReader::parseFunctionBody(Function *F) {
bool IsElementwise = false;
bool HasFastMathFlags = false;
- const AtomicRMWInst::BinOp Operation =
- getDecodedRMWOperation(Record[OpNum++], IsElementwise,
- HasFastMathFlags);
+ const AtomicRMWInst::BinOp Operation = getDecodedRMWOperation(
+ Record[OpNum++], IsElementwise, HasFastMathFlags);
if (Operation < AtomicRMWInst::FIRST_BINOP ||
Operation > AtomicRMWInst::LAST_BINOP)
return error("Invalid atomicrmw record");
@@ -6769,7 +6768,7 @@ Error BitcodeReader::parseFunctionBody(Function *F) {
"Fast math flags indicator set for atomicrmw with no FMF");
if (!Val->getType()->isFPOrFPVectorTy())
return error("Fast-math-flags specified for atomicrmw without "
- "floating-point scalar or vector type");
+ "floating-point scalar or vector type");
}
const bool IsVol = Record[OpNum++];
diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
index db1680d67..ab48f56a2 100644
--- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -1783,7 +1783,8 @@ static uint64_t getOptimizationFlags(const Value *V) {
static unsigned getEncodedRMWOperation(const AtomicRMWInst &I) {
unsigned Encoding = 0;
switch (I.getOperation()) {
- default: llvm_unreachable("Unknown RMW operation!");
+ default:
+ llvm_unreachable("Unknown RMW operation!");
case AtomicRMWInst::Xchg:
Encoding = bitc::RMW_XCHG;
break;
diff --git a/llvm/lib/CodeGen/AtomicExpandPass.cpp b/llvm/lib/CodeGen/AtomicExpandPass.cpp
index b22faed87..4beabff2e 100644
--- a/llvm/lib/CodeGen/AtomicExpandPass.cpp
+++ b/llvm/lib/CodeGen/AtomicExpandPass.cpp
@@ -1033,8 +1033,7 @@ static Value *performMaskedAtomicOp(AtomicRMWInst::BinOp Op,
case AtomicRMWInst::Sub:
case AtomicRMWInst::Nand: {
// The other arithmetic ops need to be masked into place.
- Value *NewVal =
- buildAtomicRMWValue(Op, Builder, Loaded, Shifted_Inc, FMF);
+ Value *NewVal = buildAtomicRMWValue(Op, Builder, Loaded, Shifted_Inc, FMF);
Value *NewVal_Masked = Builder.CreateAnd(NewVal, PMV.Mask);
Value *Loaded_MaskOut = Builder.CreateAnd(Loaded, PMV.Inv_Mask);
Value *FinalVal = Builder.CreateOr(Loaded_MaskOut, NewVal_Masked);
@@ -1060,8 +1059,7 @@ static Value *performMaskedAtomicOp(AtomicRMWInst::BinOp Op,
// the original size, and expand out again after doing the
// operation. Bitcasts will be inserted for FP values.
Value *Loaded_Extract = extractMaskedValue(Builder, Loaded, PMV);
- Value *NewVal =
- buildAtomicRMWValue(Op, Builder, Loaded_Extract, Inc, FMF);
+ Value *NewVal = buildAtomicRMWValue(Op, Builder, Loaded_Extract, Inc, FMF);
Value *FinalVal = insertMaskedValue(Builder, Loaded, NewVal, PMV);
return FinalVal;
}
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
index 665c92745..f70efd6d0 100644
--- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
@@ -1078,9 +1078,8 @@ MachineIRBuilder::buildAtomicCmpXchg(const DstOp &OldValRes, const SrcOp &Addr,
}
MachineInstrBuilder MachineIRBuilder::buildAtomicRMW(
- unsigned Opcode, const DstOp &OldValRes,
- const SrcOp &Addr, const SrcOp &Val,
- MachineMemOperand &MMO, std::optional<unsigned> Flags) {
+ unsigned Opcode, const DstOp &OldValRes, const SrcOp &Addr,
+ const SrcOp &Val, MachineMemOperand &MMO, std::optional<unsigned> Flags) {
#ifndef NDEBUG
LLT OldValResTy = OldValRes.getLLTTy(*getMRI());
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 9d87537ef..fa8108396 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -5336,9 +5336,9 @@ void SelectionDAGBuilder::visitAtomicRMW(const AtomicRMWInst &I) {
if (auto *FPMO = dyn_cast<FPMathOperator>(&I))
NodeFlags.copyFMF(*FPMO);
- SDValue L = DAG.getAtomic(NT, dl, MemVT, InChain,
- getValue(I.getPointerOperand()),
- getValue(I.getValOperand()), MMO, NodeFlags);
+ SDValue L =
+ DAG.getAtomic(NT, dl, MemVT, InChain, getValue(I.getPointerOperand()),
+ getValue(I.getValOperand()), MMO, NodeFlags);
SDValue OutChain = L.getValue(1);
diff --git a/llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp b/llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp
index ad9d6c730..bbcdd6dd8 100644
--- a/llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp
+++ b/llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp
@@ -66,9 +66,9 @@ TEST_F(SelectionDAGNodeConstructionTest, AtomicRMWFlags) {
SDNodeFlags FewerFlags;
FewerFlags.setNoNaNs(true);
- SDValue SameAtomic = DAG->getAtomic(
- ISD::ATOMIC_LOAD_FADD, DL, MVT::f32, DAG->getEntryNode(), Ptr, Val, MMO,
- FewerFlags);
+ SDValue SameAtomic =
+ DAG->getAtomic(ISD::ATOMIC_LOAD_FADD, DL, MVT::f32, DAG->getEntryNode(),
+ Ptr, Val, MMO, FewerFlags);
EXPECT_EQ(Atomic, SameAtomic);
EXPECT_TRUE(SameAtomic->getFlags().hasNoNaNs());
EXPECT_FALSE(SameAtomic->getFlags().hasNoSignedZeros());
diff --git a/llvm/unittests/IR/IRBuilderTest.cpp b/llvm/unittests/IR/IRBuilderTest.cpp
index e5376489a..387409b75 100644
--- a/llvm/unittests/IR/IRBuilderTest.cpp
+++ b/llvm/unittests/IR/IRBuilderTest.cpp
@@ -876,8 +876,7 @@ TEST_F(IRBuilderTest, AtomicRMWFastMathFlags) {
Builder.setFastMathFlags(FMF);
AtomicRMWInst *RMW = Builder.CreateAtomicRMW(
- AtomicRMWInst::FAdd, AtomicGV, Val, Align(4),
- AtomicOrdering::Monotonic);
+ AtomicRMWInst::FAdd, AtomicGV, Val, Align(4), AtomicOrdering::Monotonic);
EXPECT_EQ(FMF, RMW->getFastMathFlags());
std::unique_ptr<AtomicRMWInst> Clone(cast<AtomicRMWInst>(RMW->clone()));
``````````
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https://github.com/llvm/llvm-project/pull/211267
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