[llvm] [DAGCombine] Push freeze through sra (PR #208749)

[Nikita Popov via llvm-commits]

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@@ -707,13 +707,13 @@ define amdgpu_kernel void @s_test_sdiv32_64(ptr addrspace(1) %out, i64 %x, i64 %
 ; GCN-LABEL: s_test_sdiv32_64:
 ; GCN:       ; %bb.0:
 ; GCN-NEXT:    s_load_dwordx4 s[8:11], s[4:5], 0x9
-; GCN-NEXT:    s_load_dword s0, s[4:5], 0xe
+; GCN-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0xd
----------------
nikic wrote:

Okay so the issue here is:
```
define i32 @test(ptr addrspace(1) %p) {
  %load = load <2 x i32>, ptr addrspace(1) %p
  %freeze = freeze <2 x i32> %load
  %extract = extractelement <2 x i32> %freeze, i64 0
  ret i32 %extract
}

define i32 @test2(ptr addrspace(1) %p) {
  %load = load <2 x i32>, ptr addrspace(1) %p
  %extract = extractelement <2 x i32> %load, i64 0
  ret i32 %extract
}
```
The second load is scalarized but the first is not. It would be valid to do this with the frozen load as well.

I believe the relevant folds are in here: https://github.com/llvm/llvm-project/blob/3cbb24bd5412a5ecea5a0e4d1603e0a38676432d/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp#L25897-L26000

https://github.com/llvm/llvm-project/pull/208749