The Week Of Monday 20 April 2026 Archives by date

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Starting: Mon Apr 20 00:03:43 PDT 2026
Ending: Sun Apr 26 23:58:47 PDT 2026
Messages: 6839

• [llvm] Extending LoopVersioningLICM to handle cases where loopbound is invarint (PR #192794)   Manish Srivastava via llvm-commits
• [clang] [compiler-rt] [llvm] [Analysis] Add intra-procedural EscapeAnalysis (PR #169896)   Alexey Paznikov via llvm-commits
• [llvm] Extending LoopVersioningLICM to handle cases where loopbound is invariant (PR #192902)   Manish Srivastava via llvm-commits
• [llvm] Extending LoopVersioningLICM to handle cases where loopbound is invariant (PR #192902)   via llvm-commits
• [clang] [llvm] [clang][RISCV] Use macro to check if intrinsics are supported (PR #187197)   Jim Lin via llvm-commits
• [llvm] Extending LoopVersioningLICM to handle cases where loopbound is invariant (PR #192902)   via llvm-commits
• [llvm] [AMDGPU] Expand constant named barrier matching in SDag (PR #191506)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Support atomic load for vector float types (v2f32, v4f32, v2f16, v4f16, v8f16) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support atomic load for vector float types (v2f32, v4f32, v2f16, v4f16, v8f16) (PR #192904)   via llvm-commits
• [llvm] [AMDGPU] Support atomic load for vector float types (v2f32, v4f32, v2f16, v4f16, v8f16) (PR #192904)   via llvm-commits
• [llvm] [LSV][AMDGPU] Vectorize unordered and monotonic atomic loads (PR #190152)   Harrison Hao via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Fangrui Song via llvm-commits
• [llvm] [JumpTableToSwitch] Fix crash on duplicate GUIDs (PR #192905)   Alexander Shaposhnikov via llvm-commits
• [clang] [llvm] [Driver][RISC-V] Support YAML multilib config with selectRISCVMultilib fallback (PR #184973)   Jim Lin via llvm-commits
• [llvm] [JumpTableToSwitch] Fix crash on duplicate GUIDs (PR #192905)   via llvm-commits
• [llvm] [AMDGPU] Support atomic load for vector float types (v2f32, v4f32, v2f16, v4f16, v8f16) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [llvm] [CodeGen] Parse frame-pointer attribute once when creating MachineFunction (PR #191974)   Cullen Rhodes via llvm-commits
• [llvm] [LSV][AMDGPU] Vectorize unordered and monotonic atomic loads (PR #190152)   Harrison Hao via llvm-commits
• [llvm] [SPIR-V] Fix image query and sampler type (PR #190767)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LSV][AMDGPU] Vectorize unordered and monotonic atomic loads (PR #190152)   Harrison Hao via llvm-commits
• [llvm] [SPIR-V] Fix OpTypeImage capability requirements for Vulkan (PR #192626)   Arseniy Obolenskiy via llvm-commits
• [llvm] [ConstantFolding] Fold array to vector in ConstantFoldLoadThroughBitcast (PR #192775)   Wenju He via llvm-commits
• [llvm] [SPIR-V] Use ToolSubst for spirv-tools lit substitutions (PR #192462)   Arseniy Obolenskiy via llvm-commits
• [llvm] [ConstantFolding] Fold array to vector in ConstantFoldLoadThroughBitcast (PR #192775)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] [LSV][AMDGPU] Vectorize unordered and monotonic atomic loads (PR #190152)   Harrison Hao via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] [LSV][AMDGPU] Vectorize unordered and monotonic atomic loads (PR #190152)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support atomic load for vector float types (v2f32, v4f32, v2f16, v4f16, v8f16) (PR #192904)   via llvm-commits
• [llvm] [AMDGPU] Support atomic load for vector float types (v2f32, v4f32, v2f16, v4f16, v8f16) (PR #192904)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] [FileCheck] --dump-input: Elide middle of underlines for no-match (PR #192908)   Fangrui Song via llvm-commits
• [llvm] [FileCheck] --dump-input: Elide middle of underlines for no-match (PR #192908)   via llvm-commits
• [llvm] [docs] Add missing command line options to llvm-profgen.rst (PR #192890)   Alexander Zaitsev via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] [FileCheck] --dump-input: Elide middle of underlines for no-match (PR #192908)   Fangrui Song via llvm-commits
• [llvm] [LoopFusion] Validate loop structure before creating LoopCandidates (PR #192280)   Madhur Amilkanthwar via llvm-commits
• [llvm] [ConstantFolding] Fold array to vector in ConstantFoldLoadThroughBitcast (PR #192775)   Wenju He via llvm-commits
• [llvm] [ConstantFolding] Fold array to vector in ConstantFoldLoadThroughBitcast (PR #192775)   Wenju He via llvm-commits
• [llvm] [CHERI] Define CHERI capability address space in computeRISCVDataLayout (PR #190806)   Owen Anderson via llvm-commits
• [llvm] [AMDGPU] Make globally-addressable-scratch opt-in (PR #189555)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Make globally-addressable-scratch opt-in (PR #189555)   Pierre van Houtryve via llvm-commits
• [llvm] 069616a - [LV] NFC: Address post-merge comments on splice-cost.ll (#192624)   via llvm-commits
• [llvm] [LV] NFC: Address post-merge comments on splice-cost.ll (PR #192624)   Sander de Smalen via llvm-commits
• [llvm] [ConstantFolding] Compare a global and an inbounds GEP (PR #192909)   via llvm-commits
• [llvm] [ConstantFolding] Compare a global and an inbounds GEP (PR #192909)   via llvm-commits
• [lld] [lldb] [llvm] [Support][Cache] Make `pruneCache` return an `Expected` (PR #191367)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [ConstantFolding] Compare a global and an inbounds GEP (PR #192909)   via llvm-commits
• [llvm] [ConstantFolding] Fold array to vector in ConstantFoldLoadThroughBitcast (PR #192775)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Fold array to vector in ConstantFoldLoadThroughBitcast (PR #192775)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Compare a global and an inbounds GEP (PR #192909)   via llvm-commits
• [llvm] [llvm-dwp] Replace MCStreamer with direct ELF writer for zero-copy output (PR #192112)   James Henderson via llvm-commits
• [llvm] [llvm-dwp] Replace MCStreamer with direct ELF writer for zero-copy output (PR #192112)   James Henderson via llvm-commits
• [llvm] [llvm-dwp] Replace MCStreamer with direct ELF writer for zero-copy output (PR #192112)   James Henderson via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fsub (PR #191832)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Fix non-determinism in MachineBlockHashInfo (PR #192826)   Vitaly Buka via llvm-commits
• [llvm] [LV][NFC] Regen CHECK lines in LoopVectorize/X86/replicating-load-store-costs.ll (PR #192682)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Fix non-determinism in MachineBlockHashInfo (PR #192826)   Vitaly Buka via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   Hassnaa Hamdi via llvm-commits
• [llvm] [VPlan] Add simplifications to remove header masks in predicated AnyOf select reductions (PR #190196)   Luke Lau via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] [VPlan] Add simplifications to remove header masks in predicated AnyOf select reductions (PR #190196)   Luke Lau via llvm-commits
• [lld] [ELF] Parallelize input file loading (PR #191690)   Peter Smith via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [libcxx] [libcxxabi] [llvm] [libc++] Update to Clang 21 as the oldest supported version (PR #186062)   Nikolas Klauser via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [libcxx] [libcxxabi] [llvm] [libc++] Update to Clang 21 as the oldest supported version (PR #186062)   via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [DWARFYAML] Add support for v5 debug_line file/dir entries (PR #192226)   Pavel Labath via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Boyao Wang via llvm-commits
• [llvm] f1fe791 - [DWARFYAML] Add support for v5 debug_line file/dir entries (#192226)   via llvm-commits
• [llvm] [DWARFYAML] Add support for v5 debug_line file/dir entries (PR #192226)   Pavel Labath via llvm-commits
• [lldb] [llvm] [lldb][RISCV] Implement access to TLS variables on RISC-V (PR #191410)   Georgiy Samoylov via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] c95a333 - [AArch64][GlobalISel] FP Info implementation for AArch64. (#177158)   via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   James Henderson via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   James Henderson via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   James Henderson via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   James Henderson via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Move KnownBitsVectorTest to mir. NFC (PR #192536)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Move KnownBitsVectorTest to mir. NFC (PR #192536)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (PR #192074)   Shih-Po Hung via llvm-commits
• [llvm] AMDGPU: Don't save FP/BP for noreturn functions (PR #187668)   Diana Picus via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [RISCV][CodeGen] Add CodeGen support of Zvzip extension (PR #189801)   Boyao Wang via llvm-commits
• [llvm] [LV] NFC: Address post-merge comments on splice-cost.ll (PR #192624)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] 920b203 - [lldb][RISCV] Implement access to TLS variables on RISC-V (#191410)   via llvm-commits
• [llvm] [LoongArch] Add tests for vector shift-right-and-round combines (PR #192920)   via llvm-commits
• [lldb] [llvm] [lldb][RISCV] Implement access to TLS variables on RISC-V (PR #191410)   Georgiy Samoylov via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   James Henderson via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   James Henderson via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   James Henderson via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   James Henderson via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   James Henderson via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   James Henderson via llvm-commits
• [llvm] [LoongArch] Add tests for vector shift-right-and-round combines (PR #192920)   via llvm-commits
• [llvm] f2efeab - [CodeGen] Parse frame-pointer attribute once when creating MachineFunction (#191974)   via llvm-commits
• [llvm] [CodeGen] Parse frame-pointer attribute once when creating MachineFunction (PR #191974)   Cullen Rhodes via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   Luke Lau via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   Luke Lau via llvm-commits
• [llvm] [Bazel] Fixes 920b203 (PR #192922)   via llvm-commits
• [llvm] [WebAssembly] Split separate component LiveIntervals for TEEs (PR #131561)   via llvm-commits
• [llvm] [SelectionDAG] Return poison instead of undef for out-of-bounds EXTRACT_VECTOR_ELT (PR #192844)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Return poison instead of undef for out-of-bounds EXTRACT_VECTOR_ELT (PR #192844)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Return poison instead of undef for out-of-bounds EXTRACT_VECTOR_ELT (PR #192844)   Simon Pilgrim via llvm-commits
• [llvm] [LSV][AMDGPU] Vectorize unordered and monotonic atomic loads (PR #190152)   Harrison Hao via llvm-commits
• [llvm] 75d63af - [AArch64] Fix lowering of non-power2 uitofp (#190921)   via llvm-commits
• [llvm] [AArch64] Fix lowering of non-power2 uitofp (PR #190921)   David Green via llvm-commits
• [llvm] [ARM][GISel] Enable extended LLT (PR #191830)   David Green via llvm-commits
• [llvm] [AArch64] Lower llvm.lrint to SVE2p2 FRINT*X instructions (PR #187319)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower llvm.lrint to SVE2p2 FRINT*X instructions (PR #187319)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower llvm.lrint to SVE2p2 FRINT*X instructions (PR #187319)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower llvm.lrint to SVE2p2 FRINT*X instructions (PR #187319)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower llvm.lrint to SVE2p2 FRINT*X instructions (PR #187319)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower llvm.lrint to SVE2p2 FRINT*X instructions (PR #187319)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Lower llvm.lrint to SVE2p2 FRINT*X instructions (PR #187319)   Sander de Smalen via llvm-commits
• [llvm] Extending LoopVersioningLICM to handle cases where loopbound is invariant (PR #192902)   Manish Srivastava via llvm-commits
• [llvm] [AArch64][SelectionDAG] Snap -32 and 32 to 31 snd -31 for ccmn (PR #192879)   Simon Pilgrim via llvm-commits
• [llvm] b37a607 - [compiler-rt] Don't provide `__arm_sme_state` for baremetal targets (#191434)   via llvm-commits
• [compiler-rt] [llvm] [mlir] [compiler-rt] Don't provide `__arm_sme_state` for baremetal targets (PR #191434)   Benjamin Maxwell via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Gaëtan Bossu via llvm-commits
• [llvm] 57e35e9 - [LV][NFC] Regen CHECK lines in LoopVectorize/X86/replicating-load-store-costs.ll (#192682)   via llvm-commits
• [llvm] [LV][NFC] Regen CHECK lines in LoopVectorize/X86/replicating-load-store-costs.ll (PR #192682)   David Sherwood via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV][TTI] Return valid cost when step vector from extract.last.active needs to split. (PR #192161)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Make globally-addressable-scratch opt-in (PR #189555)   Jay Foad via llvm-commits
• [llvm] [LSV][AMDGPU] Vectorize unordered and monotonic atomic loads (PR #190152)   Harrison Hao via llvm-commits
• [llvm] [LSV][AMDGPU] Vectorize unordered and monotonic atomic loads (PR #190152)   Harrison Hao via llvm-commits
• [llvm] [RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (PR #192074)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fsub (PR #191832)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Make globally-addressable-scratch opt-in (PR #189555)   Pierre van Houtryve via llvm-commits
• [llvm] [LV] NFC: Address post-merge comments on splice-cost.ll (PR #192624)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fsub (PR #191832)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fsub (PR #191832)   Luke Lau via llvm-commits
• [llvm] [UniformityAnalysis] Add CallbackVH tracking to keep UniformValues consistent on IR deletion (PR #187658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 3323903 - [AArch64][GlobalISel] Move KnownBitsVectorTest to mir. NFC (#192536)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Move KnownBitsVectorTest to mir. NFC (PR #192536)   David Green via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [clang] [llvm] [InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] Fix missed 'else' brunch in loadTargetInfo. (PR #192923)   Nikita Terentev via llvm-commits
• [llvm] Fix missed 'else' brunch in loadTargetInfo. (PR #192923)   via llvm-commits
• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Jay Foad via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Oliver Stöneberg via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Pengcheng Wang via llvm-commits
• [llvm] [openmp] [OMPT][OpenMP] Use omp_initial_device for host in callbacks (PR #192924)   Jan André Reuter via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Pengcheng Wang via llvm-commits
• [llvm] [openmp] [OMPT][OpenMP] Use omp_initial_device for host in callbacks (PR #192924)   via llvm-commits
• [llvm] [openmp] [OMPT][OpenMP] Use omp_initial_device for host in callbacks (PR #192924)   Jan André Reuter via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Oliver Stöneberg via llvm-commits
• [clang] [llvm] [HLSL][Clang] Start emitting @llvm.structured.alloca (PR #190157)   Nathan Gauër via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   Alexis Engelke via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   Alexis Engelke via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   Alexis Engelke via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   Alexis Engelke via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   Alexis Engelke via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Nikita Popov via llvm-commits
• [llvm] [LazyValueInfo] Support vector types in ICmp condition handling (PR #192900)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [AArch64][ISel] Remove zero instruction for `rev` all true predicates (PR #192925)   Harry Ramsey via llvm-commits
• [llvm] [LazyValueInfo] Support vector types in ICmp condition handling (PR #192900)   Nikita Popov via llvm-commits
• [llvm] [AArch64][ISel] Remove zero instruction for `rev` all true predicates (PR #192925)   via llvm-commits
• [llvm] d3141b4 - [LoopFusion] Validate loop structure before creating LoopCandidates (#192280)   via llvm-commits
• [llvm] [LoopFusion] Validate loop structure before creating LoopCandidates (PR #192280)   Madhur Amilkanthwar via llvm-commits
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• [llvm] [RISCV] Remove codegen for vp_fsub (PR #191832)   Luke Lau via llvm-commits
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• [llvm] [LV] Relax OutOfLoopUses check in `getMinMaxRecurrence()` (PR #189906)   Florian Hahn via llvm-commits
• [llvm] [LV] Relax OutOfLoopUses check in `getMinMaxRecurrence()` (PR #189906)   Florian Hahn via llvm-commits
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• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Simon Pilgrim via llvm-commits
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• [llvm] [AA] Teach getModRefInfo(FenceInst) to consult the AA chain (PR #192043)   via llvm-commits
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• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for BVH intersect ray (PR #192583)   Petar Avramovic via llvm-commits
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• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Simon Pilgrim via llvm-commits
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• [llvm] [AArch64] Lower masked.expandload intrinsic using SVE2p2/SME2p2 EXPAND (PR #190999)   Kerry McLaughlin via llvm-commits
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• [clang] [llvm] [HLSL][Clang] Start emitting @llvm.structured.alloca (PR #190157)   Nathan Gauër via llvm-commits
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• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Simon Pilgrim via llvm-commits
• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Owen Anderson via llvm-commits
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• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Owen Anderson via llvm-commits
• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Owen Anderson via llvm-commits
• [llvm] [DAGCombiner] Preserve nsw when folding (mul x, 2^c) to (shl x, c) (PR #192366)   Simon Pilgrim via llvm-commits
• [llvm] [bolt] AArch64: Fix TLSDESC to LE relaxation by mold (PR #190370)   Paschalis Mpeis via llvm-commits
• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Jessica Clarke via llvm-commits
• [llvm] [NewPM] Port x86-insert-vzero-upper (PR #181597)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [LV][NFC] Rename PreferPredicateOverEpilogue to TailFoldingPolicy (PR #191803)   Hassnaa Hamdi via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for G_ABS (PR #192760)   Petar Avramovic via llvm-commits
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• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for G_ABS (PR #192760)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for G_ABS (PR #192760)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for G_ABS (PR #192760)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_unreachable (PR #192762)   Petar Avramovic via llvm-commits
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• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   Mel Chen via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for transpose loads (PR #192766)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for transpose loads (PR #192766)   Petar Avramovic via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   Luke Lau via llvm-commits
• [llvm] [DAG] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Simon Pilgrim via llvm-commits
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• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Owen Anderson via llvm-commits
• [llvm] [AMDGPU] Propagate debug info to constant materialization instr (PR #192669)   Aleksandar Spasojevic via llvm-commits
• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Jessica Clarke via llvm-commits
• [llvm] [AArch64][Isel] Add lowering for fixed-width interleave3 (PR #192677)   Matthew Devereau via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   Christudasan Devadasan via llvm-commits
• [llvm] ValueTracking: Use SimplifyQuery for computeConstantRange (PR #191726)   Matt Arsenault via llvm-commits
• [llvm] 0b0cb9d - ValueTracking: Use SimplifyQuery for computeConstantRange (#191726)   via llvm-commits
• [llvm] ValueTracking: Use SimplifyQuery for computeConstantRange (PR #191726)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement custom lowering for insert_vector_elt_nxv1i1. (PR #192494)   Sjoerd Meijer via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement custom lowering for insert_vector_elt_nxv1i1. (PR #192494)   Sjoerd Meijer via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement custom lowering for insert_vector_elt_nxv1i1. (PR #192494)   Sjoerd Meijer via llvm-commits
• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Owen Anderson via llvm-commits
• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Owen Anderson via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Introduce Counter class (PR #190271)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] InstCombine: Update assumption cache when replacing values (PR #192935)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Update assumption cache when replacing values (PR #192935)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Update assumption cache when replacing values (PR #192935)   Matt Arsenault via llvm-commits
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• [llvm] [ValueTracking] Fold compares with zero when right side is known non-zero (PR #192860)   Max Graey via llvm-commits
• [lldb] [llvm] [lldb][RISCV] Implement access to TLS variables on RISC-V (PR #191410)   Fraser Cormack via llvm-commits
• [llvm] [SelectionDAG] Return poison instead of undef for out-of-bounds EXTRACT_VECTOR_ELT (PR #192844)   Xinlong Chen via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   Aidan Shilling via llvm-commits
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• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Jessica Clarke via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   via llvm-commits
• [llvm] [SelectionDAG] Return poison instead of undef for out-of-bounds EXTRACT_VECTOR_ELT (PR #192844)   Matt Arsenault via llvm-commits
• [llvm] de5ac00 - [SelectionDAG] Return poison instead of undef for out-of-bounds EXTRACT_VECTOR_ELT (#192844)   via llvm-commits
• [llvm] [SelectionDAG] Return poison instead of undef for out-of-bounds EXTRACT_VECTOR_ELT (PR #192844)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Boyao Wang via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Boyao Wang via llvm-commits
• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Owen Anderson via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   via llvm-commits
• [llvm] [Bazel] Fixes 920b203 (PR #192922)   Adrian Kuegel via llvm-commits
• [llvm] [Bazel] Fixes 920b203 (PR #192922)   Adrian Kuegel via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] [ci][llvm] Run cross-project-tests on llvm/ changes (PR #188522)   Jeremy Morse via llvm-commits
• [llvm] [AMDGPU] Support atomic load for vector float types (v2f32, v4f32, v2f16, v4f16, v8f16) (PR #192904)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Move PhiLoweringHelper and related types into AMDGPU namespace (PR #192586)   via llvm-commits
• [llvm] [SelectionDAG] Return poison instead of undef for out-of-bounds EXTRACT_VECTOR_ELT (PR #192844)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Have buildExtOrTrunc create G_BITCAST on mismatching types. (PR #192939)   David Green via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Alejandro Colomar via llvm-commits
• [llvm] [GlobalISel] Have buildExtOrTrunc create G_BITCAST on mismatching types. (PR #192939)   via llvm-commits
• [llvm] [GlobalISel] Have buildExtOrTrunc create G_BITCAST on mismatching types. (PR #192939)   via llvm-commits
• [llvm] [AMDGPU] Report only local per-function resource usage when object linking is enabled (PR #192594)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Report only local per-function resource usage when object linking is enabled (PR #192594)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Report only local per-function resource usage when object linking is enabled (PR #192594)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Report only local per-function resource usage when object linking is enabled (PR #192594)   Diana Picus via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   Aidan Shilling via llvm-commits
• [llvm] [NFC][AMDGPU] Move PhiLoweringHelper and related types into AMDGPU namespace (PR #192586)   via llvm-commits
• [llvm] [NFC][AMDGPU] Move PhiLoweringHelper and related types into AMDGPU namespace (PR #192586)   via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Alejandro Colomar via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Alejandro Colomar via llvm-commits
• [llvm] [GlobalISel] Have buildExtOrTrunc create G_BITCAST on mismatching types. (PR #192939)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Move PhiLoweringHelper and related types into AMDGPU namespace (PR #192586)   Petar Avramovic via llvm-commits
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• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [CodeGen] Port mir-strip-debug to new pass manager (PR #190738)   via llvm-commits
• [polly] [Polly][NFC] Convert IslNodeBuilder::preloadInvariantLoad to isl++ (PR #192942)   Michael Kruse via llvm-commits
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• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [llvm] [ValueTracking] Fold compares with zero when right side is known non-zero (PR #192860)   Max Graey via llvm-commits
• [polly] [Polly][NFC] Convert IslNodeBuilder::preloadInvariantLoad to isl++ (PR #192942)   Michael Kruse via llvm-commits
• [polly] [Polly][NFC] Convert IslNodeBuilder::preloadInvariantLoad to isl++ (PR #192942)   Michael Kruse via llvm-commits
• [clang] [compiler-rt] [llvm] [TSan] Use EscapeAnalysis to eliminate redundant instrumentation (PR #192945)   Alexey Paznikov via llvm-commits
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• [clang] [compiler-rt] [llvm] [TSan] Use EscapeAnalysis to eliminate redundant instrumentation (PR #192945)   via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   LLVM Continuous Integration via llvm-commits
• [clang] [compiler-rt] [llvm] [Analysis] Add intra-procedural EscapeAnalysis (PR #169896)   Alexey Paznikov via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Aaron Ballman via llvm-commits
• [compiler-rt] [llvm] [TSan] Add dominance-based redundant instrumentation elimination (PR #169897)   Alexey Paznikov via llvm-commits
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• [llvm] [AArch64][SelectionDAG] Improve codegen for insert_into_scalable(zext_fixed_length_vector) (PR #192405)   Paul Walker via llvm-commits
• [lldb] [llvm] [lldb][RISCV] Implement access to TLS variables on RISC-V (PR #191410)   Fraser Cormack via llvm-commits
• [polly] 43ccda2 - [Polly][NFC] Convert IslNodeBuilder::preloadInvariantLoad to isl++ (#192942)   via llvm-commits
• [polly] [Polly][NFC] Convert IslNodeBuilder::preloadInvariantLoad to isl++ (PR #192942)   Michael Kruse via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Alejandro Colomar via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Simon Pilgrim via llvm-commits
• [llvm] [SPIRV] Migrate NSDI emission from a machine pass to DebugHandlerBase (PR #191212)   Manuel Carrasco via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] Fold deinterleave2 with smaller effective element size (PR #192121)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold deinterleave2 with smaller effective element size (PR #192121)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold deinterleave2 with smaller effective element size (PR #192121)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold deinterleave2 with smaller effective element size (PR #192121)   Simon Pilgrim via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   Matt Arsenault via llvm-commits
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• [llvm] [LLVM][CodeGen][SVE] Implement custom lowering for insert_vector_elt_nxv1i1. (PR #192494)   Paul Walker via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [SLP] Normalize copyable operand order to group loads for better vectorization (PR #189181)   Simon Pilgrim via llvm-commits
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• [llvm] [AArch64][SelectionDAG] Improve codegen for insert_into_scalable(zext_fixed_length_vector) (PR #192405)   Sushant Gokhale via llvm-commits
• [llvm] [GlobalISel] Implement split extending loads in narrowScalar (PR #190924)   Robin Kastberg via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Wenju He via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   Hassnaa Hamdi via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [llvm] [AArch64][SelectionDAG] Improve codegen for insert_into_scalable(zext_fixed_length_vector) (PR #192405)   Paul Walker via llvm-commits
• [llvm] [LV][NFC] Regen CHECK lines in LoopVectorize/X86/replicating-load-store-costs.ll (PR #192682)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoopInterchange] Bail out when memory instruction ratio is high (PR #192954)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Bail out when memory instruction ratio is high (PR #192954)   via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Ralf Jung via llvm-commits
• [llvm] [LoopInterchange] Bail out when memory instruction ratio is high (PR #192954)   Ryotaro Kasuga via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Wenju He via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Wenju He via llvm-commits
• [llvm] [LoopInterchange] Add tests for a simple profitable case currently missed (NFC) (PR #181990)   Ryotaro Kasuga via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Wenju He via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [LLVM] Provide a default 'multilibs.yaml' when configured (PR #192281)   Joseph Huber via llvm-commits
• [lld] [lld][AMDGPU] Support R_AMDGPU_ABS32_(LO|HI) relocations (PR #191597)   Joseph Huber via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   David Sherwood via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   David Sherwood via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   David Sherwood via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   David Sherwood via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   David Sherwood via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   David Sherwood via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   David Sherwood via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   David Sherwood via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   David Sherwood via llvm-commits
• [llvm] [AArch64][ISel] Remove zero instruction for `rev` all true predicates (PR #192925)   Harry Ramsey via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][ISel] Remove zero instruction for `rev` all true predicates (PR #192925)   Harry Ramsey via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64][ISel] Remove zero instruction for `rev` all true predicates (PR #192925)   Harry Ramsey via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   David Sherwood via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [llvm] [NFC][llvm-objdump] Use CHECK-NEXT in MachO tests (PR #192696)   Ryan Mansfield via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement custom lowering for insert_vector_elt_nxv1i1. (PR #192494)   Kerry McLaughlin via llvm-commits
• [polly] [Polly][NFC] Convert IslNodeBuilder::preloadUnconditionally to isl++ (PR #192959)   Michael Kruse via llvm-commits
• [polly] [Polly][NFC] Convert IslNodeBuilder::preloadUnconditionally to isl++ (PR #192959)   Michael Kruse via llvm-commits
• [lld] [lld][AMDGPU] Support R_AMDGPU_ABS32_(LO|HI) relocations (PR #191597)   Jessica Clarke via llvm-commits
• [llvm] AMDGPU: Resolve some next-use analysis #178873 post-merge feedback (PR #192960)   via llvm-commits
• [llvm] AMDGPU: Resolve some next-use analysis #178873 post-merge feedback (PR #192960)   via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Nikita Popov via llvm-commits
• [llvm] [AA] Teach getModRefInfo(FenceInst) to consult the AA chain (PR #192043)   Adel Ejjeh via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Nikita Popov via llvm-commits
• [polly] d242dfc - [Polly][NFC] Convert IslNodeBuilder::preloadUnconditionally to isl++ (#192959)   via llvm-commits
• [polly] [Polly][NFC] Convert IslNodeBuilder::preloadUnconditionally to isl++ (PR #192959)   Michael Kruse via llvm-commits
• [llvm] [KnownBits][APInt] Optimize isConstant (NFC) (PR #191919)   Nikita Popov via llvm-commits
• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Owen Anderson via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [KnownBits][APInt] Optimize isConstant (NFC) (PR #191919)   Nikita Popov via llvm-commits
• [llvm] 41e2baf - [KnownBits][APInt] Optimize isConstant (NFC) (#191919)   via llvm-commits
• [llvm] [KnownBits][APInt] Optimize isConstant (NFC) (PR #191919)   Nikita Popov via llvm-commits
• [llvm] 9705f34 - [IR] LangRef: document behavior of double-lifetime.start (#184296)   via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nikita Popov via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Andrey Ali Khan Bolshakov via llvm-commits
• [llvm] [llvm] Introduce TargetInfo (PR #190730)   Nikita Popov via llvm-commits
• [llvm] [llvm] Introduce TargetInfo (PR #190730)   Nikita Popov via llvm-commits
• [llvm] [llvm] Introduce TargetInfo (PR #190730)   Nikita Popov via llvm-commits
• [llvm] [mlir] [Coroutines] Add verifier checks for llvm.coro.begin and llvm.coro.id (PR #192887)   Weibo He via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   David Green via llvm-commits
• [llvm] [CHERIoT] Define ABI_CHERIOT and ABI_CHERIOT_BAREMETAL. (PR #192929)   Jessica Clarke via llvm-commits
• [llvm] Fix assert in SlotIndexes::getInstructionIndex in debug builds (PR #189370)   via llvm-commits
• [llvm] Fix assert in SlotIndexes::getInstructionIndex in debug builds (PR #189370)   via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Mikael Holmen via llvm-commits
• [clang] [llvm] [AARCH64] Add intrinsic support for new s/udot intrinsics (PR #189424)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsic support for Fdot instr. (PR #189987)   via llvm-commits
• [clang] [llvm] [AARCH64] Add intrinsic support for new s/udot intrinsics (PR #189424)   via llvm-commits
• [llvm] c3534cf - [NFC][AMDGPU] Move PhiLoweringHelper and related types into AMDGPU namespace (#192586)   via llvm-commits
• [llvm] [NFC][AMDGPU] Move PhiLoweringHelper and related types into AMDGPU namespace (PR #192586)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Vectorize][OpenMP] Support header-provided declare simd math variants (PR #189523)   via llvm-commits
• [clang] [llvm] [AARCH64] Add intrinsic support for new s/udot intrinsics (PR #189424)   via llvm-commits
• [llvm] [WebAssembly] Split separate component LiveIntervals for TEEs (PR #131561)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Jacob Crawley via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   via llvm-commits
• [llvm] [SPIR-V] Fix OpTypeImage capability requirements for Vulkan (PR #192626)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] 578c3aa - [AArch64][Isel] Add lowering for fixed-width interleave3 (#192677)   via llvm-commits
• [llvm] [AArch64][Isel] Add lowering for fixed-width interleave3 (PR #192677)   Matthew Devereau via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Oliver Stöneberg via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Matt Arsenault via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   David Green via llvm-commits
• [llvm] [SPIR-V] Fix OpTypeImage capability requirements for Vulkan (PR #192626)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [CodeGen] Fix non-determinism in MachineBlockHashInfo (PR #192826)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Pengcheng Wang via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [llvm] [AMDGPU] Expand constant named barrier matching in SDag (PR #191506)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Expand constant named barrier matching in SDag (PR #191506)   Matt Arsenault via llvm-commits
• [llvm] [LICM] Generate test checks (NFC) (PR #192970)   Nikita Popov via llvm-commits
• [llvm] 0d4a3bf - [LICM] Generate test checks (NFC) (#192970)   via llvm-commits
• [llvm] [LICM] Generate test checks (NFC) (PR #192970)   Nikita Popov via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [llvm] [SCEV] Look through back-edge selects in `createAddRecFromPHI` (PR #190726)   Andy Dienes via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [libc] [llvm] [libc][math] Implement half precision tgamma function (PR #192590)   Victor Campos via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Matthew Devereau via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [clang] [llvm] Invalidate tests using "touch -a" on Darwin (PR #192521)   Lei Huang via llvm-commits
• [llvm] [AMDGPU] Propagate debug info to constant materialization instr (PR #192669)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate debug info to constant materialization instr (PR #192669)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate debug info to constant materialization instr (PR #192669)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate debug info to constant materialization instr (PR #192669)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Fix validation errors for function pointers with CodeSectionINTEL storage class (PR #192973)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Fix validation errors for function pointers with CodeSectionINTEL storage class (PR #192973)   via llvm-commits
• [llvm] [AArch64] Use ADDP tree for v16i8 to i16 bitmask extraction (PR #192974)   Conor Kotwasinski via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Fix crash in MapInfoFinalization (PR #192732)   via llvm-commits
• [llvm] [AArch64] Use ADDP tree for v16i8 to i16 bitmask extraction (PR #192974)   via llvm-commits
• [llvm] [AArch64] Use ADDP tree for v16i8 to i16 bitmask extraction (PR #192974)   Conor Kotwasinski via llvm-commits
• [llvm] [SPIR-V] Fix validation errors for function pointers with CodeSectionINTEL storage class (PR #192973)   via llvm-commits
• [llvm] [AArch64] Use ADDP tree for v16i8 to i16 bitmask extraction (PR #192974)   via llvm-commits
• [llvm] [DAG] - computeKnownFPClass - ISD::FMAXIMUM/ISD::FMINIMUM + ISD::FMAXIMUMNUM/ISD::FMINIMUMNUM (PR #190465)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   David Sherwood via llvm-commits
• [llvm] [RISCV][GlobalISel] Lower G_MEMCPY_INLINE (PR #192671)   Gábor Spaits via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Sander de Smalen via llvm-commits
• [polly] [Polly] Apply gist only after converting to pw_aff (PR #192975)   Michael Kruse via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [polly] [Polly] Apply gist only after converting to pw_aff (PR #192975)   Michael Kruse via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   David Green via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   David Green via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   David Green via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   David Green via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   David Green via llvm-commits
• [llvm] [docs] Add missing command line options to llvm-profgen.rst (PR #192890)   Kartik Ohlan via llvm-commits
• [llvm] [SelectOptimize] Emit Fatal Error instead of Asserting on null PSI (PR #192871)   Matt Arsenault via llvm-commits
• [llvm] [SelectOptimize] Emit Fatal Error instead of Asserting on null PSI (PR #192871)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Fix validation errors for function pointers with CodeSectionINTEL storage class (PR #192973)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LoopFusion] Document LoopFusion Pass (PR #192926)   Ehsan Amiri via llvm-commits
• [llvm] [dsymutil] Add --embed-resource to copy files into dSYM bundles. (PR #190663)   Ryan Mansfield via llvm-commits
• [clang] [llvm] Revert "Invalidate tests using "touch -a" on Darwin (#192521)" (PR #192976)   Lei Huang via llvm-commits
• [llvm] b55b492 - Revert "Invalidate tests using "touch -a" on Darwin (#192521)" (#192976)   via llvm-commits
• [clang] [llvm] Revert "Invalidate tests using "touch -a" on Darwin (#192521)" (PR #192976)   Lei Huang via llvm-commits
• [clang] [llvm] Revert "Invalidate tests using "touch -a" on Darwin (#192521)" (PR #192976)   via llvm-commits
• [llvm] 61f33bc - [AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)   via llvm-commits
• [llvm] [AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (PR #192491)   Ricardo Jesus via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [polly] [Polly] Apply gist only after converting to pw_aff (PR #192975)   Michael Kruse via llvm-commits
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• [clang] [llvm] [LV][NFC] Rename PreferPredicateOverEpilogue to TailFoldingPolicy (PR #191803)   David Sherwood via llvm-commits
• [clang] [llvm] [LV][NFC] Rename PreferPredicateOverEpilogue to TailFoldingPolicy (PR #191803)   David Sherwood via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
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• [polly] [Polly] Apply gist only after converting to pw_aff (PR #192975)   Michael Kruse via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_unreachable (PR #192762)   Chinmay Deshpande via llvm-commits
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• [libcxx] [libcxxabi] [llvm] [libc++] Update to Clang 21 as the oldest supported version (PR #186062)   Nikolas Klauser via llvm-commits
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• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   Chinmay Deshpande via llvm-commits
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• [llvm] [docs] Add missing command line options to llvm-profgen.rst (PR #192890)   Kartik Ohlan via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
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• [clang] [llvm] Invalidate tests using "touch -a" on Darwin (PR #192521)   Lei Huang via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Sander de Smalen via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Sander de Smalen via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Sander de Smalen via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] Invalidate tests using "touch -a" on Darwin (PR #192521)   James Henderson via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   David Green via llvm-commits
• [llvm] [NFC][AArch64] Allocate AArch64Subtarget on the heap instead of stack (PR #176488)   Marc Auberer via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   Aidan Shilling via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [SPIR-V] Use ToolSubst for spirv-tools lit substitutions (PR #192462)   Nick Sarnie via llvm-commits
• [clang] [llvm] Invalidate tests using "touch -a" on Darwin (PR #192521)   James Henderson via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Łukasz Plewa via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   Chinmay Deshpande via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Joseph Huber via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Joseph Huber via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Joseph Huber via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [VPlan] Remove dead partial reduction case in addReductionResultComputation. NFCI (PR #192985)   Luke Lau via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Steven Perron via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Wei Xiao via llvm-commits
• [llvm] [NFC][AArch64] Allocate AArch64Subtarget on the heap instead of stack (PR #176488)   Harald van Dijk via llvm-commits
• [llvm] [dsymutil] Add --embed-resource to copy files into dSYM bundles. (PR #190663)   Ryan Mansfield via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Wei Xiao via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Wei Xiao via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Wei Xiao via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Wei Xiao via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Wei Xiao via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Phoebe Wang via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Wei Xiao via llvm-commits
• [llvm] [AArch64][SelectionDAG] Improve codegen for insert_into_scalable(zext_fixed_length_vector) (PR #192405)   Sushant Gokhale via llvm-commits
• [llvm] [VPlan] Remove dead partial reduction case in addReductionResultComputation. NFCI (PR #192985)   via llvm-commits
• [llvm] [VPlan] CSE ScalarIVSteps recipes (PR #191307)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] CSE ScalarIVSteps recipes (PR #191307)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][SelectionDAG] Improve codegen for insert_into_scalable(zext_fixed_length_vector) (PR #192405)   Sushant Gokhale via llvm-commits
• [llvm] [VPlan] Introduce reduction selects for tail folding in foldTailByMasking. NFCI (PR #192987)   Luke Lau via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [VPlan] Introduce reduction selects for tail folding in foldTailByMasking. NFCI (PR #192987)   via llvm-commits
• [llvm] [VPlan] Introduce reduction selects for tail folding in foldTailByMasking. NFCI (PR #192987)   Luke Lau via llvm-commits
• [clang] [llvm] [Vectorize][OpenMP] Support header-provided declare simd math variants (PR #189523)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Vectorize][OpenMP] Support header-provided declare simd math variants (PR #189523)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Vectorize][OpenMP] Support header-provided declare simd math variants (PR #189523)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Vectorize][OpenMP] Support header-provided declare simd math variants (PR #189523)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Vectorize][OpenMP] Support header-provided declare simd math variants (PR #189523)   Alexey Bataev via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Phoebe Wang via llvm-commits
• [lld] [lldb] [llvm] [Support][Cache] Make `pruneCache` return an `Expected` (PR #191367)   Teresa Johnson via llvm-commits
• [llvm] [PatternMatchHelpers] Factor deferred and bind matchers (NFC) (PR #191373)   Ramkumar Ramachandra via llvm-commits
• [llvm] [PatternMatchHelpers] Factor deferred and bind matchers (NFC) (PR #191373)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DAG] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Frederick Vu via llvm-commits
• [llvm] [ARM][MVE] Transform sext and zext of i1 buildvector (PR #192519)   Simon Tatham via llvm-commits
• [llvm] [VPlan] Remove dead partial reduction case in addReductionResultComputation. NFCI (PR #192985)   David Sherwood via llvm-commits
• [llvm] [bolt] AArch64: Fix TLSDESC to LE relaxation by mold (PR #190370)   Hemant Kulkarni via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   Mel Chen via llvm-commits
• [llvm] [SPIRV] Migrate NSDI emission from a machine pass to DebugHandlerBase (PR #191212)   Manuel Carrasco via llvm-commits
• [llvm] [bolt] Account for stubs with symbols in plt. (PR #192716)   Hemant Kulkarni via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [lld] [llvm] [DTLTO] Refactor the DTLTO code. (PR #192629)   Teresa Johnson via llvm-commits
• [llvm] [RISCV] Further improved exact VLEN lowering for mul reductions (PR #192688)   Philip Reames via llvm-commits
• [llvm] [MIR] Always print symbolic INLINEASM operands (PR #192991)   Ivan Kosarev via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Remove dead partial reduction case in addReductionResultComputation. NFCI (PR #192985)   Luke Lau via llvm-commits
• [llvm] [SPIRV] Migrate NSDI emission from a machine pass to DebugHandlerBase (PR #191212)   Manuel Carrasco via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [MIR] Always print symbolic INLINEASM operands (PR #192991)   Matt Arsenault via llvm-commits
• [clang] [llvm] [PowerPC] Add AES Builtins (PR #186895)   Lei Huang via llvm-commits
• [llvm] 46c427b - [VPlan] Remove dead partial reduction case in addReductionResultComputation. NFCI (#192985)   via llvm-commits
• [llvm] [VPlan] Remove dead partial reduction case in addReductionResultComputation. NFCI (PR #192985)   Luke Lau via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   Aidan Shilling via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [VPlan] Remove dead partial reduction case in addReductionResultComputation. NFCI (PR #192985)   Florian Hahn via llvm-commits
• [lld] [ELF] Fix crash when INCLUDE'd linker script ends mid-assignment (PR #192198)   Peter Smith via llvm-commits
• [lld] [ELF] Fix crash when INCLUDE'd linker script ends mid-assignment (PR #192198)   Peter Smith via llvm-commits
• [lld] [ELF] Fix crash when INCLUDE'd linker script ends mid-assignment (PR #192198)   Peter Smith via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   via llvm-commits
• [clang] [llvm] [PowerPC] Add AES Builtins (PR #186895)   Lei Huang via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   via llvm-commits
• [llvm] [PatternMatchHelpers] Factor deferred and bind matchers (NFC) (PR #191373)   Florian Hahn via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [clang] [llvm] [PowerPC] Add AES Builtins (PR #186895)   Lei Huang via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Łukasz Plewa via llvm-commits
• [llvm] [VPlan] Introduce reduction selects for tail folding in foldTailByMasking. NFCI (PR #192987)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce reduction selects for tail folding in foldTailByMasking. NFCI (PR #192987)   Luke Lau via llvm-commits
• [llvm] [SPIRV] Add StorageImageExtendedFormats to available list for Vulkan (PR #192512)   Justin Bogner via llvm-commits
• [clang] [llvm] [libsycl][Driver] Move and rename the SYCL shared library (PR #188770)   Michael Toguchi via llvm-commits
• [llvm] [MIR] Always print symbolic INLINEASM operands (PR #192991)   Christudasan Devadasan via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Łukasz Plewa via llvm-commits
• [llvm] [LV] Remove IV use restrictions for epilogue vectorization. (PR #190552)   Florian Hahn via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Łukasz Plewa via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   Matt Arsenault via llvm-commits
• [llvm] [LV] Remove IV use restrictions for epilogue vectorization. (PR #190552)   Florian Hahn via llvm-commits
• [llvm] [LV] Remove IV use restrictions for epilogue vectorization. (PR #190552)   Florian Hahn via llvm-commits
• [llvm] [LV] Remove IV use restrictions for epilogue vectorization. (PR #190552)   Florian Hahn via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Sander de Smalen via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Jason Eckhardt via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Jason Eckhardt via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Jason Eckhardt via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Jason Eckhardt via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Jason Eckhardt via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Jason Eckhardt via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][SelectionDAG] Improve codegen for insert_into_scalable(zext_fixed_length_vector) (PR #192405)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SelectionDAG] Improve codegen for insert_into_scalable(zext_fixed_length_vector) (PR #192405)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [runtimes] Make later runtimes wait for earlier header targets (PR #192814)   Yaxun Liu via llvm-commits
• [llvm] eff4d47 - [VPlan] CSE ScalarIVSteps recipes (#191307)   via llvm-commits
• [llvm] [VPlan] CSE ScalarIVSteps recipes (PR #191307)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Paul Walker via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Florian Hahn via llvm-commits
• [clang] [llvm] [LV][NFC] Rename PreferPredicateOverEpilogue to TailFoldingPolicy (PR #191803)   Hassnaa Hamdi via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Alexis Engelke via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Benjamin Maxwell via llvm-commits
• [llvm] 6b201d5 - [LV][NFC] Rename PreferPredicateOverEpilogue to TailFoldingPolicy (#191803)   via llvm-commits
• [clang] [llvm] [LV][NFC] Rename PreferPredicateOverEpilogue to TailFoldingPolicy (PR #191803)   Hassnaa Hamdi via llvm-commits
• [llvm] [PatternMatchHelpers] Factor deferred and bind matchers (NFC) (PR #191373)   Ramkumar Ramachandra via llvm-commits
• [llvm] [GlobaISel] Protect against Vvariable 'NumBucketedMatchers' set but not used Error/Warning. (PR #193000)   David Green via llvm-commits
• [llvm] [GlobaISel] Protect against Variable 'NumBucketedMatchers' set but not used Error/Warning. (PR #193000)   David Green via llvm-commits
• [llvm] [GlobaISel] Protect against Variable 'NumBucketedMatchers' set but not used Error/Warning. (PR #193000)   via llvm-commits
• [llvm] [SPIRV] Migrate NSDI emission from a machine pass to DebugHandlerBase (PR #191212)   Manuel Carrasco via llvm-commits
• [llvm] [LangRef] inline asm: the instructions are treated opaquely (PR #157080)   Ralf Jung via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Maryam Moghadas via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_s_alloc_vgpr (PR #192937)   Chinmay Deshpande via llvm-commits
• [llvm] [GlobaISel] Protect against Variable 'NumBucketedMatchers' set but not used Error/Warning. (PR #193000)   Ryan Cowan via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Sander de Smalen via llvm-commits
• [clang] [llvm] [PowerPC] Add AES Builtins (PR #186895)   Lei Huang via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] fd1b872 - [PatternMatchHelpers] Factor deferred and bind matchers (NFC) (#191373)   via llvm-commits
• [llvm] [PatternMatchHelpers] Factor deferred and bind matchers (NFC) (PR #191373)   Ramkumar Ramachandra via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [libsycl] Fix _LIBSYCL_EXPORT placement (PR #192243)   Sergey Semenov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [runtimes][CMake] Move Fortran support code from flang-rt (PR #171610)   Michael Kruse via llvm-commits
• [llvm] [libsycl] Fix _LIBSYCL_EXPORT placement (PR #192243)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Fix _LIBSYCL_EXPORT placement (PR #192243)   via llvm-commits
• [clang] [llvm] [LV][NFC] Rename PreferPredicateOverEpilogue to TailFoldingPolicy (PR #191803)   Hassnaa Hamdi via llvm-commits
• [llvm] [GlobaISel] Protect against Variable 'NumBucketedMatchers' set but not used Error/Warning. (PR #193000)   David Green via llvm-commits
• [clang] [llvm] Delegate __builtin_setjmp SP and FP save to the backend on all targets (PR #186843)   Pyry Kovanen via llvm-commits
• [llvm] [AMDGPU] Fixed verifier crash because of multiple live range components. (PR #190719)   Dhruva Chakrabarti via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   Steven Perron via llvm-commits
• [llvm] [AMDGPU] Expand constant named barrier matching in SDag (PR #191506)   Jay Foad via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   via llvm-commits
• [clang] [llvm] [PowerPC] Add AES Builtins (PR #186895)   Lei Huang via llvm-commits
• [clang] [llvm] [CodeView] Add line entries for instructions in MS inline asm (PR #193007)   via llvm-commits
• [llvm] [VPlan] Add simplifications to remove header masks in predicated AnyOf select reductions (PR #190196)   Andrei Elovikov via llvm-commits
• [llvm] [SPIRV] Migrate NSDI emission from a machine pass to DebugHandlerBase (PR #191212)   Diego Novillo via llvm-commits
• [clang] [llvm] [CodeView] Add line entries for instructions in MS inline asm (PR #193007)   via llvm-commits
• [llvm] [GlobalISel] Fix -Wunused-variable (PR #193009)   Aiden Grossman via llvm-commits
• [llvm] dcbb5c8 - [GlobalISel] Fix -Wunused-variable (#193009)   via llvm-commits
• [llvm] [GlobalISel] Fix -Wunused-variable (PR #193009)   Aiden Grossman via llvm-commits
• [clang] [llvm] [CodeView] Add line entries for instructions in MS inline asm (PR #193007)   via llvm-commits
• [llvm] [NFC][NVPTX] Fixed unused variable warning. (PR #193010)   Slava Zakharin via llvm-commits
• [llvm] [NFC][NVPTX] Fixed unused variable warning. (PR #193010)   Slava Zakharin via llvm-commits
• [llvm] [NFC][NVPTX] Fixed unused variable warning. (PR #193010)   via llvm-commits
• [clang] [llvm] [PowerPC] Add AES Builtins (PR #186895)   Lei Huang via llvm-commits
• [llvm] 58fb00f - AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_unreachable (#192762)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_unreachable (PR #192762)   via llvm-commits
• [clang] [llvm] [CodeView] Add line entries for instructions in MS inline asm (PR #193007)   via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [clang] [llvm] [CodeView] Add line entries for instructions in MS inline asm (PR #193007)   via llvm-commits
• [llvm] [X86][NFC] Reorganize fadd, fsub, fmul and fdiv selection tests (PR #193012)   Evgenii Kudriashov via llvm-commits
• [clang] [llvm] [CodeView] Add line entries for instructions in MS inline asm (PR #193007)   via llvm-commits
• [llvm] [X86][NFC] Reorganize fadd, fsub, fmul and fdiv selection tests (PR #193012)   via llvm-commits
• [llvm] [X86][NFC] Reorganize fadd, fsub, fmul and fdiv selection tests (PR #193012)   via llvm-commits
• [llvm] [X86][GlobalISel] Support G_FADD, G_FSUB, G_FMUL, G_FDIV (PR #87339)   Evgenii Kudriashov via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [LV][NFC] Rename PreferPredicateOverEpilogue to TailFoldingPolicy (PR #191803)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [clang][RISCV] Use macro to check if intrinsics are supported (PR #187197)   Sam Elliott via llvm-commits
• [clang] [llvm] [clang][RISCV] Use macro to check if intrinsics are supported (PR #187197)   Sam Elliott via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Further improved exact VLEN lowering for mul reductions (PR #192688)   Philip Reames via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Further improved exact VLEN lowering for mul reductions (PR #192688)   Philip Reames via llvm-commits
• [llvm] [VPlan] Improve SinkStoreInfo API (NFC) (PR #191057)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   via llvm-commits
• [llvm] [VPlan] Simplify add x, (sub 0, y) -> sub x, y (PR #187228)   Ramkumar Ramachandra via llvm-commits
• [llvm] [APInt] Perf experiment. Add branch hints for most of isSingleWord predicates (PR #193016)   via llvm-commits
• [llvm] [LICM] Allow hoisting may-throw calls when guaranteed to execute (PR #189388)   Gabriel Baraldi via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 MMLA intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 MMLA intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 MMLA intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [VPlan] Strip single-scalar special-casing for replicates (NFC) (PR #189708)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   Steven Perron via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 MMLA intrinsics (PR #193017)   via llvm-commits
• [llvm] [VPlan] Explicitly cache in expandSCEVs (NFC) (PR #189913)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 MMLA intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 MMLA intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [APInt] Perf experiment. Add branch hints for most of isSingleWord predicates (PR #193016)   Max Graey via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 MMLA intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [APInt] Perf experiment. Add branch hints for most of isSingleWord predicates (PR #193016)   Max Graey via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 MMLA intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] Remove Generic-SPMD early detection (PR #150922)   Sergio Afonso via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   via llvm-commits
• [llvm] [VPlan] Extend licm to hoist replicate loads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][NVPTX] Fixed unused variable warning. (PR #193010)   Alex MacLean via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Maryam Moghadas via llvm-commits
• [llvm] [SystemZ] Enable liveness reduction in pre-RA sched strategy. (PR #188823)   Jonas Paulsson via llvm-commits
• [llvm] 00a70e8 - [AMDGPU] Report only local per-function resource usage when object linking is enabled (#192594)   via llvm-commits
• [llvm] [AMDGPU] Report only local per-function resource usage when object linking is enabled (PR #192594)   Shilei Tian via llvm-commits
• [llvm] [SystemZ] Enable liveness reduction in pre-RA sched strategy. (PR #188823)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Enable liveness reduction in pre-RA sched strategy. (PR #188823)   via llvm-commits
• [llvm] [NVPTX] NVPTXAsmPrinter::bufferAggregateConstVec - append null constants instead of iterating (PR #192742)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Port mir-strip-debug to new pass manager (PR #190738)   Aiden Grossman via llvm-commits
• [llvm] [CodeGen] Port mir-strip-debug to new pass manager (PR #190738)   Aiden Grossman via llvm-commits
• [llvm] [NVPTX] NVPTXAsmPrinter::bufferAggregateConstVec - append null constants instead of iterating (PR #192742)   Alex MacLean via llvm-commits
• [clang] [llvm] [libsycl][Driver] Move and rename the SYCL shared library (PR #188770)   Sergey Semenov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [AMDGPU] Delete dead meta instructions (PR #193030)   via llvm-commits
• [llvm] [AMDGPU] Delete dead meta instructions (PR #193030)   via llvm-commits
• [llvm] [AMDGPU] Delete dead meta instructions (PR #193030)   via llvm-commits
• [llvm] [X86][NFC] Reorganize fadd, fsub, fmul and fdiv selection tests (PR #193012)   Simon Pilgrim via llvm-commits
• [llvm] [X86][NFC] Reorganize fadd, fsub, fmul and fdiv selection tests (PR #193012)   Simon Pilgrim via llvm-commits
• [llvm] [X86][NFC] Reorganize fadd, fsub, fmul and fdiv selection tests (PR #193012)   Simon Pilgrim via llvm-commits
• [llvm] [X86][NFC] Reorganize fadd, fsub, fmul and fdiv selection tests (PR #193012)   Simon Pilgrim via llvm-commits
• [llvm] [benchmark][NFC] Remove more unused bazel files (PR #193039)   Jordan Rupprecht via llvm-commits
• [llvm] [benchmark][NFC] Remove more unused bazel files (PR #193039)   via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 vectorization (PR #151530)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Scalarize to first-lane-only directly on VPlan (PR #184267)   Andrei Elovikov via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [VPlan] Scalarize to first-lane-only directly on VPlan (PR #184267)   Andrei Elovikov via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegbankLegalize rules for undef and constants (PR #193024)   Chinmay Deshpande via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegbankLegalize rules for undef and constants (PR #193024)   Chinmay Deshpande via llvm-commits
• [llvm] [RISCV][GISel] Add variant_cc test. NFC (PR #193036)   Sam Elliott via llvm-commits
• [llvm] [VPlan] Scalarize to first-lane-only directly on VPlan (PR #184267)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Scalarize to first-lane-only directly on VPlan (PR #184267)   Andrei Elovikov via llvm-commits
• [llvm] [AArch64] Fix return address auth in swiftasync epilogues (PR #189484)   Jon Roelofs via llvm-commits
• [llvm] [ValueTracking] Fold compares with zero when right side is known non-zero (PR #192860)   Andreas Jonson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [docs] Add missing command line options to llvm-profgen.rst (PR #192890)   Alexander Zaitsev via llvm-commits
• [clang] [llvm] [CodeView] Add line entries for instructions in MS inline asm (PR #193007)   Eli Friedman via llvm-commits
• [compiler-rt] [runtimes] Make later runtimes wait for earlier header targets (PR #192814)   Yaxun Liu via llvm-commits
• [compiler-rt] [compiler-rt][profile] Depend on libc-headers in GPU runtimes build (PR #192814)   Yaxun Liu via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [compiler-rt] [compiler-rt][profile] Depend on libc-headers in GPU runtimes build (PR #192814)   via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [llvm] [VPlan] Scalarize to first-lane-only directly on VPlan (PR #184267)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [compiler-rt][profile] Depend on libc-headers in GPU runtimes build (PR #192814)   Joseph Huber via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [llvm] [ValueTracking] Fold compares with zero when right side is known non-zero (PR #192860)   Max Graey via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU] Select ds.bpermute into v_readlane for uniform input (PR #193042)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU] Select ds.bpermute into v_readlane for uniform input (PR #193042)   via llvm-commits
• [llvm] [AMDGPU] Select ds.bpermute into v_readlane for uniform input (PR #193042)   via llvm-commits
• [llvm] [docs] Add missing command line options to llvm-profgen.rst (PR #192890)   Kartik Ohlan via llvm-commits
• [llvm] [ValueTracking] Fold compares with zero when right side is known non-zero (PR #192860)   Max Graey via llvm-commits
• [llvm] [AMDGPU] Select ds.bpermute into v_readlane for uniform input (PR #193042)   via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   Antonio Frighetto via llvm-commits
• [llvm] [AMDGPU] Report only local per-function resource usage when object linking is enabled (PR #192594)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Deduce argument types before doing GEP (PR #193046)   via llvm-commits
• [llvm] [SPIR-V] Deduce argument types before doing GEP (PR #193046)   via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   via llvm-commits
• [llvm] 5262f00 - [RISCV][GISel] Add variant_cc test. NFC (#193036)   via llvm-commits
• [llvm] [RISCV][GISel] Add variant_cc test. NFC (PR #193036)   Craig Topper via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Relax VOPD constraints for gfx12+ with data deps (PR #191264)   Joe Nash via llvm-commits
• [llvm] [Hexagon] Correctly split masked loads/stores after widening (PR #190689)   Alexey Karyakin via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Migrate to extended LLT (PR #193047)   via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Migrate to extended LLT (PR #193047)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [llvm] [GIsel] Use changeElementType for cond types in LegalizerHelper (PR #193049)   Alex MacLean via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   Yingwei Zheng via llvm-commits
• [llvm] [GIsel] Use changeElementType for cond types in LegalizerHelper (PR #193049)   Alex MacLean via llvm-commits
• [llvm] Add PhaseOrdering test mirroring missed optimization on empty std::set (PR #192840)   Arthur Eubanks via llvm-commits
• [llvm] 8810490 - Add PhaseOrdering test mirroring missed optimization on empty std::set (#192840)   via llvm-commits
• [llvm] Add PhaseOrdering test mirroring missed optimization on empty std::set (PR #192840)   Arthur Eubanks via llvm-commits
• [llvm] [NFC][AMDGU] Remove an unused function (PR #193053)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGU] Remove an unused function (PR #193053)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGU] Remove an unused function (PR #193053)   via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [runtimes][CMake] Move Fortran support code from flang-rt (PR #171610)   Michael Kruse via llvm-commits
• [llvm] InstCombine: Update assumption cache when replacing values (PR #192935)   Yingwei Zheng via llvm-commits
• [llvm] [VPlan] Scalarize to first-lane-only directly on VPlan (PR #184267)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [llvm-dwp] Replace MCStreamer with direct ELF writer for zero-copy output (PR #192112)   David Blaikie via llvm-commits
• [clang] [llvm] [libsycl][Driver] Move and rename the SYCL shared library (PR #188770)   Alexey Bader via llvm-commits
• [clang] [llvm] [libsycl][Driver] Move and rename the SYCL shared library (PR #188770)   via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] [SelectOptimize] Update Missing PSI Error Message, Add Test (PR #193034)   Matt Arsenault via llvm-commits
• [llvm] [SelectOptimize] Update Missing PSI Error Message, Add Test (PR #193034)   Matt Arsenault via llvm-commits
• [lld] [lld/mac] For catalyst outputs, tolerate implicitly linking against arm64e mac tbd files (PR #193065)   Nuri Amari via llvm-commits
• [llvm] [offload] Verify replay config of teams/threads is allowed (PR #192784)   Kevin Sala Penades via llvm-commits
• [llvm] [NFC][CodeGen] Add MachineBlockHashInfoResult for use in NewPM (PR #193059)   Vitaly Buka via llvm-commits
• [lld] [lld/mac] For catalyst outputs, tolerate implicitly linking against arm64e mac tbd files (PR #193065)   via llvm-commits
• [llvm] [llvm] Errorize DebuginfodFetcher::fetch() for inspection at call-sites (NFC) (PR #191191)   Stefan Gränitz via llvm-commits
• [llvm] [offload] Verify replay config of teams/threads is allowed (PR #192784)   Kevin Sala Penades via llvm-commits
• [llvm] [VPlan] Scalarize to first-lane-only directly on VPlan (PR #184267)   Florian Hahn via llvm-commits
• [llvm] [NFC][CodeGen] Add MachineBlockHashInfoResult for use in NewPM (PR #193059)   Vitaly Buka via llvm-commits
• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   Florian Hahn via llvm-commits
• [llvm] [NFC][CodeGen] Add MachineBlockHashInfoResult for use in NewPM (PR #193059)   Vitaly Buka via llvm-commits
• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   via llvm-commits
• [llvm] [VPlan] Simplify add x, (sub 0, y) -> sub x, y (PR #187228)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify add x, (sub 0, y) -> sub x, y (PR #187228)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify add x, (sub 0, y) -> sub x, y (PR #187228)   Florian Hahn via llvm-commits
• [llvm] [NFC][CodeGen] Add MachineBlockHashInfoResult for use in NewPM (PR #193059)   Vitaly Buka via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [CodeGen] Port mir-strip-debug to new pass manager (PR #190738)   via llvm-commits
• [llvm] [SPIRV] Add 64 bit lowering for bitreverse (PR #193068)   via llvm-commits
• [llvm] 39b6d89 - [SPIRV] Add StorageImageExtendedFormats to available list for Vulkan (#192512)   via llvm-commits
• [llvm] [SPIRV] Add StorageImageExtendedFormats to available list for Vulkan (PR #192512)   Steven Perron via llvm-commits
• [llvm] [LoopFusion] Document LoopFusion Pass (PR #192926)   Congzhe Cao via llvm-commits
• [llvm] [RISCV][GlobalISel] Lower G_MEMCPY_INLINE (PR #192671)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GlobalISel] Lower G_MEMCPY_INLINE (PR #192671)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Inline trivial TargetLoweringBase::getCmpLibcallReturnType method. NFC (PR #192483)   Derek Schuff via llvm-commits
• [compiler-rt] [llvm] [RISC-V] Add newer Linux hwprobe extensions detection (PR #192761)   Sam Elliott via llvm-commits
• [llvm] [AMDGPU] Add legalizer rule support for AMDGPU's regbank fminimumnum and fmaximumnum (PR #192719)   Jasmine Tang via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Michael Jones via llvm-commits
• [llvm] 0ab165c - [DebugInfo] Remove unused argument of DataExtractor constructor (NFC) (#191968)   via llvm-commits
• [llvm] [DebugInfo] Remove unused argument of DataExtractor constructor (NFC) (PR #191968)   Sergei Barannikov via llvm-commits
• [llvm] 6e7f08d - [CodeGen] Inline trivial TargetLoweringBase::getCmpLibcallReturnType method. NFC (#192483)   via llvm-commits
• [llvm] [LLVM][Transforms][Attributor] - Optimize AAIsDeadFunction::isAssumedDead (PR #189467)   Pranav Bhandarkar via llvm-commits
• [llvm] [CodeGen] Inline trivial TargetLoweringBase::getCmpLibcallReturnType method. NFC (PR #192483)   Sam Clegg via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Matt Arsenault via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [CodeView] Resolve all forward referenced types from TPI stream (PR #193064)   via llvm-commits
• [llvm] 66f0da7 - [Extractor] Use function return for the one and only output (#191824)   via llvm-commits
• [llvm] [Extractor] Use function return for the one and only output (PR #191824)   Shimin Cui via llvm-commits
• [llvm] a80dd15 - [CodeGen] Port mir-strip-debug to new pass manager (#190738)   via llvm-commits
• [compiler-rt] [llvm] [WebAssembly] Explicitly set `getCmpLibcallReturnType` to i32 (PR #192425)   Derek Schuff via llvm-commits
• [llvm] [CodeGen] Port mir-strip-debug to new pass manager (PR #190738)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Matt Arsenault via llvm-commits
• [llvm] [X86][APX] Add assert isReserved if source operand is PhysReg (PR #192595)   Matt Arsenault via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Justin Fargnoli via llvm-commits
• [compiler-rt] [llvm] [WebAssembly] Explicitly set `getCmpLibcallReturnType` to i32 (PR #192425)   Derek Schuff via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use libc-headers for the GPU runtimes build (PR #192814)   Yaxun Liu via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use libc-headers for the GPU runtimes build (PR #192814)   Joseph Huber via llvm-commits
• [llvm] [DAG] Precommit tests for computeKnownFPClass - ISD::EXTRACT_SUBVECTOR and ISD::INSERT_SUBVECTOR. (PR #190694)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [Clang][CodeGen] Report when an alias points to an incompatible target (PR #192397)   Igor Kudrin via llvm-commits
• [llvm] [AMDGPU] Add legalizer rule support for AMDGPU's regbank fminimumnum and fmaximumnum (PR #192719)   Jasmine Tang via llvm-commits
• [llvm] [AMDGPU] Add legalizer rule support for AMDGPU's regbank fminimumnum and fmaximumnum (PR #192719)   Jasmine Tang via llvm-commits
• [llvm] [VPlan] Improve SinkStoreInfo API (NFC) (PR #191057)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Improve SinkStoreInfo API (NFC) (PR #191057)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Improve SinkStoreInfo API (NFC) (PR #191057)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Improve SinkStoreInfo API (NFC) (PR #191057)   Andrei Elovikov via llvm-commits
• [llvm] [AArch64] AArch64::ADCWr and friends map to their sForm, but their sForms do not map to themselves (PR #167518)   via llvm-commits
• [clang] [compiler-rt] [Clang][CodeGen] Report when an alias points to an incompatible target (PR #192397)   Igor Kudrin via llvm-commits
• [llvm] [NVPTX] Add reverseBranchCondition and CBranchOther (PR #191889)   via llvm-commits
• [llvm] [AArch64] AArch64::ADCWr and friends map to their sForm, but their sForms do not map to themselves (PR #167518)   via llvm-commits
• [clang] [llvm] [AArch64][PAC] Handle signing of init/fini pointers in AsmPrinter (PR #193087)   Anatoly Trosinenko via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Support user-defined declare reduction with derived types (PR #190288)   via llvm-commits
• [flang] [llvm] [mlir] [flang][OpenMP] Support user-defined declare reduction with derived types (PR #190288)   via llvm-commits
• [llvm] 07f29a3 - Revert "[HLSL][DirectX] Emit convergence control tokens when targeting DirectX" (#193090)   via llvm-commits
• [clang] [llvm] Revert "[HLSL][DirectX] Emit convergence control tokens when targeting DirectX" (PR #193090)   Finn Plummer via llvm-commits
• [lldb] [llvm] [CodeView] Resolve all forward referenced types from TPI stream (PR #193064)   Alexandre Ganea via llvm-commits
• [lldb] [llvm] [CodeView] Resolve all forward referenced types from TPI stream (PR #193064)   Alexandre Ganea via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_sat_pk4_i4_i8 / amdgcn_sat_pk4_u4_u8 (PR #193096)   Chinmay Deshpande via llvm-commits
• [llvm] [offload] Remove unnecessary extra allocations in kernel replay tool (PR #193108)   Kevin Sala Penades via llvm-commits
• [libc] [llvm] [libc][math] Implement half precision lgamma function (PR #192834)   Max Graey via llvm-commits
• [llvm] [BOLT] Add unit tests for pre-aggregated profile parsing (PR #192390)   Amir Ayupov via llvm-commits
• [llvm] [LV][RISCV][NFC] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Michael Berg via llvm-commits
• [llvm] [LV][RISCV][NFC] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Michael Berg via llvm-commits
• [llvm] [LV][RISCV][NFC] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Michael Berg via llvm-commits
• [llvm] [LV][RISCV][NFC] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Michael Berg via llvm-commits
• [llvm] [AMDGPU] Fixed verifier crash because of multiple live range components. (PR #190719)   Dhruva Chakrabarti via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   Mel Chen via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   Mel Chen via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   Mel Chen via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_sat_pk4_i4_i8 / amdgcn_sat_pk4_u4_u8 (PR #193096)   Aidan Shilling via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   Kito Cheng via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   via llvm-commits
• [clang] [llvm] [CodeView] Add line entries for instructions in MS inline asm (PR #193007)   via llvm-commits
• [llvm] 04f3d43 - [X86][APX] Add assert isReserved if source operand is PhysReg (#192595)   via llvm-commits
• [llvm] [X86][APX] Add assert isReserved if source operand is PhysReg (PR #192595)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Jeffrey Byrnes via llvm-commits
• [lld] [lld-macho] Relax safe ICF's keepUnique for ld64-coalesced data sections (PR #193125)   via llvm-commits
• [llvm] [test][LowerTypeTests] Re-generate jump table tests with --check-globals (PR #192734)   Peter Collingbourne via llvm-commits
• [llvm] 021672f - [test][LowerTypeTests] Re-generate jump table tests with --check-globals (#192734)   via llvm-commits
• [llvm] [test][LowerTypeTests] Re-generate jump table tests with --check-globals (PR #192734)   Vitaly Buka via llvm-commits
• [llvm] [RISCV][TTI] Return valid cost when step vector from extract.last.active needs to split. (PR #192161)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Return valid cost when step vector from extract.last.active needs to split. (PR #192161)   Elvis Wang via llvm-commits
• [llvm] [RISCV][TTI] Return valid cost when step vector from extract.last.active needs to split. (PR #192161)   Elvis Wang via llvm-commits
• [llvm] [BOLT] Fix stream position before appendPadding in writeEHFrameHeader (PR #193126)   Rafael Auler via llvm-commits
• [llvm] [BOLT] Fix stream position before appendPadding in writeEHFrameHeader (PR #193126)   via llvm-commits
• [llvm] b39dfca - [AMDGPU] Fixed verifier crash because of multiple live range components. (#190719)   via llvm-commits
• [llvm] [AMDGPU] Fixed verifier crash because of multiple live range components. (PR #190719)   Dhruva Chakrabarti via llvm-commits
• [llvm] b906cf3 - [CodeGen] Add constexpr and static_assert to fold64To16 (#192864)   via llvm-commits
• [llvm] [CodeGen] Add constexpr and static_assert to fold64To16 (PR #192864)   Vitaly Buka via llvm-commits
• [llvm] [AArch64] Use ADDP tree for v16i8 to i16 bitmask extraction (PR #192974)   Conor Kotwasinski via llvm-commits
• [llvm] [X86] Improve FREEZE node elimination for SETCC operations (PR #192362)   Feng Zou via llvm-commits
• [llvm] [X86] Improve FREEZE node elimination for SETCC operations (PR #192362)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [CodeGen] Add constexpr and static_assert to fold64To16 (PR #192864)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Boyao Wang via llvm-commits
• [lld] [lld-macho] Relax safe ICF's keepUnique for ld64-coalesced data sections (PR #193125)   Zhaoxuan Jiang via llvm-commits
• [llvm] [X86] Improve FREEZE node elimination for SETCC operations (PR #192362)   Feng Zou via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] Revert "[AMDGPU] Fixed verifier crash because of multiple live range components." (PR #193135)   Dhruva Chakrabarti via llvm-commits
• [llvm] Revert "[AMDGPU] Fixed verifier crash because of multiple live range components." (PR #193135)   via llvm-commits
• [llvm] Revert "[AMDGPU] Fixed verifier crash because of multiple live range components." (PR #193135)   via llvm-commits
• [llvm] Revert "[AMDGPU] Fixed verifier crash because of multiple live range components." (PR #193135)   via llvm-commits
• [llvm] [LoadStoreVectorizer] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [lld] [WIP][lld][macho] Restructure thunk generation algorithm (PR #192758)   Ellis Hoag via llvm-commits
• [llvm] [X86][AVX10.2] Skip FP2I/I2FP customizations for bf16 (PR #193137)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Functional llvm.vector.reduce.mul on scalable types (PR #193094)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Functional llvm.vector.reduce.mul on scalable types (PR #193094)   Pengcheng Wang via llvm-commits
• [llvm] [BOLT] Fix stream position before appendPadding in writeEHFrameHeader (PR #193126)   Maksim Panchenko via llvm-commits
• [llvm] [X86][AVX10.2] Skip FP2I/I2FP customizations for bf16 (PR #193137)   via llvm-commits
• [llvm] [PowerPC] Fix ADJCALLSTACKUP and ADJCALLSTACKDOWN def (PR #184696)   Amy Kwan via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use libc-headers for the GPU runtimes build (PR #192814)   Yaxun Liu via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use runtimes-libc-headers in the GPU runtimes build (PR #192814)   Yaxun Liu via llvm-commits
• [llvm] b2d7d89 - Revert "[AMDGPU] Fixed verifier crash because of multiple live range components." (#193135)   via llvm-commits
• [llvm] Revert "[AMDGPU] Fixed verifier crash because of multiple live range components." (PR #193135)   via llvm-commits
• [llvm] [X86] Truncates i64 add arithmetic to i32 when known zeroes in upper 33 bits (PR #191619)   via llvm-commits
• [lld] [lld-macho] Relax safe ICF's keepUnique for ld64-coalesced data sections (PR #193125)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Lower G_MEMCPY_INLINE (PR #192671)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Further improved exact VLEN lowering for mul reductions (PR #192688)   Pengcheng Wang via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [lld] [WIP][lld][macho] Restructure thunk generation algorithm (PR #192758)   Ellis Hoag via llvm-commits
• [llvm] [AMDGPU] Fixed verifier crash because of multiple live range components. (PR #190719)   Dhruva Chakrabarti via llvm-commits
• [llvm] Revert "[AMDGPU] Fixed verifier crash because of multiple live range components." (PR #193135)   LLVM Continuous Integration via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [lld] [ELF] Parallelize input file loading (PR #191690)   Fangrui Song via llvm-commits
• [llvm] Revert "[AMDGPU] Fixed verifier crash because of multiple live range components." (PR #193135)   LLVM Continuous Integration via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [lld] [ELF] Parallelize input file loading (PR #191690)   Fangrui Song via llvm-commits
• [lld] 83f8eee - [ELF] Parallelize input file loading (#191690)   via llvm-commits
• [lld] [ELF] Parallelize input file loading (PR #191690)   Fangrui Song via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Boyao Wang via llvm-commits
• [lld] [ELF] Parallelize input file loading (PR #191690)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "[AMDGPU] Fixed verifier crash because of multiple live range components." (PR #193135)   Dhruva Chakrabarti via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Fangrui Song via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Phoebe Wang via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Fangrui Song via llvm-commits
• [lld] [ELF] Parallelize input file loading (PR #191690)   LLVM Continuous Integration via llvm-commits
• [llvm] [LazyValueInfo] Support vector types in ICmp condition handling (PR #192900)   Jim Lin via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Sam Elliott via llvm-commits
• [llvm] [GlobaISel] Protect against Variable 'NumBucketedMatchers' set but not used Error/Warning. (PR #193000)   Mikael Holmen via llvm-commits
• [lld] [lld-macho] Relax safe ICF's keepUnique for ld64-coalesced data sections (PR #193125)   Zhaoxuan Jiang via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Austin Kerbow via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [clang] [llvm] [clang][RISCV] Use macro to check if intrinsics are supported (PR #187197)   Brandon Wu via llvm-commits
• [clang] [llvm] [clang][RISCV] Use macro to check if intrinsics are supported (PR #187197)   Brandon Wu via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [CodeGen] Skip unsafe splits in RenameIndependentSubregs (PR #190925)   Dominik Montada via llvm-commits
• [llvm] 7f6896a - [X86] Quote symbol names that collide with registers/keywords in Intel syntax (#186570)   via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Fangrui Song via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [lld] [ELF] Fix heap-use-after-free with INPUT(relative-path) (PR #193146)   Fangrui Song via llvm-commits
• [lld] 773a14b - [ELF] Fix heap-use-after-free with INPUT(relative-path) (#193146)   via llvm-commits
• [lld] [ELF] Fix heap-use-after-free with INPUT(relative-path) (PR #193146)   Fangrui Song via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Unmark wave reduce intrinsics for constant folding (PR #193142)   via llvm-commits
• [llvm] [VPlan] Improve SinkStoreInfo API (NFC) (PR #191057)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Improve SinkStoreInfo API (NFC) (PR #191057)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Improve SinkStoreInfo API (NFC) (PR #191057)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Improve SinkStoreInfo API (NFC) (PR #191057)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify add x, (sub 0, y) -> sub x, y (PR #187228)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify add x, (sub 0, y) -> sub x, y (PR #187228)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify add x, (sub 0, y) -> sub x, y (PR #187228)   Ramkumar Ramachandra via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Alexis Engelke via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Alexis Engelke via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [clang] [llvm] [clang][RISCV] Use macro to check if intrinsics are supported (PR #187197)   Brandon Wu via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   Cullen Rhodes via llvm-commits
• [llvm] [VPlan] Extend licm to hoist replicate loads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64] Extend testing of add-like-ors. NFC (PR #193071)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] 76989f2 - [VPlan] Simplify add x, (sub 0, y) -> sub x, y (#187228)   via llvm-commits
• [llvm] [VPlan] Simplify add x, (sub 0, y) -> sub x, y (PR #187228)   Ramkumar Ramachandra via llvm-commits
• [lld] [ELF] Fix crash when INCLUDE'd linker script ends mid-assignment (PR #192198)   Fangrui Song via llvm-commits
• [llvm] [SPIR-V] Fix OpTypeImage capability requirements for Vulkan (PR #192626)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Fix OpTypeImage capability requirements for Vulkan (PR #192626)   via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   Mel Chen via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   Mel Chen via llvm-commits
• [llvm] [SPIR-V] Fix OpTypeImage capability requirements for Vulkan (PR #192626)   Arseniy Obolenskiy via llvm-commits
• [llvm] [VPlan] Strip WidenStore handling in narrowToSingleScalars (PR #184765)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Unmark wave reduce intrinsics for constant folding (PR #193142)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Unmark wave reduce intrinsics for constant folding (PR #193142)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Unmark wave reduce intrinsics for constant folding (PR #193142)   Steffen Larsen via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   Alexis Engelke via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Nikita Popov via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   Mel Chen via llvm-commits
• [llvm] [NFC][llvm-objdump] Use CHECK-NEXT in MachO tests (PR #192696)   James Henderson via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Nikita Popov via llvm-commits
• [llvm] [llvm] don't merge constants with COMDAT (PR #192477)   Alexis Engelke via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [runtimes][CMake] Move Fortran support code from flang-rt (PR #171610)   Petr Hosek via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [ConstantMerge] don't merge constants with COMDAT (PR #192477)   via llvm-commits
• [llvm] [LazyValueInfo] Support vector types in ICmp condition handling (PR #192900)   Nikita Popov via llvm-commits
• [llvm] [ConstantMerge] don't merge constants with COMDAT (PR #192477)   via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [runtimes][CMake] Move Fortran support code from flang-rt (PR #171610)   Petr Hosek via llvm-commits
• [llvm] [Mips] Support mips1 and singlethread ATOMIC_FENCE (PR #190129)   via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Nikita Popov via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [runtimes][CMake] Move Fortran support code from flang-rt (PR #171610)   Petr Hosek via llvm-commits
• [llvm] [SLP] Normalize copyable operand order to group loads for better vectorization (PR #189181)   Martin Storsjö via llvm-commits
• [llvm] [VPlan] Expand DerivedIV into executable recipes (PR #187589)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Mips] Support mips1 and singlethread ATOMIC_FENCE (PR #190129)   via llvm-commits
• [llvm] [Mips] Support mips1 and singlethread ATOMIC_FENCE (PR #190129)   via llvm-commits
• [llvm] [VPlan] Expand DerivedIV into executable recipes (PR #187589)   Ramkumar Ramachandra via llvm-commits
• [llvm] 163d0b1 - [ConstantMerge] don't merge constants with COMDAT (#192477)   via llvm-commits
• [llvm] [ConstantMerge] don't merge constants with COMDAT (PR #192477)   Alexis Engelke via llvm-commits
• [llvm] [VPlan] Expand DerivedIV into executable recipes (PR #187589)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use runtimes-libc-headers in the GPU runtimes build (PR #192814)   Petr Hosek via llvm-commits
• [llvm] [InstCombine] Reassociate commutative binops over select/phi/minmax (PR #187493)   Mitch Briles via llvm-commits
• [llvm] [APInt] Perf experiment. Add branch hints for most of isSingleWord predicates (PR #193016)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Unmark wave reduce intrinsics for constant folding (PR #193142)   EasyOn Aaditya via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Alexis Engelke via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_ballot (PR #193105)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_ballot (PR #193105)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for BVH intersect ray (PR #192583)   Petar Avramovic via llvm-commits
• [llvm] [VPlan] Simplify add x, (sub 0, y) -> sub x, y (PR #187228)   LLVM Continuous Integration via llvm-commits
• [llvm] [GlobalISel][AMDGPU][AArch64] Fix GlobalISel copy propagation (PR #188781)   David Green via llvm-commits
• [llvm] 547c3ad - AMDGPU/GlobalISel: RegbankLegalize rules for undef and constants (#193024)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegbankLegalize rules for undef and constants (PR #193024)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegbankLegalize rules for G_BITCAST (PR #193025)   Petar Avramovic via llvm-commits
• [llvm] [LoopInterchange] Bail out when memory instruction ratio is high (PR #192954)   Sjoerd Meijer via llvm-commits
• [llvm] [GIsel] Use changeElementType for cond types in LegalizerHelper (PR #193049)   David Green via llvm-commits
• [llvm] [AMDGPU] Expand constant named barrier matching in SDag (PR #191506)   Pierre van Houtryve via llvm-commits
• [llvm] [RISCV][NFC] Use IfDefEmitter in RISCVTargetDefEmitter (PR #193151)   via llvm-commits
• [llvm] [RISCV][NFC] Use IfDefEmitter in RISCVTargetDefEmitter (PR #193151)   via llvm-commits
• [llvm] [ConstantMerge] don't merge constants with COMDAT (PR #192477)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstantMerge] don't merge constants with COMDAT (PR #192477)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoopInterchange] Bail out when memory instruction ratio is high (PR #192954)   Madhur Amilkanthwar via llvm-commits
• [llvm] 59a9aa3 - [LV] Add flag to always force a scalable VF when feasible. (#182467)   via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Expand DerivedIV into executable recipes (PR #187589)   Ramkumar Ramachandra via llvm-commits
• [llvm] [llvm][YAML] Support aliases (anchors) in YAMLIO (PR #146371)   James Henderson via llvm-commits
• [llvm] [llvm][YAML] Support aliases (anchors) in YAMLIO (PR #146371)   James Henderson via llvm-commits
• [llvm] [llvm][YAML] Support aliases (anchors) in YAMLIO (PR #146371)   James Henderson via llvm-commits
• [llvm] [RISCV][NFC] Remove unused RISCVExtBit (PR #193153)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Prefer mul24 over mad24 on SDWA targets (PR #193033)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV][NFC] Remove unused RISCVExtBit (PR #193153)   via llvm-commits
• [llvm] [RISCV][NFC] Remove unused RISCVExtBit (PR #193153)   Luke Lau via llvm-commits
• [llvm] [Mips] Support mips1 and singlethread ATOMIC_FENCE (PR #190129)   via llvm-commits
• [llvm] [Mips] Support mips1 and singlethread ATOMIC_FENCE (PR #190129)   via llvm-commits
• [llvm] [APInt] Perf experiment. Add branch hints for most of isSingleWord predicates (PR #193016)   Max Graey via llvm-commits
• [llvm] [ConstantMerge] don't merge constants with COMDAT (PR #192477)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV][NFC] Use IfDefEmitter in RISCVTargetDefEmitter (PR #193151)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][NFC] Remove unused RISCVExtBit (PR #193153)   Pengcheng Wang via llvm-commits
• [llvm] [InstCombine] Remove support for volatile in phi of load transform (PR #193154)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Remove support for volatile in phi of load transform (PR #193154)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegbankLegalize rules for undef and constants (PR #193024)   Petar Avramovic via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Wenju He via llvm-commits
• [llvm] [ConstantFolding] Increase folding limit for vector loads to 128 bytes (PR #192775)   Wenju He via llvm-commits
• [llvm] [VPlan] Extend licm to hoist replicate loads (PR #179506)   Luke Lau via llvm-commits
• [llvm] [VPlan] Extend licm to hoist replicate loads (PR #179506)   Luke Lau via llvm-commits
• [llvm] 615678b - [Coroutines] Add verifier checks for llvm.coro.begin and llvm.coro.id (#192887)   via llvm-commits
• [llvm] [mlir] [Coroutines] Add verifier checks for llvm.coro.begin and llvm.coro.id (PR #192887)   Weibo He via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary extra passes from some tests (PR #193155)   Luke Lau via llvm-commits
• [llvm] [VPlan] Check FOR/FMinMaxNum epilogue restrictions in VPlan. (PR #191815)   David Sherwood via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Marcos Maronas via llvm-commits
• [llvm] [VPlan] Check FOR/FMinMaxNum epilogue restrictions in VPlan. (PR #191815)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary extra passes from some tests (PR #193155)   David Sherwood via llvm-commits
• [llvm] [RISCV][NFC] Remove unused RISCVExtBit (PR #193153)   via llvm-commits
• [llvm] [VPlan] Extend licm to hoist replicate loads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [LV] Remove selectUserVF, remove use of legacy expectedCost (NFCI) (PR #191216)   via llvm-commits
• [llvm] [SPIR-V] Deduce argument types before doing GEP (PR #193046)   Nathan Gauër via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Marcos Maronas via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Deduce argument types before doing GEP (PR #193046)   Nathan Gauër via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   Nathan Gauër via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegbankLegalize rules for G_BITCAST (PR #193025)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][ISel] Remove zero instruction for `rev` all true predicates (PR #192925)   Hari Limaye via llvm-commits
• [llvm] [VPlan] Extend licm to hoist replicate loads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Check FOR/FMinMaxNum epilogue restrictions in VPlan. (PR #191815)   via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [LICM] Remove unnecessary call arg in test (NFC) (PR #193159)   Nikita Popov via llvm-commits
• [llvm] ab42839 - [LICM] Remove unnecessary call arg in test (NFC) (#193159)   via llvm-commits
• [llvm] [LICM] Remove unnecessary call arg in test (NFC) (PR #193159)   Nikita Popov via llvm-commits
• [llvm] [GlobalISel][AMDGPU][AArch64] Fix GlobalISel copy propagation (PR #188781)   Igor Wodiany via llvm-commits
• [llvm] [GlobalISel][AMDGPU][AArch64] Fix GlobalISel copy propagation (PR #188781)   Igor Wodiany via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fadd, vp_fmul (PR #191842)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fadd, vp_fmul (PR #191842)   Luke Lau via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Nathan Gauër via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Pierre van Houtryve via llvm-commits
• [llvm] [libsycl] add single_task (PR #192499)   Kseniya Tikhomirova via llvm-commits
• [llvm] [VPlan] Strip null-check in partial-red casts (NFC) (PR #193162)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Strip null-check in partial-red casts (NFC) (PR #193162)   via llvm-commits
• [llvm] [VPlan] Strip null-check in partial-red casts (NFC) (PR #193162)   via llvm-commits
• [llvm] [DAGCombiner] Honor rewrite semantics of fast-math flags in fdiv combine (PR #167595)   Simon Pilgrim via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary extra passes from some tests (PR #193155)   David Sherwood via llvm-commits
• [llvm] [LICM] Remove unnecessary check during store hoisting (PR #187529)   Nikita Popov via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary extra passes from some tests (PR #193155)   Florian Hahn via llvm-commits
• [llvm] [libsycl] add single_task (PR #192499)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add single_task (PR #192499)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary extra passes from some tests (PR #193155)   David Sherwood via llvm-commits
• [llvm] [AMDGPU][NFC] Cleans up the code in the AMDGPUTargetMachine.cpp (PR #193169)   Vikash Gupta via llvm-commits
• [llvm] [AMDGPU][NFC] Cleans up the code in the AMDGPUTargetMachine.cpp (PR #193169)   via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #192887 (PR #193167)   Sohaib Iftikhar via llvm-commits
• [llvm] [Mips] Support mips1 and singlethread ATOMIC_FENCE (PR #190129)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Cleans up the code in the AMDGPUTargetMachine.cpp (PR #193169)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Cleans up the code in the AMDGPUTargetMachine.cpp (PR #193169)   Christudasan Devadasan via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect DCE (PR #193104)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect DCE (PR #193104)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_sqrt (PR #191837)   Luke Lau via llvm-commits
• [llvm] [NFC][SPIR-V] Add urem, srem, and snegate tests for integer arithmetic (PR #193170)   Arseniy Obolenskiy via llvm-commits
• [llvm] [NFC][SPIR-V] Add urem, srem, and snegate tests for integer arithmetic (PR #193170)   via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect DCE (PR #193104)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_sqrt (PR #191837)   via llvm-commits
• [llvm] [AMDGPU] Support atomic load for vector float types (v2f32, v4f32, v2f16, v4f16, v8f16) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [libsycl] add single_task (PR #192499)   Kseniya Tikhomirova via llvm-commits
• [llvm] [AMDGPU][NFC] Cleans up the code in the AMDGPUTargetMachine.cpp (PR #193169)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [LoopInterchange] Bail out when memory instruction ratio is high (PR #192954)   Ryotaro Kasuga via llvm-commits
• [llvm] [SPIR-V] Add support for OpFMod intrinsic (PR #193172)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [SPIR-V] Add support for OpFMod intrinsic (PR #193172)   via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Luke Lau via llvm-commits
• [llvm] [SPIR-V] Add support for OpFMod intrinsic (PR #193172)   via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [llvm] Errorize DebuginfodFetcher::fetch() for inspection at call-sites (NFC) (PR #191191)   Stefan Gränitz via llvm-commits
• [llvm] [SPIR-V] Add support for OpFMod intrinsic (PR #193172)   Arseniy Obolenskiy via llvm-commits
• [llvm] [llvm] Errorize DebuginfodFetcher::fetch() for inspection at call-sites (NFC) (PR #191191)   Stefan Gränitz via llvm-commits
• [llvm] [RISCV] Functional llvm.vector.reduce.mul on scalable types (PR #193094)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_sqrt (PR #191837)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fadd, vp_fmul (PR #191842)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][NFC] Remove unused RISCVExtBit (PR #193153)   Pengcheng Wang via llvm-commits
• [llvm] [llvm] Errorize DebuginfodFetcher::fetch() for inspection at call-sites (NFC) (PR #191191)   Stefan Gränitz via llvm-commits
• [llvm] 5cc7956 - [RISCV] Remove codegen for vp_fadd, vp_fmul (#191842)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fadd, vp_fmul (PR #191842)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_sqrt (PR #191837)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_sqrt (PR #191837)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [RISCV][NFC] Remove unused RISCVExtBit (PR #193153)   Pengcheng Wang via llvm-commits
• [llvm] [AArch64] Optimize lowering of i1 vector reduction (PR #187912)   David Green via llvm-commits
• [llvm] [AArch64] Optimize lowering of i1 vector reduction (PR #187912)   David Green via llvm-commits
• [llvm] [AArch64] Optimize lowering of i1 vector reduction (PR #187912)   David Green via llvm-commits
• [llvm] [AArch64] Optimize lowering of i1 vector reduction (PR #187912)   David Green via llvm-commits
• [llvm] [RISCV][NFC] Remove unused RISCVExtBit (PR #193153)   Pengcheng Wang via llvm-commits
• [llvm] [AArch64][SelectionDAG] Improve codegen for and(sext(Op), splat(1)) (PR #192405)   Paul Walker via llvm-commits
• [llvm] bf24d74 - [RISCV][NFC] Use IfDefEmitter in RISCVTargetDefEmitter (#193151)   via llvm-commits
• [llvm] [RISCV][NFC] Use IfDefEmitter in RISCVTargetDefEmitter (PR #193151)   Pengcheng Wang via llvm-commits
• [llvm] b78a0a0 - [AArch64][SelectionDAG] Improve codegen for and(sext(Op), splat(1)) (#192405)   via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Haohai Wen via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Haohai Wen via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Haohai Wen via llvm-commits
• [llvm] [AArch64][SelectionDAG] Improve codegen for and(sext(Op), splat(1)) (PR #192405)   Sushant Gokhale via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Haohai Wen via llvm-commits
• [llvm] [AMDGPU][NFC] Eliminates the redundant code in the AMDGPUTargetMachine.cpp (PR #193169)   Vikash Gupta via llvm-commits
• [llvm] [RISCV][NFC] Remove unused RISCVExtBit (PR #193153)   Pengcheng Wang via llvm-commits
• [llvm] a99dd83 - [LV][NFC] Remove unnecessary extra passes from some tests (#193155)   via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary extra passes from some tests (PR #193155)   David Sherwood via llvm-commits
• [llvm] Fixed issue of use after move (PR #193175)   Jaydeep Chauhan via llvm-commits
• [llvm] Fixed issue of use after move (PR #193175)   via llvm-commits
• [llvm] [RISCV] Functional llvm.vector.reduce.mul on scalable types (PR #193094)   Luke Lau via llvm-commits
• [llvm] Fixed issue of use after move (PR #193175)   via llvm-commits
• [llvm] AMDGPU/GIsel Legalize rules for cvt_scalef32_sr_pk_fp4_{f16,bf16,f32} intrinsic (PR #193176)   Abhinav Garg via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   Antonio Frighetto via llvm-commits
• [llvm] AMDGPU/GIsel Legalize rules for cvt_scalef32_sr_pk_fp4_{f16,bf16,f32} intrinsic (PR #193176)   via llvm-commits
• [llvm] AMDGPU/GIsel Legalize rules for cvt_scalef32_sr_pk_fp4_{f16,bf16,f32} intrinsic (PR #193176)   via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Peter Smith via llvm-commits
• [llvm] Fixed issue of use after move (PR #193175)   Jaydeep Chauhan via llvm-commits
• [llvm] Fixed issue of use after move (PR #193175)   Jaydeep Chauhan via llvm-commits
• [llvm] [InstCombine] fold fabs(uitofp(i16 a) - uitofp(i16 b)) < 1.0 to a == b (PR #191378)   Matt Arsenault via llvm-commits
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• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   David Sherwood via llvm-commits
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• [llvm] [Attributor] Regenerate test checks (NFC) (PR #193192)   LLVM Continuous Integration via llvm-commits
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• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Dmitry Sidorov via llvm-commits
• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   Paul Walker via llvm-commits
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• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   Luke Lau via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Dmitry Sidorov via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Add support for OpFMod intrinsic (PR #193172)   Dmitry Sidorov via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] Dtlto cache optimization (PR #193189)   Katya Romanova via llvm-commits
• [llvm] [APInt] Perf experiment. Add branch hints for most of isSingleWord predicates (PR #193016)   Max Graey via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Florian Hahn via llvm-commits
• [llvm] [Attributor] Regenerate test checks (NFC) (PR #193192)   LLVM Continuous Integration via llvm-commits
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• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
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• [llvm] [SPIR-V] Fix validation errors for function pointers with CodeSectionINTEL storage class (PR #192973)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix validation errors for function pointers with CodeSectionINTEL storage class (PR #192973)   Dmitry Sidorov via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Thomas Fry via llvm-commits
• [llvm] [DAG] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Thomas Fry via llvm-commits
• [llvm] [LV] Improve cost model for some replicating recipes (PR #192056)   Florian Hahn via llvm-commits
• [llvm] [GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (PR #191260)   Matt Arsenault via llvm-commits
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• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
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• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Add support for OpFMod intrinsic (PR #193172)   Arseniy Obolenskiy via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   via llvm-commits
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• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   Matt Arsenault via llvm-commits
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• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Matt Arsenault via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Clemens Wasser via llvm-commits
• [llvm] [llvm-cov] Keep propagating new error in CoverageMapping::load() (PR #193197)   Stefan Gränitz via llvm-commits
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• [llvm] [llvm] Errorize DebuginfodFetcher for inspection at call-sites (PR #191191)   Stefan Gränitz via llvm-commits
• [llvm] [llvm-cov] Fix error propagation in CoverageMapping::load() (PR #193197)   Stefan Gränitz via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [CodeGen] Port mir-debugify to new pass manager (PR #193201)   via llvm-commits
• [llvm] [GlobalISel][AMDGPU][AArch64] Fix GlobalISel copy propagation (PR #188781)   Matt Arsenault via llvm-commits
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• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   David Green via llvm-commits
• [llvm] [CodeGen] Port mir-debugify to new pass manager (PR #193201)   via llvm-commits
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• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
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• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
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• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
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• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Pankaj Dwivedi via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Shreeyash Pandey via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Matt Arsenault via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Matt Arsenault via llvm-commits
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• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   via llvm-commits
• [llvm] 037a48a - [InstCombine] fold fabs(uitofp(i16 a) - uitofp(i16 b)) < 1.0 to a == b (#191378)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] fold fabs(uitofp(i16 a) - uitofp(i16 b)) < 1.0 to a == b (PR #191378)   Shreeyash Pandey via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Matt Arsenault via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Alexis Engelke via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   Cullen Rhodes via llvm-commits
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• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
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• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Ramkumar Ramachandra via llvm-commits
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• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #171515)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #171515)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #171515)   Matt Arsenault via llvm-commits
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• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Matt Arsenault via llvm-commits
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• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
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• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Clemens Wasser via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Clemens Wasser via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Fix OpTypeImage capability requirements for Vulkan (PR #192626)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Simon Pilgrim via llvm-commits
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• [llvm] [llvm-cov] Fix error propagation in CoverageMapping::load() (PR #193197)   Stefan Gränitz via llvm-commits
• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Simon Pilgrim via llvm-commits
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• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Ramkumar Ramachandra via llvm-commits
• [llvm] a976a72 - [AMDGPU] Multi dword spilling for unaligned tuples (#183701)   via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   EasyOn Aaditya via llvm-commits
• [lldb] [llvm] [lldb] Add Python cryptography package as new test dependency (PR #192434)   Stefan Gränitz via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   Alexis Engelke via llvm-commits
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• [llvm] [LV] Change VPLane::getAsRuntimeExpr to use constant 64-bit indices (PR #193206)   David Sherwood via llvm-commits
• [llvm] [VPlan] Run final removeBranchOnConst after late simplifyRecipes. (PR #193069)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Pankaj Dwivedi via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
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• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
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• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Alex Voicu via llvm-commits
• [llvm] [LV][RISCV][NFC] Update strided-accesses.ll to UTC version 6 (PR #193211)   Mel Chen via llvm-commits
• [llvm] [LV][RISCV][NFC] Update strided-accesses.ll to UTC version 6 (PR #193211)   Mel Chen via llvm-commits
• [llvm] [LV] Change VPLane::getAsRuntimeExpr to use constant 64-bit indices (PR #193206)   Luke Lau via llvm-commits
• [llvm] [LV] Add test for interaction between interleaved and strided load. nfc (PR #192990)   Mel Chen via llvm-commits
• [llvm] [X86][AVX10.2] Skip FP2I/I2FP customizations for bf16 (PR #193137)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10.2] Skip FP2I/I2FP customizations for bf16 (PR #193137)   Phoebe Wang via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Matthew Devereau via llvm-commits
• [llvm] [X86][AVX10.2] Skip FP2I/I2FP customizations for bf16 (PR #193137)   Phoebe Wang via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Matt Arsenault via llvm-commits
• [llvm] 9c2d944 - [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (#162242)   via llvm-commits
• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][NVPTX] Allow targets to configure CSE strategy (PR #192812)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][NVPTX] Allow targets to configure CSE strategy (PR #192812)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add llvm.amdgcn.s.prefetch.inst intrinsic (PR #192440)   Mirko Brkušanin via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Change VPLane::getAsRuntimeExpr to use constant 64-bit indices (PR #193206)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   via llvm-commits
• [llvm] [LV][RISCV][NFC] Update strided-accesses.ll to UTC version 6 (PR #193211)   via llvm-commits
• [llvm] [X86][AVX10.2] Skip FP2I/I2FP customizations for bf16 (PR #193137)   via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   via llvm-commits
• [lldb] [llvm] [lldb] Add HTTPS hardening tests for SymbolLocatorSymStore (PR #192274)   Stefan Gränitz via llvm-commits
• [llvm] [llvm][HTTP] Apply WinHTTP timeout setting after WinHttpOpen (PR #188969)   via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Port mir-debugify to new pass manager (PR #193201)   via llvm-commits
• [llvm] [CodeGen] Port mir-debugify to new pass manager (PR #193201)   via llvm-commits
• [llvm] [AMDGPU] Add llvm.amdgcn.s.prefetch.inst intrinsic (PR #192440)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   Matt Arsenault via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fneg, vp_fma. NFC (PR #193214)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fneg, vp_fma. NFC (PR #193214)   via llvm-commits
• [llvm] [ARM] Swap sides of cmp/cmn based on folding ability (PR #191915)   John Brawn via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fneg, vp_fma. NFC (PR #193214)   via llvm-commits
• [llvm] [X86][GlobalISel] Support globals in pic mode (PR #170038)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Clemens Wasser via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [llvm] [CodeGen] Port mir-debugify to new pass manager (PR #193201)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [llvm] [CodeGen] Port mir-debugify to new pass manager (PR #193201)   Matt Arsenault via llvm-commits
• [llvm] [LoopVectorize] Generate test checks (NFC) (PR #193216)   Nikita Popov via llvm-commits
• [llvm] 8abcce0 - [LoopVectorize] Generate test checks (NFC) (#193216)   via llvm-commits
• [llvm] [LoopVectorize] Generate test checks (NFC) (PR #193216)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Move tryEffectiveStall to GCNSchedStrategy class, optionally use in tryPendingCandidate (PR #191924)   Kevin Choi via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Arseniy Obolenskiy via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect DCE (PR #193104)   via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect DCE (PR #193104)   via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect DCE (PR #193104)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Shreeyash Pandey via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [RISCV] Expand vp.frem (PR #193218)   Luke Lau via llvm-commits
• [llvm] [LV][RISCV][NFC] Update strided-accesses.ll to UTC version 6 (PR #193211)   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand vp.frem (PR #193218)   via llvm-commits
• [llvm] [ARM] Swap sides of cmp/cmn based on folding ability (PR #191915)   via llvm-commits
• [llvm] dc73cab - [X86][AVX10.2] Skip FP2I/I2FP customizations for bf16 (#193137)   via llvm-commits
• [llvm] [X86][AVX10.2] Skip FP2I/I2FP customizations for bf16 (PR #193137)   Phoebe Wang via llvm-commits
• [llvm] e5925fb - [NFC][llvm-objdump] Use CHECK-NEXT in MachO tests (#192696)   via llvm-commits
• [llvm] [NFC][llvm-objdump] Use CHECK-NEXT in MachO tests (PR #192696)   Ryan Mansfield via llvm-commits
• [llvm] a2011b1 - [LV][RISCV][NFC] Update strided-accesses.ll to UTC version 6 (#193211)   via llvm-commits
• [llvm] [LV][RISCV][NFC] Update strided-accesses.ll to UTC version 6 (PR #193211)   Mel Chen via llvm-commits
• [llvm] [GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (PR #191260)   via llvm-commits
• [llvm] [GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (PR #191260)   via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix validation errors for function pointers with CodeSectionINTEL storage class (PR #192973)   Arseniy Obolenskiy via llvm-commits
• [llvm] [DirectX] Add DebugInfo pass (PR #191254)   Harald van Dijk via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Lei Huang via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Lei Huang via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Lei Huang via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Lei Huang via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Lei Huang via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fp_round, vp_fp_extend (PR #193219)   Luke Lau via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   Steven Perron via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fp_round, vp_fp_extend (PR #193219)   via llvm-commits
• [llvm] [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (PR #193220)   Nathiyaa Sengodan via llvm-commits
• [llvm] [LV][RISCV][NFC] Update strided-accesses.ll to UTC version 6 (PR #193211)   Florian Hahn via llvm-commits
• [llvm] [LSR] Narrow search space by merging users outside and inside loop (PR #185929)   John Brawn via llvm-commits
• [llvm] [DebugInfo] Robustify DISubprogram upgrade (PR #190611)   Harald van Dijk via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [libsycl] add single_task (PR #192499)   Alexey Bader via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fp_round, vp_fp_extend (PR #193219)   via llvm-commits
• [llvm] [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (PR #193220)   via llvm-commits
• [llvm] [X86] Improve FREEZE node elimination for SETCC operations (PR #192362)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Improve cost model for some replicating recipes (PR #192056)   David Sherwood via llvm-commits
• [clang] [llvm] Zatrazz/ms intrinsincs (PR #193221)   Adhemerval Zanella via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   Sander de Smalen via llvm-commits
• [clang] [llvm] [aarch64] Add more MSVC intrinsics (PR #193221)   Adhemerval Zanella via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Deduce argument types before doing GEP (PR #193046)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Matrix in struct pointer legalization (PR #193073)   Steven Perron via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   Sander de Smalen via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   Sander de Smalen via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   Sander de Smalen via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #171515)   Michael Kruse via llvm-commits
• [clang] [llvm] [aarch64] Add more MSVC intrinsics (PR #193221)   Adhemerval Zanella via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #171515)   Michael Kruse via llvm-commits
• [llvm] [SPIR-V] Deduce argument types before doing GEP (PR #193046)   Steven Perron via llvm-commits
• [llvm] [AMDGPU] Expand constant named barrier matching in SDag (PR #191506)   Jay Foad via llvm-commits
• [llvm] [LoopVectorize] Add minsize attribute to test (NFC) (PR #193223)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Introduce Counter class (PR #190271)   Pankaj Dwivedi via llvm-commits
• [llvm] [LoopVectorize] Add minsize attribute to test (NFC) (PR #193223)   via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   Nathan Gauër via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Clemens Wasser via llvm-commits
• [lldb] [llvm] [lldb] Add HTTPS hardening tests for SymbolLocatorSymStore (PR #192274)   Charles Zablit via llvm-commits
• [llvm] [LoopVectorize] Add minsize attribute to test (NFC) (PR #193223)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopVectorize] Add minsize attribute to test (NFC) (PR #193223)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopVectorize] Add minsize attribute to test (NFC) (PR #193223)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopVectorize] Add minsize attribute to test (NFC) (PR #193223)   Nikita Popov via llvm-commits
• [lldb] [llvm] [lldb] Add HTTPS hardening tests for SymbolLocatorSymStore (PR #192274)   Charles Zablit via llvm-commits
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• [llvm] [LoopVectorize] Add minsize attribute to test (NFC) (PR #193223)   Florian Hahn via llvm-commits
• [llvm] 216bccb - [SPIR-V] Handle constant expression uses of PushConstant globals (#193005)   via llvm-commits
• [llvm] [SPIR-V] Handle constant expression uses of PushConstant globals (PR #193005)   Steven Perron via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Deduce argument types before doing GEP (PR #193046)   Steven Perron via llvm-commits
• [compiler-rt] [ASan][Windows] Fix memmove/memcpy interception on x64 (PR #192060)   Alexandre Ganea via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Alexis Engelke via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   via llvm-commits
• [llvm] [RISCV] Expand vp.fshl, vp.fshr (PR #193225)   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand vp.fshl, vp.fshr (PR #193225)   via llvm-commits
• [llvm] [SLP][NFC]Add a test with non-reordable operands of non-commutative copyables, NFC (PR #193226)   Alexey Bataev via llvm-commits
• [llvm] [RISCV] Expand vp.fshl, vp.fshr (PR #193225)   Luke Lau via llvm-commits
• [llvm] [SLP][NFC]Add a test with non-reordable operands of non-commutative copyables, NFC (PR #193226)   via llvm-commits
• [llvm] 6a6f3b0 - [SLP][NFC]Add a test with non-reordable operands of non-commutative copyables, NFC   via llvm-commits
• [llvm] [SLP][NFC]Add a test with non-reordable operands of non-commutative copyables, NFC (PR #193226)   Alexey Bataev via llvm-commits
• [libc] [llvm] [libc][math] Implement a code-size optimized version of powf. (PR #190984)   Muhammad Bassiouni via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Simon Pilgrim via llvm-commits
• [llvm] [Support] Add std::string overload for llvm::sys::path::native (PR #193228)   Takuto Ikuta via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   David Sherwood via llvm-commits
• [llvm] [Support] Add std::string overload for llvm::sys::path::native (PR #193228)   via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Michal Paszkowski via llvm-commits
• [llvm] [Support] Add std::string overload for llvm::sys::path::native (PR #193228)   via llvm-commits
• [llvm] [InstCombine] Reland #165975: Fix #163110: Support peeling off matching shifts from icmp operands via canEvaluateShifted (PR #190918)   via llvm-commits
• [llvm] [Support] Add std::string overload for llvm::sys::path::native (PR #193228)   Takuto Ikuta via llvm-commits
• [llvm] Reapply "[SimplifyCFG] Reuse function comdat for switch lookup table" (PR #193229)   via llvm-commits
• [llvm] Reapply "[SimplifyCFG] Reuse function comdat for switch lookup table" (PR #193229)   via llvm-commits
• [llvm] [SPIRV] Migrate NSDI emission from a machine pass to DebugHandlerBase (PR #191212)   Manuel Carrasco via llvm-commits
• [llvm] Reapply "[SimplifyCFG] Reuse function comdat for switch lookup table" (PR #193229)   via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Shilei Tian via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Shilei Tian via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Shilei Tian via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Michal Paszkowski via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Scalarize vector of pointers for ptrtoint/inttoptr (PR #184817)   Arseniy Obolenskiy via llvm-commits
• [lldb] [llvm] [lldb] Add HTTPS hardening tests for SymbolLocatorSymStore (PR #192274)   Stefan Gränitz via llvm-commits
• [llvm] d841a93 - [SPIR-V] Deduce argument types before doing GEP (#193046)   via llvm-commits
• [llvm] [SPIR-V] Deduce argument types before doing GEP (PR #193046)   Steven Perron via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [compiler-rt] [ASan][Windows] Fix memmove/memcpy interception on x64 (PR #192060)   Alexandre Ganea via llvm-commits
• [llvm] e4afaa1 - [RISCV] Further improved exact VLEN lowering for mul reductions (#192688)   via llvm-commits
• [llvm] [RISCV] Further improved exact VLEN lowering for mul reductions (PR #192688)   Philip Reames via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Michal Paszkowski via llvm-commits
• [llvm] [AArch64] Optimize lowering of i1 vector reduction (PR #187912)   Cheng Lingfei via llvm-commits
• [llvm] [SLP] Normalize copyable operand order to group loads for better vectorization (PR #193230)   Alexey Bataev via llvm-commits
• [llvm] [AArch64] Optimize lowering of i1 vector reduction (PR #187912)   Cheng Lingfei via llvm-commits
• [llvm] 583f294 - [SLP] Normalize copyable operand order to group loads for better vectorization   via llvm-commits
• [llvm] [SLP] Normalize copyable operand order to group loads for better vectorization (PR #193230)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Normalize copyable operand order to group loads for better vectorization (PR #193230)   via llvm-commits
• [llvm] [AArch64] Optimize lowering of i1 vector reduction (PR #187912)   Cheng Lingfei via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Ralf Jung via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use runtimes-libc-headers in the GPU runtimes build (PR #192814)   Yaxun Liu via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use runtimes-libc-headers in the GPU runtimes build (PR #192814)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Nick Sarnie via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Nick Sarnie via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Clemens Wasser via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Michal Paszkowski via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Michal Paszkowski via llvm-commits
• [lldb] [llvm] [lldb] Add HTTPS hardening tests for SymbolLocatorSymStore (PR #192274)   Charles Zablit via llvm-commits
• [lldb] [llvm] [lldb] Add HTTPS hardening tests for SymbolLocatorSymStore (PR #192274)   Charles Zablit via llvm-commits
• [llvm] e23c053 - Fixed issue of use after move (#193175)   via llvm-commits
• [llvm] Fixed issue of use after move (PR #193175)   Jaydeep Chauhan via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Luke Lau via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Luke Lau via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Luke Lau via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Luke Lau via llvm-commits
• [llvm] [AArch64] Optimize lowering of i1 vector reduction (PR #187912)   Cheng Lingfei via llvm-commits
• [llvm] [LoopInterchange] Bail out when memory instruction ratio is high (PR #192954)   Ryotaro Kasuga via llvm-commits
• [llvm] [offload] Add floating-point support detection queries (PR #193233)   Łukasz Plewa via llvm-commits
• [llvm] llvm/test: Fix incremental bots after revert of #190719 (PR #193234)   Nico Weber via llvm-commits
• [llvm] [offload] Add floating-point support detection queries (PR #193233)   via llvm-commits
• [llvm] [offload] Add floating-point support detection queries (PR #193233)   via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [llvm] [AMDGPU] Fixed verifier crash because of multiple live range components. (PR #190719)   Nico Weber via llvm-commits
• [llvm] llvm/test: Fix incremental bots after revert of #190719 (PR #193234)   via llvm-commits
• [llvm] [offload] Add floating-point support detection queries (PR #193233)   via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use runtimes-libc-headers in the GPU runtimes build (PR #192814)   Yaxun Liu via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   Matt Arsenault via llvm-commits
• [llvm] [LoopInterchange] Bail out when memory instruction ratio is high (PR #192954)   Ryotaro Kasuga via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [LoopInterchange] Bail out when memory instruction ratio is high (PR #192954)   Ryotaro Kasuga via llvm-commits
• [llvm] [offload] Add floating-point support detection queries (PR #193233)   Łukasz Plewa via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use runtimes-libc-headers in the GPU runtimes build (PR #192814)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Move tryEffectiveStall to GCNSchedStrategy class, optionally use in tryPendingCandidate (PR #191924)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [AMDGPU] Move tryEffectiveStall to GCNSchedStrategy class, optionally use in tryPendingCandidate (PR #191924)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   via llvm-commits
• [llvm] [IR] Note that duplicate profile values are illegal in VP metadata (PR #193077)   Mircea Trofin via llvm-commits
• [llvm] [AMDGPU] Add waterfall intrinsics (PR #192409)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   Harry Ramsey via llvm-commits
• [clang] [llvm] [HLSL] Implement ConstantBuffer<T> with transparent member access (PR #193237)   Steven Perron via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Juan Manuel Martinez Caamaño via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Clemens Wasser via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Fraser Cormack via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Fraser Cormack via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Fraser Cormack via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Łukasz Plewa via llvm-commits
• [llvm] [AArch64] optimize lowering for icmp on i128 when RHS is an immediate (PR #181822)   Cheng Lingfei via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Łukasz Plewa via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Migrate to extended LLT (PR #193047)   David Green via llvm-commits
• [llvm] [LV] NFCI: Create VPExpressions in transformToPartialReductions. (PR #182863)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   via llvm-commits
• [llvm] [LV] Improve cost model for some replicating recipes (PR #192056)   David Sherwood via llvm-commits
• [llvm] 7a7d593 - [LoopVectorize] Add minsize attribute to test (NFC) (#193223)   via llvm-commits
• [llvm] [LoopVectorize] Add minsize attribute to test (NFC) (PR #193223)   Nikita Popov via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   Alex Duran via llvm-commits
• [llvm] Reapply "[SimplifyCFG] Reuse function comdat for switch lookup table" (PR #193229)   via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] Reapply "[SimplifyCFG] Reuse function comdat for switch lookup table" (PR #193229)   Alexis Engelke via llvm-commits
• [lld] [lld][MachO] Fix symbol resolution order with --read-workers (PR #193239)   via llvm-commits
• [llvm] 347dc13 - Reapply "[SimplifyCFG] Reuse function comdat for switch lookup table" (#193229)   via llvm-commits
• [llvm] Reapply "[SimplifyCFG] Reuse function comdat for switch lookup table" (PR #193229)   Alexis Engelke via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [lld] [lld][MachO] Fix symbol resolution order with --read-workers (PR #193239)   Liza Burakova via llvm-commits
• [lld] [lld][MachO] Fix symbol resolution order with --read-workers (PR #193239)   via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Thomas Fry via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [llvm] [AArch64] Extend SBC combine to handle CSET HI (PR #192708)   Ricardo Jesus via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Thomas Fry via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect DCE (PR #193104)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Remove unsatisfiable hints in RegAllocGreedy. (PR #190983)   Mikhail Gudim via llvm-commits
• [llvm] [PowerPC] Fix ADJCALLSTACKUP and ADJCALLSTACKDOWN def (PR #184696)   Lei Huang via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [llvm] llvm/test: Fix incremental bots after revert of #190719 (PR #193234)   Hans Wennborg via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Jordan Rupprecht via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   Hari Limaye via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   Hari Limaye via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   Hari Limaye via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   Hari Limaye via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Alexis Engelke via llvm-commits
• [llvm] [ARM][Thumb1] Consider tBfar safe in noreturn functions (PR #193240)   Simon Tatham via llvm-commits
• [llvm] [IR] Avoid redundant IRBuilder debug loc updates (PR #193018)   Alexis Engelke via llvm-commits
• [llvm] [ARM][Thumb1] Consider tBfar safe in noreturn functions (PR #193240)   via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   via llvm-commits
• [clang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nikita Popov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Nathan Gauër via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   Matt Arsenault via llvm-commits
• [llvm] [bazel][mlir] Port a1dfc8d64e1faa752f020a8212782362b179416d (PR #193241)   Jordan Rupprecht via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [clang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nikita Popov via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Jordan Rupprecht via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Fraser Cormack via llvm-commits
• [clang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   via llvm-commits
• [clang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   via llvm-commits
• [clang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   via llvm-commits
• [llvm] [CodeGen] Remove unsatisfiable hints in RegAllocGreedy. (PR #190983)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Remove unsatisfiable hints in RegAllocGreedy. (PR #190983)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Fraser Cormack via llvm-commits
• [llvm] [bazel][mlir] Port a1dfc8d64e1faa752f020a8212782362b179416d (PR #193241)   Michael Jones via llvm-commits
• [llvm] [IR] Avoid redundant TrackingMDRef reassignments and DebugLoc copies (PR #193018)   Clemens Wasser via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Fraser Cormack via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Jay Foad via llvm-commits
• [llvm] 2b76ec7 - llvm/test: Fix incremental bots after revert of #190719 (#193234)   via llvm-commits
• [llvm] llvm/test: Fix incremental bots after revert of #190719 (PR #193234)   Nico Weber via llvm-commits
• [lld] [lld][MachO] Fix symbol resolution order with --read-workers (PR #193239)   via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Jordan Rupprecht via llvm-commits
• [llvm] llvm/test: Fix incremental bots after revert of #190719 (PR #193234)   Nico Weber via llvm-commits
• [clang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nikita Popov via llvm-commits
• [llvm] [bazel][mlir] Port a1dfc8d64e1faa752f020a8212782362b179416d (PR #193241)   Jordan Rupprecht via llvm-commits
• [llvm] [runtimes] Ensure INSTALLed directory exists (PR #193243)   Michael Kruse via llvm-commits
• [llvm] [runtimes] Ensure INSTALLed directory exists (PR #193243)   Michael Kruse via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [IR] Avoid redundant TrackingMDRef reassignments and DebugLoc copies (PR #193018)   Clemens Wasser via llvm-commits
• [llvm] 406dc4e - [Hexagon] Handle FK_Data_8 fixups in ELF object writer (#192149)   via llvm-commits
• [llvm] [Hexagon] Handle FK_Data_8 fixups in ELF object writer (PR #192149)   Brian Cain via llvm-commits
• [compiler-rt] e710364 - [compiler-rt] Implement __clear_cache for Hexagon (#188411)   via llvm-commits
• [compiler-rt] [compiler-rt] Implement __clear_cache for Hexagon (PR #188411)   Brian Cain via llvm-commits
• [llvm] [runtimes] Ensure INSTALLed directory exists (PR #193243)   Michael Kruse via llvm-commits
• [llvm] [bazel][mlir] Port a1dfc8d64e1faa752f020a8212782362b179416d (PR #193241)   Jordan Rupprecht via llvm-commits
• [llvm] [runtimes] Ensure INSTALLed directory exists (PR #193243)   Michael Kruse via llvm-commits
• [llvm] [runtimes] Ensure INSTALLed directory exists (PR #193243)   Michael Kruse via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [CodeGen] Remove unsatisfiable hints in RegAllocGreedy. (PR #190983)   Mikhail Gudim via llvm-commits
• [llvm] [IR] Avoid redundant TrackingMDRef reassignments and DebugLoc copies (PR #193018)   Clemens Wasser via llvm-commits
• [llvm] [runtimes] Ensure INSTALLed directory exists (PR #193243)   Michael Kruse via llvm-commits
• [llvm] [NVPTX] Add reverseBranchCondition and CBranch inverted flag (PR #191889)   Alex MacLean via llvm-commits
• [llvm] [LV] Add -predicated-epilogue option for tail-folded epilogue (PR #190697)   via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][BUILD] Fix for #177158 (PR #193238)   Fraser Cormack via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [AtomicExpandPass] Preserve atomic and volatile nature of emulated operations (PR #188361)   Matt Arsenault via llvm-commits
• [lld] [WIP][lld][macho] Restructure thunk generation algorithm (PR #192758)   Ellis Hoag via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Matt Arsenault via llvm-commits
• [llvm] e39e73c - [IR] Avoid redundant TrackingMDRef reassignments and DebugLoc copies (#193018)   via llvm-commits
• [llvm] [IR] Avoid redundant TrackingMDRef reassignments and DebugLoc copies (PR #193018)   Alexis Engelke via llvm-commits
• [llvm] [IR] Avoid redundant TrackingMDRef reassignments and DebugLoc copies (PR #193018)   Alexis Engelke via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [RegAlloc] consider urgent evict in evictInterference (PR #192631)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] consider urgent evict in evictInterference (PR #192631)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Paul Walker via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_ballot (PR #193105)   via llvm-commits
• [llvm] AMDGPU: Resolve some next-use analysis #178873 post-merge feedback (PR #192960)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Resolve some next-use analysis #178873 post-merge feedback (PR #192960)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Resolve some next-use analysis #178873 post-merge feedback (PR #192960)   Matt Arsenault via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #192758)   Ellis Hoag via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #192758)   Ellis Hoag via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Thomas Fry via llvm-commits
• [llvm] [LAA] Switch safe-distance APIs to operate in elements instead of bits, NFCI'ish (PR #191867)   Florian Hahn via llvm-commits
• [llvm] [SelectionDAG] Preserve poison in IS_FPCLASS folds (PR #193246)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (PR #190139)   Venkatesh Srinivasan via llvm-commits
• [llvm] [Attributor] Support SPIR-V address spaces (PR #192725)   Nick Sarnie via llvm-commits
• [llvm] [InlineCost] Use store-to-load forwarding to resolve call arguments (PR #190607)   Jiří Filek via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Wael Yehia via llvm-commits
• [llvm] [LLVM]Codegen][X86] Add vector ConstantInt/FP support to CollectConstantBits. (PR #193249)   Paul Walker via llvm-commits
• [llvm] [LLVM]Codegen][X86] Add vector ConstantInt/FP support to CollectConstantBits. (PR #193249)   via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] [Inliner] Use store-to-load forwarding to resolve call arguments (PR #190607)   Jiří Filek via llvm-commits
• [llvm] [AsmParser] Revamp how floating-point literals work in LLVM IR. (PR #190641)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Clarify the semantics of the contract fast-math flag. (PR #187340)   Joshua Cranmer via llvm-commits
• [llvm] [RISCV] Add a getTargetStreamer helper to RISCVAsmPrinter. NFC (PR #193250)   Craig Topper via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Alex Voicu via llvm-commits
• [llvm] [RISCV] Add a getTargetStreamer helper to RISCVAsmPrinter. NFC (PR #193250)   via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #192758)   Ellis Hoag via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] [RISCV][NFC] Use IfDefEmitter in RISCVTargetDefEmitter (PR #193151)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Use IfDefEmitter in RISCVTargetDefEmitter (PR #193151)   Craig Topper via llvm-commits
• [llvm] [NVPTX] Introduce custom AsmStreamer for NVPTX backend (PR #192527)   Alex MacLean via llvm-commits
• [llvm] 9a1f716 - AMDGPU: ds.atomic.barrier.arrive.rtn.b64 is a source of divergence (#192765)   via llvm-commits
• [llvm] AMDGPU: ds.atomic.barrier.arrive.rtn.b64 is a source of divergence (PR #192765)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nikita Popov via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Jacob Crawley via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Jacob Crawley via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Jacob Crawley via llvm-commits
• [llvm] [AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (PR #190139)   Sander de Smalen via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run ThreeWayBranch pass (PR #193252)   Amina Chabane via llvm-commits
• [llvm] [RISCV] Expand vp.frem (PR #193218)   Craig Topper via llvm-commits
• [llvm] [SPIRV] Add 64 bit lowering for bitreverse (PR #193068)   Dmitry Sidorov via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run ThreeWayBranch pass (PR #193252)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   Matt Arsenault via llvm-commits
• [llvm] 9576adb - [RISCV] Expand vp.frem (#193218)   via llvm-commits
• [llvm] [RISCV] Expand vp.frem (PR #193218)   Luke Lau via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run ThreeWayBranch pass (PR #193252)   Amina Chabane via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Jacob Crawley via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [AtomicExpandPass] Preserve atomic and volatile nature of emulated operations (PR #188361)   David Green via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (PR #191260)   via llvm-commits
• [libc] [llvm] [libc][math] Implement a code-size optimized version of powf. (PR #190984)   via llvm-commits
• [clang] [llvm] [mlir] [AArch64][llvm] Improve codegen for svldr_vnum_za/svstr_vnum_za (PR #175785)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [mlir] [AArch64][llvm] Improve codegen for svldr_vnum_za/svstr_vnum_za (PR #175785)   Jonathan Thackray via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   via llvm-commits
• [llvm] [AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (PR #190139)   Venkatesh Srinivasan via llvm-commits
• [llvm] [LLVM][ConstantFolding] Use correct type when flushing denormals. (PR #193254)   Paul Walker via llvm-commits
• [llvm] [LLVM][ConstantFolding] Use correct type when flushing denormals. (PR #193254)   via llvm-commits
• [llvm] [SPIRV] Add 64 bit lowering for bitreverse (PR #193068)   via llvm-commits
• [llvm] [RISCV] Functional llvm.vector.reduce.mul on scalable types (PR #193094)   Philip Reames via llvm-commits
• [llvm] [GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (PR #191260)   via llvm-commits
• [llvm] Revert "[llvm-cov] Fix error propagation in CoverageMapping::load() (… (PR #193266)   via llvm-commits
• [llvm] Revert "[llvm-cov] Fix error propagation in CoverageMapping::load() (… (PR #193266)   via llvm-commits
• [llvm] [AMDGPU] Register allocation anti-hints to reduce MFMA hazard NOPs (PR #156943)   Syadus Sefat via llvm-commits
• [llvm] Revert "[llvm-cov] Fix error propagation in CoverageMapping::load() (… (PR #193266)   via llvm-commits
• [llvm] Revert "[llvm-cov] Fix error propagation in CoverageMapping::load() (… (PR #193266)   via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Nathan Gauër via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [RISCV][TableGen] Use ArrayRef instead of vector&. NFC (PR #193267)   Craig Topper via llvm-commits
• [llvm] [LLVM]Codegen][X86] Add vector ConstantInt/FP support to CollectConstantBits. (PR #193249)   Paul Walker via llvm-commits
• [llvm] [RISCV][TableGen] Use ArrayRef instead of vector&. NFC (PR #193267)   via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   John Brawn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   John Brawn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Migrate to extended LLT (PR #193047)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Migrate to extended LLT (PR #193047)   Matt Arsenault via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; automatically expand for all targets (PR #189517)   Yonah Goldberg via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Arthur Eubanks via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Migrate to extended LLT (PR #193047)   Demetrius Kanios via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU][True16] Legalize S16 for G_STORE/G_LOAD in GlobalISel when True16 is enabled (PR #176963)   Domenic Nutile via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Maryam Moghadas via llvm-commits
• [clang] [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [llvm-dwp] Replace MCStreamer with direct ELF writer for zero-copy output (PR #192112)   David Blaikie via llvm-commits
• [llvm] [SelectionDAG] Move VSelect sign pattern check from AArch64 to general SelectionDAG (PR #151840)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Move VSelect sign pattern check from AArch64 to general SelectionDAG (PR #151840)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Move VSelect sign pattern check from AArch64 to general SelectionDAG (PR #151840)   Simon Pilgrim via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Migrate to extended LLT (PR #193047)   Demetrius Kanios via llvm-commits
• [llvm] [llvm-dwp] Replace MCStreamer with direct ELF writer for zero-copy output (PR #192112)   David Blaikie via llvm-commits
• [llvm] [NVPTX] Introduce custom AsmStreamer for NVPTX backend (PR #192527)   Karthik Senthil via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve performance of FP32 multiplication by reciprocal. (PR #193279)   via llvm-commits
• [llvm] [SelectionDAG] Move VSelect sign pattern check from AArch64 to general SelectionDAG (PR #151840)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Move VSelect sign pattern check from AArch64 to general SelectionDAG (PR #151840)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Improve performance of FP32 multiplication by reciprocal. (PR #193279)   via llvm-commits
• [llvm] [LoopInterchange] Fix out-of-bounds accesses in tests (NFC) (PR #193272)   Ryotaro Kasuga via llvm-commits
• [llvm] Refactor LaneBitmask to be a Bitset (PR #191757)   Jiachen Yuan via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Pankaj Dwivedi via llvm-commits
• [llvm] Refactor LaneBitmask to be a wrapper of Bitset (PR #191757)   Jiachen Yuan via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [llvm] d794e04 - [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (#185961)   via llvm-commits
• [clang] [llvm] [Clang][PowerPC] Add DMF crypto builtins for extended mnemonics (PR #185961)   Maryam Moghadas via llvm-commits
• [llvm] Refactor LaneBitmask to be a wrapper of Bitset (PR #191757)   Jiachen Yuan via llvm-commits
• [llvm] [LoopInterchange] Fix out-of-bounds accesses in tests (NFC) (PR #193272)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [llvm] [NVPTX] Introduce custom AsmStreamer for NVPTX backend (PR #192527)   Alex MacLean via llvm-commits
• [lld] [lld/mac] For catalyst outputs, tolerate implicitly linking against arm64e mac tbd files (PR #193065)   Nuri Amari via llvm-commits
• [llvm] Fix assert in SlotIndexes::getInstructionIndex in debug builds (PR #189370)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [lld] [lld-macho] Relax safe ICF's keepUnique for ld64-coalesced data sections (PR #193125)   Daniel Rodríguez Troitiño via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [llvm] [VPlan] Expand simple SCEVs directly to VPInstructions. (PR #189455)   via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Sam Elliott via llvm-commits
• [llvm] [docs] Add missing command line options to llvm-profgen.rst (PR #192890)   Aaron Ballman via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerCall` (PR #193102)   Demetrius Kanios via llvm-commits
• [llvm] [docs] Add missing command line options to llvm-profgen.rst (PR #192890)   Aaron Ballman via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   Andrei Elovikov via llvm-commits
• [llvm] [BOLT] Fix stream position before appendPadding in writeEHFrameHeader (PR #193126)   Rafael Auler via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Aiden Grossman via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Reland "Fixed verifier crash because of multiple live range components." (#190719) (PR #193286)   Nico Weber via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Aiden Grossman via llvm-commits
• [llvm] AMDGPU: Masked global prefetch (PR #193285)   Ravil Dorozhinskii via llvm-commits
• [llvm] AMDGPU: Masked global prefetch (PR #193285)   Ravil Dorozhinskii via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerCall` (PR #193102)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [llvm] [offload] Fix synchronization when record replay is enabled (PR #193291)   Kevin Sala Penades via llvm-commits
• [llvm] [JTS] Add a temporary workaround for multiple zero GUIDs (PR #193292)   Aiden Grossman via llvm-commits
• [llvm] [gn] port 40fcd2517a110 (PR #193293)   Nico Weber via llvm-commits
• [llvm] dd5632f - [gn] port 40fcd2517a110 (#193293)   via llvm-commits
• [llvm] [LegalizeTypes][RISCV] Don't widen expandload or compresstore with VP_LOAD/VP_STORE. (PR #193294)   Craig Topper via llvm-commits
• [llvm] [gn] port 40fcd2517a110 (PR #193293)   Nico Weber via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerCall` (PR #193102)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerCall` (PR #193102)   Matt Arsenault via llvm-commits
• [llvm] [BOLT] Fix stream position before appendPadding in writeEHFrameHeader (PR #193126)   Maksim Panchenko via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   Ramkumar Ramachandra via llvm-commits
• [llvm] [offload] Fix synchronization when record replay is enabled (PR #193291)   Kevin Sala Penades via llvm-commits
• [llvm] [CodeGen] Skip unsafe splits in RenameIndependentSubregs (PR #190925)   Matt Arsenault via llvm-commits
• [llvm] ae9cb64 - [VPlan] Clean up VPWidenPHIRecipe constructor (NFC). (#193297)   via llvm-commits
• [llvm] [VPLan] Clean up VPWidenPHIRecipe constructor (NFC). (PR #193297)   Florian Hahn via llvm-commits
• [llvm] [LLVM][SelectionDAG] Reduce chances of a split VSETCC being rewidened. (PR #191438)   Matt Arsenault via llvm-commits
• [llvm] [NFC][ADT] Make a few functions constexpr (PR #193302)   Vitaly Buka via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Bill Wendling via llvm-commits
• [llvm] [NFC][ADT] Make a few functions constexpr (PR #193302)   via llvm-commits
• [llvm] [AMDGPU] Fix DynamicCallStack remark reporting unknown state as False (PR #192233)   Matt Arsenault via llvm-commits
• [llvm] [NFC][ADT] Make a few functions constexpr (PR #193302)   Vitaly Buka via llvm-commits
• [llvm] [NFC][ADT] Make a few functions constexpr (PR #193302)   Vitaly Buka via llvm-commits
• [llvm] [Attributor] Use trivial no side effects check in isAssumedSideEffectFree (PR #193303)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use trivial no side effects check in isAssumedSideEffectFree (PR #193303)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use trivial no side effects check in isAssumedSideEffectFree (PR #193303)   Shilei Tian via llvm-commits
• [llvm] [Attributor] Use trivial no side effects check in isAssumedSideEffectFree (PR #193303)   via llvm-commits
• [llvm] [PassManager] Make passes inherit from MandatoryPassInfoMixin/OptionalPassInfoMixin (PR #192120)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Errorize DebuginfodFetcher for inspection at call-sites (PR #191191)   Stefan Gränitz via llvm-commits
• [llvm] [NFC][ADT] Make a few functions constexpr (PR #193302)   Vitaly Buka via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Florian Hahn via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Florian Hahn via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (PR #189255)   Matt Arsenault via llvm-commits
• [llvm] [Hexagon] Add SafeStack runtime libcall to HexagonSystemLibrary (PR #191673)   Matt Arsenault via llvm-commits
• [llvm] [cross-project-tests] Add llvm-modextract as a dependency (PR #193296)   Aiden Grossman via llvm-commits
• [llvm] [LV] Add -predicated-epilogue option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [llvm] [BOLT] Fix null pointer dereference in DWP processing with split DWARF (PR #191474)   Alexander Yermolovich via llvm-commits
• [llvm] [LV] Add -predicated-epilogue option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [llvm] [LV] Add -predicated-epilogue option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [LV] Add -predicated-epilogue option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   via llvm-commits
• [llvm] [VectorCombine] Fold deinterleave2 with smaller effective element size (PR #192121)   Min-Yih Hsu via llvm-commits
• [llvm] [docs] Add Included Suites to Test Suite Guide (PR #128937)   Sam Elliott via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [llvm] [bazel][lldb] Add target for new plugin (PR #193316)   Michael Jones via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [compiler-rt] [scudo] Add free_sized and free_aligned_sized (PR #186881)   Christopher Ferris via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Zachary Yedidia via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Robert Imschweiler via llvm-commits
• [llvm] [bazel][lldb] Add target for new plugin (PR #193316)   Anshul Nigham via llvm-commits
• [llvm] [Github] Bump Github Runner Version to 2.334.0 (PR #193317)   Aiden Grossman via llvm-commits
• [llvm] [VectorCombine] Fold deinterleave2 with smaller effective element size (PR #192121)   Min-Yih Hsu via llvm-commits
• [llvm] [Github] Bump Github Runner Version to 2.334.0 (PR #193317)   Aiden Grossman via llvm-commits
• [llvm] [VectorCombine] Fold deinterleave2 with smaller effective element size (PR #192121)   Min-Yih Hsu via llvm-commits
• [llvm] [VectorCombine] Fold deinterleave2 with smaller effective element size (PR #192121)   Min-Yih Hsu via llvm-commits
• [llvm] [VectorCombine] Fold deinterleave2 with smaller effective element size (PR #192121)   Min-Yih Hsu via llvm-commits
• [llvm] [Github] Bump Github Runner Version to 2.334.0 (PR #193318)   Aiden Grossman via llvm-commits
• [llvm] [Github] Bump Github Runner Version to 2.334.0 (PR #193318)   Aiden Grossman via llvm-commits
• [llvm] [BranchFolding] Fold fallthroughs into conditional tailcalls if profitable (PR #140476)   Simon Pilgrim via llvm-commits
• [llvm] [cross-project-tests] Add llvm-modextract as a dependency (PR #193296)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [llvm] [BOLT] Fix null pointer dereference in DWP processing with split DWARF (PR #191474)   Alexander Yermolovich via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   via llvm-commits
• [llvm] arm: fix float to integer conversion with `+mve, -mve.fp` (PR #193319)   Folkert de Vries via llvm-commits
• [llvm] [bolt] AArch64: Fix TLSDESC to LE relaxation by mold (PR #190370)   Paschalis Mpeis via llvm-commits
• [llvm] [WIP] Add new pass for converting scalable vector instructions with known VL to fixed length vectors (PR #190860)   Ryan Buchner via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Zachary Yedidia via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Alex Voicu via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [llvm] [bazel][lldb] Add target for new plugin (PR #193316)   Michael Jones via llvm-commits
• [llvm] [bazel][lldb] Add target for new plugin (PR #193316)   Michael Jones via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] [bazel][lldb] Fix missing dep in ScriptedProcess (PR #193348)   Aiden Grossman via llvm-commits
• [llvm] [libcxx][Github] Build container images in separate jobs (PR #193346)   Aiden Grossman via llvm-commits
• [llvm] [BOLT] Fix null pointer dereference in DWP processing with split DWARF (PR #191474)   Farid Zakaria via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Helena Kotas via llvm-commits
• [llvm] users/vporpo/waitcnt10 1 (PR #193366)   via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #193367)   Ellis Hoag via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #192758)   Ellis Hoag via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #192758)   Ellis Hoag via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Sergei Barannikov via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #193367)   Ellis Hoag via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Introduce Counter class (PR #193368)   via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Deric C. via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [llvm] [AtomicExpandPass] Preserve atomic and volatile nature of emulated operations (PR #188361)   Akshay Deodhar via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #193367)   Ellis Hoag via llvm-commits
• [clang] [llvm] [CodeView] Add line entries for instructions in MS inline asm (PR #193007)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add fpext bf16 legalization. (PR #193342)   Amara Emerson via llvm-commits
• [llvm] [AtomicExpandPass] Preserve atomic and volatile nature of emulated operations (PR #188361)   Akshay Deodhar via llvm-commits
• [llvm] [offload] Allow replay repetitions and report basic timing (PR #193388)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Allow replay repetitions and report basic timing (PR #193388)   via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [offload] Allow replay repetitions and report basic timing (PR #193388)   Kevin Sala Penades via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [offload] Allow replay repetitions and report basic timing (PR #193388)   Kevin Sala Penades via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Introduce Counter class (PR #193368)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Introduce Counter class (PR #193368)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Introduce Counter class (PR #193368)   via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #193367)   Zhaoxuan Jiang via llvm-commits
• [llvm] [offload] Allow replay repetitions and report basic timing (PR #193388)   Kevin Sala Penades via llvm-commits
• [llvm] [llvm-mc][AsmMatcherEmitter] Fix the minimum ConversionTable entry size (PR #191977)   Sam Elliott via llvm-commits
• [llvm] [llvm-mc][AsmMatcherEmitter] Fix the minimum ConversionTable entry size (PR #191977)   via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   Yonah Goldberg via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Michael Berg via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Aiden Grossman via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   Yonah Goldberg via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Jack Huang via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   Kito Cheng via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   Yonah Goldberg via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   Yonah Goldberg via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   Kito Cheng via llvm-commits
• [llvm] [test][AMDGPU] Precommit test for Back-propagate wqm for sources of side-effect instruction (PR #193394)   via llvm-commits
• [llvm] [test][AMDGPU] Precommit test for Back-propagate wqm for sources of side-effect instruction (PR #193394)   via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   Kito Cheng via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   Kito Cheng via llvm-commits
• [llvm] [RegAlloc] consider urgent evict in evictInterference (PR #192631)   Piyou Chen via llvm-commits
• [llvm] [llvm-gsymutil] Add --symtab-file option to specify separate symbol table file (PR #184059)   Chen Li via llvm-commits
• [llvm] [X86] Recognise vectors with zeros in all upper elements to improve VMOVS*Z folding (PR #193263)   Phoebe Wang via llvm-commits
• [llvm] [X86] Recognise vectors with zeros in all upper elements to improve VMOVS*Z folding (PR #193263)   Phoebe Wang via llvm-commits
• [llvm] [LowerTypeTests] Add debug info to jump table entries (PR #192736)   Vitaly Buka via llvm-commits
• [llvm] [LowerTypeTests] Add debug info to jump table entries (PR #192736)   Vitaly Buka via llvm-commits
• [llvm] [test][AMDGPU] Precommit test for Back-propagate wqm for sources of side-effect instruction (PR #193394)   via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Shih-Po Hung via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   Jacob Lifshay via llvm-commits
• [llvm] [ADT] Bitset: add shift operators, word accessors, and etc (PR #193400)   Jiachen Yuan via llvm-commits
• [llvm] [ADT] Bitset: add shift operators, word accessors, and etc (PR #193400)   Jiachen Yuan via llvm-commits
• [llvm] [ADT] Bitset: add shift operators, word accessors, and etc (PR #193400)   via llvm-commits
• [llvm] [llvm-mc][AsmMatcherEmitter] Fix the minimum ConversionTable entry size (PR #191977)   Sam Elliott via llvm-commits
• [llvm] [llvm-mc][AsmMatcherEmitter] Fix the minimum ConversionTable entry size (PR #191977)   Sam Elliott via llvm-commits
• [llvm] [llvm-mc][AsmMatcherEmitter] Fix the minimum ConversionTable entry size (PR #191977)   via llvm-commits
• [llvm] Revert "[JTS][Passes] Enable JTS By Default" (PR #193399)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   Sam Elliott via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   Sam Elliott via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   Sam Elliott via llvm-commits
• [llvm] [mlir] [OpenMP][OMPIRBuilder] Support complex types in atomic update/capture (PR #191490)   via llvm-commits
• [llvm] verify scc is not live-in (PR #193143)   Zeng Wu via llvm-commits
• [llvm] verify scc is not live-in (PR #193143)   Zeng Wu via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] eb4296f - [llvm-mc][AsmMatcherEmitter] Fix the minimum ConversionTable entry size (#191977)   via llvm-commits
• [llvm] [llvm-mc][AsmMatcherEmitter] Fix the minimum ConversionTable entry size (PR #191977)   Sam Elliott via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] [llvm-mc][AsmMatcherEmitter] Fix the minimum ConversionTable entry size (PR #191977)   via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] [JTS] Correctly handle all zero profile values in VP metadata (PR #193402)   Aiden Grossman via llvm-commits
• [llvm] [llvm-mc][AsmMatcherEmitter] Fix the minimum ConversionTable entry size (PR #191977)   LLVM Continuous Integration via llvm-commits
• [llvm] [JTS] Correctly handle all zero profile values in VP metadata (PR #193402)   via llvm-commits
• [lld] [ELF, test] Convert INCLUDE tests to split-file pattern (PR #193403)   Fangrui Song via llvm-commits
• [lld] d0bb0c8 - [ELF,test] Convert INCLUDE tests to split-file pattern (#193403)   via llvm-commits
• [lld] [ELF, test] Convert INCLUDE tests to split-file pattern (PR #193403)   Fangrui Song via llvm-commits
• [llvm] verify scc is not live-in (PR #193143)   Zeng Wu via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Thurston Dang via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   via llvm-commits
• [llvm] [JTS] Correctly handle all zero profile values in VP metadata (PR #193402)   Alexander Shaposhnikov via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Add isKnown method to VSETVLIInfo. NFC (PR #193406)   Craig Topper via llvm-commits
• [llvm] [NFC] [MC] Fixed rule-of-five for MCPseudoProbeDecoder class (PR #193181)   Jaydeep Chauhan via llvm-commits
• [llvm] [NFC] [MC] Fixed rule-of-five for MCPseudoProbeDecoder class (PR #193181)   Jaydeep Chauhan via llvm-commits
• [llvm] 0f4fb3b - [NFC] [MC] Fixed rule-of-five for MCPseudoProbeDecoder class (#193181)   via llvm-commits
• [llvm] [NFC] [MC] Fixed rule-of-five for MCPseudoProbeDecoder class (PR #193181)   Jaydeep Chauhan via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   via llvm-commits
• [compiler-rt] [llvm] [RISC-V] Add newer Linux hwprobe extensions detection (PR #192761)   Jiaqi He via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Ryotaro Kasuga via llvm-commits
• [llvm] [JTS] Correctly handle all zero profile values in VP metadata (PR #193402)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] [RISC-V] Add newer Linux hwprobe extensions detection (PR #192761)   via llvm-commits
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• [llvm] efa0f22 - [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (#193123)   via llvm-commits
• [llvm] [RISCV][MC] Emit ISA mapping symbols on .option arch/rvc/norvc/pop (PR #193123)   Kito Cheng via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [compiler-rt] [llvm] [RISC-V] Add newer Linux hwprobe extensions detection (PR #192761)   Jiaqi He via llvm-commits
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• [llvm] [ADT] Add predicate based match support to StringSwitch (PR #188046)   Corentin Jabot via llvm-commits
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• [lld] [ELF] Fix crash when INCLUDE'd linker script ends mid-assignment (PR #192198)   Fangrui Song via llvm-commits
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• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #171515)   Michael Kruse via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Jay Foad via llvm-commits
• [llvm] [AArch64] Higher cost for partial reductions if it can't use dot/mlalb/t (PR #191369)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Jay Foad via llvm-commits
• [llvm] [AArch64] Only prefer partial reductions if cost is lower. (PR #191369)   Sander de Smalen via llvm-commits
• [llvm] [NFC][SPIR-V] Consolidate OpVariable insertion point logic into getOpVariableMBBIt (PR #193433)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AArch64] Only prefer partial reductions if cost is lower. (PR #191369)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU][WIP] Masked global prefetch (PR #193285)   via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LV] Choose best reduction for VPlan (PR #166138)   Sander de Smalen via llvm-commits
• [llvm] [LV] Choose best reduction for VPlan (PR #166138)   Sander de Smalen via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [X86][APX] Add VirtRegMap to non stack foldMemoryOperand too (PR #193423)   Phoebe Wang via llvm-commits
• [llvm] [Draft] Data flow based shrink wrapping (PR #191784)   Jay Foad via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Marcos Maronas via llvm-commits
• [llvm] 35480b2 - [SPIRV] Migrate NSDI emission from a machine pass to DebugHandlerBase (#191212)   via llvm-commits
• [llvm] [SPIRV] Migrate NSDI emission from a machine pass to DebugHandlerBase (PR #191212)   Manuel Carrasco via llvm-commits
• [llvm] [NFC][SPIR-V] Use getScalarOrVectorComponent{Count,Type} instead of raw operand access (PR #193410)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AArch64] Avoid getMinimalPhysRegClass in callee-save frame lowering (PR #193438)   Cullen Rhodes via llvm-commits
• [llvm] [AMDGPU] Delete dead meta instructions (PR #193030)   Jay Foad via llvm-commits
• [llvm] [AArch64] Avoid getMinimalPhysRegClass in callee-save frame lowering (PR #193438)   via llvm-commits
• [llvm] [Support] Add std::string overload for llvm::sys::path::native (PR #193228)   Hans Wennborg via llvm-commits
• [llvm] [Support] Add std::string overload for llvm::sys::path::native (PR #193228)   Hans Wennborg via llvm-commits
• [llvm] [Support] Add std::string overload for llvm::sys::path::native (PR #193228)   Hans Wennborg via llvm-commits
• [llvm] [mlir] [Coroutines] Add verifier checks for llvm.coro.begin and llvm.coro.id (PR #192887)   Weibo He via llvm-commits
• [llvm] [llvm-dwp] Replace MCStreamer with direct ELF writer for zero-copy output (PR #192112)   James Henderson via llvm-commits
• [llvm] [SelectionDAG] Preserve poison in IS_FPCLASS folds (PR #193246)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Delete dead meta instructions (PR #193030)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Preserve poison in IS_FPCLASS folds (PR #193246)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Preserve poison in IS_FPCLASS folds (PR #193246)   Simon Pilgrim via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for compiler-rt builtins on SPIRV64 target (PR #192897)   Mészáros Gergely via llvm-commits
• [llvm] [X86] Recognise vectors with zeros in all upper elements to improve VMOVS*Z folding (PR #193263)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   via llvm-commits
• [llvm] [X86] Recognise vectors with zeros in all upper elements to improve VMOVS*Z folding (PR #193263)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Recognise vectors with zeros in all upper elements to improve VMOVS*Z folding (PR #193263)   Simon Pilgrim via llvm-commits
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• [lld] [lld][macho] Restructure thunk generation algorithm (PR #193367)   Zhaoxuan Jiang via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #193367)   Zhaoxuan Jiang via llvm-commits
• [clang] [llvm] [Vectorize][OpenMP] Support header-provided declare simd math variants (PR #189523)   via llvm-commits
• [llvm] 9ec6788 - [lldb] Add HTTPS tests for SymbolLocatorSymStore (#192274)   via llvm-commits
• [lldb] [llvm] [lldb] Add HTTPS hardening tests for SymbolLocatorSymStore (PR #192274)   Stefan Gränitz via llvm-commits
• [clang] [llvm] [Vectorize][OpenMP] Support header-provided declare simd math variants (PR #189523)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   Gábor Spaits via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   via llvm-commits
• [compiler-rt] [ASan][Windows] Fix memmove/memcpy interception on x64 (PR #192060)   Hans Wennborg via llvm-commits
• [llvm] 7af4283 - [NFC][SPIR-V] Use getScalarOrVectorComponent{Count,Type} instead of raw operand access (#193410)   via llvm-commits
• [llvm] [NFC][SPIR-V] Use getScalarOrVectorComponent{Count,Type} instead of raw operand access (PR #193410)   Arseniy Obolenskiy via llvm-commits
• [llvm] arm: fix float to integer conversion with `+mve, -mve.fp` (PR #193319)   Folkert de Vries via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   via llvm-commits
• [llvm] [cross-project-tests] Add llvm-modextract as a dependency (PR #193296)   Ben Dunbobbin via llvm-commits
• [llvm] [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (PR #193415)   Antonio Frighetto via llvm-commits
• [llvm] [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (PR #193415)   Antonio Frighetto via llvm-commits
• [llvm] [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (PR #193415)   Antonio Frighetto via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Enable arm64e tests on macOS (PR #193391)   Dan Blackwell via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Enable arm64e tests on macOS (PR #193391)   Dan Blackwell via llvm-commits
• [llvm] [BOLT] Add bolt-rt to runtimes (PR #187308)   Casey Smalley via llvm-commits
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• [llvm] [DA] Fix overflow of findBounds* in BanerjeeTest (PR #191232)   Ryotaro Kasuga via llvm-commits
• [llvm] [LazyValueInfo] Support vector types in ICmp condition handling (PR #192900)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (PR #192074)   Mel Chen via llvm-commits
• [llvm] 2711d8a - [X86] Recognise vectors with zeros in all upper elements to improve VMOVS*Z folding (#193263)   via llvm-commits
• [llvm] [X86] Recognise vectors with zeros in all upper elements to improve VMOVS*Z folding (PR #193263)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Do not iterate in DCE (PR #193355)   David Green via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Pankaj Dwivedi via llvm-commits
• [llvm] [IPO] Avoid crash when DISubprogram has no type (PR #193420)   Michael Buch via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Pankaj Dwivedi via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nikita Popov via llvm-commits
• [llvm] [IPO] Avoid crash when DISubprogram has no type (PR #193420)   Michael Buch via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Support] Add std::string overload for llvm::sys::path::native (PR #193228)   Hans Wennborg via llvm-commits
• [llvm] [RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (PR #192074)   Mel Chen via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Matt Arsenault via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (PR #192074)   Mel Chen via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Luke Lau via llvm-commits
• [llvm] [LV] Change VPLane::getAsRuntimeExpr to use constant 64-bit indices (PR #193206)   David Sherwood via llvm-commits
• [llvm] Revert "[AA] Improve precision for monotonic atomic load/store operations" (PR #173135)   Nikita Popov via llvm-commits
• [llvm] [LV] Change VPLane::getAsRuntimeExpr to use constant 64-bit indices (PR #193206)   David Sherwood via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [LV] Change VPLane::getAsRuntimeExpr to use constant 64-bit indices (PR #193206)   Florian Hahn via llvm-commits
• [llvm] [llvm][YAML] Support aliases (anchors) in YAMLIO (PR #146371)   via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   Usha Gupta via llvm-commits
• [llvm] d24ebe3 - [Support] Add std::string overload for llvm::sys::path::native (#193228)   via llvm-commits
• [llvm] [Support] Add std::string overload for llvm::sys::path::native (PR #193228)   Hans Wennborg via llvm-commits
• [llvm] [DA] Remove unnecesasry SCEV negation operation (NFCI) (PR #193447)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove unnecesasry SCEV negation operation (NFCI) (PR #193447)   via llvm-commits
• [llvm] [llvm][YAML] Support aliases (anchors) in YAMLIO (PR #146371)   James Henderson via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   via llvm-commits
• [llvm] [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (PR #193220)   Alexis Engelke via llvm-commits
• [llvm] [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (PR #193220)   Alexis Engelke via llvm-commits
• [llvm] [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (PR #193220)   Alexis Engelke via llvm-commits
• [llvm] [VPlan] Permit licm-sinking recipes with no users (PR #189957)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add simplifications to remove header masks in predicated AnyOf select reductions (PR #190196)   Shih-Po Hung via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [LV] Change VPLane::getAsRuntimeExpr to use constant 64-bit indices (PR #193206)   David Sherwood via llvm-commits
• [compiler-rt] [llvm] [mlir] [compiler-rt] Don't provide `__arm_sme_state` for baremetal targets (PR #191434)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Arseniy Obolenskiy via llvm-commits
• [llvm] 86b9775 - [Passes] Remove Os and Oz optimization pipelines (#191363)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nikita Popov via llvm-commits
• [polly] 86b9775 - [Passes] Remove Os and Oz optimization pipelines (#191363)   via llvm-commits
• [llvm] [SPIR-V][docs] Document supported extensions missing from SPIRVUsage.rst (PR #193449)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   Harry Ramsey via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   Harry Ramsey via llvm-commits
• [llvm] [SPIR-V][docs] Document supported extensions missing from SPIRVUsage.rst (PR #193449)   via llvm-commits
• [llvm] [CGP] Reconstruct borrow chain from icmp pattern for subtract-with-carry (PR #189018)   Paweł Bylica via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [DA] Fix overflow of findBounds* in BanerjeeTest (PR #191232)   Ruoyu Qiu via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   via llvm-commits
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• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Simon Pilgrim via llvm-commits
• [llvm] arm: fix float to integer conversion with `+mve, -mve.fp` (PR #193319)   David Green via llvm-commits
• [llvm] arm: fix float to integer conversion with `+mve, -mve.fp` (PR #193319)   David Green via llvm-commits
• [clang] [llvm] [IRBuilder][NFC] Extract `CreateFAbs` helper (PR #193421)   Matt Arsenault via llvm-commits
• [clang] [llvm] [IRBuilder][NFC] Extract `CreateFAbs` helper (PR #193421)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   Harry Ramsey via llvm-commits
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• [llvm] [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (PR #193415)   Mingjie Xu via llvm-commits
• [clang] [llvm] [IRBuilder][NFC] Add `CreateFAbs` helper (PR #193421)   Matt Arsenault via llvm-commits
• [llvm] c37764c - [IRBuilder][NFC] Add `CreateFAbs` helper (#193421)   via llvm-commits
• [clang] [llvm] [IRBuilder][NFC] Add `CreateFAbs` helper (PR #193421)   Matt Arsenault via llvm-commits
• [llvm] [NFC][ADT] Make a few functions constexpr (PR #193302)   Matt Arsenault via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (PR #193415)   Mingjie Xu via llvm-commits
• [llvm] [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (PR #193415)   Mingjie Xu via llvm-commits
• [llvm] [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (PR #193415)   Mingjie Xu via llvm-commits
• [llvm] [DA] Remove unnecesasry SCEV negation operation (NFCI) (PR #193447)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (PR #193417)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Mel Chen via llvm-commits
• [llvm] arm: fix float to integer conversion with `+mve, -mve.fp` (PR #193319)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] New pass for code layout optimizations. (PR #184434)   David Green via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Xinlong Chen via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Avoid getMinimalPhysRegClass in callee-save frame lowering (PR #193438)   Cullen Rhodes via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Dmitry Sidorov via llvm-commits
• [llvm] [Bazel] Fixes 8e56a89 (PR #193450)   via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Dmitry Sidorov via llvm-commits
• [llvm] [AArch64] Avoid getMinimalPhysRegClass in callee-save frame lowering (PR #193438)   Cullen Rhodes via llvm-commits
• [llvm] [AMDGPU] Enable SetregVGPRMSBFixup for gfx1251 (PR #193390)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v4f16, v2f32) (PR #192904)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v4f16, v2f32) (PR #192904)   Matt Arsenault via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Nikita Popov via llvm-commits
• [llvm] [DA] Fix overflow of findBounds* in BanerjeeTest (PR #191232)   Ryotaro Kasuga via llvm-commits
• [llvm] [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (PR #193415)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [AMDGPU][WIP] Masked global prefetch (PR #193285)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   David Green via llvm-commits
• [llvm] d368c57 - [DA] Remove unnecesasry SCEV negation operation (NFCI) (#193447)   via llvm-commits
• [llvm] [DA] Remove unnecesasry SCEV negation operation (NFCI) (PR #193447)   Ryotaro Kasuga via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   Usha Gupta via llvm-commits
• [llvm] [AMDGPU][WIP] Masked global prefetch (PR #193285)   Matt Arsenault via llvm-commits
• [llvm] Revert "[AA] Improve precision for monotonic atomic load/store operations" (PR #173135)   Ralf Jung via llvm-commits
• [llvm] [GlobalISel][KnownBits] Use KnownBits::urem for G_UREM (PR #193455)   Tejas Gaikwad via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Matt Arsenault via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Matt Arsenault via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   Usha Gupta via llvm-commits
• [llvm] 808af6f - [LLVM][ConstantFolding] Use correct type when flushing denormals. (#193254)   via llvm-commits
• [llvm] [LLVM][ConstantFolding] Use correct type when flushing denormals. (PR #193254)   Paul Walker via llvm-commits
• [clang] [llvm] [ORC] Move JITLinkMemoryManager ownership out of ExecutorProcessControl. (PR #192665)   Lang Hames via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU][WIP] Masked global prefetch (PR #193285)   Jay Foad via llvm-commits
• [llvm] [GlobalISel][KnownBits] Use KnownBits::urem for G_UREM (PR #193455)   via llvm-commits
• [llvm] [AMDGPU] Enable SetregVGPRMSBFixup for gfx1251 (PR #193390)   Jay Foad via llvm-commits
• [llvm] [GlobalISel][KnownBits] Use KnownBits::urem for G_UREM (PR #193455)   via llvm-commits
• [llvm] [GlobalISel][KnownBits] Use KnownBits::urem for G_UREM (PR #193455)   via llvm-commits
• [clang] [llvm] [ORC] Move JITLinkMemoryManager ownership out of ExecutorProcessControl. (PR #192665)   via llvm-commits
• [clang] [llvm] [ORC] Move JITLinkMemoryManager ownership out of ExecutorProcessControl. (PR #192665)   Lang Hames via llvm-commits
• [llvm] f5f107e - [LLVM][SelectionDAG] Reduce chances of a split VSETCC being rewidened. (#191438)   via llvm-commits
• [llvm] [LLVM][SelectionDAG] Reduce chances of a split VSETCC being rewidened. (PR #191438)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Matthew Devereau via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   Antonio Frighetto via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   Antonio Frighetto via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Matthew Devereau via llvm-commits
• [llvm] [VPlan] Prefer checking opcode over underlying value (NFC) (PR #193463)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   via llvm-commits
• [llvm] [VPlan] Prefer checking opcode over underlying value (NFC) (PR #193463)   via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [AArch64] Fold fcvtzu/fcvtzs(uitofp/sitofp(x)) roundtrip (PR #190328)   Valeriy Savchenko via llvm-commits
• [llvm] [AArch64] Fold fcvtzu/fcvtzs(uitofp/sitofp(x)) roundtrip (PR #190328)   Valeriy Savchenko via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   via llvm-commits
• [llvm] [NFC][GlobalISel] Use move capture for SmallVector in LegalityPredica… (PR #193464)   Jaydeep Chauhan via llvm-commits
• [llvm] [NFC][GlobalISel] Use move capture for SmallVector in LegalityPredica… (PR #193464)   via llvm-commits
• [llvm] [NFC][GlobalISel] Use move capture for SmallVector in LegalityPredicates lambdas (PR #193464)   Jaydeep Chauhan via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v2i6, v4i16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v2i6, v4i16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [GVN] Reject PartialAlias in canSkipClobberingStore (PR #193465)   via llvm-commits
• [llvm] [GVN] Reject PartialAlias in canSkipClobberingStore (PR #193465)   via llvm-commits
• [llvm] [GVN] Reject PartialAlias in canSkipClobberingStore (PR #193465)   via llvm-commits
• [llvm] [AArch64] Use EXT for byte shuffles with leading zeros (PR #193466)   Shreeyash Pandey via llvm-commits
• [llvm] [NFC][GlobalISel] Use move capture for SmallVector in LegalityPredicates lambdas (PR #193464)   Jaydeep Chauhan via llvm-commits
• [llvm] [AArch64] Use EXT for byte shuffles with leading zeros (PR #193466)   via llvm-commits
• [flang] [llvm] [Flang] Adding first lowering for the allocation and deallocation of coarrays (PR #182110)   antoine moynault via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] performSraCombine - SRA(X,BW-1) - don't freeze HI operand for single (repeated) shift (PR #193468)   Simon Pilgrim via llvm-commits
• [llvm] [Fortran] Use INTERFACE targets for options and dependencies (PR #193469)   Michael Kruse via llvm-commits
• [llvm] [AMDGPU] performSraCombine - SRA(X,BW-1) - don't freeze HI operand for single (repeated) shift (PR #193468)   via llvm-commits
• [llvm] [AMDGPU] performSraCombine - SRA(X,BW-1) - don't freeze HI operand for single (repeated) shift (PR #193468)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for MCFragment/Archive/RegisterTargetPassConfigCallback classes (PR #193470)   Jaydeep Chauhan via llvm-commits
• [llvm] 2a3639c - [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (#190307)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::EXTRACT_VECTOR_ELT handling (PR #190307)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for MCFragment/Archive/RegisterTargetPassConfigCallback classes (PR #193470)   via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for MCFragment/Archive/RegisterTargetPassConfigCallback classes (PR #193470)   via llvm-commits
• [llvm] [AMDGPU] performSraCombine - SRA(X,BW-1) - don't freeze HI operand for single (repeated) shift (PR #193468)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [NFC][GlobalISel] Use move capture for SmallVector in LegalityPredicates lambdas (PR #193464)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   Matt Arsenault via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [runtimes][CMake] Move Fortran support code from flang-rt (PR #171610)   Michael Kruse via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [lld] [lldb] [llvm] [Support][Cache] Make `pruneCache` return an `Expected` (PR #191367)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve performance of FP32 multiplication by reciprocal. (PR #193279)   Tim Gymnich via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [NFC] Remove assert from AArch64TargetLowering::LowerCTTZ. (PR #193474)   Paul Walker via llvm-commits
• [lld] [lldb] [llvm] [Support][Cache] Make `pruneCache` return an `Expected` (PR #191367)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Mikael Holmen via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Luke Lau via llvm-commits
• [llvm] [NFC] Remove assert from AArch64TargetLowering::LowerCTTZ. (PR #193474)   via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] performSraCombine - SRA(X,BW-1) - don't freeze HI operand for single (repeated) shift (PR #193468)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][GlobalISel] Remove unnecessary comment (PR #193333)   Matt Arsenault via llvm-commits
• [llvm] b965d52 - [LLVM][GlobalISel] Remove unnecessary comment (#193333)   via llvm-commits
• [llvm] [LLVM][GlobalISel] Remove unnecessary comment (PR #193333)   Matt Arsenault via llvm-commits
• [flang] [llvm] [Flang] Adding first lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add a sched group mask for LDSDMA instructions (PR #190872)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Luke Lau via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   John Brawn via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   Gábor Spaits via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for MCFragment/Archive/RegisterTargetPassConfigCallback classes (PR #193470)   James Henderson via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   Gábor Spaits via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Luke Lau via llvm-commits
• [llvm] a166f0b - [AMDGPU] performSraCombine - SRA(X,BW-1) - don't freeze HI operand for single (repeated) shift (#193468)   via llvm-commits
• [llvm] [AMDGPU] performSraCombine - SRA(X,BW-1) - don't freeze HI operand for single (repeated) shift (PR #193468)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Durgadoss R via llvm-commits
• [llvm] [X86] Add baseline tests for #144231 (PR #193484)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add baseline tests for #144231 (PR #193484)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Durgadoss R via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   David Sherwood via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Durgadoss R via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Durgadoss R via llvm-commits
• [llvm] [libsycl][NFC] Move the cmake msvc DLL check (PR #193485)   Sergey Semenov via llvm-commits
• [llvm] [RISCV] Functional llvm.vector.reduce.mul on scalable types (PR #193094)   Luke Lau via llvm-commits
• [llvm] [libsycl][NFC] Move the cmake msvc DLL check (PR #193485)   Sergey Semenov via llvm-commits
• [llvm] [RISCV] Functional llvm.vector.reduce.mul on scalable types (PR #193094)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   David Sherwood via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   John Brawn via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Durgadoss R via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Durgadoss R via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   Luke Lau via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Phoebe Wang via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Durgadoss R via llvm-commits
• [llvm] [cmake] Forward MacOS sysroot to runtimes when not crosscompiling (PR #182501)   David Truby via llvm-commits
• [llvm] [cmake] Forward MacOS sysroot to runtimes when not crosscompiling (PR #182501)   David Truby via llvm-commits
• [llvm] 8e1095f - [AArch64] Only prefer partial reductions if cost is lower. (#191369)   via llvm-commits
• [llvm] [AArch64] Only prefer partial reductions if cost is lower. (PR #191369)   Sander de Smalen via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Maksim Ivanov via llvm-commits
• [llvm] [VPlan] Prefer checking opcode over underlying value (NFC) (PR #193463)   Luke Lau via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Phoebe Wang via llvm-commits
• [llvm] [VPlan] Avoid assuming underlying values for GEPs (PR #193460)   Luke Lau via llvm-commits
• [llvm] [NFC][SPIR-V] Consolidate OpVariable insertion point logic into getOpVariableMBBIt (PR #193433)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIR-V] Consolidate OpVariable insertion point logic into getOpVariableMBBIt (PR #193433)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIR-V] Consolidate OpVariable insertion point logic into getOpVariableMBBIt (PR #193433)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   Florian Hahn via llvm-commits
• [llvm] [LoopInterchange] Fix out-of-bounds accesses in tests (NFC) (PR #193272)   Sjoerd Meijer via llvm-commits
• [llvm] [NFC][SPIR-V] Consolidate OpVariable insertion point logic into getOpVariableMBBIt (PR #193433)   Arseniy Obolenskiy via llvm-commits
• [llvm] [VPlan] Add simplifications to remove header masks in predicated AnyOf select reductions (PR #190196)   Luke Lau via llvm-commits
• [llvm] [NFC] Remove assert from AArch64TargetLowering::LowerCTTZ. (PR #193474)   David Sherwood via llvm-commits
• [llvm] [cmake] Forward MacOS sysroot to runtimes when not crosscompiling (PR #182501)   Tom Eccles via llvm-commits
• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   Florian Hahn via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   Florian Hahn via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   via llvm-commits
• [llvm] 9673f1f - [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (#192994)   via llvm-commits
• [llvm] [SPIR-V] Handle [N x i8] byte addressing in SPIRVEmitIntrinsics (PR #192994)   Steven Perron via llvm-commits
• [llvm] [VPlan] Prefer checking opcode over underlying value (NFC) (PR #193463)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [llvm] [VPlan] Prefer checking opcode over underlying value (NFC) (PR #193463)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Permit licm-sinking recipes with no users (PR #189957)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use MaxRuntimeStep in materializeVectorTC to simplify middle br. (PR #193067)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Ramkumar Ramachandra via llvm-commits
• [lld] [ELF] Handle INCLUDE like a call stack (PR #193427)   Peter Smith via llvm-commits
• [lld] [ELF] Handle INCLUDE like a call stack (PR #193427)   Peter Smith via llvm-commits
• [lld] [ELF] Handle INCLUDE like a call stack (PR #193427)   Peter Smith via llvm-commits
• [lld] [ELF] Handle INCLUDE like a call stack (PR #193427)   Peter Smith via llvm-commits
• [llvm] [IR][AtomicExpand] Add elementwise modifier to atomicrmw; add abillity to expand by scalarizing (PR #189517)   via llvm-commits
• [llvm] [Extractor] Use function return for the one and only output (PR #191824)   Michael Kruse via llvm-commits
• [llvm] e43f323 - [VPlan] Permit licm-sinking recipes with no users (#189957)   via llvm-commits
• [llvm] [VPlan] Permit licm-sinking recipes with no users (PR #189957)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Extractor] Use function return for the one and only output (PR #191824)   Michael Kruse via llvm-commits
• [llvm] 4d18c10 - [VPlan] Prefer checking opcode over underlying value (NFC) (#193463)   via llvm-commits
• [llvm] [VPlan] Prefer checking opcode over underlying value (NFC) (PR #193463)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   David Green via llvm-commits
• [llvm] [MLIR][BUILD] Fix for c1cff89b (PR #193489)   Sohaib Iftikhar via llvm-commits
• [llvm] [MLIR][BUILD] Fix for c1cff89b (PR #193489)   Sohaib Iftikhar via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Matthew Devereau via llvm-commits
• [llvm] [MLIR][BUILD] Fix for c1cff89b (PR #193489)   Sohaib Iftikhar via llvm-commits
• [llvm] b3319ca - [LLVM]Codegen][X86] Add vector ConstantInt/FP support to CollectConstantBits. (#193249)   via llvm-commits
• [llvm] [LLVM]Codegen][X86] Add vector ConstantInt/FP support to CollectConstantBits. (PR #193249)   Paul Walker via llvm-commits
• [llvm] [flang-rt] Add support for logical binary input edit descriptor (PR #193490)   John Otken via llvm-commits
• [llvm] [Passes] Remove Os/Oz from pass option listings (PR #193491)   Nikita Popov via llvm-commits
• [llvm] [Passes] Remove Os/Oz from pass option listings (PR #193491)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nikita Popov via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Marcos Maronas via llvm-commits
• [llvm] 90fa375 - [X86][NFC] Reorganize fadd, fsub, fmul and fdiv selection tests (#193012)   via llvm-commits
• [llvm] [X86][NFC] Reorganize fadd, fsub, fmul and fdiv selection tests (PR #193012)   Simon Pilgrim via llvm-commits
• [llvm] [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (PR #193417)   David Green via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Shreeyash Pandey via llvm-commits
• [llvm] arm: fix float to integer conversion with `+mve, -mve.fp` (PR #193319)   David Green via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Shreeyash Pandey via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   Nathan Gauër via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   Nathan Gauër via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Ryotaro Kasuga via llvm-commits
• [llvm] [flang-rt] Add support for logical binary input edit descriptor (PR #193490)   John Otken via llvm-commits
• [llvm] [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (PR #193417)   Alexis Engelke via llvm-commits
• [compiler-rt] [ASan][Windows] Fix memmove/memcpy interception on x64 (PR #192060)   Hans Wennborg via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Steffen Larsen via llvm-commits
• [llvm] [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (PR #193417)   Cullen Rhodes via llvm-commits
• [llvm] [NFC][LLVM] Simplify IIT encoding for scalable vectors (PR #191737)   Rahul Joshi via llvm-commits
• [llvm] [LoopInterchange] Fix out-of-bounds accesses in tests (NFC) (PR #193272)   via llvm-commits
• [llvm] e7fd6fe - [NFC][SPIR-V] Consolidate OpVariable insertion point logic into getOpVariableMBBIt (#193433)   via llvm-commits
• [llvm] [NFC][SPIR-V] Consolidate OpVariable insertion point logic into getOpVariableMBBIt (PR #193433)   Arseniy Obolenskiy via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   David Green via llvm-commits
• [llvm] [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (PR #193417)   Alexis Engelke via llvm-commits
• [clang] [llvm] [aarch64] Add more MSVC intrinsics (PR #193221)   Adhemerval Zanella via llvm-commits
• [llvm] c6e9008 - [InstCombine] Remove support for volatile in phi of load transform (#193154)   via llvm-commits
• [llvm] [InstCombine] Remove support for volatile in phi of load transform (PR #193154)   Nikita Popov via llvm-commits
• [llvm] 124f14c - [Passes] Remove Os/Oz from pass option listings (#193491)   via llvm-commits
• [llvm] [Passes] Remove Os/Oz from pass option listings (PR #193491)   Nikita Popov via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Matt Arsenault via llvm-commits
• [llvm] [MIPS] Remove InstrItinClass definitions and MipsSchedule.td (PR #188010)   Djordje Todorovic via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   via llvm-commits
• [llvm] [AMDGPU] Fix s_cselect scc clobber issue (PR #193498)   Wooseok Lee via llvm-commits
• [llvm] [AMDGPU] Fix s_cselect scc clobber issue (PR #193498)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Fix iota_range assertion when OtherMarks is empty in mergeAsyncMarks() (PR #193499)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Fix iota_range assertion when OtherMarks is empty in mergeAsyncMarks() (PR #193499)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Fix iota_range assertion when OtherMarks is empty in mergeAsyncMarks() (PR #193499)   via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect liveness analysis (PR #193104)   via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Steffen Larsen via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect liveness analysis (PR #193104)   via llvm-commits
• [llvm] [IR] Add require-logical-module module flag (PR #193502)   Nathan Gauër via llvm-commits
• [llvm] [IR] Add require-logical-module module flag (PR #193502)   Nathan Gauër via llvm-commits
• [llvm] [IR] Add require-logical-module module flag (PR #193502)   via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [TySan] Fix size type mismatch in instrumentMemInst for 32-bit targets (PR #191601)   Matthew Nagy via llvm-commits
• [llvm] [DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (PR #162242)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Enable SetregVGPRMSBFixup for gfx1251 (PR #193390)   Shilei Tian via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   Paul Walker via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Hari Limaye via llvm-commits
• [llvm] [X86] Add TODO for nsw+nuw handling to (add (add X, Y), X) --> add(add(X, X), Y) (PR #193503)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add TODO for nsw+nuw handling to (add (add X, Y), X) --> add(add(X, X), Y) (PR #193503)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [ISel][AArch64] Add CodeGen support for partial sub reductions. (PR #186809)   Paul Walker via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Björn Pettersson via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Fix s_cselect scc clobber issue (PR #193498)   Jay Foad via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Paul Walker via llvm-commits
• [llvm] [VPlan] Use VPInstructionWithType for uniform casts. (PR #140623)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopInterchange] Fix out-of-bounds accesses in tests (NFC) (PR #193272)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix s_cselect scc clobber issue (PR #193498)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix s_cselect scc clobber issue (PR #193498)   Matt Arsenault via llvm-commits
• [clang] [lldb] [llvm] [mlir] [IR] Allow integer vector atomicrmw (PR #190716)   Antonio Frighetto via llvm-commits
• [llvm] [offload] Get kernel argument sizes from Level Zero (PR #192487)   Alex Duran via llvm-commits
• [llvm] [bolt] AArch64: Fix TLSDESC to LE relaxation by mold (PR #190370)   Paschalis Mpeis via llvm-commits
• [llvm] [bolt] AArch64: Fix TLSDESC to LE relaxation by mold (PR #190370)   Paschalis Mpeis via llvm-commits
• [llvm] [bolt] AArch64: Fix TLSDESC to LE relaxation by mold (PR #190370)   via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   via llvm-commits
• [llvm] [offload] Add floating-point support detection queries (PR #193233)   Alex Duran via llvm-commits
• [llvm] [MachineLICM] Only mark live-ins as non-invariant if defined in loop (PR #191755)   Matt Arsenault via llvm-commits
• [llvm] [bolt] Account for stubs with symbols in plt. (PR #192716)   Alexey Moksyakov via llvm-commits
• [llvm] [TySan] Fix size type mismatch in instrumentMemInst for 32-bit targets (PR #191601)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [llvm] 20a7d26 - [SPIRV] Fix legalization of zero-sized intrinsic globals (#192730)   via llvm-commits
• [llvm] [AArch64][ISel] Use TripleOpVT in LowerVECTOR_INTERLEAVE (PR #193506)   Matthew Devereau via llvm-commits
• [llvm] [bolt] Account for stubs with symbols in plt. (PR #192716)   Hemant Kulkarni via llvm-commits
• [llvm] [AArch64][ISel] Use TripleOpVT in LowerVECTOR_INTERLEAVE (PR #193506)   via llvm-commits
• [llvm] [TySan] Fix crash in instrumentation with scalar TBAA tag missing offset (PR #172878)   Matthew Nagy via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Matthew Devereau via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Matt Arsenault via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Fix iota_range assertion when OtherMarks is empty in mergeAsyncMarks() (PR #193499)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Fix iota_range assertion when OtherMarks is empty in mergeAsyncMarks() (PR #193499)   Matt Arsenault via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [llvm] [SDAG] Allow S/Zext in select-abd pattern (PR #191207)   via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   Nick Sarnie via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove support for FEAT_MPAMv2_VID (PR #193191)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][ISel] Use TripleOpVT in LowerVECTOR_INTERLEAVE (PR #193506)   Paul Walker via llvm-commits
• [llvm] Add SPIRV to excluded profcheck targets (PR #193509)   Mircea Trofin via llvm-commits
• [llvm] 475639a - Add SPIRV to excluded profcheck targets (#193509)   via llvm-commits
• [llvm] Add SPIRV to excluded profcheck targets (PR #193509)   Mircea Trofin via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [flang] [llvm] [Flang] [Runtime ]Fix write endfile abort (PR #191633)   via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] 85dc811 - [X86] Add TODO for nsw+nuw handling to (add (add X, Y), X) --> add(add(X, X), Y) (#193503)   via llvm-commits
• [llvm] [X86] Add TODO for nsw+nuw handling to (add (add X, Y), X) --> add(add(X, X), Y) (PR #193503)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-sized intrinsic globals (PR #192730)   LLVM Continuous Integration via llvm-commits
• [llvm] [AtomicExpandPass] Preserve atomic and volatile nature of emulated operations (PR #188361)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Phoebe Wang via llvm-commits
• [llvm] [VPlan] Introduce scalar GEP VPInstruction (PR #193510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AtomicExpandPass] Preserve atomic and volatile nature of emulated operations (PR #188361)   Matt Arsenault via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   John Brawn via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Dmitry Sidorov via llvm-commits
• [llvm] [VPlan] Introduce scalar GEP VPInstruction (PR #193510)   via llvm-commits
• [llvm] [VPlan] Introduce scalar GEP VPInstruction (PR #193510)   via llvm-commits
• [llvm] [VPlan] Avoid assuming underlying values for GEPs (NFC) (PR #193460)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Avoid assuming underlying values for GEPs (NFC) (PR #193460)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU] Fix s_cselect scc clobber issue (PR #193498)   Jay Foad via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Dmitry Sidorov via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   Nikita Popov via llvm-commits
• [llvm] [LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (PR #188277)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Dmitry Sidorov via llvm-commits
• [llvm] ba767d0 - [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (#192609)   via llvm-commits
• [llvm] [MachineCopyPropagation][NFC] Refactor EliminateSpillageCopies (PR #192609)   Jack Styles via llvm-commits
• [llvm] 4dbb7ee - [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (#188206)   via llvm-commits
• [llvm] [DAG] visitFREEZE - revisit frozen node after merging with unfrozen uses (PR #188206)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Arseniy Obolenskiy via llvm-commits
• [llvm] 1364f52 - [LoopInterchange] Fix out-of-bounds accesses in tests (NFC) (#193272)   via llvm-commits
• [llvm] [LoopInterchange] Fix out-of-bounds accesses in tests (NFC) (PR #193272)   Ryotaro Kasuga via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   David Sherwood via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (PR #193417)   Cullen Rhodes via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] 8f51fe4 - arm: fix float to integer conversion with `+mve` (#193319)   via llvm-commits
• [llvm] arm: fix float to integer conversion with `+mve, -mve.fp` (PR #193319)   Folkert de Vries via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Functional llvm.vector.reduce.mul on scalable types (PR #193094)   Philip Reames via llvm-commits
• [llvm] [AMDGPU] Enable SetregVGPRMSBFixup for gfx1251 (PR #193390)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Enable SetregVGPRMSBFixup for gfx1251 (PR #193390)   Yaxun Liu via llvm-commits
• [llvm] [LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (PR #188277)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Fold v_perm pair into v_swap (PR #181966)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold v_perm pair into v_swap (PR #181966)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fold v_perm pair into v_swap (PR #181966)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Nick Sarnie via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   John Brawn via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   John Brawn via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Tarun Prabhu via llvm-commits
• [llvm] [profcheck] Fix assert in getInitializer call on global with no initializer (PR #193514)   Nick Sarnie via llvm-commits
• [llvm] [ConstantFolding] Don't fold constrained fsub/fadd to zero with round.dynamic (PR #184919)   Matt Arsenault via llvm-commits
• [llvm] [ConstantFolding] Don't fold constrained fsub/fadd to zero with round.dynamic (PR #184919)   Matt Arsenault via llvm-commits
• [llvm] d154ccd - [AArch64][ISel] Add lowering for fixed-width deinterleave3 (#192972)   via llvm-commits
• [llvm] [VPlan] Introduce scalar GEP VPInstruction (PR #193510)   via llvm-commits
• [llvm] [VPlan] Introduce scalar GEP VPInstruction (PR #193510)   via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #171515)   Michael Kruse via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AArch64][ISel] Add lowering for fixed-width deinterleave3 (PR #192972)   Matthew Devereau via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   David Sherwood via llvm-commits
• [llvm] [LoopUnroll] Make optimization remarks more precise (PR #190714)   Matt Arsenault via llvm-commits
• [llvm] [LoopUnroll] Make optimization remarks more precise (PR #190714)   Matt Arsenault via llvm-commits
• [llvm] [LoopUnroll] Make optimization remarks more precise (PR #190714)   Matt Arsenault via llvm-commits
• [llvm] [LoopUnroll] Make optimization remarks more precise (PR #190714)   Matt Arsenault via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for MCFragment/Archive/RegisterTargetPassConfigCallback classes (PR #193470)   Jaydeep Chauhan via llvm-commits
• [compiler-rt] b13867d - [compiler-rt] Initial support for compiler-rt builtins on SPIRV64 target (#192897)   via llvm-commits
• [llvm] [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (PR #193220)   Nathiyaa Sengodan via llvm-commits
• [compiler-rt] [compiler-rt] Initial support for compiler-rt builtins on SPIRV64 target (PR #192897)   via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   David Sherwood via llvm-commits
• [llvm] [VPlan] Compute the cost for vector icmp and fcmp (PR #193268)   David Sherwood via llvm-commits
• [compiler-rt] [ASan][Windows] Fix memmove/memcpy interception on x64 (PR #192060)   Alexandre Ganea via llvm-commits
• [llvm] [SPIR-V] Fix validation errors for function pointers with CodeSectionINTEL storage class (PR #192973)   Dmitry Sidorov via llvm-commits
• [llvm] [mlir] [OpenMP][OMPIRBuilder] Support complex types in atomic update/capture (PR #191490)   Michael Kruse via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Steven Perron via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Steven Perron via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Steven Perron via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Steven Perron via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Steven Perron via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Steven Perron via llvm-commits
• [clang] [llvm] [Clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a add/add-and-subtract/subtract pairwise operations (PR #187527)   Jonathan Thackray via llvm-commits
• [llvm] 93419bf - [AArch64][ISel] Use TripleOpVT in LowerVECTOR_INTERLEAVE (#193506)   via llvm-commits
• [llvm] [AArch64][ISel] Use TripleOpVT in LowerVECTOR_INTERLEAVE (PR #193506)   Matthew Devereau via llvm-commits
• [clang] [llvm] clang: Check -Xarch compatibility using Triple parsed architecture. (PR #189651)   Jonathan Thackray via llvm-commits
• [llvm] [LoopUnroll] Make optimization remarks more precise (PR #190714)   Nikita Popov via llvm-commits
• [llvm] [CodeGenPrepare] Do not unmerge gep nuw if the new index is minus one (PR #193488)   Antonio Frighetto via llvm-commits
• [llvm] [CodeGenPrepare] Do not unmerge gep nuw if the new index is minus one (PR #193488)   Antonio Frighetto via llvm-commits
• [llvm] [CodeGenPrepare] Do not unmerge gep nuw if the new index is minus one (PR #193488)   Antonio Frighetto via llvm-commits
• [llvm] [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (PR #193220)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Introduce scalar GEP VPInstruction (PR #193510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [CodeGenPrepare] Do not unmerge gep nuw if the new index is minus one (PR #193488)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Introduce scalar GEP VPInstruction (PR #193510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (PR #188277)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   Peter Smith via llvm-commits
• [llvm] [LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (PR #188277)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for MCFragment/Archive/RegisterTargetPassConfigCallback classes (PR #193470)   James Henderson via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   Peter Smith via llvm-commits
• [llvm] [LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (PR #188277)   via llvm-commits
• [llvm] [LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (PR #188277)   via llvm-commits
• [llvm] [LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (PR #188277)   via llvm-commits
• [llvm] [LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (PR #188277)   via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   David Sherwood via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   David Sherwood via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   David Sherwood via llvm-commits
• [llvm] [libsycl][NFC] Move the cmake msvc DLL check (PR #193485)   Alexey Bader via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect liveness analysis (PR #193104)   Shilei Tian via llvm-commits
• [llvm] [GIsel] Use changeElementType for cond types in LegalizerHelper (PR #193049)   Michal Paszkowski via llvm-commits
• [llvm] [SystemZ] Avoid unaligned/overlapping accesses with memcpy/memset. (PR #187100)   Jonas Paulsson via llvm-commits
• [llvm] [AMDGPU][True16] Legalize S16 for G_STORE/G_LOAD in GlobalISel when True16 is enabled (PR #176963)   Domenic Nutile via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Sean Fertile via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Sean Fertile via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Sean Fertile via llvm-commits
• [llvm] [AMDGPU] implement no-sdwa prediction in td and support globalisel (PR #193518)   via llvm-commits
• [llvm] [AMDGPU] implement no-sdwa prediction in td and support globalisel (PR #193518)   via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [AMDGPU] implement no-sdwa prediction in td and support globalisel (PR #193518)   via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] implement no-sdwa prediction in td and support globalisel (PR #193518)   via llvm-commits
• [llvm] [NVPTX] Implement fp.control/fp.except operand bundle support (PR #191614)   Princeton Ferro via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] 8fc5834 - [GIsel] Use changeElementType for cond types in LegalizerHelper (#193049)   via llvm-commits
• [llvm] [GIsel] Use changeElementType for cond types in LegalizerHelper (PR #193049)   Alex MacLean via llvm-commits
• [llvm] [CodeGenPrepare] Do not unmerge gep nuw if the new index is minus one (PR #193488)   via llvm-commits
• [llvm] [SystemZ] Avoid unaligned/overlapping accesses with memcpy/memset. (PR #187100)   Jonas Paulsson via llvm-commits
• [llvm] [RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (PR #192074)   Luke Lau via llvm-commits
• [llvm] [RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (PR #192074)   Luke Lau via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Marcos Maronas via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Break v2i32 and/or/xor ops into i32 pairs when followed by t… (PR #191422)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Break v2i32 and/or/xor ops into i32 pairs when followed by t… (PR #191422)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Break v2i32 and/or/xor ops into i32 pairs when followed by t… (PR #191422)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Marcos Maronas via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [clang] [llvm] [mlir] [openmp] [LoopTiling][Clang][MLIR] Canonical Intra-tile Loops (PR #191114)   Michael Kruse via llvm-commits
• [clang] [llvm] [mlir] [openmp] [LoopTiling][Clang][MLIR] Canonical Intra-tile Loops (PR #191114)   Michael Kruse via llvm-commits
• [clang] [llvm] [mlir] [openmp] [LoopTiling][Clang][MLIR] Canonical Intra-tile Loops (PR #191114)   Michael Kruse via llvm-commits
• [clang] [llvm] [mlir] [openmp] [LoopTiling][Clang][MLIR] Canonical Intra-tile Loops (PR #191114)   Michael Kruse via llvm-commits
• [llvm] [LV] Simplify live-out extraction for first-order recurrence phis when tail folding (PR #176108)   Luke Lau via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for MCFragment/Archive/RegisterTargetPassConfigCallback classes (PR #193470)   James Henderson via llvm-commits
• [llvm] [CodeGenPrepare] Do not unmerge gep nuw if the new index is minus one (PR #193488)   via llvm-commits
• [llvm] [WebAssembly] Fix wide bitmask fallback in performBitcastCombine (PR #190915)   via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Matt Arsenault via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Matt Arsenault via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Matt Arsenault via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   Craig Topper via llvm-commits
• [llvm] [LV][NFC] Stop running DCE pass in tests (PR #193521)   David Sherwood via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] [NFC][LLVM] Simplify IIT encoding for scalable vectors (PR #191737)   Nikita Popov via llvm-commits
• [llvm] [LV][NFC] Stop running DCE pass in tests (PR #193521)   via llvm-commits
• [llvm] [LV][NFC] Stop running DCE pass in tests (PR #193521)   Luke Lau via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] [GlobalISel] Add GIM_CheckMachineOperandType for matching metadata operands (PR #191389)   Matt Arsenault via llvm-commits
• [llvm] 58f3d78 - [RISCV][P-ext] Custom legalize vector (setne X, allzeros) and (setgt X, allones) (#193360)   via llvm-commits
• [llvm] [RISCV][P-ext] Custom legalize vector (setne X, allzeros) and (setgt X, allones) (PR #193360)   Craig Topper via llvm-commits
• [llvm] [llvm][RISCV] Split LMUL=8 fixed vector fcmp for zvfhmin and zvfbfmin (PR #193424)   Brandon Wu via llvm-commits
• [llvm] 3950da0 - [RISCV] Add isKnown method to VSETVLIInfo. NFC (#193406)   via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   Igor Wodiany via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Victor Mustya via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Victor Mustya via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Victor Mustya via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   Antonio Frighetto via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Victor Mustya via llvm-commits
• [compiler-rt] [ASan][Windows] Fix memmove/memcpy interception on x64 (PR #192060)   Alexandre Ganea via llvm-commits
• [llvm] [MLIR][BUILD]: Fix for 36331abd8cbb630fc174e182f1580e7cdefd2616 (PR #193523)   Sohaib Iftikhar via llvm-commits
• [llvm] [MLIR][BUILD]: Fix for 36331abd8cbb630fc174e182f1580e7cdefd2616 (PR #193523)   Sohaib Iftikhar via llvm-commits
• [llvm] [IR] Note that duplicate profile values are illegal in VP metadata (PR #193077)   Teresa Johnson via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Victor Mustya via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [compiler-rt] Revert "[ASan][Windows] Fix memmove/memcpy interception on x64" (PR #193524)   Alexandre Ganea via llvm-commits
• [compiler-rt] Revert "[ASan][Windows] Fix memmove/memcpy interception on x64" (PR #193524)   Alexandre Ganea via llvm-commits
• [compiler-rt] Revert "[ASan][Windows] Fix memmove/memcpy interception on x64" (PR #193524)   via llvm-commits
• [llvm] [GVN] Reject PartialAlias in canSkipClobberingStore (PR #193465)   Nikita Popov via llvm-commits
• [llvm] [MLIR][BUILD]: Fix for 36331abd8cbb630fc174e182f1580e7cdefd2616 (PR #193523)   Sohaib Iftikhar via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [llvm] [MLIR][BUILD]: Fix for 36331abd8cbb630fc174e182f1580e7cdefd2616 (PR #193523)   Sohaib Iftikhar via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V][docs] Document supported extensions missing from SPIRVUsage.rst (PR #193449)   Michal Paszkowski via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [llvm] fb6f1bd - [ItaniumDemangle] Strip __alloc_token_ to transparently demangle allocation functions (#191048)   via llvm-commits
• [libcxxabi] [llvm] [ItaniumDemangle] Strip __alloc_token_ to transparently demangle allocation functions (PR #191048)   Marco Elver via llvm-commits
• [llvm] [RISCV] Improve getInterleavedMemoryOpCost for interleave groups with tail gaps. (PR #192074)   Luke Lau via llvm-commits
• [llvm] 2072474 - [OpenMP][OMPIRBuilder] Support complex types in atomic update/capture (#191490)   via llvm-commits
• [llvm] [mlir] [OpenMP][OMPIRBuilder] Support complex types in atomic update/capture (PR #191490)   via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Luke Lau via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Luke Lau via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Luke Lau via llvm-commits
• [llvm] [llvm][RISCV] Split LMUL=8 fixed vector fcmp for zvfhmin and zvfbfmin (PR #193424)   Craig Topper via llvm-commits
• [llvm] [llvm][RISCV] Split LMUL=8 fixed vector fcmp for zvfhmin and zvfbfmin (PR #193424)   Craig Topper via llvm-commits
• [compiler-rt] cdc0a90 - Revert "[ASan][Windows] Fix memmove/memcpy interception on x64" (#193524)   via llvm-commits
• [compiler-rt] Revert "[ASan][Windows] Fix memmove/memcpy interception on x64" (PR #193524)   Alexandre Ganea via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   Antonio Frighetto via llvm-commits
• [llvm] [RISCV] Add isKnown method to VSETVLIInfo. NFC (PR #193406)   Craig Topper via llvm-commits
• [llvm] [AArch64] Use ADDP tree for v16i8 to i16 bitmask extraction (PR #192974)   Conor Kotwasinski via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] [SelectionDAG] Change SSUBO to do (LHS < RHS) XOR (RESULT < 0) (PR #191747)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Introduce MachineLaneSSAUpdater for SSA Repair in Machine IR (PR #163421)   via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Philip Reames via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Philip Reames via llvm-commits
• [llvm] [SelectionDAG] Change SSUBO to do (LHS < RHS) XOR (RESULT < 0) (PR #191747)   via llvm-commits
• [llvm] [Hexagon] Add SafeStack runtime libcall to HexagonSystemLibrary (PR #191673)   Brian Cain via llvm-commits
• [llvm] [CodeGen] Check for no VN before def to catch potential split components (PR #191141)   Matt Arsenault via llvm-commits
• [llvm] [Hexagon] Add SafeStack runtime libcall to HexagonSystemLibrary (PR #191673)   Brian Cain via llvm-commits
• [llvm] [profcheck] Fix assert in getInitializer call on global with no initializer (PR #193514)   Nick Sarnie via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.fcmp (PR #193529)   Luke Lau via llvm-commits
• [llvm] [profcheck] Fix assert in getInitializer call on global with no initializer (PR #193514)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.fcmp (PR #193529)   via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for MCFragment/Archive/RegisterTargetPassConfigCallback classes (PR #193470)   Jaydeep Chauhan via llvm-commits
• [llvm] [AMDGPU] Fix s_cselect scc clobber issue (PR #193498)   Matt Arsenault via llvm-commits
• [llvm] [BOLT][Hexagon] Add Hexagon MCPlusBuilder, relocations (PR #192189)   Brian Cain via llvm-commits
• [llvm] [RISCV] Expand vp.inttoptr, vp.ptrtoint (PR #193530)   Luke Lau via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [llvm] [RISCV] Expand vp.inttoptr, vp.ptrtoint (PR #193530)   via llvm-commits
• [llvm] [AMDGPU] implement no-sdwa prediction in td and support globalisel (PR #193518)   via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   Antonio Frighetto via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Philip Reames via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [Passes] Remove Os and Oz optimization pipelines (PR #191363)   Nico Weber via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.fcmp (PR #193529)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.fcmp (PR #193529)   via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Reassociate commutative binops over select/phi/minmax (PR #187493)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Reassociate commutative binops over select/phi/minmax (PR #187493)   Yingwei Zheng via llvm-commits
• [llvm] [ARM][MC] Reject unaligned Thumb2 LDRD/STRD post-index immediates (PR #193531)   Mark Murray via llvm-commits
• [llvm] [ARM][MC] Reject unaligned Thumb2 LDRD/STRD post-index immediates (PR #193531)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [CodeGen] Introduce MachineLaneSSAUpdater for SSA Repair in Machine IR (PR #163421)   via llvm-commits
• [llvm] [CodeGen] Introduce MachineLaneSSAUpdater for SSA Repair in Machine IR (PR #163421)   via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   Matt Arsenault via llvm-commits
• [llvm] [LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (PR #188277)   Matt Arsenault via llvm-commits
• [llvm] [NFC][GlobalISel] Use move capture for SmallVector in LegalityPredicates lambdas (PR #193464)   Jaydeep Chauhan via llvm-commits
• [llvm] [llvm][RISCV] Split LMUL=8 fixed vector fcmp for zvfhmin and zvfbfmin (PR #193424)   Brandon Wu via llvm-commits
• [llvm] [ARM][MC] Gate Thumb hvc alias on virtualization (PR #193532)   Mark Murray via llvm-commits
• [llvm] [AMDGPU] implement no-sdwa prediction in td and support globalisel (PR #193518)   via llvm-commits
• [llvm] [AMDGPU] implement no-sdwa prediction in td and support globalisel (PR #193518)   via llvm-commits
• [llvm] [profcheck] Fix assert in getInitializer call on global with no initializer (PR #193514)   Mircea Trofin via llvm-commits
• [llvm] [profcheck] Fix assert in getInitializer call on global with no initializer (PR #193514)   Mircea Trofin via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.fcmp (PR #193529)   Craig Topper via llvm-commits
• [llvm] [SandboxVec][NFC] Avoid temporary vectors. (PR #190867)   via llvm-commits
• [llvm] [InstCombine] Treat sdiv as udiv in foldICmpDivConstant when both operands are non-negative (PR #188731)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_abs (PR #193533)   Craig Topper via llvm-commits
• [llvm] [WebAssembly] Fix wide bitmask fallback in performBitcastCombine (PR #190915)   Jasmine Tang via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.fcmp (PR #193529)   Luke Lau via llvm-commits
• [compiler-rt] [compiler-rt][profile] Use runtimes-libc-headers in the GPU runtimes build (PR #192814)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_abs (PR #193533)   Luke Lau via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   via llvm-commits
• [llvm] 5ea5b9e - [profcheck] Fix assert in getInitializer call on global with no initializer (#193514)   via llvm-commits
• [llvm] [profcheck] Fix assert in getInitializer call on global with no initializer (PR #193514)   Nick Sarnie via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   Craig Topper via llvm-commits
• [llvm] IR: Allow !fpmath metadata on homogeneous float structs (PR #193537)   Matt Arsenault via llvm-commits
• [llvm] IR: Allow !fpmath metadata on homogeneous float structs (PR #193537)   Matt Arsenault via llvm-commits
• [llvm] IR: Allow !fpmath metadata on homogeneous float structs (PR #193537)   Matt Arsenault via llvm-commits
• [llvm] IR: Allow !fpmath metadata on homogeneous float structs (PR #193537)   via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for MCFragment/Archive/RegisterTargetPassConfigCallback classes (PR #193470)   Fangrui Song via llvm-commits
• [clang] [llvm] [InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (PR #184760)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][WIP] Added mask intrinsics (PR #193538)   Ravil Dorozhinskii via llvm-commits
• [compiler-rt] Revert "[compiler-rt][profile] Use runtimes-libc-headers in the GPU runtimes build" (PR #193539)   via llvm-commits
• [llvm] [Runtimes] Allow HandleLibc.cmake to be called multiple times (PR #193540)   Joseph Huber via llvm-commits
• [compiler-rt] Revert "[compiler-rt][profile] Use runtimes-libc-headers in the GPU runtimes build" (PR #193539)   via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [Hexagon] Correctly split masked loads/stores after widening (PR #190689)   Yashas Andaluri via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [Support][JSON] Use `std::unordered_map` for object storage (PR #171230)   LLVM Continuous Integration via llvm-commits
• [llvm] [Hexagon] Correctly split masked loads/stores after widening (PR #190689)   Yashas Andaluri via llvm-commits
• [clang] [llvm] [clang][RISCV] Use macro to check if intrinsics are supported (PR #187197)   Brandon Wu via llvm-commits
• [llvm] [AMDGPU] Add a sched group mask for LDSDMA instructions (PR #190872)   Shilei Tian via llvm-commits
• [llvm] [SelectionDAG] Salvage debuginfo when combining load and z|s ext instrs. (PR #188544)   Craig Topper via llvm-commits
• [clang] [llvm] [clang][RISCV] Use macro to check if intrinsics are supported (PR #187197)   Brandon Wu via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] [Runtimes] Allow HandleLibc.cmake to be called multiple times (PR #193540)   Petr Hosek via llvm-commits
• [llvm] [NFC][SPIRV] Introduce function to handle 64 bits overflow (PR #193088)   Deric C. via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] [Runtimes] Allow HandleLibc.cmake to be called multiple times (PR #193540)   Joseph Huber via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Jack Huang via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [clang] [llvm] [aarch64] Add more MSVC intrinsics (PR #193221)   Daniel Paoliello via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [llvm] [BOLT] Fix null pointer dereference in DWP processing with split DWARF (PR #191474)   Farid Zakaria via llvm-commits
• [llvm] [BOLT] Fix null pointer dereference in DWP processing with split DWARF (PR #191474)   Farid Zakaria via llvm-commits
• [llvm] [BOLT] Fix null pointer dereference in DWP processing with split DWARF (PR #191474)   Farid Zakaria via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Jack Huang via llvm-commits
• [lld] [lld][macho] Restructure thunk generation algorithm (PR #193367)   Ellis Hoag via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt][test] Remove noisy warnings (PR #191510)   Vitaly Buka via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   Harry Ramsey via llvm-commits
• [llvm] verify scc is not live-in (PR #193143)   Zeng Wu via llvm-commits
• [lld] [lld][WebAssembly] Always initialize fixed `__tls_base` in single threaded mode (PR #193563)   Sam Clegg via llvm-commits
• [llvm] [WebAssembly] Support f16x8.demote_f32x4_zero (PR #193564)   Brendan Dahl via llvm-commits
• [lld] [lld][WebAssembly] Always initialize fixed `__tls_base` in single threaded mode (PR #193563)   via llvm-commits
• [llvm] [WebAssembly] Support f16x8.demote_f32x4_zero (PR #193564)   via llvm-commits
• [llvm] [WebAssembly] Support f16x8.demote_f32x4_zero (PR #193564)   via llvm-commits
• [llvm] [MC][X86] Set SHF_X86_64_LARGE on mergeable constant sections for large code-model (PR #190903)   Grigory Pastukhov via llvm-commits
• [llvm] Reland: [MemProf] Dump inline call stacks as optimization remarks (PR #193545)   Kazu Hirata via llvm-commits
• [llvm] 37be084 - Reland: [MemProf] Dump inline call stacks as optimization remarks (#193545)   via llvm-commits
• [llvm] Reland: [MemProf] Dump inline call stacks as optimization remarks (PR #193545)   Kazu Hirata via llvm-commits
• [llvm] [SLP] Precommit tests for strided store reordering (PR #193565)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Precommit tests for strided store reordering (PR #193565)   via llvm-commits
• [llvm] [CodeGen] Introduce MachineLaneSSAUpdater for SSA Repair in Machine IR (PR #163421)   via llvm-commits
• [llvm] [SLP] Precommit tests for strided store reordering (PR #193565)   Alexey Bataev via llvm-commits
• [compiler-rt] [compiler-rt][test] Remove noisy warnings (PR #191510)   Dan Liew via llvm-commits
• [llvm] [SLP] Precommit tests for strided store reordering (PR #193565)   Ryan Buchner via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   Craig Topper via llvm-commits
• [lld] [lld][WebAssembly] Always initialize fixed `__tls_base` in single threaded mode (PR #193563)   via llvm-commits
• [lld] [lld][WebAssembly] Always initialize fixed `__tls_base` in single threaded mode (PR #193563)   via llvm-commits
• [llvm] [RISCV] Expand vp.inttoptr, vp.ptrtoint (PR #193530)   Craig Topper via llvm-commits
• [llvm] [SLP]Fix scheduling of copyable bundle with commutative op used outside parent PHI (PR #193566)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Fix scheduling of copyable bundle with commutative op used outside parent PHI (PR #193566)   via llvm-commits
• [llvm] be529fc - [SLP]Fix scheduling of copyable bundle with commutative op used outside parent PHI   via llvm-commits
• [llvm] [WebAssembly] Support f16x8.demote_f32x4_zero (PR #193564)   Brendan Dahl via llvm-commits
• [llvm] [SLP]Fix scheduling of copyable bundle with commutative op used outside parent PHI (PR #193566)   Alexey Bataev via llvm-commits
• [llvm] SymbolizableOjbectFile: Convert Wasm file offset to section offset for DWARF (PR #191068)   Derek Schuff via llvm-commits
• [llvm] [Draft] Data flow based shrink wrapping (PR #191784)   Mikhail Gudim via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [Support][JSON] Use `std::unordered_map` for object storage (PR #171230)   LLVM Continuous Integration via llvm-commits
• [llvm] SymbolizableObjectFile: Fix Wasm test to avoid layering violation (PR #193574)   via llvm-commits
• [clang] [llvm] [aarch64] Add more MSVC intrinsics (PR #193221)   Adam Glass via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand all unary elementwise intrinsics (PR #193552)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement DEPEND clause for TASKWAIT directive (PR #193568)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Improve combining on v_ldexp (PR #190236)   Jasmine Tang via llvm-commits
• [llvm] 1fe66f6 - [llvm-objdump][offload] Fix offload bundle decompressing (#192729)   via llvm-commits
• [llvm] [llvm-objdump][offload] Fix offload bundle decompressing (PR #192729)   via llvm-commits
• [compiler-rt] [compiler-rt][test] Remove noisy warnings (PR #191510)   Dan Liew via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement DEPEND clause for TASKWAIT directive (PR #193568)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Improve combining on v_ldexp (PR #190236)   Jasmine Tang via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Zachary Yedidia via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Zachary Yedidia via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [Support][JSON] Use `std::unordered_map` for object storage (PR #171230)   LLVM Continuous Integration via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Delete dead meta instructions (PR #193030)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Improve combining on v_ldexp (PR #190236)   Jasmine Tang via llvm-commits
• [llvm] Add expand-fp-math.ll to profcheck-xfail.txt (PR #193577)   Mircea Trofin via llvm-commits
• [llvm] 1c6ab11 - Add expand-fp-math.ll to profcheck-xfail.txt (#193577)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Craig Topper via llvm-commits
• [libc] [llvm] [libc][CndVar] reimplmement conditional variable with FIFO ordering (PR #192748)   Alexey Samsonov via llvm-commits
• [libc] [llvm] [libc][math] reduce duplicated inv trig helpers (PR #191364)   via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Craig Topper via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add computeKnownBits fallback DemandedElts handling and tests (PR #186025)   Simon Pilgrim via llvm-commits
• [compiler-rt] [compiler-rt][test] Remove noisy warnings (PR #191510)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][test] Remove noisy warnings (PR #191510)   via llvm-commits
• [compiler-rt] [compiler-rt][test] Remove noisy warnings (PR #191510)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fneg, vp_fma. NFC (PR #193214)   Craig Topper via llvm-commits
• [llvm] [Analysis] Ignore convergence tokens in dead branches in CodeMetrics (PR #193590)   Finn Plummer via llvm-commits
• [llvm] [Analysis] Ignore convergence tokens in dead branches in `CodeMetrics` (PR #193590)   Finn Plummer via llvm-commits
• [llvm] [GVN] Reject PartialAlias in canSkipClobberingStore (PR #193465)   via llvm-commits
• [compiler-rt] [compiler-rt][test] Remove noisy warnings (PR #191510)   Vitaly Buka via llvm-commits
• [compiler-rt] [fuzzer] Rename target_flags to target_cflags in lit config (PR #191510)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [rtsan] Allow for rtsan/ubsan runtime combos (PR #193585)   via llvm-commits
• [clang] [compiler-rt] [llvm] [rtsan] Allow for rtsan/ubsan runtime combos (PR #193585)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add hadd-combine globalisel test coverage. NFC (PR #193591)   David Green via llvm-commits
• [llvm] 59596d7 - [AArch64][GlobalISel] Add hadd-combine globalisel test coverage. NFC (#193591)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add hadd-combine globalisel test coverage. NFC (PR #193591)   David Green via llvm-commits
• [compiler-rt] [fuzzer] Rename target_flags to target_cflags in lit config (PR #191510)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fneg, vp_fma. NFC (PR #193214)   Luke Lau via llvm-commits
• [llvm] Revert "Reapply "[SimplifyCFG] Reuse function comdat for switch lookup table"" (PR #193582)   via llvm-commits
• [llvm] [RISCV] Expand vp.and, vp.or, vp.xor (PR #193542)   Luke Lau via llvm-commits
• [llvm] [DirectX] Resolve unreachable default branches in switch statements (PR #193592)   Finn Plummer via llvm-commits
• [llvm] [RISCV] Expand vp.and, vp.or, vp.xor (PR #193542)   Luke Lau via llvm-commits
• [llvm] [DirectX] Denote `dx.resource.getpointer` with `IntrInaccessibleMemOnly` and `IntrReadMem` (PR #193593)   Finn Plummer via llvm-commits
• [llvm] [AMDGPU] Delete dead meta instructions (PR #193030)   via llvm-commits
• [llvm] [DirectX] Resolve unreachable default branches in switch statements (PR #193592)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_abs (PR #193533)   via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Nick Desaulniers via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Nick Desaulniers via llvm-commits
• [llvm] [LV][NFC] Stop running DCE pass in tests (PR #193521)   Florian Hahn via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   via llvm-commits
• [llvm] [MC][X86] Set SHF_X86_64_LARGE on mergeable constant sections for large code-model (PR #190903)   Farid Zakaria via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [llvm] AMDGPU: Skip last corrections in afn f64 reciprocal (PR #183696)   Matt Arsenault via llvm-commits
• [llvm] ed2f5f4 - AMDGPU: Skip last corrections in afn f64 reciprocal (#183696)   via llvm-commits
• [llvm] AMDGPU: Skip last corrections in afn f64 reciprocal (PR #183696)   Matt Arsenault via llvm-commits
• [llvm] [offload] Allow replay repetitions and report basic timing (PR #193388)   Kevin Sala Penades via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   via llvm-commits
• [llvm] [LLVM] Add FP instruction intrinsics (PR #193588)   Princeton Ferro via llvm-commits
• [llvm] [PowerPC] support tail call optimization on AIX tail call (PR #161690)   zhijian lin via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
• [clang] [llvm] [SPIR-V] Encode Atomic metadata as UserSemantic string decoration (PR #193019)   Dmitry Sidorov via llvm-commits
• [compiler-rt] [fuzzer] Rename target_flags to target_cflags in lit config (PR #191510)   Vitaly Buka via llvm-commits
• [llvm] [ADT] Bitset: add shift operators, word accessors, and etc (PR #193400)   Jiachen Yuan via llvm-commits
• [llvm] [ADT] Bitset: add shift operators, word accessors, and etc (PR #193400)   Jiachen Yuan via llvm-commits
• [compiler-rt] [fuzzer] Set target_cflags instead of target_flags in lit config (PR #191510)   Vitaly Buka via llvm-commits
• [compiler-rt] 4b44e20 - [fuzzer] Set target_cflags instead of target_flags in lit config (#191510)   via llvm-commits
• [compiler-rt] [fuzzer] Set target_cflags instead of target_flags in lit config (PR #191510)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   Luke Lau via llvm-commits
• [llvm] [ARM] hasAndNot in ARM supports vectors (PR #156488)   via llvm-commits
• [llvm] 19b40f7 - [SPIR-V] Add SPV_AMD_weak_linkage extension (#193307)   via llvm-commits
• [llvm] [SPIR-V] Add SPV_AMD_weak_linkage extension (PR #193307)   Dmitry Sidorov via llvm-commits
• [llvm] [DirectX] Denote `dx.resource.getpointer` with `IntrInaccessibleMemOnly` and `IntrReadMem` (PR #193593)   Finn Plummer via llvm-commits
• [llvm] [WIP] Add new pass for converting scalable vector instructions with known VL to fixed length vectors (PR #190860)   Ryan Buchner via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ddiv family to header-only (PR #182149)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor dsub family to header-only (PR #182160)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] Reland "[Support][JSON] Use std::unordered_map for object storage (#171230)" (PR #193628)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] Reland "[Support][JSON] Use std::unordered_map for object storage (#171230)" (PR #193628)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [Support][JSON] Use `std::unordered_map` for object storage (PR #171230)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] 417f5bc - [NFC][sanitizer_common] Fix getpw_getgr.cpp test for large groups (#193625)   via llvm-commits
• [compiler-rt] [NFC][sanitizer_common] Fix getpw_getgr.cpp test for large groups (PR #193625)   Vitaly Buka via llvm-commits
• [llvm] [NVPTX] Add commutativity to SETP instructions to enable MachineCSE of inverted SETP instructions (PR #185755)   via llvm-commits
• [llvm] [AMDGPU] Add a sched group mask for LDSDMA instructions (PR #190872)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add a sched group mask for LDSDMA instructions (PR #190872)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Add a sched group mask for LDSDMA instructions (PR #190872)   Jeffrey Byrnes via llvm-commits
• [lld] [lld][ELF] Add --print-relax-stats= to emit linker relaxation statistics (PR #193631)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add --print-relax-stats= to emit linker relaxation statistics (PR #193631)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add --print-relax-stats= to emit linker relaxation statistics (PR #193631)   Farid Zakaria via llvm-commits
• [llvm] [HLSL] Leave out entryname from string table for PSV versions < 3 (PR #191528)   Tex Riddell via llvm-commits
• [llvm] 46e09c5 - [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (#193415)   via llvm-commits
• [llvm] [ExpandMemCmp] Pre-collect memcmp calls to improve compile time (PR #193415)   Mingjie Xu via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [SPIR-V] Handle ASM with multiple outputs (PR #187128)   LLVM Continuous Integration via llvm-commits
• [llvm] [LazyValueInfo] Support vector types in ICmp condition handling (PR #192900)   Jim Lin via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [lld] [ELF] Handle INCLUDE like a call stack (PR #193427)   Fangrui Song via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Hubert Tong via llvm-commits
• [llvm] [X86] Improve FREEZE node elimination for SETCC operations (PR #192362)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   via llvm-commits
• [llvm] [GIsel] Add combiner for constant-folding G_BITCAST (PR #193060)   Alex MacLean via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Sam Elliott via llvm-commits
• [llvm] [GIsel] Add combiner for constant-folding G_BITCAST (PR #193060)   Alex MacLean via llvm-commits
• [llvm] b2ae992 - [RISCV][CodeGen] Add initial CodeGen support of vpair{e,o} (#192918)   via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Boyao Wang via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [compiler-rt] [compiler-rt] Inline __NR_riscv_flush_icache instead of including linux/unistd.h (PR #193645)   Mark Zhuang via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Sam Elliott via llvm-commits
• [llvm] Revert "Reapply "[JTS][Passes] Enable JTS By Default" (#193409)" (PR #193649)   Vitaly Buka via llvm-commits
• [llvm] [Mips] Support mips1 and singlethread ATOMIC_FENCE (PR #190129)   via llvm-commits
• [llvm] [Mips] Optimize instr `slti+mfc1+cvt.s.d` to `slti+mfhc1` (PR #187463)   via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Phoebe Wang via llvm-commits
• [llvm] Revert "Reapply "[JTS][Passes] Enable JTS By Default" (#193409)" (PR #193649)   Vitaly Buka via llvm-commits
• [llvm] Revert "Reapply "[JTS][Passes] Enable JTS By Default" (#193409)" (PR #193649)   Vitaly Buka via llvm-commits
• [llvm] Reapply "[JTS][Passes] Enable JTS By Default" (PR #193409)   Vitaly Buka via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   LLVM Continuous Integration via llvm-commits
• [lld] 2855525 - [ELF] Handle INCLUDE like a call stack (#193427)   via llvm-commits
• [lld] [ELF] Handle INCLUDE like a call stack (PR #193427)   Fangrui Song via llvm-commits
• [llvm] [DirectX] Implement lowering of Texture Load and Texture .operator[] (PR #193343)   Farzon Lotfi via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   Pengcheng Wang via llvm-commits
• [llvm] [LowerTypeTests] Add debug info to jump table entries (PR #192736)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Expand vp.shl, vp.lshr, vp.ashr (PR #193603)   Pengcheng Wang via llvm-commits
• [llvm] [LowerTypeTests] Add debug info to jump table entries (PR #192736)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   via llvm-commits
• [compiler-rt] [llvm] Revert "[compiler-rt][asan] Add asan checks for __builtin_assume_dereferencable" (PR #193655)   Mariusz Borsa via llvm-commits
• [compiler-rt] [llvm] Revert "[compiler-rt][asan] Add asan checks for __builtin_assume_dereferencable" (PR #193655)   via llvm-commits
• [compiler-rt] [llvm] Revert "[compiler-rt][asan] Add asan checks for __builtin_assume_dereferencable" (PR #193655)   Mariusz Borsa via llvm-commits
• [compiler-rt] [llvm] Revert "[compiler-rt][asan] Add asan checks for __builtin_assume_dereferencable" (PR #193655)   via llvm-commits
• [compiler-rt] [llvm] Revert "[compiler-rt][asan] Add asan checks for __builtin_assume_dereferencable" (PR #193655)   Mariusz Borsa via llvm-commits
• [llvm] [LowerTypeTests] Add debug info to jump table entries (PR #192736)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Jack Huang via llvm-commits
• [llvm] [LV] Relax OutOfLoopUses check in `getMinMaxRecurrence()` (PR #189906)   Madhur Amilkanthwar via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Jack Huang via llvm-commits
• [llvm] [LV] Relax OutOfLoopUses check in `getMinMaxRecurrence()` (PR #189906)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LV] Relax OutOfLoopUses check in `getMinMaxRecurrence()` (PR #189906)   Madhur Amilkanthwar via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Jack Huang via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Jack Huang via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Jack Huang via llvm-commits
• [llvm] [VectorCombine] Only copy IR flags for newly created instructions (PR #193271)   Jack Huang via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Arseniy Obolenskiy via llvm-commits
• [llvm] [Attributor] Support SPIR-V address spaces (PR #192725)   Shilei Tian via llvm-commits
• [lld] [lld/elf] rename relocation section for relocatable file. (PR #67953)   Fangrui Song via llvm-commits
• [lld] [lld/elf] rename relocation section for relocatable file. (PR #67953)   Fangrui Song via llvm-commits
• [llvm] [lit] Use dbg instead of note for tool detection (PR #193662)   Vitaly Buka via llvm-commits
• [llvm] [lit] Use dbg instead of note for tool detection (PR #193662)   via llvm-commits
• [llvm] [lit] Use dbg instead of note for tool detection (PR #193662)   Aiden Grossman via llvm-commits
• [llvm] Revert "[LowerTypeTests] Add debug info to jump table entries" (PR #193663)   Aiden Grossman via llvm-commits
• [llvm] Revert "[LowerTypeTests] Add debug info to jump table entries" (PR #193663)   Aiden Grossman via llvm-commits
• [llvm] Revert "[LowerTypeTests] Add debug info to jump table entries" (PR #193663)   via llvm-commits
• [llvm] Revert "[LowerTypeTests] Add debug info to jump table entries" (PR #193663)   Vitaly Buka via llvm-commits
• [llvm] Revert "[LowerTypeTests] Add debug info to jump table entries" (PR #193663)   Vitaly Buka via llvm-commits
• [lld] [lld][ELF] Add --print-relax-stats= to emit linker relaxation statistics (PR #193631)   Fangrui Song via llvm-commits
• [llvm] 2a7313a - [LV] Relax OutOfLoopUses check in `getMinMaxRecurrence()` (#189906)   via llvm-commits
• [llvm] [LV] Relax OutOfLoopUses check in `getMinMaxRecurrence()` (PR #189906)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Christudasan Devadasan via llvm-commits
• [llvm] 66beeec - [NFC][GlobalISel] Use move capture for SmallVector in LegalityPredicates lambdas (#193464)   via llvm-commits
• [llvm] [NFC][GlobalISel] Use move capture for SmallVector in LegalityPredicates lambdas (PR #193464)   Jaydeep Chauhan via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Zeng Wu via llvm-commits
• [llvm] 642d016 - [WebAssembly] Fix wide bitmask fallback in performBitcastCombine (#190915)   via llvm-commits
• [llvm] [WebAssembly] Fix wide bitmask fallback in performBitcastCombine (PR #190915)   via llvm-commits
• [llvm] [VectorCombine] Pass flags during IR creation (PR #193271)   Jack Huang via llvm-commits
• [llvm] [PowerPC] Enable custom lowering for bswap64 builtin on Power8 64 bits with improved parallelism (PR #187259)   via llvm-commits
• [llvm] 968e34e - AMDGPU/GlobalISel: RegBankLegalize AGPR support and gfx908 MFMA rules (#192603)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize AGPR support and gfx908 MFMA rules (PR #192603)   via llvm-commits
• [llvm] [FileCheck] --dump-input: Elide middle of underlines for no-match (PR #192908)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Piotr Fusik via llvm-commits
• [llvm] [FileCheck] --dump-input: Elide middle of underlines for no-match (PR #192908)   Fangrui Song via llvm-commits
• [clang] [llvm] [compiler-rt] Set CMAKE_INSTALL_MESSAGE to NEVER for custom libcxx (PR #193666)   Vitaly Buka via llvm-commits
• [clang] [llvm] [compiler-rt] Set CMAKE_INSTALL_MESSAGE to NEVER for custom libcxx (PR #193666)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [compiler-rt][asan] Add asan checks for __builtin_assume_dereferencable (PR #190871)   via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Thurston Dang via llvm-commits
• [llvm] [RISCV][CodeGen] Add initial CodeGen support of vpair{e, o} (PR #192918)   Pengcheng Wang via llvm-commits
• [llvm] [LV][NFC] Stop running DCE pass in tests (PR #193521)   David Sherwood via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   David Sherwood via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   David Sherwood via llvm-commits
• [llvm] dd13552 - Reland: [LowerTypeTests] Add debug info to jump table entries (#193670)   via llvm-commits
• [llvm] Reland: [LowerTypeTests] Add debug info to jump table entries (PR #193670)   Vitaly Buka via llvm-commits
• [compiler-rt] 9152f21 - [compiler-rt] Set CMAKE_INSTALL_MESSAGE to NEVER for custom libcxx (#193666)   via llvm-commits
• [clang] [llvm] [compiler-rt] Set CMAKE_INSTALL_MESSAGE to NEVER for custom libcxx (PR #193666)   Vitaly Buka via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [RISCV][NFC] Rename isZipEven/isZipOdd to isPairEven/isPairOdd (PR #193674)   Craig Topper via llvm-commits
• [llvm] [Windows][test] Fix "LLVM" test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is ON (PR #184556)   Takuto Ikuta via llvm-commits
• [llvm] [LICM] Improve hoisting of calls marked with invariant_load metadata (PR #193678)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Propagate debug info to constant materialization instr (PR #192669)   Jeremy Morse via llvm-commits
• [llvm] [AMDGPU] Propagate debug info to constant materialization instr (PR #192669)   Jeremy Morse via llvm-commits
• [llvm] [AMDGPU] Propagate debug info to constant materialization instr (PR #192669)   Jeremy Morse via llvm-commits
• [llvm] [LICM] Improve hoisting of calls marked with invariant_load metadata (PR #193678)   via llvm-commits
• [llvm] [LICM] Improve hoisting of calls marked with invariant_load metadata (PR #193678)   via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Phoebe Wang via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Relax the requirements for sub-xor equivalence (PR #193680)   Piotr Fusik via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   via llvm-commits
• [llvm] [AMDGPU] Post-RA Peephole for latency-hiding and hazard-avoidance bet… (PR #191319)   Zeng Wu via llvm-commits
• [llvm] [IPO] Avoid crash when DISubprogram has no type (PR #193420)   Jiang Ning via llvm-commits
• [llvm] [RISCV][NFC] Rename isZipEven/isZipOdd to isPairEven/isPairOdd (PR #193674)   Pengcheng Wang via llvm-commits
• [llvm] 3f6aa4d - [CodeGen][NFC] Remove InsertPt since it's always the same as MI (#193668)   via llvm-commits
• [llvm] [CodeGen][NFC] Remove InsertPt since it's always the same as MI (PR #193668)   Phoebe Wang via llvm-commits
• [llvm] [NFC][Target][MC] Fixed rule-of-three for RegisterTargetPassConfigCallback classes (PR #193470)   James Henderson via llvm-commits
• [llvm] [GlobalISel] Add GIM_CheckMachineOperandType for matching metadata operands (PR #191389)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [mlir] [OpenMP][OMPIRBuilder] Convert cmpxchg memory order to C ABI constants (PR #193536)   Michael Kruse via llvm-commits
• [llvm] [llvm-dwp] Replace MCStreamer with direct ELF writer for zero-copy output (PR #192112)   James Henderson via llvm-commits
• [compiler-rt] [llvm] Revert "[compiler-rt][asan] Add asan checks for __builtin_assume_dereferencable" (PR #193655)   LLVM Continuous Integration via llvm-commits
• [llvm] [LV] Simplify live-out extraction for first-order recurrence phis when tail folding (PR #176108)   Mel Chen via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Craig Topper via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Craig Topper via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Craig Topper via llvm-commits
• [llvm] SymbolizableObjectFile: Fix Wasm test to avoid layering violation (PR #193574)   James Henderson via llvm-commits
• [llvm] SymbolizableObjectFile: Fix Wasm test to avoid layering violation (PR #193574)   James Henderson via llvm-commits
• [llvm] SymbolizableObjectFile: Fix Wasm test to avoid layering violation (PR #193574)   James Henderson via llvm-commits
• [llvm] [RISCV][MC] Remove tautological CHECK-UNKNOWN disassembly checks (NFC) (PR #193682)   Kito Cheng via llvm-commits
• [llvm] 5a45fbb - [llvm][RISCV] Split LMUL=8 fixed vector fcmp for zvfhmin and zvfbfmin (#193424)   via llvm-commits
• [llvm] [llvm][RISCV] Split LMUL=8 fixed vector fcmp for zvfhmin and zvfbfmin (PR #193424)   Brandon Wu via llvm-commits
• [llvm] 5673b02 - [RISCV][MC] Remove tautological CHECK-UNKNOWN disassembly checks (NFC) (#193682)   via llvm-commits
• [llvm] [RISCV][MC] Remove tautological CHECK-UNKNOWN disassembly checks (NFC) (PR #193682)   Kito Cheng via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run ThreeWayBranch pass (PR #193252)   Amina Chabane via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Craig Topper via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Peter Smith via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Peter Smith via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Peter Smith via llvm-commits
• [llvm] [SPIRV] Add missing OpenCL atomic_fetch_min/max builtin mappings (PR #190443)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LV] Simplify live-out extraction for first-order recurrence phis when tail folding (PR #176108)   Mel Chen via llvm-commits
• [llvm] [NFC][Target] Fixed rule-of-three for RegisterTargetPassConfigCallback class (PR #193470)   Jaydeep Chauhan via llvm-commits
• [clang] [llvm] [llvm][test] Fix more test failures when LLVM_WINDOWS_PREFER_FORWARD_… (PR #193671)   Takuto Ikuta via llvm-commits
• [clang] [llvm] [llvm][test] Fix more test failures when LLVM_WINDOWS_PREFER_FORWARD_… (PR #193671)   Takuto Ikuta via llvm-commits
• [clang] [llvm] [X86][COFF] Enable basic-block-address-map emission (PR #191347)   Haohai Wen via llvm-commits
• [clang] [llvm] [CHERI] Make a best effort attempt to emit precise ELF sizes for GlobalAlias. (PR #193032)   Owen Anderson via llvm-commits
• [clang] [llvm] [CHERI] Make a best effort attempt to emit precise ELF sizes for GlobalAlias. (PR #193032)   Owen Anderson via llvm-commits
• [llvm] [DAG] Precommit tests for computeKnownFPClass - ISD::EXTRACT_SUBVECTOR and ISD::INSERT_SUBVECTOR. (PR #190694)   via llvm-commits
• [llvm] [CHERI] Define CHERI capability address space in computeRISCVDataLayout (PR #190806)   Owen Anderson via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   Carl Ritson via llvm-commits
• [clang] [llvm] [CHERI] Make a best effort attempt to emit precise ELF sizes for GlobalAlias. (PR #193032)   via llvm-commits
• [llvm] [GISel] Add operands check for G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR in buildInstr (PR #186021)   Jianjian Guan via llvm-commits
• [llvm] [llvm][test] Fix more test failures when LLVM_WINDOWS_PREFER_FORWARD_… (PR #193671)   Takuto Ikuta via llvm-commits
• [llvm] [llvm][test] Fix more test failures when LLVM_WINDOWS_PREFER_FORWARD_… (PR #193671)   Takuto Ikuta via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   David Sherwood via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   David Sherwood via llvm-commits
• [compiler-rt] Reland: [ASan][Windows] Fix memmove/memcpy interception on x64 (#192060) (PR #193633)   Hans Wennborg via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   via llvm-commits
• [llvm] [X86] Merge BT with a matching BTR/BTS/BTC (PR #193612)   Paweł Bylica via llvm-commits
• [llvm] [llvm][test] Fix more test failures when LLVM_WINDOWS_PREFER_FORWARD_… (PR #193671)   Takuto Ikuta via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Arseniy Obolenskiy via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   Igor Wodiany via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   Igor Wodiany via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   Igor Wodiany via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   Amit Tiwari via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   David Green via llvm-commits
• [llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)   David Green via llvm-commits
• [llvm] [llvm][test] Fix more test failures when LLVM_WINDOWS_PREFER_FORWARD_… (PR #193671)   Takuto Ikuta via llvm-commits
• [llvm] [X86] Merge BT with a matching BTR/BTS/BTC (PR #193612)   Paweł Bylica via llvm-commits
• [llvm] [X86] Add crash test coverage for #193475 (PR #193690)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add crash test coverage for #193475 (PR #193690)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   Jan André Reuter via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   Jay Foad via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   Jay Foad via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][WIP] Added mask intrinsics (PR #193538)   Jay Foad via llvm-commits
• [llvm] [ARM][MC] Reject unaligned Thumb2 LDRD/STRD post-index immediates (PR #193531)   Mark Murray via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Simon Pilgrim via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SelectionDAG] Change SSUBO to do (LHS < RHS) XOR (RESULT < 0) (PR #191747)   Jay Foad via llvm-commits
• [llvm] [NFC][SPIR-V] Remove dead non-intrinsic path in selectAtomicCmpXchg (PR #193692)   Arseniy Obolenskiy via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   Matt Arsenault via llvm-commits
• [llvm] [NFC][SPIR-V] Remove dead non-intrinsic path in selectAtomicCmpXchg (PR #193692)   via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [lld] 2aadaae - [LLD][MinGW] Introduce --native-def argument (#193598)   via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [lld] [LLD][MinGW] Introduce --native-def argument (PR #193598)   Jacek Caban via llvm-commits
• [llvm] [SelectionDAG] Change SSUBO to do (LHS < RHS) XOR (RESULT < 0) (PR #191747)   Matt Arsenault via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   via llvm-commits
• [llvm] [DenseMap] Resolves asan + msvc build syntax errors (PR #193695)   Davide Grohmann via llvm-commits
• [llvm] [SPIR-V] Combine storage-class bit with atomic memory semantics (PR #193696)   Arseniy Obolenskiy via llvm-commits
• [llvm] [DenseMap] Resolves asan + msvc build syntax errors (PR #193695)   via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Combine storage-class bit with atomic memory semantics (PR #193696)   via llvm-commits
• [llvm] [DA] Remove monotonicity-related code and tests (PR #193697)   Ryotaro Kasuga via llvm-commits
• [llvm] [SystemZ] Implement getCFInstrCost(). (PR #191017)   Jonas Paulsson via llvm-commits
• [llvm] [AMDGPU] Account for inline asm size in inst_pref_size calculation (PR #192306)   Jay Foad via llvm-commits
• [llvm] [NFC][Target] Fixed rule-of-three for RegisterTargetPassConfigCallback class (PR #193470)   Jaydeep Chauhan via llvm-commits
• [llvm] [DA] Remove monotonicity-related code and tests (PR #193697)   via llvm-commits
• [llvm] Reapply "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #187233)   Mel Chen via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Ryotaro Kasuga via llvm-commits
• [llvm] Revert "Reapply "[JTS][Passes] Enable JTS By Default" (#193409)" (PR #193649)   Nikita Popov via llvm-commits
• [llvm] Reapply "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #187233)   Mel Chen via llvm-commits
• [llvm] Reapply "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #187233)   Mel Chen via llvm-commits
• [llvm] [AMDGPU] Account for inline asm size in inst_pref_size calculation (PR #192306)   Jay Foad via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Arseniy Obolenskiy via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Combine storage class bit with atomic memory semantics (PR #193696)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Combine storage class bit with atomic memory semantics (PR #193696)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   Amit Tiwari via llvm-commits
• [llvm] [AMDGPU] Fix s_cselect scc clobber issue (PR #193498)   Jay Foad via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   David Green via llvm-commits
• [llvm] [LazyValueInfo] Support vector types in ICmp condition handling (PR #192900)   Nikita Popov via llvm-commits
• [llvm] 7239415 - [X86] Add crash test coverage for #193475 (#193690)   via llvm-commits
• [llvm] [X86] Add crash test coverage for #193475 (PR #193690)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   Matt Arsenault via llvm-commits
• [llvm] [DA] Remove monotonicity-related code and tests (PR #193697)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Nikita Popov via llvm-commits
• [llvm] [DA] Remove monotonicity-related code and tests (PR #193697)   Sjoerd Meijer via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Arseniy Obolenskiy via llvm-commits
• [llvm] [llvm][test] Fix more test failures when LLVM_WINDOWS_PREFER_FORWARD_… (PR #193671)   via llvm-commits
• [llvm] [AMDGPU] Add amdgcn.av.global.(load|store).b128 intrinsics (PR #191390)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v2i6, v4i16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [DA] Remove monotonicity-related code and tests (PR #193697)   Ryotaro Kasuga via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Support atomic load and store for vector float types (v2f16, v2i6, v4i16, v4f16, v2f32) (PR #192904)   Harrison Hao via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   Nikita Popov via llvm-commits
• [llvm] Reapply "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #187233)   Mel Chen via llvm-commits
• [llvm] [IPO] Avoid crash when DISubprogram has no type (PR #193420)   Jiang Ning via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (PR #193220)   Nikita Popov via llvm-commits
• [llvm] 5502053 - [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (#193220)   via llvm-commits
• [llvm] [MemoryDependenceAnalysis] Disambiguate visited state in non-local pointer dep tracking (PR #193220)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Treat sdiv as udiv in foldICmpDivConstant when both operands are non-negative (PR #188731)   Nikita Popov via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] de9830f - [InstCombine] Treat sdiv as udiv in foldICmpDivConstant when both operands are non-negative (#188731)   via llvm-commits
• [llvm] [InstCombine] Treat sdiv as udiv in foldICmpDivConstant when both operands are non-negative (PR #188731)   Nikita Popov via llvm-commits
• [llvm] 7425ab9 - [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (#193076)   via llvm-commits
• [lld] [lld][ELF] Add --print-relax-stats= to emit linker relaxation statistics (PR #193631)   Peter Smith via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [llvm] [NVPTX] Allow mixed address-space pointer arguments in kernel lowering (PR #193701)   via llvm-commits
• [llvm] [NVPTX] Allow mixed address-space pointer arguments in kernel lowering (PR #193701)   via llvm-commits
• [llvm] [NVPTX] Allow mixed address-space pointer arguments in kernel lowering (PR #193701)   via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Zhige Chen via llvm-commits
• [llvm] [NVPTX] Allow mixed address-space pointer arguments in kernel lowering (PR #193701)   via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Zhige Chen via llvm-commits
• [llvm] [AMDGPU] Delete dead meta instructions (PR #193030)   Jay Foad via llvm-commits
• [llvm] [NVPTX] Allow mixed address-space pointer arguments in kernel lowering (PR #193701)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Shreeyash Pandey via llvm-commits
• [llvm] 124fd59 - [DA] Remove monotonicity-related code and tests (#193697)   via llvm-commits
• [llvm] [DA] Remove monotonicity-related code and tests (PR #193697)   Ryotaro Kasuga via llvm-commits
• [llvm] [NVPTX] Allow mixed address-space pointer arguments in kernel lowering (PR #193701)   via llvm-commits
• [llvm] d0a3820 - [NFC] Remove assert from AArch64TargetLowering::LowerCTTZ. (#193474)   via llvm-commits
• [llvm] [NFC] Remove assert from AArch64TargetLowering::LowerCTTZ. (PR #193474)   Paul Walker via llvm-commits
• [llvm] [NVPTX] Allow mixed address-space pointer arguments in kernel lowering (PR #193701)   via llvm-commits
• [llvm] [NVPTX] Allow mixed address-space pointer arguments in kernel lowering (PR #193701)   via llvm-commits
• [llvm] [AMDGPU] Delete dead meta instructions (PR #193030)   Jay Foad via llvm-commits
• [llvm] [AArch64][GlobalISel] Add fpext bf16 legalization. (PR #193342)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Emit async PAuth epilogue CFI for outlined functions (PR #189924)   Amina Chabane via llvm-commits
• [llvm] [AsmParser] Revamp how floating-point literals work in LLVM IR. (PR #190641)   Jay Foad via llvm-commits
• [llvm] [AArch64] Emit async PAuth epilogue CFI for outlined functions (PR #189924)   Amina Chabane via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   via llvm-commits
• [llvm] [JumpThreading] Fix lifetime markers when alloca requires SSA renaming (PR #188147)   Nikita Popov via llvm-commits
• [llvm] [JumpThreading] Fix lifetime markers when alloca requires SSA renaming (PR #188147)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Afonso Rafael via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   Luke Lau via llvm-commits
• [llvm] [AsmParser] Revamp how floating-point literals work in LLVM IR. (PR #190641)   Jay Foad via llvm-commits
• [llvm] [AsmParser] Revamp how floating-point literals work in LLVM IR. (PR #190641)   Jay Foad via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SystemZ] Implement getCFInstrCost(). (PR #191017)   Jonas Paulsson via llvm-commits
• [llvm] [LICM] Improve hoisting of calls marked with invariant_load metadata (PR #193678)   Nikita Popov via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   Florian Hahn via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   Jan André Reuter via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Improve combining on v_ldexp (PR #190236)   Jay Foad via llvm-commits
• [llvm] Reapply "[VPlan] Remove unused VPExpandSCEVRecipe before expansion" (PR #187233)   Florian Hahn via llvm-commits
• [llvm] de281fe - [SystemZ] Implement getCFInstrCost(). (#191017)   via llvm-commits
• [llvm] [SystemZ] Implement getCFInstrCost(). (PR #191017)   Jonas Paulsson via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64] New pass for code layout optimizations. (PR #184434)   Ahmad Yasin via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Improve combining on v_ldexp (PR #190236)   Jay Foad via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Thomas Fry via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Thomas Fry via llvm-commits
• [llvm] [Dexter] Add timestamps to DAP logging (PR #193705)   Stephen Tozer via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Nikita Popov via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Nikita Popov via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Nikita Popov via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Nikita Popov via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Nikita Popov via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Nikita Popov via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Nikita Popov via llvm-commits
• [llvm] [Dexter] Add timestamps to DAP logging (PR #193705)   via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   Florian Hahn via llvm-commits
• [llvm] [APInt] Perf experiment. Add branch hints for most of isSingleWord predicates (PR #193016)   Max Graey via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   Jay Foad via llvm-commits
• [llvm] [Support] Introduce driver for running tools as daemons (PR #193706)   Benjamin Stott via llvm-commits
• [llvm] fc84323 - AMDGPU: Set transient stack alignment to 4 (#193517)   via llvm-commits
• [llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   Florian Hahn via llvm-commits
• [llvm] [Support] Introduce driver for running tools as daemons (PR #193706)   via llvm-commits
• [llvm] [DAGCombiner] Reconstruct borrow chain from icmp pattern for USUBO_CARRY (PR #193707)   Paweł Bylica via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Thomas Fry via llvm-commits
• [llvm] [SelectionDAG] Change SSUBO to do (LHS < RHS) XOR (RESULT < 0) (PR #191747)   Jay Foad via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [CGP] Reconstruct borrow chain from icmp pattern for subtract-with-carry (PR #189018)   Paweł Bylica via llvm-commits
• [llvm] [IR] Add elementwise modifier to atomicrmw (PR #189517)   Antonio Frighetto via llvm-commits
• [llvm] [RISCV] Simplify the insertelement 0, x, x in vector.reduce with an initial value to 0 (PR #193709)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Simplify the insertelement 0, x, x in vector.reduce with an initial value to 0 (PR #193709)   via llvm-commits
• [llvm] [RISCV] Simplify the insertelement 0, x, x in vector.reduce with an initial value to 0 (PR #193709)   via llvm-commits
• [llvm] Enable LoopVectorizer interleaving for vectorized loops. (PR #184306)   Jonas Paulsson via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [llvm] 7e9561f - [SystemZ] Enable LoopVectorizer interleaving for vectorized loops. (#184306)   via llvm-commits
• [llvm] Enable LoopVectorizer interleaving for vectorized loops. (PR #184306)   Jonas Paulsson via llvm-commits
• [llvm] [Dexter] Add basic structured script parsing (PR #193710)   Stephen Tozer via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Asher Dobrescu via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   David Sherwood via llvm-commits
• [llvm] [Dexter] Add basic structured script parsing (PR #193710)   via llvm-commits
• [libcxx] [llvm] [libc++] Update the AppleClang version (PR #193711)   Nikolas Klauser via llvm-commits
• [llvm] [Dexter] Add basic structured script parsing (PR #193710)   Stephen Tozer via llvm-commits
• [llvm] [libcxx][Github] Build container images in separate jobs (PR #193346)   Nikolas Klauser via llvm-commits
• [llvm] [RISCV] Simplify the insertelement 0, x, x in vector.reduce with an initial value to 0 (PR #193709)   Liao Chunyu via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   David Sherwood via llvm-commits
• [llvm] [NFC][SPIR-V] Remove dead non-intrinsic path in selectAtomicCmpXchg (PR #193692)   Dmitry Sidorov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [RFC][IR] Add ValueDeletionListener for context-level Value deletion notifications (PR #193198)   Pankaj Dwivedi via llvm-commits
• [llvm] [LICM] Improve hoisting of calls marked with invariant_load metadata (PR #193678)   Matt Arsenault via llvm-commits
• [llvm] [RFC][IR] InstructionDeletionListener: per-function instruction removal notifications (PR #193198)   Pankaj Dwivedi via llvm-commits
• [llvm] [LICM] Improve hoisting of calls marked with invariant_load metadata (PR #193678)   Matt Arsenault via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [llvm] [LICM] Improve hoisting of calls marked with invariant_load metadata (PR #193678)   Nikita Popov via llvm-commits
• [llvm] [SystemZ] Implement getCFInstrCost(). (PR #191017)   Jonas Paulsson via llvm-commits
• [llvm] [LICM] Improve hoisting of calls marked with invariant_load metadata (PR #193678)   Matt Arsenault via llvm-commits
• [llvm] [Dexter] Add basic structured script parsing (PR #193710)   Stephen Tozer via llvm-commits
• [llvm] [RISCV] Simplify the insertelement 0, x, x in vector.reduce with an initial value to 0 (PR #193709)   via llvm-commits
• [llvm] cd050a0 - [Mips] Support mips1 and singlethread ATOMIC_FENCE (#190129)   via llvm-commits
• [llvm] [Mips] Support mips1 and singlethread ATOMIC_FENCE (PR #190129)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] Triple: Add constructor from enum entries (PR #190632)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   via llvm-commits
• [llvm] [LICM] Improve hoisting of calls marked with invariant_load metadata (PR #193678)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (PR #193712)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (PR #193712)   via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Zhige Chen via llvm-commits
• [llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)   Petr Kurapov via llvm-commits
• [llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)   via llvm-commits
• [llvm] d64dd5a - [LV] Factor out VF-independent code from cost model (NFC). (#192426)   via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   Florian Hahn via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   Usha Gupta via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   David Green via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   David Green via llvm-commits
• [llvm] [RFC][IR] InstructionDeletionListener: per-function instruction removal notifications (PR #193198)   Pankaj Dwivedi via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Nikita Popov via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   Florian Hahn via llvm-commits
• [llvm] [CodeGen] Disallow mixing of ignorable uses in MachineCSE (PR #193522)   Igor Wodiany via llvm-commits
• [llvm] Triple: Add constructor from enum entries (PR #190632)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (PR #193712)   Nikita Popov via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Oliver Stöneberg via llvm-commits
• [llvm] [Dexter] Add basic structured script parsing (PR #193710)   Stephen Tozer via llvm-commits
• [llvm] [GVN] Add code to disable scalar PRE (PR #190386)   Antonio Frighetto via llvm-commits
• [llvm] [GVN] Add code to disable scalar PRE (PR #190386)   Antonio Frighetto via llvm-commits
• [llvm] [GVN] Add code to disable scalar PRE (PR #190386)   Antonio Frighetto via llvm-commits
• [llvm] [GVN] Add code to disable scalar PRE (PR #190386)   Antonio Frighetto via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   David Sherwood via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Zhige Chen via llvm-commits
• [llvm] [RFC][IR] InstructionDeletionListener: per-function instruction removal notifications (PR #193198)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU]/GlobalISel: RegBankLegalize rules for amdgcn_cvt_sr_fp8_f32/cvt_sr_bf8_f32/cvt_pk_fp8_f32/cvt_pk_bf8_f32/cvt_f32_fp8/cvt_f32_bf8/cvt_pk_f32_fp8/cvt_pk_f32_bf8 (PR #193551)   Aidan Shilling via llvm-commits
• [llvm] [AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (PR #193712)   David Green via llvm-commits
• [llvm] [AMDGPU]/GlobalISel: RegBankLegalize rules for amdgcn_cvt_sr_fp8_f32/cvt_sr_bf8_f32/cvt_pk_fp8_f32/cvt_pk_bf8_f32/cvt_f32_fp8/cvt_f32_bf8/cvt_pk_f32_fp8/cvt_pk_f32_bf8 (PR #193551)   Aidan Shilling via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to `xvextrins` (PR #164375)   via llvm-commits
• [llvm] [AMDGPU] SIFixSGPRCopies avoid placing V_READFIRSTLANE inside the loop. (PR #186400)   via llvm-commits
• [llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Precommit tests for computeKnownFPClass - ISD::EXTRACT_SUBVECTOR and ISD::INSERT_SUBVECTOR. (PR #190694)   via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for VBITCLRI, VBITSETI, and VBITREVI (PR #193718)   via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Florian Hahn via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for VBITCLRI, VBITSETI, and VBITREVI (PR #193718)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Improve combining on v_ldexp (PR #190236)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Improve combining on v_ldexp (PR #190236)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Matt Arsenault via llvm-commits
• [llvm] [Flang] [Runtime ]Fix write endfile abort (PR #191633)   via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Robert Imschweiler via llvm-commits
• [llvm] [Flang] [Runtime ]Fix write endfile abort (PR #191633)   via llvm-commits
• [llvm] [NFC][AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (PR #193712)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (PR #193712)   Simon Pilgrim via llvm-commits
• [llvm] [BOLT] Add unit tests for pre-aggregated profile parsing (PR #192390)   Paschalis Mpeis via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Florian Hahn via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Florian Hahn via llvm-commits
• [llvm] 4645dc7 - [NFC][AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (#193712)   via llvm-commits
• [llvm] [NFC][AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (PR #193712)   Simon Pilgrim via llvm-commits
• [lld] [lldb] [llvm] [Support][Cache] Make `pruneCache` return an `Expected` (PR #191367)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] 3f3b500 - [LV][NFC] Remove more unnecessary passes from RUN lines (#193686)   via llvm-commits
• [llvm] [LV][NFC] Remove more unnecessary passes from RUN lines (PR #193686)   David Sherwood via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to `xvextrins` (PR #164375)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Xinlong Chen via llvm-commits
• [llvm] [NFC][SPIR-V] Add urem, srem, and snegate tests for integer arithmetic (PR #193170)   Dmitry Sidorov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Paschalis Mpeis via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] SIFixSGPRCopies avoid placing V_READFIRSTLANE inside the loop. (PR #186400)   via llvm-commits
• [llvm] [RISCV] Add bf16 tests for interleave and deinterleave (PR #193720)   Boyao Wang via llvm-commits
• [llvm] [AMDGPU] SIFixSGPRCopies avoid placing V_READFIRSTLANE inside the loop. (PR #186400)   via llvm-commits
• [clang] [llvm] [WIP] Riscv libmvec support (PR #193721)   Zhijin Zeng via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   David Sherwood via llvm-commits
• [clang] [llvm] [WIP] Riscv libmvec support (PR #193721)   via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [llvm] b9a2e84 - [NFC][SPIR-V] Add urem, srem, and snegate tests for integer arithmetic (#193170)   via llvm-commits
• [llvm] [NFC][SPIR-V] Add urem, srem, and snegate tests for integer arithmetic (PR #193170)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RISCV] Add bf16 tests for interleave and deinterleave (PR #193720)   Boyao Wang via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [WIP] Riscv libmvec support (PR #193721)   via llvm-commits
• [clang] [llvm] [WIP] Riscv libmvec support (PR #193721)   via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [llvm] 263e4f2 - [NFC][LLVM] Simplify IIT encoding for scalable vectors (#191737)   via llvm-commits
• [llvm] [NFC][LLVM] Simplify IIT encoding for scalable vectors (PR #191737)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)   Petr Kurapov via llvm-commits
• [llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)   Petr Kurapov via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Maksim Ivanov via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [llvm] [AMDGPU] Account for inline asm size in inst_pref_size calculation (PR #192306)   Matt Arsenault via llvm-commits
• [llvm] [X86] Fold splat AND on VGF2P8AFFINEQB source (PR #193364)   via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (PR #193345)   David Green via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   David Sherwood via llvm-commits
• [llvm] [AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (PR #193345)   David Green via llvm-commits
• [llvm] 01291a8 - [LoongArch] Custom legalize vector_shuffle to `xvextrins` (#164375)   via llvm-commits
• [clang] [llvm] [mlir] [openmp] [LoopTiling][Clang][MLIR] Canonical Intra-tile Loops (PR #191114)   Amit Tiwari via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to `xvextrins` (PR #164375)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (PR #193345)   via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [llvm] [SPIRV] Add missing OpenCL atomic_fetch_min/max builtin mappings (PR #190443)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Add missing OpenCL atomic_fetch_min/max builtin mappings (PR #190443)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Add missing OpenCL atomic_fetch_min/max builtin mappings (PR #190443)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Matthew Devereau via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Matthew Devereau via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   via llvm-commits
• [llvm] [AMDGPU] Remove co-exec scheduler diagnostics. (PR #193724)   Petr Kurapov via llvm-commits
• [llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)   Petr Kurapov via llvm-commits
• [llvm] [InstCombine] Create `or` as `disjoint` where applicable (PR #193725)   Piotr Fusik via llvm-commits
• [llvm] [AMDGPU] Remove co-exec scheduler diagnostics. (PR #193724)   via llvm-commits
• [clang] [compiler-rt] [libcxxabi] [llvm] Automatic removal of unused standard header (PR #192800)   Andrey Ali Khan Bolshakov via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Dmitry Sidorov via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Dmitry Sidorov via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] Coverage parallel load (PR #193726)   via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   Benjamin Maxwell via llvm-commits
• [llvm] Coverage parallel load (PR #193726)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Xinlong Chen via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Combine storage class bit with atomic memory semantics (PR #193696)   Dmitry Sidorov via llvm-commits
• [llvm] [RegAlloc] Trace through COPYs to find rematerializable definitions (PR #190955)   Matt Arsenault via llvm-commits
• [llvm] d28eeaa - [LangRef] Make volatile loads non-willreturn (#192992)   via llvm-commits
• [llvm] [LangRef] Make volatile loads non-willreturn (PR #192992)   Nikita Popov via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Xinlong Chen via llvm-commits
• [llvm] [SPIR-V] Combine storage class bit with atomic memory semantics (PR #193696)   Dmitry Sidorov via llvm-commits
• [llvm] [LoongArch] Introduce LASX instruction patterns for vector sign/zero extensions (PR #193727)   via llvm-commits
• [llvm] APFloat: fix wrong result status for large floats (PR #189925)   Matt Arsenault via llvm-commits
• [llvm] [LoongArch] Introduce LASX instruction patterns for vector sign/zero extensions (PR #193727)   via llvm-commits
• [llvm] a973196 - [AMDGPU] misched: avoid subregister dependencies (#140255)   via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Dmitry Sidorov via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] misched: avoid subregister dependencies (PR #140255)   Robert Imschweiler via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [llvm] [SelectionDAG] optimize sdiv with positive divisor and positive magic (PR #189287)   Matt Arsenault via llvm-commits
• [llvm] [BranchFolding] Fold fallthroughs into conditional tailcalls if profitable (PR #140476)   Nabeel Omer via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [llvm] 1b32574 - [X86][GISel] lower GOT-relative G_GLOBAL_VALUEs (#181983)   via llvm-commits
• [llvm] [BranchFolding] Fold fallthroughs into conditional tailcalls if profitable (PR #140476)   Nabeel Omer via llvm-commits
• [llvm] [X86][GISel] lower GOT-relative G_GLOBAL_VALUEs (PR #181983)   Rose Hudson via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Matt Arsenault via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d` (PR #164213)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Xinlong Chen via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Dmitry Sidorov via llvm-commits
• [llvm] [Bazel] Fixes cd26e99 (PR #193729)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Matt Arsenault via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Xinlong Chen via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Xinlong Chen via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] 1bcdf71 - [AMDGPU] Add a sched group mask for LDSDMA instructions (#190872)   via llvm-commits
• [llvm] [AMDGPU] Add a sched group mask for LDSDMA instructions (PR #190872)   Shilei Tian via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (PR #164561)   via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Matt Arsenault via llvm-commits
• [llvm] [BranchFolding] Fold fallthroughs into conditional tailcalls if profitable (PR #140476)   via llvm-commits
• [llvm] [BranchFolding] Fold fallthroughs into conditional tailcalls if profitable (PR #140476)   via llvm-commits
• [llvm] [LoongArch][NFC] Pre-commit tests for `[x]vpermi.w` (PR #164944)   via llvm-commits
• [llvm] [SPIR-V] Fix half precision OpConstant for log10/exp10 lowering (PR #193730)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Fix half precision OpConstant for log10/exp10 lowering (PR #193730)   via llvm-commits
• [llvm] [SPIR-V] Fix half precision OpConstant for log10/exp10 lowering (PR #193730)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Fix half precision OpConstant for log10/exp10 lowering (PR #193730)   via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [SPIR-V] Fix half precision OpConstant for log10/exp10 lowering (PR #193730)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoongArch] Introduce LASX instruction patterns for vector sign/zero extensions (PR #193727)   via llvm-commits
• [llvm] [LoongArch] Introduce LASX instruction patterns for vector sign/zero extensions (PR #193727)   via llvm-commits
• [llvm] [MachineOutliner] Do not allow debug instructions to affect liveness computations. (PR #192336)   Jessica Paquette via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [SPIR-V] Fix half precision OpConstant for log10/exp10 lowering (PR #193730)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [Support][JSON] Use `std::unordered_map` for object storage (PR #171230)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen][NFC] Do not iterate in DCE unless needed (PR #193355)   via llvm-commits
• [llvm] [CodeGen][NFC] Do not iterate in DCE unless needed (PR #193355)   via llvm-commits
• [llvm] ba0e4af - [CodeGen][NFC] Do not iterate in DCE unless needed (#193355)   via llvm-commits
• [llvm] [CodeGen][NFC] Do not iterate in DCE unless needed (PR #193355)   via llvm-commits
• [llvm] [LoongArch] Introduce LASX instruction patterns for vector sign/zero extensions (PR #193727)   via llvm-commits
• [llvm] [Bazel] Fixes cd26e99 (PR #193729)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fixes cd26e99 (PR #193729)   Jordan Rupprecht via llvm-commits
• [llvm] [Support] Introduce driver for running tools as daemons (PR #193706)   Benjamin Stott via llvm-commits
• [llvm] [WebAssembly] Handle wide mask reductions in performSETCCCombine (PR #189358)   via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   Folkert de Vries via llvm-commits
• [lld] [lld][ELF] Add --print-relax-stats= to emit linker relaxation statistics (PR #193631)   Farid Zakaria via llvm-commits
• [llvm] 5a9d0cf - [PowerPC] Add mnemonics to paddis (#179979)   via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Lei Huang via llvm-commits
• [llvm] [LLVM] Add FP instruction intrinsics (PR #193588)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Combine storage class bit with atomic memory semantics (PR #193696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][AMDGPU] Make code consistent in MCResourceInfo::gatherResourceInfo (PR #193735)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Make code consistent in MCResourceInfo::gatherResourceInfo (PR #193735)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Make code consistent in MCResourceInfo::gatherResourceInfo (PR #193735)   via llvm-commits
• [llvm] [MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (PR #145722)   Valery Pykhtin via llvm-commits
• [llvm] [X86] Use getTargetVShiftByConstNode helper to reduce code duplication. NFCI. (PR #193736)   Simon Pilgrim via llvm-commits
• [llvm] 1ee288a - [SPIR-V] Combine storage class bit with atomic memory semantics (#193696)   via llvm-commits
• [llvm] [X86] Use getTargetVShiftByConstNode helper to reduce code duplication. NFCI. (PR #193736)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Combine storage class bit with atomic memory semantics (PR #193696)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   David Green via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   David Green via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   David Green via llvm-commits
• [llvm] 9b986d4 - [Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened) (#177358)   via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Xinlong Chen via llvm-commits
• [llvm] [Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened) (PR #177358)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened) (PR #177358)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Xinlong Chen via llvm-commits
• [llvm] [LLVM][CodeGen] Ensure SystemZTDCPass::convertFCmp only accepts scalar floating point type. (PR #193738)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen] Ensure SystemZTDCPass::convertFCmp only accepts scalar floating point type. (PR #193738)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen] Ensure SystemZTDCPass::convertFCmp only accepts scalar floating point type. (PR #193738)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [LLVM][CodeGen] Ensure SystemZTDCPass::convertFCmp only accepts scalar floating point types. (PR #193738)   Paul Walker via llvm-commits
• [llvm] [Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened) (PR #177358)   LLVM Continuous Integration via llvm-commits
• [llvm] [LLVM] Make -use-constant-fp-for-fixed-length-splat the default. (PR #193264)   Paul Walker via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Xinlong Chen via llvm-commits
• [llvm] [UTC] Add --dry-run/-n functionality (PR #193739)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AArch64] Fix `shufflevector` miscompilation on `aarch64_be` (PR #193076)   via llvm-commits
• [llvm] [UTC] Add --dry-run/-n functionality (PR #193739)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [llvm] Revert "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened)" (PR #193740)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [GVN] Add code to disable scalar PRE (PR #190386)   Madhur Amilkanthwar via llvm-commits
• [llvm] 41d05ae - Revert "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened)" (#193740)   via llvm-commits
• [llvm] Revert "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened)" (PR #193740)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] Revert "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened)" (PR #193740)   via llvm-commits
• [llvm] [Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened) (PR #177358)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [llvm] [Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened) (PR #177358)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Jonathan Thackray via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Jonathan Thackray via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Jonathan Thackray via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [AArch64] Add 9.7 CVT data processing intrinsics (PR #186807)   via llvm-commits
• [clang] [llvm] [AArch64] Add 9.7 CVT data processing intrinsics (PR #186807)   via llvm-commits
• [clang] [llvm] [AArch64] Add 9.7 CVT data processing intrinsics (PR #186807)   via llvm-commits
• [clang] [llvm] [AArch64] Add 9.7 CVT data processing intrinsics (PR #186807)   via llvm-commits
• [clang] [llvm] [AArch64] Add 9.7 CVT data processing intrinsics (PR #186807)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [AArch64] Add 9.7 CVT data processing intrinsics (PR #186807)   via llvm-commits
• [llvm] [InstCombine] Create `or` as `disjoint` where applicable (PR #193725)   Piotr Fusik via llvm-commits
• [llvm] [InstCombine] Create `or` as `disjoint` where applicable (PR #193725)   via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Jonathan Thackray via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Jonathan Thackray via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Jonathan Thackray via llvm-commits
• [llvm] [Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened) (PR #177358)   Benjamin Stott via llvm-commits
• [llvm] [BranchFolding] Fold fallthroughs into conditional tailcalls if profitable (PR #140476)   Nabeel Omer via llvm-commits
• [llvm] [X86] Use getTargetVShiftByConstNode helper to reduce code duplication. NFCI. (PR #193736)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Fix half precision OpConstant for log10/exp10 lowering (PR #193730)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Reject OpSelect with scalar result and vector condition (PR #193745)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Rework VOPD constraints for gfx12+ with data deps (PR #191264)   Joe Nash via llvm-commits
• [llvm] [SPIR-V] Reject OpSelect with scalar result and vector condition (PR #193745)   via llvm-commits
• [llvm] Reland #2 "[STLExtras] Add a template for detecting whether a type has an equality comparison operator" (PR #177415)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Afonso Rafael via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Matt Arsenault via llvm-commits
• [llvm] 2a51267 - [AMDGPU] Fix s_cselect scc clobber issue (#193498)   via llvm-commits
• [llvm] [AMDGPU] Fix s_cselect scc clobber issue (PR #193498)   via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Matt Arsenault via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Matt Arsenault via llvm-commits
• [llvm] ff125ae - [ConstantFolding] Constant fold nextafter and nexttoward (#168794)   via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Matt Arsenault via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Afonso Rafael via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] [NFC][Target] Fixed rule-of-three for RegisterTargetPassConfigCallback class (PR #193470)   Jaydeep Chauhan via llvm-commits
• [llvm] 0ff393f - [NFC][Target] Fixed rule-of-three for RegisterTargetPassConfigCallback class (#193470)   via llvm-commits
• [llvm] [NFC][Target] Fixed rule-of-three for RegisterTargetPassConfigCallback class (PR #193470)   Jaydeep Chauhan via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for vector bitwise selection (PR #193752)   via llvm-commits
• [llvm] [CodeGen] Fix partial def handling in HandlePhysRegUse and FindLastPartialDef (PR #186437)   Matt Arsenault via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for vector bitwise selection (PR #193752)   via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Ehsan Amiri via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Ehsan Amiri via llvm-commits
• [llvm] [InstCombine] Create `or` as `disjoint` where applicable (PR #193725)   Nikita Popov via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Michał Górny via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Ehsan Amiri via llvm-commits
• [llvm] [X86] Use getTargetVShiftByConstNode helper to reduce code duplication. NFCI. (PR #193736)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   Kerry McLaughlin via llvm-commits
• [llvm] [X86] Use getTargetVShiftByConstNode helper to reduce code duplication. NFCI. (PR #193736)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Afonso Rafael via llvm-commits
• [llvm] [AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (PR #193345)   Ryan Cowan via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Ehsan Amiri via llvm-commits
• [llvm] Reland "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules" (PR #193759)   Benjamin Stott via llvm-commits
• [llvm] Reland "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules" (PR #193759)   via llvm-commits
• [llvm] [X86] Use getTargetVShiftByConstNode helper to reduce code duplication. NFCI. (PR #193736)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   Dmitry Vasilyev via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Rohit Aggarwal via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Ehsan Amiri via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   via llvm-commits
• [llvm] Reland "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules" (PR #193759)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   Kerry McLaughlin via llvm-commits
• [llvm] [SPIR-V] Reject OpSelect with scalar result and vector condition (PR #193745)   via llvm-commits
• [llvm] [SPIR-V] Reject OpSelect with scalar result and vector condition (PR #193745)   via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Ehsan Amiri via llvm-commits
• [llvm] [LLVM][CodeGen] Ensure SystemZTDCPass::convertFCmp only accepts scalar floating point types. (PR #193738)   Ulrich Weigand via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Nashe Mncube via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nikita Popov via llvm-commits
• [llvm] [Dexter] Add basic structured script parsing (PR #193710)   Stephen Tozer via llvm-commits
• [llvm] [libsycl] add single_task (PR #192499)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add single_task (PR #192499)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add single_task (PR #192499)   Sergey Semenov via llvm-commits
• [llvm] [libsycl] add single_task (PR #192499)   Sergey Semenov via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Nikita Popov via llvm-commits
• [llvm] [GVN] Add code to disable scalar PRE (PR #190386)   Antonio Frighetto via llvm-commits
• [llvm] 19d9772 - [LLVM][CodeGen] Ensure SystemZTDCPass::convertFCmp only accepts scalar floating point types. (#193738)   via llvm-commits
• [llvm] [LLVM][CodeGen] Ensure SystemZTDCPass::convertFCmp only accepts scalar floating point types. (PR #193738)   Paul Walker via llvm-commits
• [llvm] [X86] Regenerate bit integer tests to show VPADD constant asm comments (PR #193763)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   Craig Topper via llvm-commits
• [llvm] [X86] Regenerate bit integer tests to show VPADD constant asm comments (PR #193763)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   Craig Topper via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [X86] Use getTargetVShiftByConstNode helper to reduce code duplication. NFCI. (PR #193736)   Simon Pilgrim via llvm-commits
• [llvm] [Attributor] Support SPIR-V address spaces (PR #192725)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Guo Chen via llvm-commits
• [llvm] [Attributor] Support SPIR-V address spaces (PR #192725)   Nick Sarnie via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   Ehsan Amiri via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fp_round, vp_fp_extend (PR #193219)   Craig Topper via llvm-commits
• [llvm] [MergeICmps] Check for libfunc emittability (PR #193764)   Nikita Popov via llvm-commits
• [llvm] bced9f7 - [MergeICmps] Check for libfunc emittability (#193764)   via llvm-commits
• [llvm] [MergeICmps] Check for libfunc emittability (PR #193764)   Nikita Popov via llvm-commits
• [llvm] [ARM][MC] Reject unaligned Thumb2 LDRD/STRD post-index immediates (PR #193531)   Mark Murray via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Rohit Aggarwal via llvm-commits
• [llvm] [ARM][MC] Gate Thumb hvc alias on virtualization (PR #193532)   Mark Murray via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Rohit Aggarwal via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   Amit Tiwari via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Rohit Aggarwal via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   Amit Tiwari via llvm-commits
• [llvm] [NFC][AMDGPU] Make code consistent in MCResourceInfo::gatherResourceInfo (PR #193735)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] f19f3cd - [NFC][AMDGPU] Make code consistent in MCResourceInfo::gatherResourceInfo (#193735)   via llvm-commits
• [llvm] [NFC][AMDGPU] Make code consistent in MCResourceInfo::gatherResourceInfo (PR #193735)   Shilei Tian via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] 91b0fbc - [X86] Use getTargetVShiftByConstNode helper to reduce code duplication. NFCI. (#193736)   via llvm-commits
• [llvm] [X86] Use getTargetVShiftByConstNode helper to reduce code duplication. NFCI. (PR #193736)   Simon Pilgrim via llvm-commits
• [llvm] Add LIT_UNSUPPORTED support to lit testing (PR #193766)   Lei Huang via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   via llvm-commits
• [llvm] [ARM][MC] Gate Thumb hvc alias on virtualization (PR #193532)   David Green via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Add LIT_UNSUPPORTED support to lit testing (PR #193766)   via llvm-commits
• [lld] [lldb] [llvm] [Support][Cache] Make `pruneCache` return an `Expected` (PR #191367)   Teresa Johnson via llvm-commits
• [llvm] [PowerPC] support tail call optimization on AIX tail call (PR #161690)   Shimin Cui via llvm-commits
• [llvm] [ThinLTO] Reduce the number of renaming due to promotions in distribu… (PR #188074)   Teresa Johnson via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86] Regenerate bit integer tests to show VPADD constant asm comments (PR #193763)   Simon Pilgrim via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (PR #193580)   Philip Reames via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   Nikita Popov via llvm-commits
• [llvm] [cmake] Forward MacOS sysroot to runtimes when not crosscompiling (PR #182501)   Tom Eccles via llvm-commits
• [clang] [llvm] [WIP] Riscv libmvec support (PR #193721)   Zhijin Zeng via llvm-commits
• [llvm] [cmake] Forward MacOS sysroot to runtimes when not crosscompiling (PR #182501)   Tom Eccles via llvm-commits
• [llvm] [AArch64] Use ADDP tree for v16i8 to i16 bitmask extraction (PR #192974)   Conor Kotwasinski via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   Nikita Popov via llvm-commits
• [llvm] [NFC] [Extractor] Fix comments (PR #193769)   Shimin Cui via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove support for FEAT_MPAMv2_VID (PR #193191)   via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   Nikita Popov via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (PR #193580)   Philip Reames via llvm-commits
• [llvm] [LoopFusion] Document LoopFusion Pass (PR #192926)   Ehsan Amiri via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   David Green via llvm-commits
• [llvm] ef82b67 - [RISCV] Pass Subtarget to CC_RISCVAssign2XLen. NFC (#193609)   via llvm-commits
• [llvm] [RISCV] Pass Subtarget to CC_RISCVAssign2XLen. NFC (PR #193609)   Craig Topper via llvm-commits
• [llvm] [NFC] [Extractor] Fix comments (PR #193769)   via llvm-commits
• [llvm] [LoopFusion] Document LoopFusion Pass (PR #192926)   Ehsan Amiri via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Philip Reames via llvm-commits
• [clang] [llvm] [openmp] [Clang][OpenMP] Validate omp_initial_device omp_invalid_device as device IDs (PR #193688)   Michael Klemm via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Nikita Popov via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsic support for Fdot instr. (PR #189987)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (PR #193580)   Craig Topper via llvm-commits
• [llvm] a54364a - [DAGCombine] Relax restriction on (bswap shl(x,c)) combine (#193679)   via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   Craig Topper via llvm-commits
• [llvm] 183168a - [OpenMP][OMPIRBuilder] Convert cmpxchg memory order to C ABI constants (#193536)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   Dmitry Vasilyev via llvm-commits
• [llvm] [mlir] [OpenMP][OMPIRBuilder] Convert cmpxchg memory order to C ABI constants (PR #193536)   via llvm-commits
• [llvm] Reland "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules" (PR #193759)   Benjamin Stott via llvm-commits
• [llvm] [ThinLTO] Reduce the number of renaming due to promotions in distribu… (PR #188074)   Teresa Johnson via llvm-commits
• [llvm] [ThinLTO] Reduce the number of renaming due to promotions in distribu… (PR #188074)   Teresa Johnson via llvm-commits
• [llvm] [ThinLTO] Reduce the number of renaming due to promotions in distribu… (PR #188074)   Teresa Johnson via llvm-commits
• [llvm] Reland #2 "[STLExtras] Add a template for detecting whether a type has an equality comparison operator" (PR #177415)   Benjamin Stott via llvm-commits
• [llvm] [RISCV] Add bf16 tests for interleave and deinterleave (PR #193720)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add bf16 tests for interleave and deinterleave (PR #193720)   Craig Topper via llvm-commits
• [llvm] [Attributor] Support SPIR-V address spaces (PR #192725)   via llvm-commits
• [llvm] [BranchFolding] Fold fallthroughs into conditional tailcalls if profitable (PR #140476)   Nabeel Omer via llvm-commits
• [llvm] [LV] Enable wide active lane masks when tail-folding if preferred (PR #193757)   Kerry McLaughlin via llvm-commits
• [llvm] 2d84862 - [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (#193488)   via llvm-commits
• [llvm] [CodeGenPrepare] Drop nuw on gep unmerging if the new index is negative (PR #193488)   Nikita Popov via llvm-commits
• [llvm] Add LIT_UNSUPPORTED support to lit testing (PR #193766)   via llvm-commits
• [llvm] Add LIT_UNSUPPORTED support to lit testing (PR #193766)   via llvm-commits
• [llvm] 37cd9ad - [TySan] Fix size type mismatch in instrumentMemInst for 32-bit targets (#191601)   via llvm-commits
• [llvm] [TySan] Fix size type mismatch in instrumentMemInst for 32-bit targets (PR #191601)   Brian Cain via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Craig Topper via llvm-commits
• [llvm] 602cc92 - [Hexagon] Add SafeStack runtime libcall to HexagonSystemLibrary (#191673)   via llvm-commits
• [llvm] [Hexagon] Add SafeStack runtime libcall to HexagonSystemLibrary (PR #191673)   Brian Cain via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   via llvm-commits
• [llvm] [ARM][MC] Gate Thumb hvc alias on virtualization (PR #193532)   Oliver Stannard via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LLVM][Intrinsics] Add validation for vararg intrinsics (PR #193777)   Rahul Joshi via llvm-commits
• [llvm] f782888 - [X86] Regenerate bit integer tests to show VPADD constant asm comments (#193763)   via llvm-commits
• [llvm] [X86] Regenerate bit integer tests to show VPADD constant asm comments (PR #193763)   Simon Pilgrim via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Add support for scope construct (PR #193098)   Tom Eccles via llvm-commits
• [llvm] [AggressiveInstCombine] Fold split-width i32 cttz/ctlz patterns into wide i64 intrinsics (PR #192296)   Craig Topper via llvm-commits
• [llvm] [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (PR #193417)   Cullen Rhodes via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   lonely eagle via llvm-commits
• [llvm] 023e2e6 - [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (#193473)   via llvm-commits
• [llvm] [DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (PR #193473)   Paweł Bylica via llvm-commits
• [llvm] [LLVM][Intrinsics] Add validation for vararg intrinsics (PR #193777)   Rahul Joshi via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   lonely eagle via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Kerry McLaughlin via llvm-commits
• [llvm] Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (PR #193781)   David Green via llvm-commits
• [llvm] 321db05 - Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)   via llvm-commits
• [llvm] Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (PR #193781)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   David Green via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] Reland: [ASan][Windows] Fix memmove/memcpy interception on x64 (#192060) (PR #193633)   Alexandre Ganea via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Yingwei Zheng via llvm-commits
• [llvm] [MC][X86] Set SHF_X86_64_LARGE on mergeable constant sections for large code-model (PR #190903)   Grigory Pastukhov via llvm-commits
• [llvm] [PowerPC] support tail call optimization on AIX tail call (PR #161690)   zhijian lin via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   via llvm-commits
• [llvm] [LLVM][Intrinsics] Add validation for vararg intrinsics (PR #193777)   Rahul Joshi via llvm-commits
• [llvm] [SPIRV] Add verify-machineinstrs option (PR #193782)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   Congzhe Cao via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   Congzhe Cao via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   Congzhe Cao via llvm-commits
• [llvm] [AMDGPU] Break v2i32 and/or/xor ops into i32 pairs when followed by t… (PR #191422)   Wooseok Lee via llvm-commits
• [llvm] [SPIRV] Add verify-machineinstrs option (PR #193782)   via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Charles Zablit via llvm-commits
• [llvm] [PowerPC] support tail call optimization on AIX tail call (PR #161690)   zhijian lin via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Zhige Chen via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Charles Zablit via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsic support for Fdot instr. (PR #189987)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsic support for Fdot instr. (PR #189987)   via llvm-commits
• [llvm] [bolt] Account for stubs with symbols in plt. (PR #192716)   Hemant Kulkarni via llvm-commits
• [llvm] [Inliner] Use store-to-load forwarding to resolve call arguments (PR #190607)   Jiří Filek via llvm-commits
• [llvm] [Inliner] Use store-to-load forwarding to resolve call arguments (PR #190607)   Jiří Filek via llvm-commits
• [llvm] [SPIRV] Add verify-machineinstrs option (PR #193782)   via llvm-commits
• [llvm] [PowerPC] support tail call optimization on AIX tail call (PR #161690)   zhijian lin via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [clang] [compiler-rt] [UBSan] Add check that detects division by zero for fixed-point types (PR #165181)   Victor Chernyakin via llvm-commits
• [clang] [compiler-rt] [UBSan] Add check that detects division by zero for fixed-point types (PR #165181)   Victor Chernyakin via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SPIRV] Add verify-machineinstrs option (PR #193782)   Matt Arsenault via llvm-commits
• [llvm] 2248253 - [PowerPC] fixed issue "Failure to optimize (x == 0) ? 0xFF : 0 to addic+subfe instead of cntlzw+srwi+neg" (#190606)   via llvm-commits
• [llvm] [PowerPC] fixed issue "Failure to optimize (x == 0) ? 0xFF : 0 to addic+subfe instead of cntlzw+srwi+neg" (PR #190606)   zhijian lin via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [InstCombine] Fold shift of a constant into a reverse shift (PR #192982)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Yunbo Ni via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Use SCEV optimize VecTC-materialization for scalable (PR #193703)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU]/GlobalISel: RegBankLegalize rules for amdgcn_cvt_sr_fp8_f32/cvt_sr_bf8_f32/cvt_pk_fp8_f32/cvt_pk_bf8_f32/cvt_f32_fp8/cvt_f32_bf8/cvt_pk_f32_fp8/cvt_pk_f32_bf8 (PR #193551)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [clang] [llvm] [llvm] Fix the MCSubtargetInfo used for module-level assembly. (PR #97685)   Chris Copeland via llvm-commits
• [llvm] [PowerPC] fixed issue "Failure to optimize (x == 0) ? 0xFF : 0 to addic+subfe instead of cntlzw+srwi+neg" (PR #190606)   LLVM Continuous Integration via llvm-commits
• [llvm] dd8c777 - [RISCV][GlobalISel] Add intial support for inline asm (#193314)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   Gábor Spaits via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] XCOFF no inline ptr glue (PR #193786)   via llvm-commits
• [llvm] XCOFF no inline ptr glue (PR #193786)   Sean Fertile via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV][GlobalISel] Add intial support for inline asm (PR #193314)   LLVM Continuous Integration via llvm-commits
• [llvm] Reland "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules" (PR #193759)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [InstCombine] Fold neg arg in hyperbolic lib functions (PR #193586)   Yingwei Zheng via llvm-commits
• [llvm] [AsmParser] Revamp how floating-point literals work in LLVM IR. (PR #190641)   Joshua Cranmer via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Philip Reames via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Nick Desaulniers via llvm-commits
• [llvm] XCOFF no inline ptr glue (PR #193786)   Sean Fertile via llvm-commits
• [llvm] ee3ed4a - [InstCombine] Fold neg arg in hyperbolic lib functions (#193586)   via llvm-commits
• [llvm] Reland "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules" (PR #193759)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [InstCombine] Fold neg arg in hyperbolic lib functions (PR #193586)   Yingwei Zheng via llvm-commits
• [llvm] 6f99938 - Reland "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules" (#193759)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Alireza Torabian via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Jonathan Thackray via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Jonathan Thackray via llvm-commits
• [llvm] Reland "[Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules" (PR #193759)   LLVM Continuous Integration via llvm-commits
• [llvm] [AsmParser] Revamp how floating-point literals work in LLVM IR. (PR #190641)   Joshua Cranmer via llvm-commits
• [llvm] [Dexter] Add basic structured script parsing (PR #193710)   Jonas Devlieghere via llvm-commits
• [llvm] 0459273 - [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (#174355)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsic support for Fdot instr. (PR #189987)   via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Yingwei Zheng via llvm-commits
• [llvm] [SPIRV] Add verify-machineinstrs option (PR #193782)   Dmitry Sidorov via llvm-commits
• [llvm] [SDAG] Minor cleanup to TargetLowering::expandFP_ROUND. NFC (PR #193793)   David Green via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Yingwei Zheng via llvm-commits
• [llvm] [Analysis][RISCV] More accurately estimate the cost of strided vector loads (PR #175135)   Luke Lau via llvm-commits
• [llvm] [SDAG] Minor cleanup to TargetLowering::expandFP_ROUND. NFC (PR #193793)   via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Michał Górny via llvm-commits
• [llvm] [bolt] Account for stubs with symbols in plt. (PR #192716)   Hemant Kulkarni via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Charles Zablit via llvm-commits
• [llvm] [lit] Fix `progress-bar.py` flaky test (PR #193741)   Charles Zablit via llvm-commits
• [llvm] [DirectX] Apply DXIL op fnattrs to declarations (PR #193622)   Finn Plummer via llvm-commits
• [llvm] [DAGCombiner] Fix type check in visitSRA: use VT for SIGN_EXTEND and TruncVT for TRUNCATE (PR #157580)   Stephen Young via llvm-commits
• [llvm] [bolt] Account for stubs with symbols in plt. (PR #192716)   via llvm-commits
• [llvm] [SDAG] Minor cleanup to TargetLowering::expandFP_ROUND. NFC (PR #193793)   Matt Arsenault via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   via llvm-commits
• [llvm] [Attributor] Support SPIR-V address spaces (PR #192725)   Shilei Tian via llvm-commits
• [llvm] 44d1832 - Reland #2 "[STLExtras] Add a template for detecting whether a type has an equality comparison operator" (#177415)   via llvm-commits
• [llvm] Reland #2 "[STLExtras] Add a template for detecting whether a type has an equality comparison operator" (PR #177415)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Handle FSub Partial Reductions (PR #191186)   Benjamin Maxwell via llvm-commits
• [llvm] 84eb64d - [llubi] Implement intrinsics for integer arithmetic/bit manipulation (#193702)   via llvm-commits
• [llvm] [llubi] Implement intrinsics for integer arithmetic/bit manipulation (PR #193702)   Yingwei Zheng via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   lonely eagle via llvm-commits
• [llvm] [bolt] Account for stubs with symbols in plt. (PR #192716)   via llvm-commits
• [llvm] Reland #2 "[STLExtras] Add a template for detecting whether a type has an equality comparison operator" (PR #177415)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   Vitaly Buka via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   lonely eagle via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Luke Lau via llvm-commits
• [llvm] [DirectX] Denote `dx.resource.getpointer` with `IntrInaccessibleMemOnly` and `IntrReadMem` (PR #193593)   Helena Kotas via llvm-commits
• [llvm] [SPIRV] Add 64 bit lowering for bitreverse (PR #193068)   via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Philip Reames via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Philip Reames via llvm-commits
• [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   via llvm-commits
• [llvm] [VPlan] Shallow-traverse vector-loop in dropPoisonGen (NFC) (PR #193635)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] Add verify-machineinstrs option (PR #193782)   via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   Mehdi Amini via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   Mehdi Amini via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   Mehdi Amini via llvm-commits
• [llvm] c71780c - Triple: Add constructor from enum entries (#190632)   via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   Mehdi Amini via llvm-commits
• [llvm] [X86] resolveTargetShuffleInputsAndMask - match repeated vector sources through bitcasts (PR #193810)   Simon Pilgrim via llvm-commits
• [llvm] [X86] resolveTargetShuffleInputsAndMask - match repeated vector sources through bitcasts (PR #193810)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Philip Reames via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [llvm] Triple: Add constructor from enum entries (PR #190632)   Matt Arsenault via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Thurston Dang via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Afonso Rafael via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   via llvm-commits
• [llvm] [WebAssembly] Support f16x8.demote_f32x4_zero (PR #193564)   Brendan Dahl via llvm-commits
• [llvm] [llvm][RISCV] Optimize fcopysign for fixed vectors (PR #193802)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Optimize fcopysign for fixed vectors (PR #193802)   via llvm-commits
• [llvm] [llvm][RISCV] Optimize fcopysign for fixed vectors (PR #193802)   via llvm-commits
• [llvm] [NVPTX] Introduce custom AsmStreamer for NVPTX backend (PR #192527)   Alexander Yermolovich via llvm-commits
• [llvm] [LV] Factor out VF-independent code from cost model (NFC). (PR #192426)   LLVM Continuous Integration via llvm-commits
• [llvm] [NVPTX] Introduce custom AsmStreamer for NVPTX backend (PR #192527)   Alexander Yermolovich via llvm-commits
• [llvm] [MC][X86] Set SHF_X86_64_LARGE on mergeable constant sections for large code-model (PR #190903)   Arthur Eubanks via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LoopFusion] Remove DT edge from Extiblock to ExitBlockSuc (PR #193641)   Ehsan Amiri via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [FileCheck] --dump-input: Elide middle of underlines for no-match (PR #192908)   Joel E. Denny via llvm-commits
• [llvm] [LSR][RFC] Improve LCSSA preservation ? (PR #185373)   Nikita Popov via llvm-commits
• [clang] [compiler-rt] [llvm] [libcxx] Use debug() instead of note() for substitutions and features (PR #193667)   Vitaly Buka via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Craig Topper via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Update analyzeRtStrideCandidate() to correctly handle revectorization (PR #191878)   Mikhail Gudim via llvm-commits
• [llvm] [SPIR-V] Fix half precision OpConstant for log10/exp10 lowering (PR #193730)   Steven Perron via llvm-commits
• [llvm] [Analysis] Ignore convergence tokens in dead branches in `CodeMetrics` (PR #193590)   Deric C. via llvm-commits
• [llvm] [SLP] Update analyzeRtStrideCandidate() to correctly handle revectorization (PR #191878)   Ryan Buchner via llvm-commits
• [llvm] [Analysis] Ignore convergence tokens in dead branches in `CodeMetrics` (PR #193590)   Deric C. via llvm-commits
• [llvm] [Analysis] Ignore convergence tokens in dead branches in `CodeMetrics` (PR #193590)   Deric C. via llvm-commits
• [llvm] [Analysis] Ignore convergence tokens in dead branches in `CodeMetrics` (PR #193590)   Deric C. via llvm-commits
• [libcxx] [llvm] [libcxx][Github] Add generic-llvm-libc config to CI (PR #193822)   Aiden Grossman via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Steven Perron via llvm-commits
• [libcxx] [llvm] [libcxx][Github] Add generic-llvm-libc config to CI (PR #193822)   via llvm-commits
• [llvm] [Analysis] Ignore convergence tokens in dead branches in `CodeMetrics` (PR #193590)   Deric C. via llvm-commits
• [libcxx] [llvm] [libcxx][Github] Add generic-llvm-libc config to CI (PR #193822)   Nikolas Klauser via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][AMDGPU] Remove `amdgpu-link-time-lds` module flag (PR #193806)   Shilei Tian via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Sam Elliott via llvm-commits
• [llvm] [SLP] Update analyzeRtStrideCandidate() to correctly handle revectorization (PR #191878)   Mikhail Gudim via llvm-commits
• [llvm] [SLP] Update analyzeRtStrideCandidate() to correctly handle revectorization (PR #191878)   Mikhail Gudim via llvm-commits
• [clang] [compiler-rt] [llvm] [libcxx] Use debug() instead of note() for substitutions and features (PR #193667)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [libcxx] Use debug() instead of note() for substitutions and features (PR #193667)   Nikolas Klauser via llvm-commits
• [llvm] [lit] Use dbg instead of note for tool detection (PR #193662)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [libcxx] Use debug() instead of note() for substitutions and features (PR #193667)   Nikolas Klauser via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [llvm] [LLVM][Transforms][Attributor] - Optimize AAIsDeadFunction::isAssumedDead (PR #189467)   Johannes Doerfert via llvm-commits
• [clang] [llvm] [CHERI] Make a best effort attempt to emit precise ELF sizes for GlobalAlias. (PR #193032)   Owen Anderson via llvm-commits
• [llvm] [lit] Use dbg instead of note for tool detection (PR #193662)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [libcxx] Use debug() instead of note() for substitutions (PR #193667)   Vitaly Buka via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [clang] [compiler-rt] [llvm] [libcxx] Use debug() instead of note() for substitutions (PR #193667)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [libcxx] Use debug() instead of note() for substitutions (PR #193667)   Vitaly Buka via llvm-commits
• [llvm] [DirectX] Resolve unreachable default branches in switch statements (PR #193592)   Finn Plummer via llvm-commits
• [llvm] [llvm-rc] Add support for MIPS machine (PR #193830)   Hervé Poussineau via llvm-commits
• [llvm] [llvm-rc] Add support for MIPS machine (PR #193830)   via llvm-commits
• [llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)   via llvm-commits
• [llvm] [LLVM][Intrinsics] Vararg intrinsic verification cleanup (PR #193831)   Rahul Joshi via llvm-commits
• [llvm] [MC][X86] Set SHF_X86_64_LARGE on mergeable constant sections for large code-model (PR #190903)   Farid Zakaria via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [clang] [llvm] [AMDGPU] First installment of IGLP_OPT 4 (MFMAValuSpacingOpt) implementation (PR #190916)   via llvm-commits
• [llvm] [bolt] Account for stubs with symbols in plt. (PR #192716)   Hemant Kulkarni via llvm-commits
• [llvm] [llvm-rc] Add support for MIPS machine (PR #193830)   Martin Storsjö via llvm-commits
• [llvm] [llvm-rc] Add support for MIPS machine (PR #193830)   Hervé Poussineau via llvm-commits
• [llvm] [AArch64][PreISelIntrinsicLowering] Adjust tests to include -march=+sve (PR #193833)   Philip Reames via llvm-commits
• [llvm] 7ed9d96 - [AArch64][PreISelIntrinsicLowering] Adjust tests to include -march=+sve (#193833)   via llvm-commits
• [llvm] [AArch64][PreISelIntrinsicLowering] Adjust tests to include -march=+sve (PR #193833)   Philip Reames via llvm-commits
• [llvm] 8ebc730 - [llvm-rc] Add support for MIPS machine (#193830)   via llvm-commits
• [llvm] [llvm-rc] Add support for MIPS machine (PR #193830)   Martin Storsjö via llvm-commits
• [llvm] [AArch64][SelectionDAG] Generate subs+csel for usub.sat (PR #193203)   Eli Friedman via llvm-commits
• [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   Nikita Popov via llvm-commits
• [libcxx] [llvm] [libcxx][Github] Add generic-llvm-libc config to CI (PR #193822)   Aiden Grossman via llvm-commits
• [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   Nikita Popov via llvm-commits
• [llvm] APFloat: fix wrong result status for large floats (PR #189925)   Luca Ciucci via llvm-commits
• [llvm] [MemProf] Skip GV `__prof*` during instrumentation (PR #193354)   Snehasish Kumar via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   Igor Kudrin via llvm-commits
• [clang] [llvm] [WIP][OpenMP] Enable `ATTACH`-style maps for mappers. (PR #166874)   Abhinav Gaba via llvm-commits
• [llvm] APFloat: fix wrong result status for large floats (PR #189925)   Luca Ciucci via llvm-commits
• [llvm] [bolt] Account for stubs with symbols in plt. (PR #192716)   Hemant Kulkarni via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] [LoopVectorize] Don't replace widen with replicate for ExtractValueInst (PR #193404)   Florian Hahn via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][Transforms][Attributor] - Add configurable access cap for AAPointerInfo (PR #190105)   Johannes Doerfert via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Craig Topper via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [LoopVectorize] Add metadata to distinguish vectorized loop body from scalar remainder (PR #190258)   via llvm-commits
• [llvm] [VPlan] Fold lhs | (headermask && rhs) -> vp.merge rhs, true, lhs, evl (PR #193511)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fold lhs | (headermask && rhs) -> vp.merge rhs, true, lhs, evl (PR #193511)   Luke Lau via llvm-commits
• [llvm] [VPlan] Fold lhs | (headermask && rhs) -> vp.merge rhs, true, lhs, evl (PR #193511)   Luke Lau via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Evgenii Kudriashov via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Luke Lau via llvm-commits
• [llvm] [IR] Fix null pointer dereference in Constant::toConstantRange() for ConstantByte (PR #193874)   Jim Lin via llvm-commits
• [llvm] [IR] Fix null pointer dereference in Constant::toConstantRange() for ConstantByte (PR #193874)   via llvm-commits
• [llvm] [IPO] Avoid crash when DISubprogram has no type (PR #193420)   Jiang Ning via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Bill Wendling via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Vitaly Buka via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Bill Wendling via llvm-commits
• [llvm] [DirectX] Add DebugInfo pass (PR #191254)   Justin Bogner via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] af166f4 - [LoongArch][NFC] Pre-commit tests for vector fpext from vxf32 to vxf64 (#164740)   via llvm-commits
• [llvm] [LoongArch][NFC] Pre-commit tests for vector fpext from vxf32 to vxf64 (PR #164740)   Zhaoxin Yang via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [LoongArch] Add support for vector FP_EXTEND from vxf32 to vxf64 (PR #164746)   Zhaoxin Yang via llvm-commits
• [llvm] [DirectX] Emit unresolved ptr as i8* (PR #192086)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Convert debug values to old style (PR #192162)   Justin Bogner via llvm-commits
• [llvm] [DirectX] Disable DCE and DSE for -O0 (PR #192520)   Justin Bogner via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [DirectX] Fix DILocalVariable (PR #192573)   Justin Bogner via llvm-commits
• [llvm] [MC][debug_frame] Fix a bug in MCDwarfFrameEmitter::emit() so that per-function CIE can be generated when CIEs are different (PR #192727)   Jaewook Shin via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Xinlong Chen via llvm-commits
• [llvm] [LoongArch] Introduce LASX instruction patterns for vector sign/zero extensions (PR #193727)   via llvm-commits
• [llvm] [MLIR][Python] Create TD library for Python bindings TD files (PR #193853)   Jordan Rupprecht via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Vitaly Buka via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Xinlong Chen via llvm-commits
• [llvm] [InlineSpiller] Fix live-range update in hoisting within bb (PR #193880)   Quentin Colombet via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Xinlong Chen via llvm-commits
• [llvm] [LoongArch] Introduce LASX instruction patterns for vector sign/zero extensions (PR #193727)   via llvm-commits
• [llvm] [RISCV] Add bf16 tests for interleave and deinterleave (PR #193720)   Boyao Wang via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   via llvm-commits
• [llvm] [RISCV] Add bf16 tests for interleave and deinterleave (PR #193720)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add bf16 tests for interleave and deinterleave (PR #193720)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add bf16 tests for interleave and deinterleave (PR #193720)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Simplify the insertelement 0, x, x in vector.reduce with an initial value to 0 (PR #193709)   Liao Chunyu via llvm-commits
• [llvm] [llvm][RISCV] Optimize fcopysign for fixed vectors (PR #193802)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fp_round, vp_fp_extend (PR #193219)   Pengcheng Wang via llvm-commits
• [llvm] dbaa12a - [AMDGPU] Add MC tests for scalar operands for packed fp32 instructions (#193866)   via llvm-commits
• [llvm] [AMDGPU] Add MC tests for scalar operands for packed fp32 instructions (PR #193866)   Changpeng Fang via llvm-commits
• [llvm] [Offload][AMDGPU] Use ROCr API for APU check (PR #193887)   Kewen Meng via llvm-commits
• [llvm] [Offload][AMDGPU] Use ROCr API for APU check (PR #193887)   via llvm-commits
• [llvm] [Offload][AMDGPU] Use ROCr API for APU check (PR #193887)   via llvm-commits
• [llvm] [Offload][AMDGPU] Use ROCr API for APU check (PR #193887)   via llvm-commits
• [llvm] [Offload][AMDGPU] Use ROCr API for APU check (PR #193887)   Joseph Huber via llvm-commits
• [llvm] [Offload][AMDGPU] Use ROCr API for APU check (PR #193887)   Kewen Meng via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   lonely eagle via llvm-commits
• [llvm] [AMDGPU] Add MC tests for scalar operands for packed fp32 instructions (PR #193866)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Simplify the insertelement 0, x, x in vector.reduce with an initial value to 0 (PR #193709)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Simplify the insertelement 0, x, x in vector.reduce with an initial value to 0 (PR #193709)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Simplify the insertelement 0, x, x in vector.reduce with an initial value to 0 (PR #193709)   Pengcheng Wang via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [llvm] [llvm][lli] fix lli crash when run variable arguments function as a interpret (PR #173719)   via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   via llvm-commits
• [llvm] [LoongArch] Add tests for vector shift-right-and-round combines (PR #192920)   via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   Hocky Yudhiono via llvm-commits
• [llvm] [Mips] Optimize instr `slti+mfc1+cvt.s.d` to `slti+mfhc1` (PR #187463)   YunQiang Su via llvm-commits
• [llvm] [llvm-profgen] Add --time-profgen (PR #191930)   Amir Ayupov via llvm-commits
• [llvm] [Mips] Optimize instr `slti+mfc1+cvt.s.d` to `slti+mfhc1` (PR #187463)   YunQiang Su via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   Amir Ayupov via llvm-commits
• [clang] [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   via llvm-commits
• [llvm] [AMDGPU][MIRFormatter] Printer & parser for S_WAITCNT human-readable mask (PR #193895)   via llvm-commits
• [llvm] [AMDGPU][MIRFormatter] Printer & parser for S_WAITCNT human-readable mask (PR #193895)   via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [DAGCombiner] Slight simplify code in visitBSWAP. (PR #193896)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Slighty simplify code in visitBSWAP. NFC (PR #193896)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Slighty simplify code in visitBSWAP. NFC (PR #193896)   via llvm-commits
• [llvm] [EarlyCSE] Forward non-byte-sized integer stores to byte-aligned loads (PR #192604)   via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [SLP] Update analyzeRtStrideCandidate() to correctly handle revectorization (PR #191878)   Ryan Buchner via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] gone with the wind, gone with the test (PR #193897)   via llvm-commits
• [llvm] gone with the wind, gone with the test (PR #193897)   via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   lonely eagle via llvm-commits
• [llvm] [InstCombine] Fold select of ordered fcmps of fabs over `isKnownNeverNaN`-selects to a single select (PR #192182)   via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   lonely eagle via llvm-commits
• [llvm] [LV] Simplify live-out extraction for first-order recurrence phis when tail folding (PR #176108)   Mel Chen via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   Hocky Yudhiono via llvm-commits
• [llvm] [LV] Simplify live-out extraction for first-order recurrence phis when tail folding (PR #176108)   Mel Chen via llvm-commits
• [llvm] [Analysis][RISCV] More accurately estimate the cost of strided vector loads (PR #175135)   Ryan Buchner via llvm-commits
• [llvm] [LV] Simplify live-out extraction for first-order recurrence phis when tail folding (PR #176108)   Mel Chen via llvm-commits
• [llvm] workflows/issue-release-workflow: Use GitHub app for generating tokens (PR #193825)   Cullen Rhodes via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [llvm] [Mips] Optimize instr `slti+mfc1+cvt.s.d` to `slti+mfhc1` (PR #187463)   via llvm-commits
• [llvm] [Mips] ptimize instr `cvt.s.d+mfc1+slti` to `mfhc1+slti` (PR #187463)   via llvm-commits
• [llvm] [Mips] Optimize instr `cvt.s.d+mfc1+slti` to `mfhc1+slti` (PR #187463)   via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   via llvm-commits
• [llvm] [llvm][RISCV] Optimize fcopysign for fixed vectors (PR #193802)   Brandon Wu via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   via llvm-commits
• [llvm] [MCP][NFC] Add Cost modelling for EliminateSpillageCopies (PR #193905)   Jack Styles via llvm-commits
• [llvm] [MCP][NFC] Add Cost modelling for EliminateSpillageCopies (PR #193905)   via llvm-commits
• [llvm] [MCP][NFC] Add Cost modelling for EliminateSpillageCopies (PR #193905)   Jack Styles via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [flang] [llvm] [mlir] [mlir][CSE] Add pruneDeadOps to CSE pass (PR #193778)   lonely eagle via llvm-commits
• [llvm] [AArch64] Enable Spillage Copy Elimination by default (PR #186093)   Jack Styles via llvm-commits
• [llvm] b548387 - [LV] Simplify live-out extraction for first-order recurrence phis when tail folding (#176108)   via llvm-commits
• [llvm] [LV] Simplify live-out extraction for first-order recurrence phis when tail folding (PR #176108)   Mel Chen via llvm-commits
• [llvm] [IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (PR #188248)   LLVM Continuous Integration via llvm-commits
• [llvm] [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (PR #193417)   Cullen Rhodes via llvm-commits
• [llvm] 0d33284 - [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (#185696)   via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Do not add aliasing decorations to OpAtomicStore/OpAtomicLoad (PR #193779)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Rohit Aggarwal via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [AVR] Fix a bug of register allocation (PR #193908)   Ben Shi via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Mel Chen via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Mel Chen via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Mel Chen via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Mel Chen via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Mel Chen via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Mel Chen via llvm-commits
• [llvm] [FileCheck] --dump-input: Elide middle of underlines for no-match (PR #192908)   James Henderson via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Zachary Yedidia via llvm-commits
• [llvm] [IR] Fix null pointer dereference in Constant::toConstantRange() for ConstantByte (PR #193874)   Nikita Popov via llvm-commits
• [llvm] 248192d - [RISCV] Add bf16 tests for interleave and deinterleave (#193720)   via llvm-commits
• [llvm] [RISCV] Add bf16 tests for interleave and deinterleave (PR #193720)   Boyao Wang via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   Nikita Popov via llvm-commits
• [llvm] draft POC: verify event synchronization (PR #193897)   via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Phoebe Wang via llvm-commits
• [llvm] draft POC: verify event synchronization (PR #193897)   via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193897)   via llvm-commits
• [llvm] [DirectX] Add DebugInfo pass (PR #191254)   Harald van Dijk via llvm-commits
• [llvm] 6114cbb - [DirectX] Fix debug dump of ValueEnumerator (#191251)   via llvm-commits
• [llvm] [DirectX] Fix debug dump of ValueEnumerator (PR #191251)   Harald van Dijk via llvm-commits
• [llvm] eb6eb9f - [DirectX] Convert debug values to old style (#192162)   via llvm-commits
• [llvm] [DirectX] Convert debug values to old style (PR #192162)   Harald van Dijk via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193897)   via llvm-commits
• [llvm] 8b3eac0 - [DirectX] Convert DICompileUnit versioned language (#192574)   via llvm-commits
• [llvm] [DirectX] Convert DICompileUnit versioned language (PR #192574)   Harald van Dijk via llvm-commits
• [llvm] [BOLT][RISCV] Add RV32 bare-metal support (PR #193913)   Kito Cheng via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   James Henderson via llvm-commits
• [llvm] [MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (PR #145722)   Valery Pykhtin via llvm-commits
• [llvm] [LoongArch] Set `avg{floor/ceil}{s/u}` as legal for lsx and lasx (PR #165836)   via llvm-commits
• [llvm] 3de3198 - [DirectX] Replace non-const count of DISubrange with -1 (#192576)   via llvm-commits
• [llvm] [DirectX] Replace non-const count of DISubrange with -1 (PR #192576)   Harald van Dijk via llvm-commits
• [llvm] efffb04 - [DirectX] Fix DILocalVariable (#192573)   via llvm-commits
• [llvm] [DirectX] Fix DILocalVariable (PR #192573)   Harald van Dijk via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Phoebe Wang via llvm-commits
• [llvm] [GVN] Add code to disable scalar PRE (PR #190386)   Antonio Frighetto via llvm-commits
• [llvm] [llvm][ExpandMemCmp] Avoid making a copy of the loop value (PR #193915)   Ivan R. Ivanov via llvm-commits
• [llvm] [BOLT][RISCV] Add RV32 bare-metal support (PR #193913)   Kito Cheng via llvm-commits
• [llvm] [llvm][ExpandMemCmp] Avoid making a copy of loop value (PR #193915)   Ivan R. Ivanov via llvm-commits
• [llvm] [llvm][ExpandMemCmp] Avoid making a copy of loop value (PR #193915)   via llvm-commits
• [llvm] [llvm][ExpandMemCmp] Avoid making copy of loop value (PR #193915)   Ivan R. Ivanov via llvm-commits
• [llvm] [llvm][ExpandMemCmp] Avoid making copy of loop value (PR #193915)   Ivan R. Ivanov via llvm-commits
• [llvm] [CoroSplit] Never collect allocas used by catchpad into frame (PR #186728)   Weibo He via llvm-commits
• [llvm] [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (PR #193417)   Cullen Rhodes via llvm-commits
• [llvm] 347aa3f - [GISel] Disable opt_brcond_by_inverting_cond combine at O0 (#193417)   via llvm-commits
• [llvm] [CoroSplit] Never collect allocas used by catchpad into frame (PR #186728)   Weibo He via llvm-commits
• [llvm] [LoongArch] Add patterns for `[x]vclo.{b/h/w/d}` instructions (PR #165985)   via llvm-commits
• [llvm] [dsymutil] Handle DW_OP_GNU_push_tls_address in markEverythingAsKept (PR #193870)   Michael Buch via llvm-commits
• [llvm] [dsymutil] Handle DW_OP_GNU_push_tls_address in markEverythingAsKept (PR #193870)   Michael Buch via llvm-commits
• [llvm] [CoroSplit] Never collect allocas used by catchpad into frame (PR #186728)   via llvm-commits
• [llvm] [LoongArch] Add patterns to match `cto.w/d` when meeting i8/i16 types `not+cttz` (PR #166124)   via llvm-commits
• [llvm] [MCP][NFC] Add Cost modelling for EliminateSpillageCopies (PR #193905)   David Green via llvm-commits
• [llvm] bd469e8 - [SDAG] Minor cleanup to TargetLowering::expandFP_ROUND. NFC (#193793)   via llvm-commits
• [llvm] [SDAG] Minor cleanup to TargetLowering::expandFP_ROUND. NFC (PR #193793)   David Green via llvm-commits
• [clang] [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [clang] [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [clang] [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [clang] [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   James Henderson via llvm-commits
• [llvm] 340ba11 - [SPIRV] Do not add aliasing decorations to OpAtomicStore/OpAtomicLoad (#193779)   via llvm-commits
• [llvm] [SPIRV] Do not add aliasing decorations to OpAtomicStore/OpAtomicLoad (PR #193779)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DirectX] Disable DCE and DSE for -O0 (PR #192520)   Harald van Dijk via llvm-commits
• [llvm] [LoongArch] Optimize for scalar type `ctpop` when lsx enabled (PR #166286)   via llvm-commits
• [llvm] [DirectX] Disable DCE and DSE for -O0 (PR #192520)   Harald van Dijk via llvm-commits
• [llvm] [X86] Enable EliminateSpillageCopies by default on X86 (PR #155868)   via llvm-commits
• [llvm] [DirectX] Disable DCE and DSE for -O0 (PR #192520)   Harald van Dijk via llvm-commits
• [llvm] [LV] Simplify live-out extraction for first-order recurrence phis when tail folding (PR #176108)   LLVM Continuous Integration via llvm-commits
• [llvm] [ARM][MC] Reject unaligned Thumb2 LDRD/STRD post-index immediates (PR #193531)   Mark Murray via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [LLVM] Add FP instruction intrinsics (PR #193588)   Princeton Ferro via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   Mehdi Amini via llvm-commits
• [llvm] [clang][lit] Don't substitute cir-opt if it's not enabled (PR #193665)   Akimasa Watanuki via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   Mehdi Amini via llvm-commits
• [llvm] [DAGCombiner] Slighty simplify code in visitBSWAP. NFC (PR #193896)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Slighty simplify code in visitBSWAP. NFC (PR #193896)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Slighty simplify code in visitBSWAP. NFC (PR #193896)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][SelectionDAG][SVE] Fold following extend(icmp) patterns (PR #192052)   Ricardo Jesus via llvm-commits
• [llvm] [TableGen] Support emitting preprocessed output (PR #120113)   Jay Foad via llvm-commits
• [llvm] [DirectX] Add DebugInfo pass (PR #191254)   Harald van Dijk via llvm-commits
• [llvm] [DirectX] Add DebugInfo pass (PR #191254)   Harald van Dijk via llvm-commits
• [llvm] [DirectX] Add DebugInfo pass (PR #191254)   Harald van Dijk via llvm-commits
• [llvm] [Dexter] Add timestamps to DAP logging (PR #193705)   Stephen Tozer via llvm-commits
• [llvm] [AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (PR #193345)   Cullen Rhodes via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [llvm][ExpandMemCmp] Avoid making copy of loop value (PR #193915)   Nikita Popov via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (PR #164561)   via llvm-commits
• [llvm] f780e46 - [llvm][ExpandMemCmp] Avoid making copy of loop value (#193915)   via llvm-commits
• [llvm] [llvm][ExpandMemCmp] Avoid making copy of loop value (PR #193915)   Ivan R. Ivanov via llvm-commits
• [llvm] [LoongArch] Optimize for scalar type `ctpop` when lsx enabled (PR #166286)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [Support][JSON] Use `std::unordered_map` for object storage (PR #171230)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   David Sherwood via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   David Sherwood via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   David Sherwood via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   David Sherwood via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   Florian Hahn via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   Florian Hahn via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193897)   via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Evgenii Kudriashov via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   David Sherwood via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Evgenii Kudriashov via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   David Sherwood via llvm-commits
• [llvm] [LLVM] Add FP instruction intrinsics (PR #193588)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Support globals in pic mode (PR #170038)   Evgenii Kudriashov via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #171515)   Michael Kruse via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Paul Walker via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand WideCanIV into executable recipes (PR #191219)   Ramkumar Ramachandra via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Paul Walker via llvm-commits
• [llvm] [LangRef] Allow monotonic & seq_cst accesses to inter-operate with other accesses (PR #189014)   Fabian Ritter via llvm-commits
• [llvm] [X86][GlobalISel] Support globals in pic mode (PR #170038)   Evgenii Kudriashov via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Paul Walker via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Piotr Balcer via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Piotr Balcer via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Piotr Balcer via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Piotr Balcer via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Piotr Balcer via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [Offload][AMDGPU] Use ROCr API for APU check (PR #193887)   Matt Arsenault via llvm-commits
• [llvm] [M68k][MC] Add support for DBcc instructions (PR #193930)   via llvm-commits
• [llvm] [M68k][MC] Add support for DBcc instructions (PR #193930)   via llvm-commits
• [llvm] [AArch64][SelectionDAG][SVE] Fold following extend(icmp) patterns (PR #192052)   Sushant Gokhale via llvm-commits
• [llvm] [M68k][MC] Add support for DBcc instructions (PR #193930)   via llvm-commits
• [llvm] [X86][GlobalISel] Support globals in pic mode (PR #170038)   Rose Hudson via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Matthew Devereau via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Matthew Devereau via llvm-commits
• [llvm] [AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (PR #193859)   Matt Arsenault via llvm-commits
• [llvm] [InlineSpiller] Fix live-range update in hoisting within bb (PR #193880)   Matt Arsenault via llvm-commits
• [llvm] [LoongArch] Add support for vector FP_EXTEND from vxf32 to vxf64 (PR #164746)   Zhaoxin Yang via llvm-commits
• [llvm] [LoongArch] Add support for vector FP_EXTEND from vxf32 to vxf64 (PR #164746)   Zhaoxin Yang via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d` (PR #164213)   via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Matthew Devereau via llvm-commits
• [llvm] [InlineSpiller] Fix live-range update in hoisting within bb (PR #193880)   Matt Arsenault via llvm-commits
• [llvm] [InlineSpiller] Fix live-range update in hoisting within bb (PR #193880)   Matt Arsenault via llvm-commits
• [llvm] [InlineSpiller] Fix live-range update in hoisting within bb (PR #193880)   Matt Arsenault via llvm-commits
• [llvm] [InlineSpiller] Fix live-range update in hoisting within bb (PR #193880)   Matt Arsenault via llvm-commits
• [llvm] [InlineSpiller] Fix live-range update in hoisting within bb (PR #193880)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Distributed ThinLTO] Support Unicode characters (PR #193931)   Ben Dunbobbin via llvm-commits
• [llvm] verify scc is not live-in (PR #193143)   Matt Arsenault via llvm-commits
• [llvm] verify scc is not live-in (PR #193143)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Extend licm to hoist replicate loads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] verify scc is not live-in (PR #193143)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add C1-Premium scheduling model (PR #185398)   Asher Dobrescu via llvm-commits
• [llvm] [VPlan] Simplify WidenGEP::execute (NFC) (PR #193543)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Strip removeRedundantExpandSCEVs (NFC) (PR #188976)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Generalize licm-sink to strip zero-user bail (PR #187077)   Ramkumar Ramachandra via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [VPlan] Strip single-scalar special-casing for replicates (NFC) (PR #189708)   Ramkumar Ramachandra via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [DAGCombiner] Slighty simplify code in visitBSWAP. NFC (PR #193896)   Paweł Bylica via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Florian Hahn via llvm-commits
• [llvm] [X86] masked div/rem tests - fix avx512 and add sse4/avx2 test coverage (PR #193933)   Simon Pilgrim via llvm-commits
• [llvm] [X86] masked div/rem tests - fix avx512 and add sse4/avx2 test coverage (PR #193933)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [lldb][docs] Document AArch64 Linux Permission Overlay support (PR #184119)   David Spickett via llvm-commits
• [llvm] [LangRef] Allow monotonic & seq_cst accesses to inter-operate with other accesses (PR #189014)   Fabian Ritter via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Simon Pilgrim via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Simon Pilgrim via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Simon Pilgrim via llvm-commits
• [llvm] e2159f8 - [LangRef] Allow monotonic & seq_cst accesses to inter-operate with other accesses (#189014)   via llvm-commits
• [llvm] [LangRef] Allow monotonic & seq_cst accesses to inter-operate with other accesses (PR #189014)   Fabian Ritter via llvm-commits
• [llvm] [LangRef][AMDGPU] Specify that syncscope can cause atomic operations to race (PR #189015)   Fabian Ritter via llvm-commits
• [llvm] [LangRef][AMDGPU] Specify that syncscope can cause atomic operations to race (PR #189015)   Fabian Ritter via llvm-commits
• [llvm] [SLP] Add new test for widened strided loads of > i8 width (PR #193901)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Distributed ThinLTO] Support Unicode characters (PR #193931)   via llvm-commits
• [clang] [llvm] [Distributed ThinLTO] Support Unicode characters (PR #193931)   via llvm-commits
• [llvm] [AAEval] Print ModRefInfo for atomic operations (PR #193935)   Nikita Popov via llvm-commits
• [llvm] 23ea736 - [AAEval] Print ModRefInfo for atomic operations (#193935)   via llvm-commits
• [llvm] [AAEval] Print ModRefInfo for atomic operations (PR #193935)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [llvm] CodeGen: Fix double counting bundles in inst size verification (PR #191460)   Diana Picus via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (PR #193345)   David Green via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [clang] [llvm] WIP - [Distributed ThinLTO] Support Unicode characters (PR #193931)   Ben Dunbobbin via llvm-commits
• [clang] [llvm] WIP - [Distributed ThinLTO] Support Unicode characters (PR #193931)   Ben Dunbobbin via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [SLP] Generate StoreChainContext for all chains for a given base pointer first (PR #193616)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Generate StoreChainContext for all chains for a given base pointer first (PR #193616)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Generate StoreChainContext for all chains for a given base pointer first (PR #193616)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Generate StoreChainContext for all chains for a given base pointer first (PR #193616)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Generate StoreChainContext for all chains for a given base pointer first (PR #193616)   Alexey Bataev via llvm-commits
• [llvm] 9002048 - [X86] masked div/rem tests - fix avx512 and add sse4/avx2 test coverage (#193933)   via llvm-commits
• [llvm] [X86] masked div/rem tests - fix avx512 and add sse4/avx2 test coverage (PR #193933)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Add MachineBlockHashInfoAnalysis for the new pass manager (PR #193107)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [mlir] [WIP][OpenMP] Enable `ATTACH`-style maps for mappers. (PR #166874)   Abhinav Gaba via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   David Sherwood via llvm-commits
• [llvm] a48159d - [AArch64][llvm] Remove support for FEAT_MPAMv2_VID (#193191)   via llvm-commits
• [clang] [llvm] [AArch64][llvm] Remove support for FEAT_MPAMv2_VID (PR #193191)   Jonathan Thackray via llvm-commits
• [llvm] CodeGen: Fix double counting bundles in inst size verification (PR #191460)   Matt Arsenault via llvm-commits
• [llvm] f64e8d1 - [AMDLIBM] Remove the mapping of the deleted vector call (#193760)   via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Simon Pilgrim via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   David Sherwood via llvm-commits
• [llvm] CodeGen: Fix double counting bundles in inst size verification (PR #191460)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Fix double counting bundles in inst size verification (PR #191460)   via llvm-commits
• [llvm] [X86][GlobalISel] Support globals in pic mode (PR #170038)   Evgenii Kudriashov via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] [GVN] Propagate isMemorySSAEnabled() into ValueTable (PR #193938)   Madhur Amilkanthwar via llvm-commits
• [llvm] [AA] No synchronization effects for never-escaping identified local (PR #193939)   Nikita Popov via llvm-commits
• [llvm] [GVN] Propagate isMemorySSAEnabled() into ValueTable (PR #193938)   via llvm-commits
• [llvm] [AA] No synchronization effects for never-escaping identified local (PR #193939)   via llvm-commits
• [llvm] [GVN] Propagate isMemorySSAEnabled() into ValueTable (PR #193938)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LSROA] Add logical SROA pass (PR #192058)   Nathan Gauër via llvm-commits
• [llvm] a227dc7 - [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (#193737)   via llvm-commits
• [llvm] [DAG] visitIS_FPCLASS - fold to constant when result is fully determined by KnownFPClass (PR #193737)   Simon Pilgrim via llvm-commits
• [llvm] [AA] No synchronization effects for never-escaping identified local (PR #193939)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64] Lower BF16 FPTRUNC (PR #193941)   David Green via llvm-commits
• [llvm] [AArch64] Lower BF16 FPTRUNC (PR #193941)   via llvm-commits
• [llvm] 48e65b6 - [AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (#193345)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (PR #193345)   David Green via llvm-commits
• [llvm] [IR] Add require-logical-module module flag (PR #193502)   Nathan Gauër via llvm-commits
• [llvm] [TableGen] Added submulticlass typechecking to template arg values. (PR #112904)   Jay Foad via llvm-commits
• [compiler-rt] [compiler-rt][asan] Add AMDGPU ASan support via HSA API interceptors. (PR #192240)   Amit Kumar Pandey via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand WideCanIV into executable recipes (PR #191219)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AAEval] Print ModRefInfo for atomic operations (PR #193935)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][ELF] Add --print-relax-stats= to emit linker relaxation statistics (PR #193631)   Peter Smith via llvm-commits
• [llvm] [X86] Regenerate vector ext tests to show VPADD constant asm comments (PR #193942)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Regenerate vector ext tests to show VPADD constant asm comments (PR #193942)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - regenerate to show VPADD constant asm com… (PR #193943)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - regenerate to show VPADD constant asm com… (PR #193943)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - regenerate to show VPADD constant asm comments (PR #193943)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - regenerate to show VPADD constant asm comments (PR #193943)   Simon Pilgrim via llvm-commits
• [llvm] [TableGen] Added submulticlass typechecking to template arg values. (PR #112904)   Jay Foad via llvm-commits
• [llvm] c59c19b - [MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (#145722)   via llvm-commits
• [llvm] [MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (PR #145722)   Valery Pykhtin via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   via llvm-commits
• [llvm] [InstCombine] Fold neg arg in hyperbolic lib functions (PR #193586)   Martin Storsjö via llvm-commits
• [llvm] [SPIR-V] Matrix in struct pointer legalization (PR #193073)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] Matrix in struct pointer legalization (PR #193073)   Nathan Gauër via llvm-commits
• [llvm] [DAG] Re-add transitive users when FREEZE folds away (PR #193945)   Paweł Bylica via llvm-commits
• [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   via llvm-commits
• [llvm] [DAG] Re-add transitive users when FREEZE folds away (PR #193945)   via llvm-commits
• [llvm] [DAG] Re-add transitive users when FREEZE folds away (PR #193945)   via llvm-commits
• [llvm] [AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (PR #193859)   Jay Foad via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d` (PR #164213)   via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d` (PR #164213)   via llvm-commits
• [llvm] [AsmParser] Revamp how floating-point literals work in LLVM IR. (PR #190641)   Jay Foad via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Implement AT edit descriptor for Fortran 202X with appropriate handling and tests (PR #189157)   via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run JTFootprintReduction pass (PR #193946)   Amina Chabane via llvm-commits
• [llvm] [LLVM][CodeGen][RISCV] Avoid duplicate live-in copies and reuse existing virtual registers (PR #193947)   via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run JTFootprintReduction pass (PR #193946)   via llvm-commits
• [llvm] [LLVM][CodeGen][RISCV] Avoid duplicate live-in copies and reuse existing virtual registers (PR #193947)   via llvm-commits
• [llvm] [LLVM][CodeGen][RISCV] Avoid duplicate live-in copies and reuse existing virtual registers (PR #193947)   via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run JTFootprintReduction pass (PR #193946)   via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run JTFootprintReduction pass (PR #193946)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   Paul Walker via llvm-commits
• [llvm] c0844b7 - [X86] known-never-zero.ll - regenerate to show VPADD constant asm comments (#193943)   via llvm-commits
• [llvm] [X86] known-never-zero.ll - regenerate to show VPADD constant asm comments (PR #193943)   Simon Pilgrim via llvm-commits
• [llvm] e7edfd8 - [X86] Regenerate vector ext tests to show VPADD constant asm comments (#193942)   via llvm-commits
• [llvm] [X86] Regenerate vector ext tests to show VPADD constant asm comments (PR #193942)   Simon Pilgrim via llvm-commits
• [llvm] [AMDLIBM] Remove the mapping of the deleted vector call (PR #193760)   Rohit Aggarwal via llvm-commits
• [llvm] [VPlan] Remove unused LVer arg from tryToBuildVplanWithVPRecipes (NFC). (PR #193950)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove unused LVer arg from tryToBuildVplanWithVPRecipes (NFC). (PR #193950)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add SVE shuffle optimization pass (PR #193951)   Graham Hunter via llvm-commits
• [llvm] 1786190 - [LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d` (#164213)   via llvm-commits
• [llvm] [LoongArch] Custom legalize vector_shuffle to `xvshuf4i.d` (PR #164213)   via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [clang] [llvm] [Clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a add/add-and-subtract/subtract pairwise operations (PR #187527)   Amilendra Kodithuwakku via llvm-commits
• [llvm] [SystemZ] Support all instruction formats with `.insn` directive (PR #152667)   Dominik Steenken via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   via llvm-commits
• [llvm] [llvm][ADT] Add invalidate method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [llvm] [DAG] Re-add transitive users when FREEZE folds away (PR #193945)   via llvm-commits
• [llvm] [llvm][ADT] Add erase method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Yunbo Ni via llvm-commits
• [llvm] [llvm][ADT] Add erase method to ScopedHashTableScope (PR #193516)   lonely eagle via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [Support][JSON] Use `std::unordered_map` for object storage (PR #171230)   LLVM Continuous Integration via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64][GlobalISel] Protect against fdiv of 1 (PR #184063)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   David Sherwood via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [lld] [lld-macho] Relax safe ICF's keepUnique for ld64-coalesced data sections (PR #193125)   Zhaoxuan Jiang via llvm-commits
• [llvm] [InstCombine] Fold neg arg in hyperbolic lib functions (PR #193586)   Hongxu Xu via llvm-commits
• [lld] [lld-macho] Relax safe ICF's keepUnique for ld64-coalesced data sections (PR #193125)   Zhaoxuan Jiang via llvm-commits
• [llvm] [X86] freeze-binary.ll - regenerate to show VPADD constant asm comments (PR #193953)   Simon Pilgrim via llvm-commits
• [llvm] [X86] freeze-binary.ll - regenerate to show VPADD constant asm comments (PR #193953)   Simon Pilgrim via llvm-commits
• [llvm] e2170a0 - [VPlan] Remove unused LVer arg from tryToBuildVplanWithVPRecipes (NFC). (#193950)   via llvm-commits
• [llvm] [VPlan] Remove unused LVer arg from tryToBuildVplanWithVPRecipes (NFC). (PR #193950)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [Support][JSON] Use `std::unordered_map` for object storage (PR #171230)   LLVM Continuous Integration via llvm-commits
• [llvm] [GVN] Propagate isMemorySSAEnabled() into ValueTable (PR #193938)   Antonio Frighetto via llvm-commits
• [llvm] [GVN] Propagate isMemorySSAEnabled() into ValueTable (PR #193938)   Antonio Frighetto via llvm-commits
• [llvm] [GVN] Propagate isMemorySSAEnabled() into ValueTable (PR #193938)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   via llvm-commits
• [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   via llvm-commits
• [llvm] [SPIR-V] Reject OpSelect with scalar result and vector condition (PR #193745)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Dmitry Sidorov via llvm-commits
• [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   via llvm-commits
• [llvm] [SPIR-V] Reject OpSelect with scalar result and vector condition (PR #193745)   Arseniy Obolenskiy via llvm-commits
• [llvm] [Offload][AMDGPU] Use ROCr API for APU check (PR #193887)   Joseph Huber via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Fold neg arg in hyperbolic lib functions (PR #193586)   Martin Storsjö via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [openmp] [LoopTiling][Clang][MLIR] Canonical Intra-tile Loops (PR #191114)   Michael Kruse via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   via llvm-commits
• [llvm] [MLIR][Python] Create TD library for Python bindings TD files (PR #193853)   Sergei Lebedev via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   Amelia Jochna via llvm-commits
• [llvm] [SPIR-V] Reject OpSelect with scalar result and vector condition (PR #193745)   Dmitry Sidorov via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   via llvm-commits
• [llvm] [SPIR-V] Reject OpSelect with scalar result and vector condition (PR #193745)   Dmitry Sidorov via llvm-commits
• [llvm] [AArch64][llvm] Generate asm parser extension map from TableGen (NFC) (PR #191045)   Jonathan Thackray via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   Amelia Jochna via llvm-commits
• [llvm] [SLP] Skip FMulAdd conversion for alt-shuffle FAdd/FSub nodes (PR #193960)   Alexey Bataev via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Victor Mustya via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   Nikita Popov via llvm-commits
• [llvm] [SLP] Skip FMulAdd conversion for alt-shuffle FAdd/FSub nodes (PR #193960)   via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   Nikita Popov via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (PR #193580)   David Sherwood via llvm-commits
• [clang] [llvm] [Offload][libsycl][clang-sycl-linker] Simplify SYCL Offload wrapping (PR #193876)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offload][libsycl][clang-sycl-linker] Simplify SYCL Offload wrapping (PR #193876)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offload][libsycl][clang-sycl-linker] Simplify SYCL Offload wrapping (PR #193876)   Joseph Huber via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   Amelia Jochna via llvm-commits
• [llvm] [MIRParser] Allow undef subreg defs in SSA form (PR #189025)   Jay Foad via llvm-commits
• [llvm] [MIRParser] Allow undef subreg defs in SSA form (PR #189025)   Jay Foad via llvm-commits
• [llvm] [RISCV] Prefer SP over FP for frame index access when offset fits within compressed immediate range. (PR #193962)   Garvit Gupta via llvm-commits
• [llvm] [GVN] Propagate isMemorySSAEnabled() into ValueTable (PR #193938)   Madhur Amilkanthwar via llvm-commits
• [llvm] [RISCV] Prefer SP over FP for frame index access when offset fits within compressed immediate range. (PR #193962)   via llvm-commits
• [llvm] 7b68b4b - [lldb][docs] Document AArch64 Linux Permission Overlay support (#184119)   via llvm-commits
• [lldb] [llvm] [lldb][docs] Document AArch64 Linux Permission Overlay support (PR #184119)   David Spickett via llvm-commits
• [llvm] [RISCV] Prefer SP over FP for frame index access when offset fits within compressed immediate range. (PR #193962)   Garvit Gupta via llvm-commits
• [llvm] 629f815 - [X86] freeze-binary.ll - regenerate to show VPADD constant asm comments (#193953)   via llvm-commits
• [llvm] [X86] freeze-binary.ll - regenerate to show VPADD constant asm comments (PR #193953)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   via llvm-commits
• [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   via llvm-commits
• [llvm] [DAG] Re-add transitive users when FREEZE folds away (PR #193945)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Lower BF16 FPTRUNC (PR #193941)   David Green via llvm-commits
• [llvm] [MC] Move addEncodingComment() into new base class MCAsmBaseStreamer (PR #188585)   Amy Kwan via llvm-commits
• [llvm] [AVR] Fix a bug in printing assembly operand with extra code (PR #193964)   Ben Shi via llvm-commits
• [llvm] [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (PR #164561)   via llvm-commits
• [llvm] [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (PR #164561)   via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   Nikita Popov via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run JTFootprintReduction pass (PR #193946)   Asher Dobrescu via llvm-commits
• [llvm] [MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (PR #145722)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-objcopy] Mark compression options unsupported except on ELF (PR #193965)   Martin Storsjö via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Nikita Popov via llvm-commits
• [llvm] [llvm-objcopy] Mark compression options unsupported except on ELF (PR #193965)   via llvm-commits
• [llvm] [llvm-objcopy] Mark compression options unsupported except on ELF (PR #193965)   Martin Storsjö via llvm-commits
• [llvm] [Lit][NFC] Refactor shell environment functionality and in-process builtins from TestRunner.py into new modules (Reopened) (PR #177358)   LLVM Continuous Integration via llvm-commits
• [llvm] [AVR] Fix a bug in printing assembly operand with extra code (PR #193964)   Ben Shi via llvm-commits
• [clang] [llvm] [Clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a add/add-and-subtract/subtract pairwise operations (PR #187527)   Amilendra Kodithuwakku via llvm-commits
• [clang] [llvm] [Clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a Two-way signed/unsigned absolute difference sum and accumulate long ops (PR #188972)   Amilendra Kodithuwakku via llvm-commits
• [llvm] [llvm-objcopy] Mark compression options unsupported except on ELF (PR #193965)   James Henderson via llvm-commits
• [clang] [llvm] WIP - [Distributed ThinLTO] Support Unicode characters (PR #193931)   Ben Dunbobbin via llvm-commits
• [clang] [llvm] WIP - [Distributed ThinLTO] Support Unicode characters (PR #193931)   Ben Dunbobbin via llvm-commits
• [clang] [llvm] WIP - [Distributed ThinLTO] Support Unicode characters (PR #193931)   Ben Dunbobbin via llvm-commits
• [llvm] [BOLT] [PowerPC] Port (PR #140894)   via llvm-commits
• [llvm] [AArch64] Lower BF16 FPTRUNC (PR #193941)   Matt Arsenault via llvm-commits
• [llvm] [MCP][NFC] Add Cost modelling for EliminateSpillageCopies (PR #193905)   Matt Arsenault via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Fix iota_range assertion when OtherMarks is empty in mergeAsyncMarks() (PR #193499)   Robert Imschweiler via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Implement AT edit descriptor for Fortran 202X with appropriate handling and tests (PR #189157)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Implement AT edit descriptor for Fortran 202X with appropriate handling and tests (PR #189157)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Implement AT edit descriptor for Fortran 202X with appropriate handling and tests (PR #189157)   Eugene Epshteyn via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE Armv9.7 matrix multiply-accumulate intrinsics (PR #193017)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   Jonathan Thackray via llvm-commits
• [llvm] [RISCV] Prefer SP over FP for frame index access when offset fits within compressed immediate range. (PR #193962)   via llvm-commits
• [llvm] [RISCV] Prefer SP over FP for frame index access when offset fits within compressed immediate range. (PR #193962)   via llvm-commits
• [llvm] [MCP][NFC] Add Cost modelling for EliminateSpillageCopies (PR #193905)   Jack Styles via llvm-commits
• [llvm] [AArch64][llvm] Redefine some insns as an alias of `SYS` (PR #187004)   Jonathan Thackray via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Jay Foad via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Jay Foad via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Jay Foad via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Jay Foad via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Jay Foad via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run JTFootprintReduction pass (PR #193946)   Paschalis Mpeis via llvm-commits
• [llvm] [ADT] Bitset: add shift operators, word accessors, and etc (PR #193400)   Robert Imschweiler via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ddiv family to header-only (PR #182149)   Muhammad Bassiouni via llvm-commits
• [llvm] [llvm] Introduce TargetInfo (PR #190730)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   Peter Smith via llvm-commits
• [llvm] [SPIR-V] Reject OpSelect with scalar result and vector condition (PR #193745)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [llvm][ADT] Add erase method to ScopedHashTableScope (PR #193516)   Mehdi Amini via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run JTFootprintReduction pass (PR #193946)   Amina Chabane via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Jay Foad via llvm-commits
• [llvm] [BOLT] Add pre-parsed perf script support (PR #163785)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Add pre-parsed perf script support (PR #163785)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Add pre-parsed perf script support (PR #163785)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Add pre-parsed perf script support (PR #163785)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Add pre-parsed perf script support (PR #163785)   Paschalis Mpeis via llvm-commits
• [llvm] [AMDGPU] Fix lowering of canonicalize when amdgpu-ieee is disabled (PR #175867)   Jay Foad via llvm-commits
• [llvm] [BOLT] Add pre-parsed perf script support (PR #163785)   Paschalis Mpeis via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [X86] Improve FREEZE node elimination for SETCC operations (PR #192362)   Paweł Bylica via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Matthew Devereau via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Matthew Devereau via llvm-commits
• [llvm] [SelectionDAG][AArch64] Legalize vector.[de]interleave6 (PR #193723)   Matthew Devereau via llvm-commits
• [llvm] [AMDGPU] Add attribute to disable vopd formation (PR #193977)   David Stuttard via llvm-commits
• [llvm] [AMDGPU] Add attribute to disable vopd formation (PR #193977)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   Muhammad Bassiouni via llvm-commits
• [llvm] XCOFF no inline ptr glue (PR #193786)   Sean Fertile via llvm-commits
• [llvm] [VPlan] Directly use masks on recipes in dropPoisonGen (PR #193978)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Shilei Tian via llvm-commits
• [libc] [llvm] [libc][math] Refactor dsub family to header-only (PR #182160)   via llvm-commits
• [llvm] [AMDGPU] Add attribute to disable vopd formation (PR #193977)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Directly use masks on recipes in dropPoisonGen (PR #193978)   via llvm-commits
• [llvm] [VPlan] Use early continue in ::buildVPlansWithVPRecipes (NFC). (PR #193979)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use early continue in ::buildVPlansWithVPRecipes (NFC). (PR #193979)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Fix lowering of canonicalize when amdgpu-ieee is disabled (PR #175867)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add attribute to disable vopd formation (PR #193977)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix lowering of canonicalize when amdgpu-ieee is disabled (PR #175867)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Ivan Kosarev via llvm-commits
• [llvm] [Support][APInt] Fix sign extension, exponent and mantissa in APInt::roundToDouble (PR #192451)   Andi Drebes via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Joe Nash via llvm-commits
• [clang] [llvm] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   David Green via llvm-commits
• [llvm] [Support][APInt] Fix sign extension, exponent and mantissa in APInt::roundToDouble (PR #192451)   Andi Drebes via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix lowering of canonicalize when amdgpu-ieee is disabled (PR #175867)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] reduce duplicated inv trig helpers (PR #191364)   via llvm-commits
• [clang] [llvm] [mlir] [openmp] [LoopTiling][Clang][MLIR] Canonical Intra-tile Loops (PR #191114)   Amit Tiwari via llvm-commits
• [llvm] [ADT] Bitset: add shift operators, word accessors, and etc (PR #193400)   Robert Imschweiler via llvm-commits
• [llvm] [PowerPC] support tail call optimization on AIX tail call (PR #161690)   zhijian lin via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Jay Foad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   Muhammad Bassiouni via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Piotr Balcer via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Piotr Balcer via llvm-commits
• [llvm] [DAGCombiner] Slightly simplify code in visitBSWAP. NFC (PR #193896)   Jay Foad via llvm-commits
• [llvm] [Dexter] Add timestamps to DAP logging (PR #193705)   Stephen Tozer via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Piotr Balcer via llvm-commits
• [clang] [llvm] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   via llvm-commits
• [clang] [llvm] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   Muhammad Bassiouni via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Ivan Kosarev via llvm-commits
• [llvm] [PowerPC] fixed issue "Failure to optimize (x == 0) ? 0xFF : 0 to addic+subfe instead of cntlzw+srwi+neg" (PR #190606)   zhijian lin via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Joe Nash via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (PR #193859)   Adel Ejjeh via llvm-commits
• [llvm] [SPIRV] Add support for SPV_KHR_abort extension (PR #193037)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (PR #193580)   Philip Reames via llvm-commits
• [llvm] [LangRef][AMDGPU] Specify that syncscope can cause atomic operations to race (PR #189015)   via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix lowering of canonicalize when amdgpu-ieee is disabled (PR #175867)   Jay Foad via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Xinlong Chen via llvm-commits
• [clang] [llvm] [aarch64] Add more MSVC intrinsics (PR #193221)   Adhemerval Zanella via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] 785d724 - [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (#193974)   via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (PR #193859)   Jay Foad via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (PR #193580)   David Sherwood via llvm-commits
• [clang] [llvm] [aarch64] Add more MSVC intrinsics (PR #193221)   Adhemerval Zanella via llvm-commits
• [llvm] [AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (PR #193859)   via llvm-commits
• [llvm] [AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (PR #193859)   Adel Ejjeh via llvm-commits
• [llvm] WIP POC for clang-tidy attributes for methods / classes (PR #192683)   via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] 0899273 - [VPlan] Use early continue in ::buildVPlansWithVPRecipes (NFC). (#193979)   via llvm-commits
• [llvm] [VPlan] Use early continue in ::buildVPlansWithVPRecipes (NFC). (PR #193979)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Directly use masks on recipes in dropPoisonGen (PR #193978)   via llvm-commits
• [llvm] [VPlan] Directly use masks on recipes in dropPoisonGen (PR #193978)   via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (PR #193859)   Adel Ejjeh via llvm-commits
• [llvm] [AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (PR #193859)   Adel Ejjeh via llvm-commits
• [llvm] [VPlan] Directly use masks on recipes in dropPoisonGen (PR #193978)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [DAG] Re-add transitive users when FREEZE folds away (PR #193945)   Paweł Bylica via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (PR #193986)   Matt Davis via llvm-commits
• [llvm] [AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (PR #193986)   via llvm-commits
• [llvm] [DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (PR #193987)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   Muhammad Bassiouni via llvm-commits
• [llvm] [AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (PR #193986)   via llvm-commits
• [llvm] [AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (PR #193986)   Matt Davis via llvm-commits
• [llvm] [DAG] Re-add transitive users when FREEZE folds away (PR #193945)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   via llvm-commits
• [clang] [llvm] [Offload][libsycl][clang-sycl-linker] Simplify SYCL Offload wrapping (PR #193876)   Nick Sarnie via llvm-commits
• [clang] [llvm] [Offload][libsycl][clang-sycl-linker] Simplify SYCL Offload wrapping (PR #193876)   Nick Sarnie via llvm-commits
• [clang] [llvm] [Offload][libsycl][clang-sycl-linker] Simplify SYCL Offload wrapping (PR #193876)   Nick Sarnie via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   Ehsan Amiri via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Florian Hahn via llvm-commits
• [libc] [llvm] [libc][math] Refactor ddiv family to header-only (PR #182149)   via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   via llvm-commits
• [llvm] Revert "[PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (#193580) (PR #193990)   Philip Reames via llvm-commits
• [llvm] [PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (PR #193580)   Philip Reames via llvm-commits
• [llvm] Revert "[PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (#193580) (PR #193990)   via llvm-commits
• [llvm] [dsymutil] Handle DW_OP_GNU_push_tls_address in markEverythingAsKept (PR #193870)   Jonas Devlieghere via llvm-commits
• [llvm] Revert "[PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (#193580) (PR #193990)   David Sherwood via llvm-commits
• [llvm] [dsymutil] Handle DW_OP_GNU_push_tls_address in markEverythingAsKept (PR #193870)   Jonas Devlieghere via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Florian Hahn via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   Ehsan Amiri via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Shilei Tian via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   Ehsan Amiri via llvm-commits
• [clang] [llvm] [mlir] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [mlir] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   via llvm-commits
• [clang] [llvm] [mlir] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   Jonathan Thackray via llvm-commits
• [llvm] [DAG] Re-add transitive users when FREEZE folds away (PR #193945)   Paweł Bylica via llvm-commits
• [clang] [llvm] [mlir] [AArch64][llvm][clang] Remove `int_aarch64_sve_bfmmla` and reuse existing def (NFC) (PR #193970)   Jonathan Thackray via llvm-commits
• [llvm] [LLVM][Intrinsics] Add validation for vararg intrinsics (PR #193777)   Rahul Joshi via llvm-commits
• [compiler-rt] 87a9cba - [compiler-rt][TySan] Add Hexagon target support (#191603)   via llvm-commits
• [compiler-rt] [compiler-rt][TySan] Add Hexagon target support (PR #191603)   Brian Cain via llvm-commits
• [llvm] [RISCV] Expand fcanonicalize on vector types (PR #193842)   Philip Reames via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Thomas Fry via llvm-commits
• [llvm] [FileCheck] --dump-input: Elide middle of underlines for no-match (PR #192908)   Joel E. Denny via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   Ehsan Amiri via llvm-commits
• [llvm] Revert "[PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (#193580) (PR #193990)   Philip Reames via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   Ehsan Amiri via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] [DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (PR #193987)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Xinlong Chen via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] [DAG] computeKnownFPClass - add ISD::FCOPYSIGN handling (PR #193672)   Xinlong Chen via llvm-commits
• [llvm] Ut tests (PR #192995)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Nick Sarnie via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Nick Sarnie via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Nick Sarnie via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Nick Sarnie via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU][Disassembler] Permit unneeded VOPD3 operands to be non-zero (PR #193974)   Jay Foad via llvm-commits
• [llvm] cd4ac81 - [SLP] Add new test for widened strided loads of > i8 width (#193901)   via llvm-commits
• [llvm] [SLP] Add new test for widened strided loads of > i8 width (PR #193901)   Ryan Buchner via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Maksim Ivanov via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Viktoria Maximova via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Viktoria Maximova via llvm-commits
• [llvm] [SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Viktoria Maximova via llvm-commits
• [llvm] [AMDGPU] Introduce GCNPostGenericScheduler to model MFMA-VALU coexecution (PR #184084)   Frederik Harwath via llvm-commits
• [llvm] [DAGCombine] Relax restriction on (bswap shl(x, c)) combine (PR #193679)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][RISCV] Optimize fcopysign for fixed vectors (PR #193802)   Craig Topper via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [llvm][RISCV] Optimize fcopysign for fixed vectors (PR #193802)   Craig Topper via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [LLVM][CodeGen][RISCV] Avoid duplicate live-in copies and reuse existing virtual registers (PR #193947)   Craig Topper via llvm-commits
• [llvm] 1bd6f66 - Revert "[PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (#193580) (#193990)   via llvm-commits
• [llvm] Revert "[PreISelIntrinsicLowering] Expand binary elementwise intrinsics (#193552) (#193580) (PR #193990)   Philip Reames via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   via llvm-commits
• [llvm] [RISCV] Expand fcanonicalize on vector types (PR #193842)   Craig Topper via llvm-commits
• [llvm] [Lit] Change processRedirects to open all files in binary/append mode (PR #193993)   Benjamin Stott via llvm-commits
• [llvm] [Lit] Change processRedirects to open all files in binary/append mode (PR #193993)   via llvm-commits
• [llvm] [DAGcombine] Recognize fneg on RHS for partial_reduce_fmla (PR #193994)   Sander de Smalen via llvm-commits
• [llvm] [DAGcombine] Recognize fneg on RHS for partial_reduce_fmla (PR #193994)   via llvm-commits
• [llvm] [AMDGPU][NFC] Refactor TryGetMCExprValue into evaluateMCExprs helper (PR #193859)   Jay Foad via llvm-commits
• [llvm] [SLP] Update analyzeRtStrideCandidate() to correctly handle revectorization (PR #191878)   Alexey Bataev via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect liveness analysis (PR #193104)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   David Sherwood via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Sanitise pow inputs using a target DAG combine (PR #192958)   David Sherwood via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Implement AT edit descriptor for Fortran 202X with appropriate handling and tests (PR #189157)   via llvm-commits
• [llvm] [DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (PR #193987)   Simon Pilgrim via llvm-commits
• [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   Eli Friedman via llvm-commits
• [llvm] [DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (PR #193987)   via llvm-commits
• [compiler-rt] [compiler-rt] Fix standalone GPU builds and permit LLVM_DEFAULT_TARGET_TRIPLE (PR #185545)   Joseph Huber via llvm-commits
• [llvm] Add LIT_UNSUPPORTED support to lit testing (PR #193766)   Lei Huang via llvm-commits
• [llvm] [SLP] Update analyzeRtStrideCandidate() to correctly handle revectorization (PR #191878)   Ryan Buchner via llvm-commits
• [compiler-rt] [compiler-rt] Fix standalone GPU builds and permit LLVM_DEFAULT_TARGET_TRIPLE (PR #185545)   Joseph Huber via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Craig Topper via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   Nikita Popov via llvm-commits
• [llvm] [AArch64][NFC] Fix veclib-llvm.pow.ll test to run all pre-isel passes (PR #193996)   David Sherwood via llvm-commits
• [llvm] deb84db - [DirectX] Apply DXIL op fnattrs to declarations (#193622)   via llvm-commits
• [llvm] [DirectX] Apply DXIL op fnattrs to declarations (PR #193622)   Justin Bogner via llvm-commits
• [llvm] [AArch64][NFC] Fix veclib-llvm.pow.ll test to run all pre-isel passes (PR #193996)   via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Remove instsimplify pass run from all tests (PR #193722)   David Sherwood via llvm-commits
• [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   Nikita Popov via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [llvm] CodeGen: Fix double counting bundles in inst size verification (PR #191460)   Matt Arsenault via llvm-commits
• [llvm] [InlineSpiller] Fix live-range update in hoisting within bb (PR #193880)   Quentin Colombet via llvm-commits
• [llvm] [AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (PR #193986)   David Blaikie via llvm-commits
• [llvm] [AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (PR #193986)   David Blaikie via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   Min-Yih Hsu via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   Min-Yih Hsu via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run CMOVConversion pass (PR #193998)   Amina Chabane via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   Min-Yih Hsu via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run CMOVConversion pass (PR #193998)   via llvm-commits
• [llvm] CodeGen: Fix double counting bundles in inst size verification (PR #191460)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][InstCombine] Optimize constant shuffle patterns (PR #192246)   Aleksandar Spasojevic via llvm-commits
• [llvm] [AMDGPU][InstCombine] Optimize constant shuffle patterns (PR #192246)   Aleksandar Spasojevic via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run CMOVConversion pass (PR #193998)   Asher Dobrescu via llvm-commits
• [llvm] [VPlan] Simplify WidenGEP::execute (NFC) (PR #193543)   Andrei Elovikov via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   Ehsan Amiri via llvm-commits
• [llvm] [AMDGPU][InstCombine] Optimize constant shuffle patterns (PR #192246)   Aleksandar Spasojevic via llvm-commits
• [llvm] [LAA] Enable diff checks for non-unit constant stride (PR #188826)   Andrei Elovikov via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] [CodeGen] Add <2 x i128> value type (PR #193910)   Craig Topper via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   Ehsan Amiri via llvm-commits
• [llvm] [LAA] Allow vectorizing `A[NonZeroNonConstantStride*I] += 1` (PR #186262)   Andrei Elovikov via llvm-commits
• [llvm] [Support][APInt] Fix sign extension, exponent and mantissa in APInt::roundToDouble (PR #192451)   Eli Friedman via llvm-commits
• [llvm] [DebugInfo][test] Remove irrelevant problematic lines. (PR #177691)   Mikhail Gudim via llvm-commits
• [llvm] [Support][APInt] Fix sign extension, exponent and mantissa in APInt::roundToDouble (PR #192451)   Eli Friedman via llvm-commits
• [clang] [llvm] [PowerPC] Add AES Builtins (PR #186895)   Lei Huang via llvm-commits
• [llvm] [DAGcombine] Recognize fneg on RHS for partial_reduce_fmla (PR #193994)   Paul Walker via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   Ehsan Amiri via llvm-commits
• [clang] [compiler-rt] [Clang][CodeGen] Report when an alias points to an incompatible target (PR #192397)   Eli Friedman via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   Ehsan Amiri via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   via llvm-commits
• [llvm] [AMDGPU] Add attribute to disable vopd formation (PR #193977)   David Stuttard via llvm-commits
• [llvm] [Analysis][RISCV] More accurately estimate the cost of strided vector loads (PR #175135)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Add attribute to disable vopd formation (PR #193977)   David Stuttard via llvm-commits
• [llvm] [DirectX] Denote `dx.resource.getpointer` with `IntrInaccessibleMemOnly` and `IntrReadMem` (PR #193593)   Finn Plummer via llvm-commits
• [llvm] [X86][utils] Support `-basic-block-sections` in `update_llc_test_checks` (PR #178999)   Mikhail Gudim via llvm-commits
• [llvm] [DirectX] Denote `dx.resource.getpointer` with `IntrInaccessibleMemOnly` and `IntrReadMem` (PR #193593)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Resolve unreachable default branches in switch statements (PR #193592)   Finn Plummer via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RISCV] Prefer SP over FP for frame index access when offset fits within compressed immediate range. (PR #193962)   Craig Topper via llvm-commits
• [llvm] [llvm] Introduce TargetInfo (PR #190730)   Nikita Popov via llvm-commits
• [llvm] 1823355 - [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (#185898)   via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][SelectionDAG] Don't assume masked loads access all lanes in memory. (PR #192706)   Paul Walker via llvm-commits
• [llvm] [LLVM][SelectionDAG] Don't assume masked loads access all lanes in memory. (PR #192706)   Paul Walker via llvm-commits
• [llvm] [LLVM][SelectionDAG] Don't assume masked loads access all lanes in memory. (PR #192706)   Paul Walker via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [Lit] Change processRedirects to open all files in binary/append mode (PR #193993)   Benjamin Stott via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] e8f32ab - CodeGen: Fix double counting bundles in inst size verification (#191460)   via llvm-commits
• [llvm] CodeGen: Fix double counting bundles in inst size verification (PR #191460)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Implement getInstSizeVerifyMode (PR #191461)   Matt Arsenault via llvm-commits
• [llvm] [AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (PR #193986)   Matt Davis via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] [SimpleLoopUnswitch] Generalize the notion of trivial unswitching (PR #193989)   via llvm-commits
• [clang] [llvm] [RegAlloc] [X86] Enable callee saved register optimization for x86 (PR #188609)   via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] [1/3][AMDGPU][NFC] Add virtual prefix to GCN LiveRegs and Pressure. (PR #183673)   Dhruva Chakrabarti via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] cbda767 - [ThinLTO] Reduce the number of renaming due to promotions in distribu… (#188074)   via llvm-commits
• [llvm] [ThinLTO] Reduce the number of renaming due to promotions in distribu… (PR #188074)   via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] [1/3][AMDGPU][NFC] Add virtual prefix to GCN LiveRegs. (PR #183673)   Dhruva Chakrabarti via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] [Lit] Change processRedirects to open all files in binary/append mode (PR #193993)   Benjamin Stott via llvm-commits
• [llvm] [SLP] Skip FMulAdd conversion for alt-shuffle FAdd/FSub nodes (PR #193960)   via llvm-commits
• [llvm] [AArch64][SVE] Support SVE load/store non-zero address space pointers (#183265) (PR #184197)   Paul Walker via llvm-commits
• [llvm] [AArch64][SVE] Support SVE load/store non-zero address space pointers (#183265) (PR #184197)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold umax/umin with NUW-shifted operand and constant (PR #193959)   Yingwei Zheng via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   LLVM Continuous Integration via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] df359d8 - [SLP] Skip FMulAdd conversion for alt-shuffle FAdd/FSub nodes (#193960)   via llvm-commits
• [llvm] [SLP] Skip FMulAdd conversion for alt-shuffle FAdd/FSub nodes (PR #193960)   Alexey Bataev via llvm-commits
• [llvm] 63e3675 - [DirectX] Denote `dx.resource.getpointer` with `IntrInaccessibleMemOnly` and `IntrReadMem` (#193593)   via llvm-commits
• [llvm] [DirectX] Denote `dx.resource.getpointer` with `IntrInaccessibleMemOnly` and `IntrReadMem` (PR #193593)   Finn Plummer via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Austin Kerbow via llvm-commits
• [llvm] [ARM] Port LowerSELECTWithCmpZero to ARM (PR #151890)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ddiv family to header-only (PR #182149)   via llvm-commits
• [llvm] [ARM] Port LowerSELECTWithCmpZero to ARM (PR #151890)   via llvm-commits
• [llvm] [ARM] Port LowerSELECTWithCmpZero to ARM (PR #151890)   via llvm-commits
• [llvm] [AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (PR #193986)   Matt Davis via llvm-commits
• [llvm] [ARM] Optimize Select with identity folds in LowerSELECTWithCmpZero for … (PR #151890)   via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   via llvm-commits
• [llvm] [ARM] Optimize Select with identity folds in LowerSELECTWithCmpZero for Thumb (PR #151890)   via llvm-commits
• [llvm] [AsmPrinter][debug] Materialize abstract lexical blocks referenced by global vars (PR #193986)   Matt Davis via llvm-commits
• [clang] [llvm] [DirectX] Emit `dx.precise` metadata when using `-Gis` flag (PR #192526)   via llvm-commits
• [llvm] [ADT] Bitset: add shift operators, word accessors, and etc (PR #193400)   Jiachen Yuan via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Implement AT edit descriptor for Fortran 202X with appropriate handling and tests (PR #189157)   via llvm-commits
• [llvm] b06f62f - [llvm] Introduce TargetInfo (#190730)   via llvm-commits
• [llvm] [DAGcombine] Recognize fneg on RHS for partial_reduce_fmla (PR #193994)   Matt Arsenault via llvm-commits
• [llvm] [llvm] Introduce TargetInfo (PR #190730)   via llvm-commits
• [llvm] [DAGcombine] Recognize fneg on RHS for partial_reduce_fmla (PR #193994)   Matt Arsenault via llvm-commits
• [lld] [llvm] [lld][MachO] Add ARM64e pointer authentication linking support (PR #188378)   Oskar Wirga via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] Refactor ddiv family to header-only (PR #182149)   via llvm-commits
• [llvm] [InstCombine] Enable factorizeMinMaxTree for floating-point values (PR #193195)   Yingwei Zheng via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Matt Arsenault via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt] Fix standalone GPU builds and permit LLVM_DEFAULT_TARGET_TRIPLE (PR #185545)   Petr Hosek via llvm-commits
• [llvm] [DirectX] Resolve unreachable default branches in switch statements (PR #193592)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Resolve unreachable default branches in switch statements (PR #193592)   Finn Plummer via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Erdem Yılmaz via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Serge Pavlov via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Joe Nash via llvm-commits
• [llvm] [AMDGPU][True16] revert D16Write32BitVgpr flag and workaround, and add a D16LoadBug flag (PR #193074)   Joe Nash via llvm-commits
• [libc] [libcxx] [llvm] libcxx build test (PR #193840)   Schrodinger ZHU Yifan via llvm-commits
• [llvm] XCOFF no inline ptr glue (PR #193786)   Lei Huang via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run CMOVConversion pass (PR #193998)   Paschalis Mpeis via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [IR] Add require-logical-module module flag (PR #193502)   Justin Bogner via llvm-commits
• [llvm] [z/OS] Mark shtest-ulimit-nondarwin.py unsupported on zos. (PR #194016)   via llvm-commits
• [llvm] [z/OS] Mark shtest-ulimit-nondarwin.py unsupported on zos. (PR #194016)   via llvm-commits
• [llvm] [ARM] Optimize Select with identity folds in LowerSELECTWithCmpZero for Thumb (PR #151890)   via llvm-commits
• [llvm] [SLP] Update analyzeRtStrideCandidate() to correctly handle revectorization (PR #191878)   Alexey Bataev via llvm-commits
• [llvm] [SPIR-V][NewPM] Register IR-level passes with the new pass manager (PR #193660)   LLVM Continuous Integration via llvm-commits
• [llvm] [IR] Add require-logical-module module flag (PR #193502)   Nikita Popov via llvm-commits
• [llvm] [GIsel] Add constant-folding for bit-counting ops (PR #194010)   Matt Arsenault via llvm-commits
• [llvm] [GIsel] Add constant-folding for bit-counting ops (PR #194010)   Matt Arsenault via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossDiagonal intrinsic support (PR #188567)   Steven Perron via llvm-commits
• [llvm] [NewPM] Port for AArch64StackTaggingPreRA (PR #194021)   Anshul Nigham via llvm-commits
• [llvm] [LLVM][SelectionDAG] Don't assume masked loads access all lanes in memory. (PR #192706)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Debug insns must not affect liveness analysis (PR #193104)   via llvm-commits
• [llvm] [GlobalISel][KnownBits] Use KnownBits::urem for G_UREM (PR #193455)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][KnownBits] Use KnownBits::urem for G_UREM (PR #193455)   Matt Arsenault via llvm-commits
• [clang] [llvm] Option to control signaling NaN support (PR #193055)   Nikita Popov via llvm-commits
• [llvm] [SLP] Refine loop-aware gather cost and admit sibling-loop subtrees (PR #192801)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Account for GEP pointer-chain cost when root scalars feed load/store indices (PR #192726)   Alexey Bataev via llvm-commits
• [clang] [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Alexey Bataev via llvm-commits
• [clang] [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   via llvm-commits
• [llvm] [SLP] Support ordered fadd reduction via reduction intrinsics (PR #189451)   Alexey Bataev via llvm-commits
• [clang] [llvm] Don't optimize out no-op atomics in kernel mode (PR #193562)   via llvm-commits
• [llvm] 600efe3 - AMDGPU: Implement getInstSizeVerifyMode (#191461)   via llvm-commits
• [llvm] AMDGPU: Implement getInstSizeVerifyMode (PR #191461)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][SelectionDAG] Don't assume masked loads access all lanes in memory. (PR #192706)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   Muhammad Bassiouni via llvm-commits
• [lld] 719c380 - [NFC][lld] Avoid hex address case sensitivity in fill-trap tests (#194037)   via llvm-commits
• [lld] [NFC][lld] Avoid hex address case sensitivity in fill-trap tests (PR #194037)   Vitaly Buka via llvm-commits
• [llvm] [ASan] Optionally emit DInfo for inserted sanitization calls (PR #191548)   Emil Tsalapatis via llvm-commits
• [libc] [llvm] [libc][math] Refactor fabs family to header-only (PR #182173)   via llvm-commits
• [llvm] [SLP]Do not cache sentinel position for SplitVectorize nodes (PR #194038)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Do not cache sentinel position for SplitVectorize nodes (PR #194038)   via llvm-commits
• [llvm] [SLP]Do not cache sentinel position for SplitVectorize nodes (PR #194038)   via llvm-commits
• [llvm] [BOLT][AArch64] Refuse to run CMOVConversion pass (PR #193998)   Maksim Panchenko via llvm-commits
• [llvm] [ASan] Optionally emit DInfo for inserted sanitization calls (PR #191548)   Vitaly Buka via llvm-commits
• [llvm] ad5a760 - [SLP]Do not cache sentinel position for SplitVectorize nodes   via llvm-commits
• [llvm] [SLP]Do not cache sentinel position for SplitVectorize nodes (PR #194038)   Alexey Bataev via llvm-commits
• [llvm] [dsymutil] Handle DW_OP_GNU_push_tls_address in markEverythingAsKept (PR #193870)   Jonas Devlieghere via llvm-commits
• [llvm] [dsymutil] Handle DW_OP_GNU_push_tls_address in markEverythingAsKept (PR #193870)   Jonas Devlieghere via llvm-commits
• [llvm] [dsymutil] Report error when section offsets exceed DWARF32 limit (PR #193867)   Jonas Devlieghere via llvm-commits
• [llvm] [VPlan] Factor vputils::shouldNarrow (NFC) (PR #193572)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SPIR-V] Matrix in struct pointer legalization (PR #193073)   Steven Perron via llvm-commits
• [llvm] [AMDGPU][MC] update USER_SGPR_COUNT bits for GFX1250 (PR #192579)   Matt Arsenault via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Eugene Epshteyn via llvm-commits
• [llvm] [PowerPC] Fix assert which caused by PR 190606 (PR #194040)   zhijian lin via llvm-commits
• [llvm] [PowerPC] Fix assert which caused by PR 190606 (PR #194040)   via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Michael Berg via llvm-commits
• [llvm] [Attributor] Support SPIR-V address spaces (PR #192725)   Nick Sarnie via llvm-commits
• [llvm] [Attributor] Support SPIR-V address spaces (PR #192725)   Nick Sarnie via llvm-commits
• [llvm] [Attributor] Support SPIR-V address spaces (PR #192725)   Nick Sarnie via llvm-commits
• [llvm] [Offload][AMDGPU] Use ROCr API for APU check (PR #193887)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offload][libsycl][clang-sycl-linker] Simplify SYCL Offload wrapping (PR #193876)   Joseph Huber via llvm-commits
• [llvm] [llvm] Implement the BPF ABI (PR #194031)   via llvm-commits
• [llvm] [SPIR-V] Matrix in struct pointer legalization (PR #193073)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Matrix in struct pointer legalization (PR #193073)   Steven Perron via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] Revert "[Support][JSON] Use `std::unordered_map` for object storage" (PR #193549)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [RFC][DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [RFC][DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [InstCombine] narrow vector stores with undef/poison suffix (PR #194042)   via llvm-commits
• [llvm] [InstCombine] narrow vector stores with undef/poison suffix (PR #194042)   via llvm-commits
• [clang] [llvm] [clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a shift operations (PR #186087)   Amilendra Kodithuwakku via llvm-commits
• [llvm] [LLVM][SelectionDAG] Don't assume masked loads access all lanes in memory. (PR #192706)   David Green via llvm-commits
• [llvm] [RFC][DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] [RFC][DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] workflows/issue-release-workflow: Use GitHub app for generating tokens (PR #193825)   via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Joseph Huber via llvm-commits
• [llvm] [mlir] [XeGPU][Transform] Add XeGPU array length optimization pass (PR #194062)   Md Abdullah Shahneous Bari via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [llvm] [PowerPC] Fix assert which caused by PR 190606 (PR #194040)   Nathan Chancellor via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Craig Topper via llvm-commits
• [libc] [llvm] [libc][math] Refactor dsub family to header-only (PR #182160)   Muhammad Bassiouni via llvm-commits
• [llvm] [RFC][DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc][math] Refactor dsub family to header-only (PR #182160)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor dsub family to header-only (PR #182160)   Muhammad Bassiouni via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Joseph Huber via llvm-commits
• [llvm] [NewPM] Port for AArch64StackTaggingPreRA (PR #194021)   Anshul Nigham via llvm-commits
• [llvm] 2b43da5 - [NewPM] Port for AArch64StackTaggingPreRA (#194021)   via llvm-commits
• [llvm] [NewPM] Port for AArch64StackTaggingPreRA (PR #194021)   Anshul Nigham via llvm-commits
• [llvm] [AMDGPU] Add `.amdgpu.info` section for per-function metadata (PR #192384)   Shilei Tian via llvm-commits
• [llvm] [IR][FunctionAttrs] Clarify memory effects of atomics (PR #193768)   Nikita Popov via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Flang] Move builtin .mod generation into runtimes (Reapply #137828) (PR #171515)   Michael Kruse via llvm-commits
• [clang] [llvm] [DirectX] Emit `dx.precise` metadata when fast math is not present (PR #192526)   via llvm-commits
• [llvm] 5536a4c - [LFI][AArch64] Add rewrites for control flow (#192602)   via llvm-commits
• [llvm] [LFI][AArch64] Add rewrites for control flow (PR #192602)   Zachary Yedidia via llvm-commits
• [llvm] [offload] Fix compilation (PR #194081)   Ivan R. Ivanov via llvm-commits
• [llvm] [offload] Fix compilation (PR #194081)   via llvm-commits
• [llvm] ca934b8 - [dsymutil] Report error when section offsets exceed DWARF32 limit (#193867)   via llvm-commits
• [llvm] [dsymutil] Report error when section offsets exceed DWARF32 limit (PR #193867)   Jonas Devlieghere via llvm-commits
• [clang] [llvm] [DirectX] Emit `dx.precise` metadata when fast math is not present (PR #192526)   Joshua Batista via llvm-commits
• [llvm] ecdcd40 - [DirectX] Emit `dx.precise` metadata when fast math is not present (#192526)   via llvm-commits
• [clang] [llvm] [DirectX] Emit `dx.precise` metadata when fast math is not present (PR #192526)   via llvm-commits
• [llvm] [ASan] Optionally emit DInfo for inserted sanitization calls (PR #191548)   Vitaly Buka via llvm-commits
• [llvm] [ASan] Optionally emit DInfo for inserted sanitization calls (PR #191548)   Vitaly Buka via llvm-commits
• [llvm] [Analysis][RISCV] More accurately estimate the cost of strided vector loads (PR #175135)   Ryan Buchner via llvm-commits
• [llvm] [Analysis][RISCV] More accurately estimate the cost of strided vector loads (PR #175135)   Ryan Buchner via llvm-commits
• [llvm] [ASan] Optionally emit DInfo for inserted sanitization calls (PR #191548)   Vitaly Buka via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] ec9d7d1 - Revert "[llvm-profgen] Add support for ETM trace decoding" (#194087)   via llvm-commits
• [llvm] Revert "[llvm-profgen] Add support for ETM trace decoding" (PR #194087)   via llvm-commits
• [llvm] [llvm-dwarfdump] Add --compare for semantic DWARF diffing (PR #194089)   Jonas Devlieghere via llvm-commits
• [llvm] [ASan] Optionally emit DInfo for inserted sanitization calls (PR #191548)   Vitaly Buka via llvm-commits
• [llvm] [LLVM][CodeGen][RISCV] Avoid duplicate live-in copies and reuse existing virtual registers (PR #193947)   Craig Topper via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [RISCV][P-ext] Remove dead code from LowerOperation handling of ISD::STORE. NFC (PR #194088)   Craig Topper via llvm-commits
• [llvm] verify scc is not live-in (PR #193143)   Zeng Wu via llvm-commits
• [llvm] [mlir] [LLVM] Refactor intrinsic validation (PR #194061)   Rahul Joshi via llvm-commits
• [llvm] [mlir] [LLVM] Refactor intrinsic validation (PR #194061)   Rahul Joshi via llvm-commits
• [llvm] Revert "Reland: [LowerTypeTests] Add debug info to jump table entries" (PR #194095)   Vitaly Buka via llvm-commits
• [llvm] [LoongArch] Add support for vector FP_EXTEND from vxf32 to vxf64 (PR #164746)   Zhaoxin Yang via llvm-commits
• [llvm] Revert "Reland: [LowerTypeTests] Add debug info to jump table entries" (PR #194095)   Vitaly Buka via llvm-commits
• [llvm] [mlir] [XeGPU][Transform] Add XeGPU array length optimization pass (PR #194062)   Igor Zamyatin via llvm-commits
• [llvm] [SDag][GISel] Correctly Coordinate Selected Property (PR #194096)   Sam Elliott via llvm-commits
• [llvm] [SDag][GISel] Correctly Coordinate Selected Property (PR #194096)   via llvm-commits
• [llvm] [offload] Fix use of AsyncInfoWrapper's finalize function (PR #194098)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] Fix use of AsyncInfoWrapper's finalize function (PR #194098)   via llvm-commits
• [llvm] [offload] Fix use of AsyncInfoWrapper's finalize function (PR #194098)   via llvm-commits
• [clang] [compiler-rt] [Clang][CodeGen] Report when an alias points to an incompatible target (PR #192397)   Igor Kudrin via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Craig Topper via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Sam Elliott via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for v2f32 load legalization on LSX (PR #194099)   Zhaoxin Yang via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)   Philip Reames via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [llvm] [offload] Fix use of AsyncInfoWrapper's finalize function (PR #194098)   Shilei Tian via llvm-commits
• [llvm] Revert "Reland: [LowerTypeTests] Add debug info to jump table entries" (PR #194095)   LLVM Continuous Integration via llvm-commits
• [llvm] [CSKY] Fix build after #191460 (PR #194102)   Fangrui Song via llvm-commits
• [llvm] e66613f - [CSKY] Fix build after #191460 (#194102)   via llvm-commits
• [llvm] [CSKY] Fix build after #191460 (PR #194102)   Fangrui Song via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Kito Cheng via llvm-commits
• [compiler-rt] bd1c308 - [Clang][CodeGen] Report when an alias points to an incompatible target (#192397)   via llvm-commits
• [clang] [compiler-rt] [Clang][CodeGen] Report when an alias points to an incompatible target (PR #192397)   Igor Kudrin via llvm-commits
• [compiler-rt] 6dd373f - [sanitizer] Relax pthread_join tests for different glibc versions (#194100)   via llvm-commits
• [compiler-rt] [sanitizer] Relax pthread_join tests for different glibc versions (PR #194100)   Vitaly Buka via llvm-commits
• [llvm] [offload] Fix use of AsyncInfoWrapper's finalize function (PR #194098)   Kevin Sala Penades via llvm-commits
• [llvm] [llvm-objdump][RISCV] Use ISA mapping symbols for per-region disassembly (PR #193448)   Sam Elliott via llvm-commits
• [llvm] [ThinLTO] Remove JumpTableToSwitchPass from post-link pipeline (PR #194103)   Vitaly Buka via llvm-commits
• [llvm] Revert "Reapply "[JTS][Passes] Enable JTS By Default" (#193409)" (PR #193649)   Vitaly Buka via llvm-commits
• [llvm] [NFC][ThinLTO] Remove JumpTableToSwitchPass from the test (PR #194103)   Vitaly Buka via llvm-commits
• [llvm] [NFC][ThinLTO] Remove JumpTableToSwitchPass from the test (PR #194103)   Vitaly Buka via llvm-commits
• [llvm] [offload] Fix use of AsyncInfoWrapper's finalize function (PR #194098)   Kevin Sala Penades via llvm-commits
• [llvm] [NFC][ThinLTO] Remove JumpTableToSwitchPass from the test (PR #194103)   Aiden Grossman via llvm-commits
• [llvm] [NFC][ThinLTO] Remove JumpTableToSwitchPass from the test (PR #194103)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   via llvm-commits
• [llvm] workflows/new-issues: Use a GitHub app token (PR #194091)   Aiden Grossman via llvm-commits
• [llvm] workflows/new-prs: Use a GitHub app token (PR #194092)   Aiden Grossman via llvm-commits
• [llvm] [Runtimes] Allow pass though LIBCLC_* cmake options to libclc (PR #194105)   Wenju He via llvm-commits
• [llvm] workflows/release-asset-audit: Use a GitHub app token (PR #194085)   Aiden Grossman via llvm-commits
• [llvm] workflows/pr-subscriber: Use a GitHub app token (PR #194083)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   via llvm-commits
• [llvm] [BOLT][RISCV] Add RV32 bare-metal support (PR #193913)   Kito Cheng via llvm-commits
• [llvm] [NewPM] Adds a port for AArch64SIMDInstrOpt (PR #188177)   Aiden Grossman via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Phoebe Wang via llvm-commits
• [llvm] 2428fbb - [NFC][ThinLTO] Remove JumpTableToSwitchPass from the test (#194103)   via llvm-commits
• [llvm] [NFC][ThinLTO] Remove JumpTableToSwitchPass from the test (PR #194103)   Vitaly Buka via llvm-commits
• [llvm] [DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (PR #193987)   Phoebe Wang via llvm-commits
• [llvm] 84b0809 - [GIsel] Add constant-folding for bit-counting ops (#194010)   via llvm-commits
• [llvm] [GIsel] Add constant-folding for bit-counting ops (PR #194010)   Alex MacLean via llvm-commits
• [llvm] [DebugInfo] Fix crash in declare-to-assign when memcpy writes to scalable-vector alloca (PR #194107)   via llvm-commits
• [llvm] [WebAssembly] Explicitly set `getCmpLibcallReturnType` to i32 (PR #192425)   Trevor Gross via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] [DebugInfo] Fix crash in declare-to-assign when memcpy writes to scalable-vector alloca (PR #194107)   via llvm-commits
• [llvm] [DebugInfo] Fix crash in declare-to-assign when memcpy writes to scalable-vector alloca (PR #194107)   via llvm-commits
• [llvm] [NFC][ThinLTO] Remove JumpTableToSwitchPass from the test (PR #194103)   LLVM Continuous Integration via llvm-commits
• [llvm] [Bazel] Fixes 34a8d49 (PR #193461)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fixes ec94434 (PR #191775)   Jordan Rupprecht via llvm-commits
• [llvm] Improve compiler-rt build structure and export compilation info (PR #190088)   Jordan Rupprecht via llvm-commits
• [llvm] [llvm] Introduce TargetInfo (PR #190730)   LLVM Continuous Integration via llvm-commits
• [llvm] Revert "SROA: Recognize llvm.protected.field.ptr intrinsics." (PR #194109)   Peter Collingbourne via llvm-commits
• [llvm] Revert "SROA: Recognize llvm.protected.field.ptr intrinsics." (PR #194109)   via llvm-commits
• [llvm] [MC] Change MCContext::getTargetOptions to return a reference. NFC (PR #194112)   Fangrui Song via llvm-commits
• [llvm] [MC] Change MCContext::getTargetOptions to return a reference. NFC (PR #194112)   Fangrui Song via llvm-commits
• [compiler-rt] [sanitizer] Relax pthread_join tests for different glibc versions (PR #194100)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] [WebAssembly] Explicitly set `getCmpLibcallReturnType` to i32 (PR #192425)   Trevor Gross via llvm-commits
• [llvm] aeea319 - [MC] Change MCContext::getTargetOptions to return a reference. NFC (#194112)   via llvm-commits
• [llvm] [MC] Change MCContext::getTargetOptions to return a reference. NFC (PR #194112)   Fangrui Song via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Vitaly Buka via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Vitaly Buka via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] [LoopVectorize] Support scalarizing vectorized structs in VPTransformState::get() (PR #194113)   Thurston Dang via llvm-commits
• [llvm] [LoopVectorize] Support scalarizing vectorized structs in VPTransformState::get() (PR #194113)   via llvm-commits
• [llvm] [VPlan] Support scalarizing vectorized structs in VPTransformState::get() (PR #194113)   Thurston Dang via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Michael Berg via llvm-commits
• [llvm] [MC] Change MCContext::getTargetOptions to return a reference. NFC (PR #194112)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine] narrow vector stores with undef/poison suffix (PR #194042)   Yunbo Ni via llvm-commits
• [llvm] 320a515 - [LoongArch] Add tests for vector shift-right-and-round combines (#192920)   via llvm-commits
• [llvm] [LoongArch] Add tests for vector shift-right-and-round combines (PR #192920)   via llvm-commits
• [llvm] [LoongArch] Combine rounded vector shifts to VSRLR/VSRAR (PR #192921)   via llvm-commits
• [llvm] [LoongArch] Combine rounded vector shifts to VSRLR/VSRAR (PR #192921)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   via llvm-commits
• [llvm] [MC] Change MCContext::getTargetOptions to return a reference. NFC (PR #194112)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   via llvm-commits
• [llvm] [BOLT] Add unit tests for pre-aggregated profile parsing (PR #192390)   Amir Ayupov via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   via llvm-commits
• [llvm] [BOLT] Add unit tests for pre-aggregated profile parsing (PR #192390)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Add unit tests for pre-aggregated profile parsing (PR #192390)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Add unit tests for pre-aggregated profile parsing (PR #192390)   Amir Ayupov via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [compiler-rt] 3dc4fd6 - [compiler-rt][sanitizer] Remove linux/scc.h (#194116)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [llvm] a693efc - [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (#193765)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   Gábor Spaits via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser. NFC (PR #194120)   Fangrui Song via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser. NFC (PR #194120)   via llvm-commits
• [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser. NFC (PR #194120)   via llvm-commits
• [llvm] [RISCV][GlobalISel] Support RISC-V specific inline asm constraints: 'I', 'J', 'K' and 'S' (PR #193765)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoongArch] Combine rounded vector shifts to VSRLR/VSRAR (PR #192921)   LLVM Continuous Integration via llvm-commits
• [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser. NFC (PR #194120)   via llvm-commits
• [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser. NFC (PR #194120)   via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   Zhaoxin Yang via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   Zhaoxin Yang via llvm-commits
• [llvm] [offload] Fix compilation (PR #194081)   Robert Imschweiler via llvm-commits
• [libc] [llvm] [libc][math] Refactor dsub family to header-only (PR #182160)   via llvm-commits
• [compiler-rt] Change linkage for friendship with modules (PR #166399)   Sergey Chebotarev via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for v2f32 load legalization on LSX (PR #194099)   Zhaoxin Yang via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Oliver Stöneberg via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   via llvm-commits
• [llvm] [BOLT] Fix a crash for calling `pwrite` (PR #186845)   Shanzhi Chen via llvm-commits
• [llvm] [VPlan] Support scalarizing vectorized structs in VPTransformState::get() (PR #194113)   Florian Mayer via llvm-commits
• [llvm] [BOLT] Fix a crash for calling `pwrite` (PR #186845)   Shanzhi Chen via llvm-commits
• [llvm] Revert "SROA: Recognize llvm.protected.field.ptr intrinsics." (PR #194109)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Nikita Popov via llvm-commits
• [compiler-rt] 4ed3638 - [asan] API for getting multiple pointer ranges (#181446)   via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Maksim Ivanov via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   Maksim Ivanov via llvm-commits
• [lld] [LLD/AArch64] BTI link-time relaxation: NOP redundant `bti c` for internal functions (PR #187871)   Junjie Peng via llvm-commits
• [llvm] [BOLT] Fix a crash for calling `pwrite` (PR #186845)   Shanzhi Chen via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   Zhaoxin Yang via llvm-commits
• [llvm] [llvm] Implement the BPF ABI (PR #194031)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [asan] API for getting multiple pointer ranges (PR #181446)   LLVM Continuous Integration via llvm-commits
• [llvm] [AVR] Fix a bug in printing assembly operand with extra code (PR #193964)   Patryk Wychowaniec via llvm-commits
• [llvm] 61f311d - [AVR] Fix a bug in printing assembly operand with extra code (#193964)   via llvm-commits
• [llvm] [AVR] Fix a bug in printing assembly operand with extra code (PR #193964)   Patryk Wychowaniec via llvm-commits
• [llvm] [DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (PR #193987)   Simon Pilgrim via llvm-commits
• [libcxx] [libcxxabi] [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Louis Dionne via llvm-commits
• [libcxx] [libcxxabi] [llvm] Adding Separate OpenMP Offloading Backend to `libcxx/include/__algorithm/pstl_backends` (PR #66968)   Louis Dionne via llvm-commits
• [llvm] attempt to introduce reusable workflow (PR #76243)   Louis Dionne via llvm-commits
• [llvm] attempt to introduce reusable workflow (PR #76243)   Louis Dionne via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 vectorization (PR #151530)   Alexey Bataev via llvm-commits
• [llvm] 1348766 - [SLP]Initial support for non-power-of-2 vectorization   via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 vectorization (PR #151530)   Alexey Bataev via llvm-commits
• [clang] [clang-tools-extra] [lldb] [llvm] [lldb] Guard stale SBProcess target access (PR #192842)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Lower BF16 FPTRUNC (PR #193941)   David Green via llvm-commits
• [llvm] [SLP] Refine loop-aware gather cost and admit sibling-loop subtrees (PR #192801)   Alexey Bataev via llvm-commits
• [llvm] [AArch64][GlobalISel] Lower BF16 FPTRUNC (PR #193941)   David Green via llvm-commits
• [llvm] [GlobalISel] Remove duplicate patterns. NFC (PR #194131)   David Green via llvm-commits
• [llvm] [GlobalISel] Remove duplicate patterns. NFC (PR #194131)   via llvm-commits
• [llvm] [SLP] Account for GEP pointer-chain cost when root scalars feed load/store indices (PR #192726)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Alexey Bataev via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [llvm] [X86] dag-topological-sort.ll - add additional test coverage (PR #194135)   Simon Pilgrim via llvm-commits
• [llvm] [X86] dag-topological-sort.ll - add additional test coverage (PR #194135)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (PR #189255)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (PR #189255)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (PR #189255)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [LV] Add -fold-epilogue-tail option for tail-folded epilogue (PR #190697)   Hassnaa Hamdi via llvm-commits
• [llvm] [SLP] Support ordered fadd reduction via reduction intrinsics (PR #189451)   Alexey Bataev via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Addition tests for add_like Or of smlal/umlal. NFC (PR #194138)   David Green via llvm-commits
• [llvm] ada1b81 - [AArch64] Addition tests for add_like Or of smlal/umlal. NFC (#194138)   via llvm-commits
• [llvm] [AArch64] Addition tests for add_like Or of smlal/umlal. NFC (PR #194138)   David Green via llvm-commits
• [llvm] [IR tracker] Add TSV query tool, docs, and HTML report (PR #191856)   Yaxun Liu via llvm-commits
• [llvm] [IR tracker] Add TSV query tool, docs, and HTML report (PR #191856)   Yaxun Liu via llvm-commits
• [llvm] [AArch64] Use add_like for UMLAL / SMLAL (PR #194139)   David Green via llvm-commits
• [llvm] [AArch64] Use add_like for UMLAL / SMLAL (PR #194139)   via llvm-commits
• [llvm] f243698 - [X86] dag-topological-sort.ll - add additional test coverage (#194135)   via llvm-commits
• [llvm] [X86] dag-topological-sort.ll - add additional test coverage (PR #194135)   Simon Pilgrim via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   LLVM Continuous Integration via llvm-commits
• [llvm] fed92a3 - [ORC] Wrap unconditional dbgs() in LLVM_DEBUG in JITLoaderPerf (#188903)   via llvm-commits
• [llvm] [ORC] Wrap unconditional dbgs() in LLVM_DEBUG in JITLoaderPerf (PR #188903)   Stefan Gränitz via llvm-commits
• [llvm] [ARM][MVE] Add tests for sext and zext of i1 buildvector. NFC (PR #194141)   David Green via llvm-commits
• [llvm] e80d3a3 - [ARM][MVE] Add tests for sext and zext of i1 buildvector. NFC (#194141)   via llvm-commits
• [llvm] [ARM][MVE] Add tests for sext and zext of i1 buildvector. NFC (PR #194141)   David Green via llvm-commits
• [llvm] [ORC] Wrap unconditional dbgs() in LLVM_DEBUG in JITLoaderPerf (PR #188903)   via llvm-commits
• [llvm] [ARM][MVE] Transform sext and zext of i1 buildvector (PR #192519)   David Green via llvm-commits
• [llvm] [ARM][MVE] Transform sext and zext of i1 buildvector (PR #192519)   David Green via llvm-commits
• [llvm] [llvm][RISCV] Optimize fcopysign for fixed vectors (PR #193802)   Brandon Wu via llvm-commits
• [llvm] [AVR] Fix a bug of register allocation (PR #193908)   Patryk Wychowaniec via llvm-commits
• [llvm] [SelectionDAG] Improve ucmp/scmp codegen (PR #190787)   Takashi Idobe via llvm-commits
• [llvm] [SelectionDAG] Improve ucmp/scmp codegen (PR #190787)   Takashi Idobe via llvm-commits
• [llvm] [DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (PR #193987)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (PR #193987)   Simon Pilgrim via llvm-commits
• [llvm] [unittest] Use TempDir() in gtest death-test stream capture on Linux (PR #194142)   Mehdi Amini via llvm-commits
• [llvm] [GlobalISel] Remove duplicate patterns. NFC (PR #194131)   Akimasa Watanuki via llvm-commits
• [llvm] [SelectionDAG] Improve ucmp/scmp codegen (PR #190787)   Takashi Idobe via llvm-commits
• [llvm] [llvm][RISCV] Optimize fcopysign for fixed vectors (PR #193802)   Brandon Wu via llvm-commits
• [llvm] [X86] handle cmov ctlz folds that are emitted by i128 code (PR #187169)   Takashi Idobe via llvm-commits
• [clang] [llvm] [clang][RISCV] Use macro to check if intrinsics are supported (PR #187197)   Brandon Wu via llvm-commits
• [llvm] [AArch64] Addition tests for add_like Or of smlal/umlal. NFC (PR #194138)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (PR #189255)   David Green via llvm-commits
• [llvm] 5ee6e6d - [AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (#189255)   via llvm-commits
• [llvm] [AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (PR #189255)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [SelectionDAG] Improve ucmp/scmp codegen (PR #190787)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] Fix #94909: Optimize vector fmul(sitofp(x), 0.5) -> scvtf(x, 2) (PR #141480)   JP Hafer via llvm-commits
• [llvm] 142a871 - [ARM][MVE] Transform sext and zext of i1 buildvector (#192519)   via llvm-commits
• [llvm] [AVR] Fix a bug of register allocation (PR #193908)   Patryk Wychowaniec via llvm-commits
• [llvm] [ARM][MVE] Transform sext and zext of i1 buildvector (PR #192519)   David Green via llvm-commits
• [llvm] 8cd9673 - [AVR] Fix allocating DREGS (#193908)   via llvm-commits
• [llvm] [AVR] Fix a bug of register allocation (PR #193908)   Patryk Wychowaniec via llvm-commits
• [llvm] [SLP][NFC]Add a test with non-vectorizable functions/intrinsics, but vectorizable operands (PR #194143)   Alexey Bataev via llvm-commits
• [llvm] 22a2ff7 - [SLP][NFC]Add a test with non-vectorizable functions/intrinsics, but vectorizable operands   via llvm-commits
• [llvm] [SLP][NFC]Add a test with non-vectorizable functions/intrinsics, but vectorizable operands (PR #194143)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Add a test with non-vectorizable functions/intrinsics, but vectorizable operands (PR #194143)   via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] Optimize vector fmul(sitofp/uitofp, 1/2^N) -> scvtf/ucvtf (PR #141480)   JP Hafer via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] Optimize vector fmul(sitofp/uitofp, 1/2^N) -> scvtf/ucvtf (PR #141480)   JP Hafer via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] Optimize vector fmul(sitofp/uitofp, 1/2^N) -> scvtf/ucvtf (PR #141480)   JP Hafer via llvm-commits
• [llvm] [DAG] visitAND - attempt to fold (and buildvector(), buildvector()) -> buildvector() (PR #193987)   Phoebe Wang via llvm-commits
• [llvm] [GlobalISel] Remove duplicate patterns. NFC (PR #194131)   Alex MacLean via llvm-commits
• [llvm] [AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (PR #194144)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [llvm] [AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (PR #194144)   via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][WebAssembly] strided-int-mac.ll - regenerate test checks (PR #194146)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][WebAssembly] strided-int-mac.ll - regenerate test checks (PR #194146)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Implement half precision lgamma function (PR #192834)   via llvm-commits
• [llvm] [AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (PR #194144)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (PR #194144)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (PR #194144)   Shilei Tian via llvm-commits
• [clang] [compiler-rt] [llvm] [rtsan] Allow for rtsan/ubsan runtime combos (PR #193585)   via llvm-commits
• [clang] [compiler-rt] [llvm] [rtsan] Allow for rtsan/ubsan runtime combos (PR #193585)   via llvm-commits
• [llvm] 7dff689 - [GlobalISel] Remove duplicate patterns. NFC (#194131)   via llvm-commits
• [llvm] [GlobalISel] Remove duplicate patterns. NFC (PR #194131)   David Green via llvm-commits
• [llvm] [ARM][MVE] Change MVE getSetCCResultType to always use i1 vectors (PR #192531)   David Green via llvm-commits
• [llvm] [ARM][MVE] Change MVE getSetCCResultType to always use i1 vectors (PR #192531)   David Green via llvm-commits
• [llvm] [ARM][MVE] Change MVE getSetCCResultType to always use i1 vectors (PR #192531)   via llvm-commits
• [llvm] [ARM] Fold Or of CSINC into CSINC (PR #190765)   David Green via llvm-commits
• [llvm] Refactor LowerFP_TO_INT (PR #194151)   via llvm-commits
• [llvm] Refactor LowerFP_TO_INT (PR #194151)   via llvm-commits
• [llvm] Refactor LowerFP_TO_INT (PR #194151)   via llvm-commits
• [llvm] Refactor LowerFP_TO_INT (PR #194151)   via llvm-commits
• [llvm] 65b9755 - [NFC][WebAssembly] strided-int-mac.ll - regenerate test checks (#194146)   via llvm-commits
• [llvm] [NFC][WebAssembly] strided-int-mac.ll - regenerate test checks (PR #194146)   Simon Pilgrim via llvm-commits
• [llvm] Refactor LowerFP_TO_INT (PR #194151)   via llvm-commits
• [llvm] Refactor LowerFP_TO_INT (PR #194151)   via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Yingwei Zheng via llvm-commits
• [llvm] [VPlan] Add simplifications to remove header masks in predicated AnyOf select reductions (PR #190196)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add simplification to remove header masks in predicated AnyOf select reductions (PR #190196)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify select x, (i1 y | z), y -> y | (x && z) (PR #190196)   Luke Lau via llvm-commits
• [libc] [llvm] [libc][math] Implement half precision lgamma function (PR #192834)   Max Graey via llvm-commits
• [libc] [llvm] [libc][math] Implement half precision lgamma function (PR #192834)   Max Graey via llvm-commits
• [llvm] [VPlan] Simplify select x, (i1 y | z), y -> y | (x && z) (PR #190196)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify select x, (i1 y | z), y -> y | (x && z) (PR #190196)   Luke Lau via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Yingwei Zheng via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [libc] [llvm] [libc][math] Implement half precision lgamma function (PR #192834)   Max Graey via llvm-commits
• [llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)   Luke Lau via llvm-commits
• [llvm] [clang][lit] Don't substitute cir-opt if it's not enabled (PR #193665)   Vitaly Buka via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fp_round, vp_fp_extend (PR #193219)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fp_round, vp_fp_extend (PR #193219)   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand vp.shl, vp.lshr, vp.ashr (PR #193603)   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand vp.shl, vp.lshr, vp.ashr (PR #193603)   Luke Lau via llvm-commits
• [llvm] [RISCV] Expand vp.shl, vp.lshr, vp.ashr (PR #193603)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   Luke Lau via llvm-commits
• [llvm] [SLP][NFC]Rename test, add other non-vectorizable inst candidates tests, NFC (PR #194153)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Rename test, add other non-vectorizable inst candidates tests, NFC (PR #194153)   via llvm-commits
• [llvm] 3551254 - [SLP][NFC]Rename test, add other non-vectorizable inst candidates tests, NFC   via llvm-commits
• [llvm] [SLP][NFC]Rename test, add other non-vectorizable inst candidates tests, NFC (PR #194153)   Alexey Bataev via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   Luke Lau via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Thurston Dang via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   Luke Lau via llvm-commits
• [polly] 4b87091 - [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (#154148)   via llvm-commits
• [llvm] [polly] [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (PR #154148)   Florian Hahn via llvm-commits
• [compiler-rt] Reland: [ASan][Windows] Fix memmove/memcpy interception on x64 (#192060) (PR #193633)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland: [ASan][Windows] Fix memmove/memcpy interception on x64 (#192060) (PR #193633)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland: [ASan][Windows] Fix memmove/memcpy interception on x64 (#192060) (PR #193633)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (PR #194144)   Dmitry Sidorov via llvm-commits
• [compiler-rt] Reland: [ASan][Windows] Fix memmove/memcpy interception on x64 (#192060) (PR #193633)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (PR #194144)   Dmitry Sidorov via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Takashi Idobe via llvm-commits
• [compiler-rt] Reland: [ASan][Windows] Fix memmove/memcpy interception on x64 (#192060) (PR #193633)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland: [ASan][Windows] Fix memmove/memcpy interception on x64 (#192060) (PR #193633)   Vitaly Buka via llvm-commits
• [llvm] b1763ea - [RISCV] Remove codegen for vp_fp_round, vp_fp_extend (#193219)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_fp_round, vp_fp_extend (PR #193219)   Luke Lau via llvm-commits
• [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser. NFC (PR #194120)   Alexander Richardson via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [llvm] [ARM] Fold more general CMOV in CMOV patterns (PR #194155)   via llvm-commits
• [llvm] [ARM] Fold more general CMOV in CMOV patterns (PR #194155)   via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   Anshul Nigham via llvm-commits
• [llvm] fad6046 - [RISCV] Expand vp.shl, vp.lshr, vp.ashr (#193603)   via llvm-commits
• [llvm] [RISCV] Expand vp.shl, vp.lshr, vp.ashr (PR #193603)   Luke Lau via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   via llvm-commits
• [llvm] [AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (PR #194144)   Dmitry Sidorov via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   via llvm-commits
• [llvm] [NewPM] Adds a port for AArch64SIMDInstrOpt (PR #188177)   Anshul Nigham via llvm-commits
• [llvm] [AMDGPU] Add custom lowering of llvm.convert.from.arbitrary.fp for FP8 (PR #194144)   Dmitry Sidorov via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   Luke Lau via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Matt Turner via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   via llvm-commits
• [compiler-rt] Add support for Alpha to libsanitizer (PR #194161)   Matt Turner via llvm-commits
• [compiler-rt] Add support for Alpha to libsanitizer (PR #194161)   via llvm-commits
• [compiler-rt] Add support for Alpha to libsanitizer (PR #194161)   Matt Turner via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [llvm] [AVR] Fix a bug of register allocation (PR #193908)   Carl Peto via llvm-commits
• [llvm] [NFC][AArch64] Add getNonStrictBranchCondition TII hook (PR #190850)   Hussam Alhassan via llvm-commits
• [llvm] [AArch64] ConditionOptimizer: replace intra-block scan with map-based algorithm (PR #190455)   Hussam Alhassan via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Takashi Idobe via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.to.arbitrary.fp (PR #193595)   Dmitry Sidorov via llvm-commits
• [llvm] [PGO][ICP] Prevent indirect call promotion to functions with incompatible target features (PR #192142)   Han Shen via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Matt Turner via llvm-commits
• [compiler-rt] Add support for Alpha to libsanitizer (PR #194161)   Matt Turner via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Matt Turner via llvm-commits
• [llvm] [PGO][ICP] Prevent indirect call promotion to functions with incompatible target features (PR #192142)   Han Shen via llvm-commits
• [llvm] 0eae5cf - [RISCV] Remove codegen for vp.icmp (#193606)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp.icmp (PR #193606)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Erdem Yılmaz via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [llvm] 764e10c - [NewPM] Adds a port for AArch64SIMDInstrOpt (#188177)   via llvm-commits
• [llvm] [NewPM] Adds a port for AArch64SIMDInstrOpt (PR #188177)   Anshul Nigham via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Erdem Yılmaz via llvm-commits
• [llvm] [AArch64] ConditionOptimizer: replace intra-block scan with map-based algorithm (PR #190455)   Hussam Alhassan via llvm-commits
• [compiler-rt] Add support for Alpha to libsanitizer (PR #194161)   via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Anshul Nigham via llvm-commits
• [llvm] [MC] Always lower .fill to MCFillFragment (PR #194164)   Fangrui Song via llvm-commits
• [llvm] [MC] Always lower .fill to MCFillFragment (PR #194164)   via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Ryan Buchner via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Matt Turner via llvm-commits
• [compiler-rt] Add support for Alpha to libsanitizer (PR #194161)   Matt Turner via llvm-commits
• [llvm] [gn build] Port 2f28e1db535b (PR #194165)   Nico Weber via llvm-commits
• [llvm] [gn build] Port a693efcc40b1 (PR #194166)   Nico Weber via llvm-commits
• [llvm] [gn build] Port c59c19bf5921 (PR #194167)   Nico Weber via llvm-commits
• [llvm] 5482074 - [gn build] Port 2f28e1db535b (#194165)   via llvm-commits
• [llvm] [gn build] Port 2f28e1db535b (PR #194165)   Nico Weber via llvm-commits
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• [llvm] c34d43d - [gn build] Port a693efcc40b1 (#194166)   via llvm-commits
• [llvm] [gn build] Port a693efcc40b1 (PR #194166)   Nico Weber via llvm-commits
• [llvm] 87673e4 - [gn build] Port c59c19bf5921 (#194167)   via llvm-commits
• [llvm] [gn build] Port c59c19bf5921 (PR #194167)   Nico Weber via llvm-commits
• [llvm] MC: Emit .reloc directive relocations in offset order. (PR #194065)   Fangrui Song via llvm-commits
• [llvm] [NewPM] Adds a port for AArch64SIMDInstrOpt (PR #188177)   LLVM Continuous Integration via llvm-commits
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• [llvm] [openmp] [OMPT] Add callback for `omp_target_memset` calls (PR #194168)   Jan André Reuter via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [clang] [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser. NFC (PR #194120)   Fangrui Song via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   via llvm-commits
• [llvm] [AArch64] Refactor getAArch64XALUOOp to match the same way we lower in ARM (PR #194170)   via llvm-commits
• [clang] [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser (PR #194120)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Refactor getAArch64XALUOOp to match the same way we lower in ARM (PR #194170)   via llvm-commits
• [clang] [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser (PR #194120)   Fangrui Song via llvm-commits
• [clang] [llvm] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser (PR #194120)   Fangrui Song via llvm-commits
• [llvm] [MC] Always lower .fill to MCFillFragment (PR #194164)   Alexis Engelke via llvm-commits
• [llvm] [MC] Always lower .fill to MCFillFragment (PR #194164)   Alexis Engelke via llvm-commits
• [llvm] [MC] Always lower .fill to MCFillFragment (PR #194164)   Alexis Engelke via llvm-commits
• [llvm] [AArch64] ConditionOptimizer: replace intra-block scan with map-based algorithm (PR #190455)   Hussam Alhassan via llvm-commits
• [llvm] [ARM] Fold more general CMOV in CMOV patterns (PR #194155)   via llvm-commits
• [llvm] [MC] Always lower .fill to MCFillFragment (PR #194164)   Fangrui Song via llvm-commits
• [llvm] [MC] Always lower .fill to MCFillFragment (PR #194164)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   via llvm-commits
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• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   via llvm-commits
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• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   Luke Lau via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   Alexis Engelke via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Aiden Grossman via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   Rishi Khare via llvm-commits
• [clang] [llvm] [AMDGPU] Add dot product patterns with saturating add (clamp) (PR #187945)   via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   via llvm-commits
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• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [libc] [llvm] [libc][math] Implement half precision lgamma function (PR #192834)   via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   Aiden Grossman via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   Aiden Grossman via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   Aiden Grossman via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   Aiden Grossman via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   Rishi Khare via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   Aiden Grossman via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Luke Lau via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   Nikita Popov via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU] Implement getAddrSpaceCastPreservedPtrMask (PR #182658)   via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Luke Lau via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [llvm] [llvm] Introduce TargetInfo (PR #190730)   LLVM Continuous Integration via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   Alexis Engelke via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [llvm] [SelectionDAG][x86] Ensure vector reduction optimization (PR #144231)   Suhajda Tamás via llvm-commits
• [llvm] Optimize `SetImpliedBits` (PR #193289)   via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Fangrui Song via llvm-commits
• [llvm] 93317d1 - Fix typo in comment in Inliner.cpp (#194172)   via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   Aiden Grossman via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   via llvm-commits
• [llvm] [X86] llvm.ctlz.i128 emits a test when it doesn't need to (PR #186932)   Takashi Idobe via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   Florian Hahn via llvm-commits
• [llvm] [X86] lock opt ptr const inconsistencies (PR #185195)   Takashi Idobe via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   via llvm-commits
• [llvm] [X86] lock opt ptr const inconsistencies (PR #185195)   Takashi Idobe via llvm-commits
• [llvm] [AMDGPU] Implement getAddrSpaceCastPreservedPtrMask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU] Implement getAddrSpaceCastPreservedPtrMask (PR #182658)   via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Anshul Nigham via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 vectorization (PR #151530)   Florian Hahn via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Aiden Grossman via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt] sanitizer: Detect inline asm symbol assignment syntax at configure time (PR #194160)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt] Use asm .set only for Hexagon (PR #194160)   Vitaly Buka via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
• [compiler-rt] [compiler-rt] Use asm .set only for Hexagon (PR #194160)   Vitaly Buka via llvm-commits
• [llvm] [X86] lock opt ptr const inconsistencies (PR #185195)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lock opt ptr const inconsistencies (PR #185195)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   Muhammad Bassiouni via llvm-commits
• [llvm] [Github] Bump CI containers to 22.1.4 (PR #194175)   Aiden Grossman via llvm-commits
• [llvm] [Github] Bump CI containers to 22.1.4 (PR #194175)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Anshul Nigham via llvm-commits
• [libc] [llvm] [libc][math][c23] Improve rsqrtf16() function (PR #160639)   Anton Shepelev via llvm-commits
• [llvm] [AMDGPU] Implement getAddrSpaceCastPreservedPtrMask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU] Implement getAddrSpaceCastPreservedPtrMask (PR #182658)   via llvm-commits
• [llvm] Revert "[SLP]Initial support for non-power-of-2 vectorization" (PR #194177)   Alexey Bataev via llvm-commits
• [llvm] Revert "[SLP]Initial support for non-power-of-2 vectorization" (PR #194177)   via llvm-commits
• [llvm] e19f36f - Revert "[SLP]Initial support for non-power-of-2 vectorization"   via llvm-commits
• [llvm] Revert "[SLP]Initial support for non-power-of-2 vectorization" (PR #194177)   Alexey Bataev via llvm-commits
• [libc] [llvm] [libc][math][c23] Improve rsqrtf16() function (PR #160639)   Anton Shepelev via llvm-commits
• [libc] [llvm] [libc][math][c23] Improve rsqrtf16() function (PR #160639)   Anton Shepelev via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   Anshul Nigham via llvm-commits
• [libc] [llvm] [libc][math][c23] Improve rsqrtf16() function (PR #160639)   Anton Shepelev via llvm-commits
• [llvm] d36e524 - [NewPM] Adds a port for KCFI (#194163)   via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   Anshul Nigham via llvm-commits
• [llvm] [Github] Drop LLVM 21 installation from libc Dockerfile (PR #194178)   Aiden Grossman via llvm-commits
• [llvm] [Github] Drop LLVM 21 installation from libc Dockerfile (PR #194178)   Aiden Grossman via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math][c23] Improve rsqrtf16() function (PR #160639)   Anton Shepelev via llvm-commits
• [llvm] [NewPM] Wire up gc-empty-basic-blocks into pipeline (PR #194179)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Wire up gc-empty-basic-blocks into pipeline (PR #194179)   via llvm-commits
• [compiler-rt] [Profile] Reenable instrprof-tmpdir.c (PR #194181)   Aiden Grossman via llvm-commits
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• [compiler-rt] [Profile] Reenable instrprof-tmpdir.c (PR #194181)   Aiden Grossman via llvm-commits
• [llvm] [llvm-objcopy] Mark compression options unsupported except on ELF (PR #193965)   Martin Storsjö via llvm-commits
• [llvm] [llvm-objcopy] Mark compression options unsupported except on ELF (PR #193965)   Martin Storsjö via llvm-commits
• [llvm] 8eef507 - [VPlan] Fix assert in finding WideCanIV (NFC) (#193269)   via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] lock opt ptr const inconsistencies (PR #185195)   Takashi Idobe via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [llvm] [DenseMap] Resolves asan + msvc build syntax errors (PR #193695)   Vitaly Buka via llvm-commits
• [llvm] Fix typo in comment in Inliner.cpp (PR #194172)   LLVM Continuous Integration via llvm-commits
• [llvm] b5ac484 - [DenseMap] Resolves asan + msvc build syntax errors (#193695)   via llvm-commits
• [llvm] [DenseMap] Resolves asan + msvc build syntax errors (PR #193695)   Vitaly Buka via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdiv family to header-only (PR #182192)   via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Alexander Richardson via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Alexander Richardson via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Alexander Richardson via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Alexander Richardson via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Alexander Richardson via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   via llvm-commits
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• [llvm] [llvm][YAML] Support aliases (anchors) in YAMLIO (PR #146371)   Vitaly Buka via llvm-commits
• [llvm] [llvm][YAML] Support aliases (anchors) in YAMLIO (PR #146371)   Vitaly Buka via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
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• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] Revert "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194183)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Revert "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194183)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Revert "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194183)   via llvm-commits
• [llvm] [VPlan] Fix assert in finding WideCanIV (NFC) (PR #193269)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmaximum_mag_num family to header-only (PR #182169)   Muhammad Bassiouni via llvm-commits
• [llvm] [WebAssembly] Fix EHPadStack calculation in fixCallUnwindMismatches (PR #194184)   Heejin Ahn via llvm-commits
• [llvm] [NFC][AArch64] Add getNonStrictBranchCondition TII hook (PR #190850)   Hussam Alhassan via llvm-commits
• [llvm] [WebAssembly] Fix EHPadStack calculation in fixCallUnwindMismatches (PR #194184)   via llvm-commits
• [llvm] [AArch64] ConditionOptimizer: replace intra-block scan with map-based algorithm (PR #190455)   Hussam Alhassan via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Pedro Lobo via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Pedro Lobo via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Fix EHPadStack calculation in fixCallUnwindMismatches (PR #194184)   Heejin Ahn via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Ryan Buchner via llvm-commits
• [llvm] [CtxProf] Emit fatal usage error when flatten-prethinlink runs without assign-guid (PR #194186)   Arda Serdar Pektezol via llvm-commits
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• [llvm] [WebAssembly] Print BB names better for CFGStackify debugging (PR #194187)   Heejin Ahn via llvm-commits
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• [llvm] [WebAssembly] Remove unnecessary code after #187484 (NFC) (PR #194188)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Remove unnecessary code after #187484 (NFC) (PR #194188)   via llvm-commits
• [llvm] [WebAssembly] Remove unnecessary code after #187484 (NFC) (PR #194188)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Fix EHPadStack calculation in fixCallUnwindMismatches (PR #194184)   Heejin Ahn via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 vectorization (PR #194189)   Alexey Bataev via llvm-commits
• [llvm] [NewPM] Adds a port for KCFI (PR #194163)   LLVM Continuous Integration via llvm-commits
• [llvm] cb9b66c - [SLP]Initial support for non-power-of-2 vectorization   via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 vectorization (PR #194189)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for non-power-of-2 vectorization (PR #194189)   via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Ryan Buchner via llvm-commits
• [llvm] [BOLT] Add unit tests for pre-aggregated profile parsing (PR #192390)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Support negative hex in pre-aggregated profile (PR #192391)   Amir Ayupov via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Alexey Bataev via llvm-commits
• [llvm] [BOLT] Support negative hex in pre-aggregated profile (PR #192391)   Amir Ayupov via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Ryan Buchner via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   Aiden Grossman via llvm-commits
• [llvm] [BOLT] Support negative hex in pre-aggregated profile (PR #192391)   Amir Ayupov via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   Aiden Grossman via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   Aiden Grossman via llvm-commits
• [llvm] [NewPM][AArch64][GlobalISel] Port AArch64PostLegalizerCombiner to NewPM (PR #194156)   Aiden Grossman via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Alexey Bataev via llvm-commits
• [llvm] [BOLT] Add tests for pre-aggregated parsing (PR #193843)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Add tests for pre-aggregated parsing (PR #193843)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Add tests for pre-aggregated parsing (PR #193843)   Amir Ayupov via llvm-commits
• [llvm] [WebAssembly] Remove unnecessary code after #187484 (NFC) (PR #194188)   via llvm-commits
• [llvm] de7c63e - [llvm-profgen] Add --time-profgen (#191930)   via llvm-commits
• [llvm] [llvm-profgen] Add --time-profgen (PR #191930)   Amir Ayupov via llvm-commits
• [libc] [llvm] Relaned "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [libc] [llvm] Relaned "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [llvm] [llvm-profgen] Add --time-profgen (PR #191930)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] Reland "[libc][math] Refactor fmaximum_mag_num family to header-only" (PR #194194)   Muhammad Bassiouni via llvm-commits
• [llvm] b5471cc - [MC] Always lower .fill to MCFillFragment (#194164)   via llvm-commits
• [llvm] [MC] Always lower .fill to MCFillFragment (PR #194164)   Fangrui Song via llvm-commits
• [clang] [llvm] [mlir] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser (PR #194120)   Fangrui Song via llvm-commits
• [llvm] [llvm-profgen] Add --time-profgen (PR #191930)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] computeKnownBits X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
• [llvm] [X86] computeKnownBits X86ISD::GF2P8AFFINEQB (PR #194197)   via llvm-commits
• [llvm] [CtxProf] Emit fatal usage error when flatten-prethinlink runs without assign-guid (PR #194186)   Aiden Grossman via llvm-commits
• [llvm] [CtxProf] Emit fatal usage error when flatten-prethinlink runs without assign-guid (PR #194186)   Aiden Grossman via llvm-commits
• [llvm] [CtxProf] Emit fatal usage error when flatten-prethinlink runs without assign-guid (PR #194186)   Aiden Grossman via llvm-commits
• [llvm] [RFC][DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] [X86] computeKnownBits X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Alexey Bataev via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
• [llvm] b614c15 - [MC] Drop MCTargetOptions parameter from MCTargetAsmParser (#194120)   via llvm-commits
• [clang] [llvm] [mlir] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser (PR #194120)   Fangrui Song via llvm-commits
• [llvm] [llvm-profgen] Add --time-profgen (PR #191930)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] 0ccb181 - [compiler-rt] Use asm .set only for Hexagon (#194160)   via llvm-commits
• [compiler-rt] [compiler-rt] Use asm .set only for Hexagon (PR #194160)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt] Use asm .set only for Hexagon (PR #194160)   via llvm-commits
• [clang] [llvm] [mlir] [MC] Drop MCTargetOptions parameter from MCTargetAsmParser (PR #194120)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Remove unnecessary code after #187484 (NFC) (PR #194188)   Heejin Ahn via llvm-commits
• [compiler-rt] [compiler-rt] Use asm .set only for Hexagon (PR #194160)   Matt Turner via llvm-commits
• [llvm] [RFC][DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Ryan Buchner via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_select (PR #194199)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_select (PR #194199)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_select (PR #194199)   via llvm-commits
• [llvm] [VPlan] Use llvm.masked.{u, s}{div, rem} for predicated division (PR #191377)   Luke Lau via llvm-commits
• [llvm] [MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (PR #194200)   Fangrui Song via llvm-commits
• [llvm] [MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (PR #194200)   Fangrui Song via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (PR #194200)   via llvm-commits
• [llvm] [MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (PR #194200)   via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] [IndVarSimplify] Skip exit predication past divergent effects (#183906) (PR #194202)   Jake Xue via llvm-commits
• [llvm] [IndVarSimplify] Skip exit predication past divergent effects (#183906) (PR #194202)   via llvm-commits
• [llvm] [IndVarSimplify] Skip exit predication past divergent effects (#183906) (PR #194202)   via llvm-commits
• [llvm] [IndVarSimplify] Skip exit predication past divergent effects (#183906) (PR #194202)   via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Erdem Yılmaz via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [compiler-rt] Revert "[compiler-rt][ASan] Add function copying annotations (#91702)" (PR #194204)   Aiden Grossman via llvm-commits
• [compiler-rt] Revert "[compiler-rt][ASan] Add function copying annotations (#91702)" (PR #194204)   via llvm-commits
• [compiler-rt] Revert "[compiler-rt][ASan] Add function copying annotations (#91702)" (PR #194204)   via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Erdem Yılmaz via llvm-commits
• [compiler-rt] Revert "[compiler-rt][ASan] Add function copying annotations (#91702)" (PR #194204)   Aiden Grossman via llvm-commits
• [llvm] [MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (PR #194200)   Fangrui Song via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [MemProf] Skip GV `__prof*` during instrumentation (PR #193354)   Snehasish Kumar via llvm-commits
• [llvm] [MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (PR #194200)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Ryan Buchner via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   via llvm-commits
• [llvm] [MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (PR #194200)   Fangrui Song via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] Revert "[AA] Improve precision for monotonic atomic load/store operations" (PR #173135)   Jin Huang via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [VPlan] Optz WideCanIV with SIVSteps over CanIV (PR #191276)   Ramkumar Ramachandra via llvm-commits
• [llvm] [MC] Add MCTargetOptions to MCAsmInfo constructor. NFC (PR #194200)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [libcxx] [llvm] [libcxx] Remove ASan container overflow checks for SSO strings (PR #194208)   Aiden Grossman via llvm-commits
• [libcxx] [llvm] [libcxx] Remove ASan container overflow checks for SSO strings (PR #194208)   via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] [VPlan] Expand DerivedIV into executable recipes (PR #187589)   Ramkumar Ramachandra via llvm-commits
• [llvm] [CtxProf] Emit fatal usage error when flatten-prethinlink runs without assign-guid (PR #194186)   Arda Serdar Pektezol via llvm-commits
• [llvm] [CodeGen] SparseLiveVariables: A liveness analysis pass (PR #167454)   via llvm-commits
• [llvm] [CtxProf] Emit fatal usage error when flatten-prethinlink runs without assign-guid (PR #194186)   Arda Serdar Pektezol via llvm-commits
• [llvm] [libcxx][Github] Bump libcxx runners to the next runner set (PR #194212)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #194213)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #194213)   via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #194213)   via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] Add a mir test to verify register-coalesce works for eliminate-save-restore pattern (PR #191583)   Zeng Wu via llvm-commits
• [llvm] Revert "[AA] Improve precision for monotonic atomic load/store operations" (PR #173135)   Trevor Gross via llvm-commits
• [llvm] [X86][windows] Return `fp128` on the stack (PR #194214)   Trevor Gross via llvm-commits
• [libcxx] [llvm] [libcxx] Remove ASan container overflow checks for SSO strings (PR #194208)   via llvm-commits
• [libcxx] [llvm] [libcxx] Remove ASan container overflow checks for SSO strings (PR #194208)   via llvm-commits
• [llvm] [X86][windows] Return `fp128` on the stack (PR #194214)   Trevor Gross via llvm-commits
• [libcxx] [llvm] [libcxx] Remove ASan container overflow checks for SSO strings (PR #194208)   Aiden Grossman via llvm-commits
• [llvm] [X86][windows] Return `fp128` on the stack (PR #194214)   via llvm-commits
• [llvm] [X86][windows] Return `fp128` on the stack (PR #194214)   Trevor Gross via llvm-commits
• [llvm] [GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (PR #191260)   via llvm-commits
• [llvm] [X86][windows] Return `fp128` on the stack (PR #194214)   via llvm-commits
• [llvm] [X86][windows] Return `fp128` on the stack (PR #194214)   via llvm-commits
• [llvm] [llvm-readobj] --unwind: Dump .debug_frame in addition to .eh_frame (PR #194217)   Fangrui Song via llvm-commits
• [llvm] [llvm-readobj] --unwind: Dump .debug_frame in addition to .eh_frame (PR #194217)   via llvm-commits
• [llvm] [llvm-readobj] --unwind: Dump .debug_frame in addition to .eh_frame (PR #194217)   via llvm-commits
• [llvm] [X86][windows] Return `fp128` on the stack (PR #194214)   Trevor Gross via llvm-commits
• [llvm] [GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (PR #191260)   via llvm-commits
• [llvm] [GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (PR #191260)   via llvm-commits
• [llvm] [GlobalISel] Add `G_FSHL` and `G_FSHR` to computeKnownBits (PR #191260)   via llvm-commits
• [llvm] [llvm-readobj] --unwind: Dump .debug_frame in addition to .eh_frame (PR #194217)   Alexis Engelke via llvm-commits
• [llvm] [llvm-readobj] --unwind: Dump .debug_frame in addition to .eh_frame (PR #194217)   Alexis Engelke via llvm-commits
• [llvm] [llvm-readobj] --unwind: Dump .debug_frame in addition to .eh_frame (PR #194217)   Alexis Engelke via llvm-commits
• [llvm] d593279 - [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (#192815)   via llvm-commits
• [llvm] [NVPTX] Scalarize `contract FMUL v2f32` to enable FMA fusion (PR #192815)   Princeton Ferro via llvm-commits
• [llvm] Users/sjoerdnijboer/fix cg pass manager skipping functions with ipra (PR #194219)   via llvm-commits
• [llvm] Users/sjoerdnijboer/fix cg pass manager skipping functions with ipra (PR #194219)   via llvm-commits
• [llvm] Users/sjoerdnijboer/fix cg pass manager skipping functions with ipra (PR #194219)   via llvm-commits
• [llvm] Users/sjoerdnijboer/fix cg pass manager skipping functions with ipra (PR #194219)   via llvm-commits
• [llvm] Users/sjoerdnijboer/fix cg pass manager skipping functions with ipra (PR #194219)   via llvm-commits
• [llvm] Users/sjoerdnijboer/fix cg pass manager skipping functions with ipra (PR #194219)   via llvm-commits
• [llvm] Remove GitHub Action seanmiddleditch/gha-setup-ninja (PR #194218)   Christoph Grüninger via llvm-commits
• [llvm] Remove GitHub Action seanmiddleditch/gha-setup-ninja (PR #194218)   via llvm-commits
• [llvm] [InstCombine] Fold lshr(add(or(shl X, C), K), C) when K uses only low bits (PR #194220)   via llvm-commits
• [llvm] [InstCombine] Fold lshr(add(or(shl X, C), K), C) when K uses only low bits (PR #194220)   via llvm-commits
• [llvm] [InstCombine] Fold lshr(add(or(shl X, C), K), C) when K uses only low bits (PR #194220)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [VPlan] Unify inner and outer loop paths (NFCI). (PR #192868)   via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   via llvm-commits
• [llvm] [SPARC] Add BSWAP tests (PR #192838)   via llvm-commits
• [llvm] [SPARC] Use hardware byteswapper when we have V9 (PR #191720)   via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] [llvm-ir2vec] Adding metadata for llvm-ir2vec python binding wheel builds (PR #194222)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] setting up pyproject.toml file for user-side wheel builds (PR #187929)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding metadata for llvm-ir2vec python binding wheel builds (PR #194222)   via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] [llvm-ir2vec] Adding metadata for llvm-ir2vec python binding wheel builds (PR #194222)   via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   LLVM Continuous Integration via llvm-commits
• [llvm] [CMake] Fix CMAKE_INSTALL_NAME_DIR ignored (PR #194226)   Mohamed Akram via llvm-commits
• [llvm] [CMake] Fix CMAKE_INSTALL_NAME_DIR ignored (PR #194226)   via llvm-commits
• [llvm] aa3de78 - [SLP] Fix spill-cost cache lookup and predecessor scan   via llvm-commits
• [llvm] [SLP] Fix spill-cost cache lookup and predecessor scan (PR #192709)   Alexey Bataev via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Yingwei Zheng via llvm-commits
• [llvm] Revert "[ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (#185898)" (PR #194230)   David Green via llvm-commits
• [llvm] 6439bbe - Revert "[ARM] Fold SELECT (AND(X, 1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (#185898)" (#194230)   via llvm-commits
• [llvm] Revert "[ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (#185898)" (PR #194230)   David Green via llvm-commits
• [llvm] [llvm-profgen] Add support for ETM trace decoding (PR #191584)   LLVM Continuous Integration via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   David Green via llvm-commits
• [libc] [llvm] [libc][math][c23] Add exp10bf16 math function (PR #193299)   via llvm-commits
• [llvm] 4dafdf6 - [CodeGen] Add <2 x i128> value type (#193910)   via llvm-commits
• [llvm] [CodeGen] Add <2 x i128> value type (PR #193910)   via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for vector add on vNi128 (PR #193911)   via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for vector add on vNi128 (PR #193911)   via llvm-commits
• [llvm] Revert "[llvm-profgen] Add support for ETM trace decoding" (PR #194087)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
• [llvm] [AVR] Fix a bug of register allocation (PR #193908)   Ben Shi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_sqrt (PR #194231)   Mahmoud Naderi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_sqrt (PR #194231)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_sqrt (PR #194231)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for amdgcn_sqrt (PR #194231)   via llvm-commits
• [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)   via llvm-commits
• [llvm] [NVPTX] Implemented istruncatefree and iszextfree alongwith test cases. (PR #115139)   via llvm-commits
• [llvm] [llvm-otool] Add -m flag and archive(member) input syntax (PR #194234)   Ryan Mansfield via llvm-commits
• [llvm] [llvm-otool] Add -m flag and archive(member) input syntax (PR #194234)   via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Nikita Popov via llvm-commits
• [llvm] [llvm-otool] Add -m flag and archive(member) input syntax (PR #194234)   Ryan Mansfield via llvm-commits
• [llvm] 2d789ff - [VPlan] Verify and handle FOR legality during header phi creation (NFC). (#191298)   via llvm-commits
• [llvm] [VPlan] Verify and handle FOR legality during header phi creation (NFC). (PR #191298)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Directly use masks on recipes in dropPoisonGen (PR #193978)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] Optimize vector fmul(sitofp/uitofp, 1/2^N) -> scvtf/ucvtf (PR #141480)   David Green via llvm-commits
• [llvm] [offload] Fix use of AsyncInfoWrapper's finalize function (PR #194098)   Robert Imschweiler via llvm-commits
• [llvm] [offload] Fix use of AsyncInfoWrapper's finalize function (PR #194098)   Robert Imschweiler via llvm-commits
• [llvm] [llvm][.gitignore] Ignore .agents directory (PR #194236)   Sirui Mu via llvm-commits
• [llvm] [llvm-otool] Add -m flag and archive(member) input syntax (PR #194234)   via llvm-commits
• [llvm] [llvm-otool] Add -m flag and archive(member) input syntax (PR #194234)   Ryan Mansfield via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [PGO][ICP] Prevent indirect call promotion to functions with incompatible target features (PR #192142)   Teresa Johnson via llvm-commits
• [llvm] [PGO][ICP] Prevent indirect call promotion to functions with incompatible target features (PR #192142)   Teresa Johnson via llvm-commits
• [llvm] [PGO][ICP] Prevent indirect call promotion to functions with incompatible target features (PR #192142)   Teresa Johnson via llvm-commits
• [llvm] [PGO][ICP] Prevent indirect call promotion to functions with incompatible target features (PR #192142)   Teresa Johnson via llvm-commits
• [llvm] [RFC][DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] c65bcf2 - [InstCombine] Div ceil optimizations (#190175)   via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Yingwei Zheng via llvm-commits
• [llvm] [AVR] Fix a bug of register allocation (PR #193908)   Carl Peto via llvm-commits
• [llvm] [AArch64] Optimize vector fmul(sitofp/uitofp, 1/2^N) -> scvtf/ucvtf (PR #141480)   JP Hafer via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [ARM] Remove redundant setOperationAction (NFC) (PR #194241)   via llvm-commits
• [llvm] [ARM] Remove redundant setOperationAction (NFC) (PR #194241)   via llvm-commits
• [llvm] [llvm-otool] Add -m flag and archive(member) input syntax (PR #194234)   Ryan Mansfield via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossDiagonal intrinsic support (PR #188567)   via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Ryan Buchner via llvm-commits
• [llvm] [ARM] Lower SetCC like we do on AArch64 (PR #193841)   via llvm-commits
• [llvm] [ARM] Custom Lower SetCC (PR #193841)   via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Takashi Idobe via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Takashi Idobe via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Takashi Idobe via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Takashi Idobe via llvm-commits
• [llvm] [SLP][NFC]Add a test with the incorrect vectorization for fully matched, but reordered, node, NFC (PR #194244)   Alexey Bataev via llvm-commits
• [llvm] 91805dc - [SLP][NFC]Add a test with the incorrect vectorization for fully matched, but reordered, node, NFC   via llvm-commits
• [llvm] [SLP][NFC]Add a test with the incorrect vectorization for fully matched, but reordered, node, NFC (PR #194244)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC]Add a test with the incorrect vectorization for fully matched, but reordered, node, NFC (PR #194244)   via llvm-commits
• [llvm] [AArch64] Combine (zext i8 * 0x010101...) to NEON dup (PR #194246)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_select (PR #194199)   Ryan Buchner via llvm-commits
• [llvm] [AArch64] Combine (zext i8 * 0x010101...) to NEON dup (PR #194246)   via llvm-commits
• [llvm] [AArch64] Combine (zext i8 * 0x010101...) to NEON dup (PR #194246)   via llvm-commits
• [llvm] [AArch64] Combine (zext i8 * 0x010101...) to NEON dup (PR #194246)   via llvm-commits
• [llvm] [VectorCombine] Handle widening/narrowing bitcasts in foldShuffleToIdentity (PR #187870)   via llvm-commits
• [llvm] [SLP] Reuse diamond-matched gather across asymmetric reorder/reuse (PR #194247)   Alexey Bataev via llvm-commits
• [llvm] [VectorCombine] Handle widening/narrowing bitcasts in foldShuffleToIdentity (PR #187870)   via llvm-commits
• [llvm] 8efcfc2 - [SLP] Reuse diamond-matched gather across asymmetric reorder/reuse   via llvm-commits
• [llvm] [SLP] Reuse diamond-matched gather across asymmetric reorder/reuse (PR #194247)   via llvm-commits
• [llvm] [SLP] Reuse diamond-matched gather across asymmetric reorder/reuse (PR #194247)   Alexey Bataev via llvm-commits
• [llvm] [VectorCombine] Handle widening/narrowing bitcasts in foldShuffleToIdentity (PR #187870)   via llvm-commits
• [llvm] [VectorCombine] Handle widening/narrowing bitcasts in foldShuffleToIdentity (PR #187870)   via llvm-commits
• [llvm] [VectorCombine] Handle widening/narrowing bitcasts in foldShuffleToIdentity (PR #187870)   via llvm-commits
• [llvm] [VectorCombine] Handle widening/narrowing bitcasts in foldShuffleToIdentity (PR #187870)   via llvm-commits
• [llvm] [InstCombine] Div ceil optimizations (PR #190175)   Takashi Idobe via llvm-commits
• [clang] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Luke Lau via llvm-commits
• [llvm] [LLVM] Create `lf_alias` nodes for `typedef` and `using` (PR #153936)   Alexandre Ganea via llvm-commits
• [llvm] [SLP]Vectorize operand chains of non-vectorizable instructions (PR #194248)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Vectorize operand chains of non-vectorizable instructions (PR #194248)   via llvm-commits
• [llvm] [RISCV] Update the canonical extension order (PR #192392)   Taufiq Rahman via llvm-commits
• [llvm] adds `<cstdlib>` to `ProgramStack.cpp` (PR #194249)   Christopher Di Bella via llvm-commits
• [llvm] [RISCV] Update the canonical extension order (PR #192392)   Taufiq Rahman via llvm-commits
• [llvm] adds `<cstdlib>` to `ProgramStack.cpp` (PR #194249)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Luke Lau via llvm-commits
• [clang] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [RISCV] Update the canonical extension order (PR #192392)   Taufiq Rahman via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Add pre-legalizer combines for AVGFLOOR and AVGCEIL (PR #192866)   David Green via llvm-commits
• [llvm] [PGO][ICP] Prevent indirect call promotion to functions with incompatible target features (PR #192142)   Han Shen via llvm-commits
• [llvm] [PGO][ICP] Prevent indirect call promotion to functions with incompatible target features (PR #192142)   Han Shen via llvm-commits
• [llvm] [PGO][ICP] Prevent indirect call promotion to functions with incompatible target features (PR #192142)   Han Shen via llvm-commits
• [llvm] [SLP]Vectorize operand chains of non-vectorizable instructions (PR #194248)   Alexey Bataev via llvm-commits
• [llvm] [AArch64] Custom lower STRICT_FSETCCS for MVT::bf16 (PR #194250)   via llvm-commits
• [llvm] [AArch64] Custom lower STRICT_FSETCCS for MVT::bf16 (PR #194250)   via llvm-commits
• [llvm] [AArch64] Custom lower STRICT_FSETCCS for MVT::bf16 (PR #194250)   via llvm-commits
• [llvm] [AArch64] Custom lower STRICT_FSETCCS for MVT::bf16 (PR #194250)   via llvm-commits
• [llvm] [FileCheck] --dump-input: render search ranges with `{` ... `}` brackets (PR #194251)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Add disjoint or tests for rshrn and raddhn. NFC (PR #194252)   David Green via llvm-commits
• [llvm] 7b43dcd - [AArch64] Add disjoint or tests for rshrn and raddhn. NFC (#194252)   via llvm-commits
• [llvm] [AArch64] Add disjoint or tests for rshrn and raddhn. NFC (PR #194252)   David Green via llvm-commits
• [llvm] [FileCheck] --dump-input: render search ranges with `{` ... `}` brackets (PR #194251)   via llvm-commits
• [llvm] [AArch64] Custom lower STRICT_FSETCCS for MVT::bf16 (PR #194250)   via llvm-commits
• [llvm] fbac55b - [AArch64] Optimize vector fmul(sitofp/uitofp, 1/2^N) -> scvtf/ucvtf (#141480)   via llvm-commits
• [llvm] [AArch64] Optimize vector fmul(sitofp/uitofp, 1/2^N) -> scvtf/ucvtf (PR #141480)   David Green via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Simon Pilgrim via llvm-commits
• [llvm] Remove unneeded AND node, now that ARM does not do UndefinedBooleanContent anymore (NFC) (PR #194253)   via llvm-commits
• [llvm] Remove unneeded AND node, now that ARM does not do UndefinedBooleanContent anymore (NFC) (PR #194253)   via llvm-commits
• [llvm] Remove unneeded AND node, now that ARM does not do UndefinedBooleanContent anymore (NFC) (PR #194253)   via llvm-commits
• [llvm] [VPlan] Support scalarizing vectorized structs in VPTransformState::get() (PR #194113)   Thurston Dang via llvm-commits
• [llvm] [VPlan] Support scalarizing vectorized structs in VPTransformState::get() (PR #194113)   Thurston Dang via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Alexander Richardson via llvm-commits
• [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Alexander Richardson via llvm-commits
• [llvm] [FileCheck] --dump-input: Elide middle of underlines for no-match (PR #192908)   Fangrui Song via llvm-commits
• [llvm] [ARM] Remove unneeded AND node, now that ARM does not do UndefinedBooleanContent anymore (NFC) (PR #194253)   via llvm-commits
• [compiler-rt] [compiler-rt] Improve ubsan-minimal runtime for GPU use (PR #193597)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan][AIX] Preserve original allocation alignment through realloc (PR #184967)   via llvm-commits
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• [compiler-rt] [ASan][AIX] Preserve original allocation alignment through realloc (PR #184967)   via llvm-commits
• [llvm] [MC][AsmParser]: Cache files loaded by .incbin across repeated directives #62339 (PR #194254)   via llvm-commits
• [llvm] [MC][AsmParser]: Cache files loaded by .incbin across repeated directives #62339 (PR #194254)   via llvm-commits
• [compiler-rt] [ASan][AIX] Preserve original allocation alignment through realloc (PR #184967)   Vitaly Buka via llvm-commits
• [compiler-rt] [ASan][AIX] Preserve original allocation alignment through realloc (PR #184967)   Vitaly Buka via llvm-commits
• [llvm] [MC][AsmParser]: Cache files loaded by .incbin across repeated directives #62339 (PR #194254)   via llvm-commits
• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   via llvm-commits
• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   Vitaly Buka via llvm-commits
• [llvm] [MC][AsmParser]: Cache files loaded by .incbin across repeated directives (PR #194254)   via llvm-commits
• [llvm] [MC][AsmParser]: Cache files loaded by .incbin across repeated directives (PR #194254)   via llvm-commits
• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   Vitaly Buka via llvm-commits
• [llvm] adds `<cstdlib>` to `ProgramStack.cpp` (PR #194249)   Aiden Grossman via llvm-commits
• [llvm] Remove GitHub Action seanmiddleditch/gha-setup-ninja (PR #194218)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   Vitaly Buka via llvm-commits
• [llvm] Remove GitHub Action seanmiddleditch/gha-setup-ninja (PR #194218)   Aiden Grossman via llvm-commits
• [llvm] Remove GitHub Action seanmiddleditch/gha-setup-ninja (PR #194218)   via llvm-commits
• [llvm] [libcxx][Github] Bump libcxx runners to the next runner set (PR #194212)   Aiden Grossman via llvm-commits
• [llvm] [libcxx][Github] Bump libcxx runners to the next runner set (PR #194212)   via llvm-commits
• [llvm] [libcxx][Github] Bump libcxx runners to the next runner set (PR #194212)   via llvm-commits
• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   Vitaly Buka via llvm-commits
• [compiler-rt] [Asan]Add align argument to Realloc() (PR #194255)   via llvm-commits
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• [compiler-rt] [Asan]Add align argument to Realloc() (PR #194255)   via llvm-commits
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• [clang] [compiler-rt] [lldb] [llvm] [mlir] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Pedro Lobo via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Pedro Lobo via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Pedro Lobo via llvm-commits
• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   via llvm-commits
• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   via llvm-commits
• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   via llvm-commits
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• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   via llvm-commits
• [compiler-rt] [ASan] Preserve original allocation alignment through realloc (PR #184967)   via llvm-commits
• [compiler-rt] [compiler-rt][sanitizer] Remove linux/scc.h (PR #194116)   Vitaly Buka via llvm-commits
• [llvm] [libcxx][Github] Bump libcxx runners to the next runner set (PR #194212)   Nikolas Klauser via llvm-commits
• [llvm] [libcxx][Github] Bump libcxx runners to the next runner set (PR #194212)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] [rtsan] Allow for rtsan/ubsan runtime combos (PR #193585)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [llvm] [rtsan] Allow for rtsan/ubsan runtime combos (PR #193585)   Vitaly Buka via llvm-commits
• [llvm] [LV] Add test cases where wide IV can cause spills. (PR #194260)   Florian Hahn via llvm-commits
• [llvm] 8f65ad5 - [ConstantFolding] Fold byte loads from constant globals (#194074)   via llvm-commits
• [llvm] [LV] Add test cases where wide IV can cause spills. (PR #194260)   Florian Hahn via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   Pedro Lobo via llvm-commits
• [llvm] [VPlan] Use RUN_VPLAN_PASS for later VPlan transforms. (PR #194261)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use RUN_VPLAN_PASS for later VPlan transforms. (PR #194261)   Florian Hahn via llvm-commits
• [llvm] [CodeGen] Port break-false-deps to new pass manager (PR #194262)   via llvm-commits
• [compiler-rt] [llvm] [PGO][AMDGPU] Add basic HIP offload PGO support (PR #177665)   Vitaly Buka via llvm-commits
• [llvm] [ARM] Remove unneeded AND node, now that ARM does not do UndefinedBooleanContent anymore (NFC) (PR #194253)   via llvm-commits
• [llvm] [ARM] Remove redundant setOperationAction (NFC) (PR #194241)   via llvm-commits
• [compiler-rt] [HWASan] [compiler-rt] Add tag_bits option to HWASan alloc (PR #192386)   Vitaly Buka via llvm-commits
• [llvm] [ConstantFolding] Fold byte loads from constant globals (PR #194074)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [compiler-rt][Fuchsia] Use dynamic shadow global in hwasan runtime (PR #192148)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [tsan] Add simulation to TSAN (PR #183200)   Vitaly Buka via llvm-commits
• [llvm] [VPlan] Move IV predicate handling to VPlan. (PR #192876)   Florian Hahn via llvm-commits
• [llvm] [ARM] Remove unneeded AND node, now that ARM does not do UndefinedBooleanContent anymore (NFC) (PR #194253)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Remove redundant setOperationAction (NFC) (PR #194241)   Simon Pilgrim via llvm-commits
• [llvm] [GIsel] Add constant-folding for more unary integer ops (PR #194265)   Alex MacLean via llvm-commits
• [llvm] 3b20615 - [LV] Add test cases where wide IV can cause spills. (#194260)   via llvm-commits
• [llvm] [LV] Add test cases where wide IV can cause spills. (PR #194260)   Florian Hahn via llvm-commits
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• [llvm] [VPlan] Dissolve replicate regions with vector live-outs. (PR #189022)   Florian Hahn via llvm-commits
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• [clang] [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Alexander Richardson via llvm-commits
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• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
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• [clang] [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Alexander Richardson via llvm-commits
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• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Erdem Yılmaz via llvm-commits
• [llvm] [offload] Fix use of AsyncInfoWrapper's finalize function (PR #194098)   Kevin Sala Penades via llvm-commits
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• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Ryan Buchner via llvm-commits
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• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Erdem Yılmaz via llvm-commits
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• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Erdem Yılmaz via llvm-commits
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• [llvm] [RISC-V][RVY] Introduce pure-capability ABI names (PR #194270)   via llvm-commits
• [llvm] [M68k][MC] Generate some encoding tests for MOVE (PR #194269)   Peter Mackay via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
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• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   via llvm-commits
• [llvm] [M68k][MC] Generate some encoding tests for MOVE (PR #194269)   Peter Mackay via llvm-commits
• [llvm] [ARM] Remove unneeded AND node, now that ARM does not do UndefinedBooleanContent anymore (NFC) (PR #194253)   via llvm-commits
• [llvm] [ARM] Custom Lower SetCC (PR #193841)   via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
• [llvm] [ARM] Fold more general CMOV in CMOV patterns (PR #194155)   via llvm-commits
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• [llvm] [RISC-V][RVY] Introduce pure-capability ABI names (PR #194270)   via llvm-commits
• [llvm] [DSE] Support memset loads (PR #194268)   via llvm-commits
• [llvm] [M68k][MC] Generate some encoding tests for MOVE (PR #194269)   Peter Mackay via llvm-commits
• [llvm] [M68k][MC] Generate some encoding tests for MOVE (PR #194269)   Peter Mackay via llvm-commits
• [llvm] [M68k][MC] Generate some encoding tests for MOVE (PR #194269)   Peter Mackay via llvm-commits
• [llvm] [M68k][MC] Generate some encoding tests for MOVE (PR #194269)   via llvm-commits
• [llvm] [LLVM][Transforms][Attributor] - Optimize AAIsDeadFunction::isAssumedDead (PR #189467)   Shilei Tian via llvm-commits
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• [compiler-rt] Reland "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…"" (PR #194273)   Vitaly Buka via llvm-commits
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• [compiler-rt] Reland "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…"" (PR #194273)   Vitaly Buka via llvm-commits
• [compiler-rt] Reland "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…"" (PR #194273)   via llvm-commits
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• [compiler-rt] Reland "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…"" (PR #194273)   Vitaly Buka via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Takashi Idobe via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Takashi Idobe via llvm-commits
• [llvm] [InstCombine] Fold X udiv (Y << Z) to (X >> Z) udiv Y when shl is nuw (PR #187098)   Takashi Idobe via llvm-commits
• [compiler-rt] Reland "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…"" (PR #194273)   Thurston Dang via llvm-commits
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• [compiler-rt] 652700b - Reland "[sanitizer] Fix race condition in GetNamedMappingFd with decorate_pro…"" (#194273)   via llvm-commits
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• [llvm] [CodeGen] Port mir-debugify to new pass manager (PR #193201)   via llvm-commits
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• [llvm] [AArch64] Combine (zext i8 * 0x010101...) to NEON dup (PR #194246)   via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   via llvm-commits
• [llvm] [X86] added computeKnownBits for X86ISD::GF2P8AFFINEQB (PR #194197)   Kartik Ohlan via llvm-commits
• [llvm] [ARM] Fold more general CMOV in CMOV patterns (PR #194155)   via llvm-commits
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• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #194274)   via llvm-commits
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• [clang] [compiler-rt] [safestack] Support statically linked executables (PR #190126)   Vitaly Buka via llvm-commits
• [llvm] [test][AMDGPU] Precommit test for Back-propagate wqm for sources of side-effect instruction (PR #193394)   Carl Ritson via llvm-commits
• [llvm] [X86][APX] Add VirtRegMap to non stack foldMemoryOperand too (PR #193423)   Phoebe Wang via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [llvm][lli] fix lli crash when run variable arguments function as a interpret (PR #173719)   via llvm-commits
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• [clang] [compiler-rt] [UBSan] Add check that detects division by zero for fixed-point types (PR #165181)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU] Fix RewriteMFMAFormSchedStage (PR #193429)   via llvm-commits
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• [clang] [compiler-rt] [UBSan] Add check that detects division by zero for fixed-point types (PR #165181)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [UBSan] Add check that detects division by zero for fixed-point types (PR #165181)   Vitaly Buka via llvm-commits
• [llvm] [CodeGen] Add MachineBlockHashInfoAnalysis for the new pass manager (PR #193107)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (PR #194173)   Luke Lau via llvm-commits
• [llvm] [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (PR #164561)   via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] [LoopUnroll] Allow runtime unroll with remainder for uniform trip count in convergent loops (PR #192819)   Luo Yuanke via llvm-commits
• [llvm] 09306f7 - [RISCV] Remove codegen for vp_add, vp_mul, vp_sub (#194173)   via llvm-commits
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• [lld] [lld-macho] Ignore labels on sections ld64 treats as ignoreLabel (PR #194275)   Zhaoxuan Jiang via llvm-commits
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• [lld] [llvm] [DTLTO] Refactor the DTLTO code. (PR #192629)   Teresa Johnson via llvm-commits
• [lld] [llvm] [DTLTO] Refactor the DTLTO code. (PR #192629)   Teresa Johnson via llvm-commits
• [lld] [llvm] [DTLTO] Refactor the DTLTO code. (PR #192629)   Teresa Johnson via llvm-commits
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• [libc] [llvm] [libc][math][c23] Improve rsqrtf16() function (PR #160639)   Anton Shepelev via llvm-commits
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• [llvm] [X86] Remove update_mir_test_checks.py NOTE (PR #194278)   Vitaly Buka via llvm-commits
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• [llvm] [X86] Mark machine-block-hash.mir as XFAIL on big-endian hosts (PR #194279)   Vitaly Buka via llvm-commits
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• [llvm] [X86] Mark machine-block-hash.mir as XFAIL on big-endian hosts (PR #194279)   Vitaly Buka via llvm-commits
• [llvm] [X86] Mark machine-block-hash.mir as XFAIL on big-endian hosts (PR #194279)   Vitaly Buka via llvm-commits
• [llvm] [CodeGen] Add MachineBlockHashInfoAnalysis for the new pass manager (PR #193107)   Vitaly Buka via llvm-commits
• [llvm] [MIPS] Remove InstrItinClass definitions and MipsSchedule.td (PR #188010)   via llvm-commits
• [llvm] [MIPS] Remove InstrItinClass definitions and MipsSchedule.td (PR #188010)   via llvm-commits
• [llvm] [MIPS] Remove InstrItinClass definitions and MipsSchedule.td (PR #188010)   via llvm-commits
• [llvm] [Mips] Fix $gp was restored when used as global register variable (PR #184975)   via llvm-commits
• [clang] [llvm] [mlir] [MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (PR #194280)   Fangrui Song via llvm-commits
• [clang] [llvm] [mlir] [MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (PR #194280)   via llvm-commits
• [clang] [llvm] [mlir] [MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (PR #194280)   via llvm-commits
• [clang] [llvm] [mlir] [MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (PR #194280)   via llvm-commits
• [clang] [llvm] [mlir] [MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (PR #194280)   via llvm-commits
• [llvm] [test][AMDGPU] Precommit test for Back-propagate wqm for sources of side-effect instruction (PR #193394)   LLVM Continuous Integration via llvm-commits
• [llvm] [GIsel] Add constant-folding for more unary integer ops (PR #194265)   Alex MacLean via llvm-commits
• [llvm] e042f67 - [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (#164561)   via llvm-commits
• [llvm] [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (PR #164561)   via llvm-commits
• [clang] [compiler-rt] [tsan] Add simulation to TSAN (PR #183200)   Chris Cotter via llvm-commits
• [llvm] [InstCombine] Reland #165975: Fix #163110: Support peeling off matching shifts from icmp operands via canEvaluateShifted (PR #190918)   via llvm-commits
• [llvm] db57208 - [X86] Mark machine-block-hash.mir as XFAIL on big-endian hosts (#194279)   via llvm-commits
• [llvm] [X86] Mark machine-block-hash.mir as XFAIL on big-endian hosts (PR #194279)   Vitaly Buka via llvm-commits
• [llvm] [X86] Remove update_mir_test_checks.py NOTE (PR #194278)   Aiden Grossman via llvm-commits
• [llvm] [GIsel] Add combine (sub a, (mul x, C)) -> (add a, (mul x, -C)) (PR #194282)   Alex MacLean via llvm-commits
• [llvm] [GIsel] Add combine (sub a, (mul x, C)) -> (add a, (mul x, -C)) (PR #194282)   via llvm-commits
• [llvm] [GIsel] Add combine (sub a, (mul x, C)) -> (add a, (mul x, -C)) (PR #194282)   via llvm-commits
• [clang] [llvm] [mlir] [MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (PR #194280)   Aiden Grossman via llvm-commits
• [llvm] [X86] Remove update_mir_test_checks.py NOTE (PR #194278)   Thurston Dang via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   Zhaoxin Yang via llvm-commits
• [clang] [llvm] [mlir] [MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (PR #194280)   Alexander Richardson via llvm-commits
• [clang] [llvm] [mlir] [MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (PR #194280)   via llvm-commits
• [llvm] [RISC-V][RVY] Introduce pure-capability ABI names (PR #194270)   Alexander Richardson via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_select (PR #194199)   Pengcheng Wang via llvm-commits
• [llvm] [CodeGen] Add IPRA regression tests for empty/orphan internal functions (PR #194219)   Pengcheng Wang via llvm-commits
• [llvm] [Analysis] Visit orphan Functions in CGPassManager catch-up loop (PR #194219)   Pengcheng Wang via llvm-commits
• [clang] [compiler-rt] [tsan] Add simulation to TSAN (PR #183200)   Chris Cotter via llvm-commits
• [llvm] [X86] Mark machine-block-hash.mir as XFAIL on big-endian hosts (PR #194279)   LLVM Continuous Integration via llvm-commits
• [llvm] [GIsel] Add combine (sub a, (mul x, C)) -> (add a, (mul x, -C)) (PR #194282)   via llvm-commits
• [llvm] [GIsel] Add combine (sub a, (mul x, C)) -> (add a, (mul x, -C)) (PR #194282)   via llvm-commits
• [llvm] [test][AMDGPU] Precommit test for Back-propagate wqm for sources of side-effect instruction (PR #193394)   LLVM Continuous Integration via llvm-commits
• [llvm] List psutil as a dependency in pyproject.toml (PR #194285)   Alexander Richardson via llvm-commits
• [llvm] 41236fb - [GVN] Propagate isMemorySSAEnabled() into ValueTable (#193938)   via llvm-commits
• [llvm] [GVN] Propagate isMemorySSAEnabled() into ValueTable (PR #193938)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Propagate isMemorySSAEnabled() into ValueTable (PR #193938)   LLVM Continuous Integration via llvm-commits
• [llvm] List psutil as a dependency in pyproject.toml (PR #194285)   Aiden Grossman via llvm-commits
• [llvm] [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (PR #164561)   LLVM Continuous Integration via llvm-commits
• [llvm] List psutil as a dependency in pyproject.toml (PR #194285)   Alexander Richardson via llvm-commits
• [llvm] [X86] Remove update_mir_test_checks.py NOTE (PR #194278)   Vitaly Buka via llvm-commits
• [llvm] [ADT] Add unit tests for StableHashing (PR #194286)   Vitaly Buka via llvm-commits
• [llvm] [X86] Remove update_mir_test_checks.py NOTE (PR #194278)   Vitaly Buka via llvm-commits
• [llvm] [ADT] Add unit tests for StableHashing (PR #194286)   via llvm-commits
• [llvm] 2a09db4 - AMDGPU: Back-propagate wqm for sources of side-effect instruction (#193395)   via llvm-commits
• [llvm] AMDGPU: Back-propagate wqm for sources of side-effect instruction (PR #193395)   via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   Madhur Amilkanthwar via llvm-commits
• [llvm] [ADT] Add unit tests for StableHashing (PR #194286)   Vitaly Buka via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   Madhur Amilkanthwar via llvm-commits
• [llvm] AMDGPU: Back-propagate wqm for sources of side-effect instruction (PR #193395)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fix EHPadStack calculation in fixCallUnwindMismatches (PR #194184)   via llvm-commits
• [llvm] [NFC][ADT] Add unit tests for StableHashing (PR #194286)   Vitaly Buka via llvm-commits
• [llvm] [WebAssembly] Guard EHPadStack against underflow in fixCallUnwindMismatches (PR #192968)   via llvm-commits
• [llvm] 504930b - [X86] Remove update_mir_test_checks.py NOTE (#194278)   via llvm-commits
• [llvm] [X86] Remove update_mir_test_checks.py NOTE (PR #194278)   Vitaly Buka via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Clear close on descriptor members for box parents in USM (PR #194287)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Clear close on descriptor members for box parents in USM (PR #194287)   via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Clear close on descriptor members for box parents in USM (PR #194287)   via llvm-commits
• [llvm] [AMDGPU] Merge 32-bit VGPR copies into 64-bit copies (PR #193270)   Steffen Larsen via llvm-commits
• [llvm] [CodeGen] Fix partial def handling in HandlePhysRegUse and FindLastPartialDef (PR #186437)   Kiroo via llvm-commits
• [llvm] [CodeGen] Fix partial def handling in HandlePhysRegUse and FindLastPartialDef (PR #186437)   Kiroo via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Clear close on descriptor members for box parents in USM (PR #194287)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Clear close on descriptor members for box parents in USM (PR #194287)   Kareem Ergawy via llvm-commits
• [llvm] [VPlan] Use RUN_VPLAN_PASS for later VPlan transforms. (PR #194261)   LLVM Continuous Integration via llvm-commits
• [llvm] 1f9c611 - [LoopFusion][NFC] UTC gen some tests (#193755)   via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   Madhur Amilkanthwar via llvm-commits
• [clang] [llvm] [mlir] [MC] Take MCAsmInfo by reference in MCContext and TargetMachine. NFC (PR #194280)   Fangrui Song via llvm-commits
• [llvm] List psutil as a dependency in pyproject.toml (PR #194285)   Alexander Richardson via llvm-commits
• [llvm] [MC][AsmParser]: Cache files loaded by .incbin across repeated directives (PR #194254)   via llvm-commits
• [llvm] [MC][AsmParser]: Cache files loaded by .incbin across repeated directives (PR #194254)   via llvm-commits
• [llvm] [CodeGen][AMDGPU] Insert IMPLICIT_DEF for undef subreg operands in REG_SEQUENCE and preserve them during register coalescing (PR #189153)   via llvm-commits
• [clang] [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Chandana Mudda via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_select (PR #194199)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_select (PR #194199)   Luke Lau via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   via llvm-commits
• [llvm] Revert "[InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (#182630)" (PR #194292)   Craig Topper via llvm-commits
• [llvm] Revert "[InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (#182630)" (PR #194292)   via llvm-commits
• [llvm] Revert "[InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (#182630)" (PR #194292)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   Pengcheng Wang via llvm-commits
• [llvm] 4d2d6a0 - [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (#164943)   via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   Zhaoxin Yang via llvm-commits
• [llvm] [X86] Truncates i64 add arithmetic to i32 when known zeroes in upper 33 bits (PR #191619)   via llvm-commits
• [llvm] [NewPM] Wire up gc-empty-basic-blocks into pipeline (PR #194179)   Vikram Hegde via llvm-commits
• [llvm] [NFC][ADT] Add unit tests for StableHashing (PR #194286)   Fangrui Song via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][ADT] Add unit tests for StableHashing (PR #194286)   Fangrui Song via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Kevin Sala Penades via llvm-commits
• [llvm] [offload] draft POC: verify event synchronization (PR #193927)   Kevin Sala Penades via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoopFusion][NFC] UTC gen some tests (PR #193755)   LLVM Continuous Integration via llvm-commits
• [llvm] 4ab33dc - [RISCV] Remove codegen for vp_select (#194199)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_select (PR #194199)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_zext, vp_sext (PR #194295)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_zext, vp_sext (PR #194295)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_zext, vp_sext (PR #194295)   via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] [llvm][.gitignore] Ignore .agents directory (PR #194236)   Yanzuo Liu via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   Luke Lau via llvm-commits
• [llvm] AMDGPU: Back-propagate wqm for sources of side-effect instruction (PR #193395)   LLVM Continuous Integration via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [clang] [llvm] [RISCV][MC] Add experimental `Zvvmm` MC support (PR #193956)   Pengcheng Wang via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [compiler-rt] [llvm] [X86] Explicitly set `getCmpLibcallReturnType` to i32 (PR #194296)   Trevor Gross via llvm-commits
• [compiler-rt] [llvm] [X86] Explicitly set `getCmpLibcallReturnType` to i32 (PR #194296)   via llvm-commits
• [compiler-rt] [llvm] [X86] Explicitly set `getCmpLibcallReturnType` to i32 (PR #194296)   Trevor Gross via llvm-commits
• [compiler-rt] [llvm] [X86] Explicitly set `getCmpLibcallReturnType` to i32 (PR #194296)   via llvm-commits
• [clang] [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [compiler-rt] [llvm] [X86] Explicitly set `getCmpLibcallReturnType` to i32 (PR #194296)   Trevor Gross via llvm-commits
• [clang] [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] [ADT] Fix IWYU for hashing-adjacent files (PR #194297)   Fangrui Song via llvm-commits
• [llvm] [ADT] Fix IWYU for hashing-adjacent files (PR #194297)   Fangrui Song via llvm-commits
• [clang] [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [compiler-rt] [llvm] [X86] Explicitly set `getCmpLibcallReturnType` to i32 (PR #194296)   Trevor Gross via llvm-commits
• [clang] [compiler-rt] [llvm] [TargetLowering] Set the default `getCmpLibcallReturnType` to word size (PR #192441)   Trevor Gross via llvm-commits
• [llvm] bee932f - [NVPTX] Improve error diagnostic when handling unknown intrinsics (#191194)   via llvm-commits
• [llvm] [NVPTX] Improve error diagnostic when handling unknown intrinsics (PR #191194)   Antonio Frighetto via llvm-commits
• [llvm] [RISCV][NFC] Turn lowerVECTOR_SHUFFLE into a member function of RISCVTargetLowering (PR #194299)   Boyao Wang via llvm-commits
• [llvm] [RISCV][NFC] Turn lowerVECTOR_SHUFFLE into a member function of RISCVTargetLowering (PR #194299)   via llvm-commits
• [compiler-rt] [llvm] [X86] Explicitly set `getCmpLibcallReturnType` to i32 (PR #194296)   Phoebe Wang via llvm-commits
• [clang] [llvm] [InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [clang] [llvm] [InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] [llvm-readobj] --unwind: Dump .debug_frame in addition to .eh_frame (PR #194217)   James Henderson via llvm-commits
• [llvm] 30c5cfd - [RISCV] Remove codegen for vp_is_fpclass (#193222)   via llvm-commits
• [llvm] [RISCV] Remove codegen for vp_is_fpclass (PR #193222)   Luke Lau via llvm-commits
• [clang] [llvm] [InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] [VPlan] Add transform to replace VPWidenCanonicalIV with wide IV. (PR #194267)   Ramkumar Ramachandra via llvm-commits
• [llvm] Moving python bindings executable to tools/llvm-ir2vec/Bindings (PR #194301)   Nishant Sachdeva via llvm-commits
• [llvm] [VPlan] Add transform to replace VPWidenCanonicalIV with wide IV. (PR #194267)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add transform to replace VPWidenCanonicalIV with wide IV. (PR #194267)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add transform to replace VPWidenCanonicalIV with wide IV. (PR #194267)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add transform to replace VPWidenCanonicalIV with wide IV. (PR #194267)   Ramkumar Ramachandra via llvm-commits
• [llvm] [llvm-ir2vec] \Moving python bindings executable to tools/llvm-ir2vec/Bindings (PR #194301)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Moving python bindings executable to tools/llvm-ir2vec/Bindings (PR #194301)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Moving python bindings executable to tools/llvm-ir2vec/Bindings (PR #194301)   via llvm-commits
• [llvm] [llvm-ir2vec] Place IR2Vec Python bindings in the tools/llvm-ir2vec/Bindings build directory (PR #194301)   Nishant Sachdeva via llvm-commits
• [llvm] [RISCV][NFC] Turn lowerVECTOR_SHUFFLE into a member function of RISCVTargetLowering (PR #194299)   Pengcheng Wang via llvm-commits