[llvm] [ARM][MC] Reject unaligned Thumb2 LDRD/STRD post-index immediates (PR #193531)
Mark Murray via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 23 01:49:04 PDT 2026
https://github.com/MarkMurrayARM updated https://github.com/llvm/llvm-project/pull/193531
>From 5cd249acb94ec7aadd65298f1d712bdb8c5a171a Mon Sep 17 00:00:00 2001
From: Mark Murray <mark.murray at arm.com>
Date: Fri, 17 Apr 2026 15:03:28 +0100
Subject: [PATCH] [ARM][MC] Reject unaligned Thumb2 LDRD/STRD post-index
immediates
Also regenerate tests that get tripped by this.
---
llvm/lib/Target/ARM/ARMInstrThumb2.td | 1 +
llvm/test/MC/ARM/thumb-diagnostics.s | 20 ++++++++---
.../thumb2-ldrd-strd-post-unaligned-diag.s | 34 +++++++++++++++++++
3 files changed, 51 insertions(+), 4 deletions(-)
create mode 100644 llvm/test/MC/ARM/thumb2-ldrd-strd-post-unaligned-diag.s
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index 4f0cea8b00aac..36f87a9ea3a37 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -295,6 +295,7 @@ def t2addrmode_imm8s4_pre : T2AddrMode_Imm8s4 {
def t2am_imm8s4_offset_asmoperand : AsmOperandClass { let Name = "Imm8s4"; }
def t2am_imm8s4_offset : MemOperand {
let PrintMethod = "printT2AddrModeImm8s4OffsetOperand";
+ let ParserMatchClass = t2am_imm8s4_offset_asmoperand;
let EncoderMethod = "getT2ScaledImmOpValue<8,2>";
let DecoderMethod = "DecodeT2Imm8S4";
}
diff --git a/llvm/test/MC/ARM/thumb-diagnostics.s b/llvm/test/MC/ARM/thumb-diagnostics.s
index 171d60ac13f9a..3e9aba2c245d4 100644
--- a/llvm/test/MC/ARM/thumb-diagnostics.s
+++ b/llvm/test/MC/ARM/thumb-diagnostics.s
@@ -458,9 +458,21 @@
@ CHECK-ERRORS-V8: error: source register and base register can't be identical
@ CHECK-ERRORS-V8: strb r0, [r0], #1
@ CHECK-ERRORS-V8: ^
-@ CHECK-ERRORS-V8: error: source register and base register can't be identical
+@ CHECK-ERRORS-V8: error: invalid instruction, any one of the following would fix this:
@ CHECK-ERRORS-V8: strd r0, r1, [r0], #1
-@ CHECK-ERRORS-V8: ^
-@ CHECK-ERRORS-V8: error: source register and base register can't be identical
+@ CHECK-ERRORS-V8: ^
+@ CHECK-ERRORS-V8: note: instruction requires: arm-mode
+@ CHECK-ERRORS-V8: strd r0, r1, [r0], #1
+@ CHECK-ERRORS-V8: ^
+@ CHECK-ERRORS-V8: note: invalid operand for instruction
+@ CHECK-ERRORS-V8: strd r0, r1, [r0], #1
+@ CHECK-ERRORS-V8: ^
+@ CHECK-ERRORS-V8: error: invalid instruction, any one of the following would fix this:
+@ CHECK-ERRORS-V8: strd r1, r0, [r0], #1
+@ CHECK-ERRORS-V8: ^
+@ CHECK-ERRORS-V8: note: instruction requires: arm-mode
+@ CHECK-ERRORS-V8: strd r1, r0, [r0], #1
+@ CHECK-ERRORS-V8: ^
+@ CHECK-ERRORS-V8: note: invalid operand for instruction
@ CHECK-ERRORS-V8: strd r1, r0, [r0], #1
-@ CHECK-ERRORS-V8: ^
+@ CHECK-ERRORS-V8: ^
diff --git a/llvm/test/MC/ARM/thumb2-ldrd-strd-post-unaligned-diag.s b/llvm/test/MC/ARM/thumb2-ldrd-strd-post-unaligned-diag.s
new file mode 100644
index 0000000000000..caad9cdee883e
--- /dev/null
+++ b/llvm/test/MC/ARM/thumb2-ldrd-strd-post-unaligned-diag.s
@@ -0,0 +1,34 @@
+@ RUN: not llvm-mc -triple=thumbv7-linux-gnueabi -mattr=+thumb2 %s -o /dev/null 2>&1 | FileCheck %s
+
+.text
+.thumb
+
+ldrd r0, r1, [r2], #2
+strd r0, r1, [r2], #-6
+
+@ CHECK: note: invalid operand for instruction
+@ CHECK-NEXT: ldrd r0, r1, [r2], #2
+@ CHECK-NEXT: ^
+@ CHECK: note: invalid operand for instruction
+@ CHECK-NEXT: strd r0, r1, [r2], #-6
+@ CHECK-NEXT: ^
+
+ldrd r0, r1, [r2], #-1
+strd r0, r1, [r2], #5
+
+@ CHECK: note: invalid operand for instruction
+@ CHECK-NEXT: ldrd r0, r1, [r2], #-1
+@ CHECK-NEXT: ^
+@ CHECK: note: invalid operand for instruction
+@ CHECK-NEXT: strd r0, r1, [r2], #5
+@ CHECK-NEXT: ^
+
+ldrd r0, r1, [r2], #-15
+strd r0, r1, [r2], #30
+
+@ CHECK: note: invalid operand for instruction
+@ CHECK-NEXT: ldrd r0, r1, [r2], #-15
+@ CHECK-NEXT: ^
+@ CHECK: note: invalid operand for instruction
+@ CHECK-NEXT: strd r0, r1, [r2], #30
+@ CHECK-NEXT: ^
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