[llvm] [X86] Add crash test coverage for #193475 (PR #193690)

[Simon Pilgrim via llvm-commits]

https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/193690

None

>From 3589ec0053689c2f59f867b7cfe5729c0354c767 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Thu, 23 Apr 2026 09:36:11 +0100
Subject: [PATCH] [X86] Add crash test coverage for #193475

---
 llvm/test/CodeGen/X86/pr193475.ll | 32 +++++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/pr193475.ll

diff --git a/llvm/test/CodeGen/X86/pr193475.ll b/llvm/test/CodeGen/X86/pr193475.ll
new file mode 100644
index 0000000000000..84a37dbda8ab8
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr193475.ll
@@ -0,0 +1,32 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+
+ at ak = external global i16
+ at s = external global i16
+
+define i32 @main() {
+; CHECK-LABEL: main:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq ak at GOTPCREL(%rip), %rax
+; CHECK-NEXT:    movq s at GOTPCREL(%rip), %rcx
+; CHECK-NEXT:    movzwl (%rcx), %ecx
+; CHECK-NEXT:    movzwl (%rax), %eax
+; CHECK-NEXT:    movswl %ax, %ecx
+; CHECK-NEXT:    orl $65534, %eax # imm = 0xFFFE
+; CHECK-NEXT:    xorl %ecx, %eax
+; CHECK-NEXT:    retq
+  %i = load i16, ptr @ak, align 2
+  %i1 = load volatile i16, ptr @s, align 2
+  %i2 = load i16, ptr @ak, align 2
+  %i3 = xor i16 %i2, -1
+  %conv4211404 = zext i16 %i3 to i64
+  %xor422 = xor i64 1, %conv4211404
+  %conv3591399 = zext i16 %i to i64
+  %or424 = or i64 %xor422, %conv3591399
+  %conv333 = sext i16 %i to i32
+  %conv434 = zext i16 %i2 to i32
+  %i4 = trunc i64 %or424 to i32
+  %or436 = or i32 %conv434, %i4
+  %conv453 = xor i32 %conv333, %or436
+  ret i32 %conv453
+}