[llvm] 19b40f7 - [SPIR-V] Add SPV_AMD_weak_linkage extension (#193307)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 22 14:58:42 PDT 2026
Author: Dmitry Sidorov
Date: 2026-04-22T21:58:38Z
New Revision: 19b40f71fd7077bf1636afbc13e558c2a0f6ac6a
URL: https://github.com/llvm/llvm-project/commit/19b40f71fd7077bf1636afbc13e558c2a0f6ac6a
DIFF: https://github.com/llvm/llvm-project/commit/19b40f71fd7077bf1636afbc13e558c2a0f6ac6a.diff
LOG: [SPIR-V] Add SPV_AMD_weak_linkage extension (#193307)
Spec is available here:
https://github.com/KhronosGroup/SPIRV-Registry/pull/401
Added:
llvm/test/CodeGen/SPIRV/linkage/weak-linkage.ll
Modified:
llvm/docs/SPIRVUsage.rst
llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
llvm/lib/Target/SPIRV/SPIRVUtils.cpp
Removed:
################################################################################
diff --git a/llvm/docs/SPIRVUsage.rst b/llvm/docs/SPIRVUsage.rst
index 75a477b86da05..3ce35742ac4ff 100644
--- a/llvm/docs/SPIRVUsage.rst
+++ b/llvm/docs/SPIRVUsage.rst
@@ -223,6 +223,8 @@ Below is a list of supported SPIR-V extensions, sorted alphabetically by their e
- Adds instructions for dot product operations on integer vectors with optional accumulation. Integer vectors includes 4-component vector of 8-bit integers and 4-component vectors of 8-bit integers packed into 32-bit integers.
* - ``SPV_KHR_linkonce_odr``
- Allows to use the LinkOnceODR linkage type that lets a function or global variable to be merged with other functions or global variables of the same name when linkage occurs.
+ * - ``SPV_AMD_weak_linkage``
+ - Allows to use the Weak linkage type that lets a function or global variable to be replaced by a definition with Export linkage from another module during linking.
* - ``SPV_KHR_no_integer_wrap_decoration``
- Adds decorations to indicate that a given instruction does not cause integer wrapping.
* - ``SPV_KHR_shader_clock``
diff --git a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
index 734a03ff60141..3d13cc01a3c18 100644
--- a/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVCommandLine.cpp
@@ -176,7 +176,9 @@ static const StringMap<SPIRV::Extension::Extension> SPIRVExtensionMap = {
{"SPV_EXT_image_raw10_raw12",
SPIRV::Extension::Extension::SPV_EXT_image_raw10_raw12},
{"SPV_INTEL_unstructured_loop_controls",
- SPIRV::Extension::Extension::SPV_INTEL_unstructured_loop_controls}};
+ SPIRV::Extension::Extension::SPV_INTEL_unstructured_loop_controls},
+ {"SPV_AMD_weak_linkage",
+ SPIRV::Extension::Extension::SPV_AMD_weak_linkage}};
bool SPIRVExtensionsParser::parse(cl::Option &O, StringRef ArgName,
StringRef ArgValue, ExtensionSet &Vals) {
diff --git a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
index 39d805b5a75ad..15c81ed06a697 100644
--- a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
@@ -1020,6 +1020,8 @@ static void addOpDecorateReqs(const MachineInstr &MI, unsigned DecIndex,
static_cast<SPIRV::LinkageType::LinkageType>(LinkageOp);
if (LnkType == SPIRV::LinkageType::LinkOnceODR)
Reqs.addExtension(SPIRV::Extension::SPV_KHR_linkonce_odr);
+ else if (LnkType == SPIRV::LinkageType::Weak)
+ Reqs.addExtension(SPIRV::Extension::SPV_AMD_weak_linkage);
} else if (Dec == SPIRV::Decoration::CacheControlLoadINTEL ||
Dec == SPIRV::Decoration::CacheControlStoreINTEL) {
Reqs.addExtension(SPIRV::Extension::SPV_INTEL_cache_controls);
diff --git a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
index 56608a80f4b23..cd52181bfc436 100644
--- a/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
+++ b/llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
@@ -398,6 +398,7 @@ defm SPV_EXT_image_raw10_raw12 :ExtensionOperand<133, [EnvOpenCL, EnvVulkan]>;
defm SPV_ALTERA_arbitrary_precision_floating_point: ExtensionOperand<134, [EnvOpenCL]>;
defm SPV_KHR_fma : ExtensionOperand<135, [EnvVulkan, EnvOpenCL]>;
defm SPV_INTEL_masked_gather_scatter : ExtensionOperand<136, [EnvOpenCL]>;
+defm SPV_AMD_weak_linkage : ExtensionOperand<137, [EnvOpenCL]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define Capabilities enum values and at the same time
@@ -1258,6 +1259,7 @@ multiclass LinkageTypeOperand<bits<32> value, list<Capability> reqCapabilities>
defm Export : LinkageTypeOperand<0, [Linkage]>;
defm Import : LinkageTypeOperand<1, [Linkage]>;
defm LinkOnceODR : LinkageTypeOperand<2, [Linkage]>;
+defm Weak : LinkageTypeOperand<3, [Linkage]>;
//===----------------------------------------------------------------------===//
// Multiclass used to define AccessQualifier enum values and at the same time
diff --git a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
index c45b34ffe68bb..8cacb01a22194 100644
--- a/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVUtils.cpp
@@ -1203,6 +1203,10 @@ getSpirvLinkageTypeFor(const SPIRVSubtarget &ST, const GlobalValue &GV) {
ST.canUseExtension(SPIRV::Extension::SPV_KHR_linkonce_odr))
return SPIRV::LinkageType::LinkOnceODR;
+ if (GV.hasWeakLinkage() &&
+ ST.canUseExtension(SPIRV::Extension::SPV_AMD_weak_linkage))
+ return SPIRV::LinkageType::Weak;
+
return SPIRV::LinkageType::Export;
}
diff --git a/llvm/test/CodeGen/SPIRV/linkage/weak-linkage.ll b/llvm/test/CodeGen/SPIRV/linkage/weak-linkage.ll
new file mode 100644
index 0000000000000..338484e052be6
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/linkage/weak-linkage.ll
@@ -0,0 +1,31 @@
+; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_AMD_weak_linkage %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV-EXT
+; TODO: enable validation when SPIR-V Headers patch is merged
+; RUNx: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown --spirv-ext=+SPV_AMD_weak_linkage %s -o - -filetype=obj | spirv-val %}
+
+; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+; CHECK-SPIRV-EXT: Capability Linkage
+; CHECK-SPIRV-EXT: Extension "SPV_AMD_weak_linkage"
+; CHECK-SPIRV-EXT-DAG: OpDecorate %[[#]] LinkageAttributes "GV" Weak
+; CHECK-SPIRV-EXT-DAG: OpDecorate %[[#]] LinkageAttributes "square" Weak
+
+; CHECK-SPIRV-NOT: OpExtension "SPV_AMD_weak_linkage"
+; CHECK-SPIRV-NOT: OpDecorate %[[#]] LinkageAttributes "GV" Weak
+; CHECK-SPIRV-NOT: OpDecorate %[[#]] LinkageAttributes "square" Weak
+; CHECK-SPIRV-DAG: OpDecorate %[[#]] LinkageAttributes "GV" Export
+; CHECK-SPIRV-DAG: OpDecorate %[[#]] LinkageAttributes "square" Export
+
+ at GV = weak addrspace(1) global [3 x i32] zeroinitializer, align 4
+
+define spir_kernel void @k() {
+entry:
+ %call = call spir_func i32 @square(i32 2)
+ ret void
+}
+
+define weak dso_local spir_func i32 @square(i32 %in) {
+entry:
+ %mul = mul nsw i32 %in, %in
+ ret i32 %mul
+}
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