[llvm] [LV][RISCV] Add explicit LMUL controls via computeFeasibleMaxVF (PR #193091)

[Craig Topper via llvm-commits]

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@@ -340,6 +348,24 @@ RISCVTTIImpl::getPopcntSupport(unsigned TyWidth) const {
   return ST->hasCPOPLike() ? TTI::PSK_FastHardware : TTI::PSK_Software;
 }
 
+std::optional<ElementCount>
+RISCVTTIImpl::getMaxScalableVF(unsigned MaxWidthInBits) const {
+  if (MaxWidthInBits > ST->getELen() ||
+      (ST->getRealMinVLen() < RISCV::RVVBitsPerBlock))
+    return ElementCount::get(0, false);
+
+  MaxWidthInBits = std::max<unsigned>(8, MaxWidthInBits);
+  unsigned LMULMax = 1 << std::min<unsigned>(VectorPrimaryLMULMaxExp, 3);
+  if (!VectorPrimaryLMULMaxExp.getNumOccurrences()) {
+    LMULMax = 4;
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topperc wrote:

Is this changing the behavior of the vectorizer on non-SiFive7 cores?

https://github.com/llvm/llvm-project/pull/193091