[llvm] AMDGPU: Set transient stack alignment to 4 (PR #193517)

[Jay Foad via llvm-commits]

jayfoad wrote:

> Some of the frame index handling code seems to assume it can preserve values in SCC through an add by using an add carry, and clearing the low bit of the resultant pointer, which means an odd SP value could be corrupted.

Right, see https://reviews.llvm.org/D136169#3872475

https://github.com/llvm/llvm-project/pull/193517