[llvm] fc84323 - AMDGPU: Set transient stack alignment to 4 (#193517)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 23 03:01:58 PDT 2026
Author: Matt Arsenault
Date: 2026-04-23T11:01:54+01:00
New Revision: fc843236738b5b8085f393a22c421bee9d053233
URL: https://github.com/llvm/llvm-project/commit/fc843236738b5b8085f393a22c421bee9d053233
DIFF: https://github.com/llvm/llvm-project/commit/fc843236738b5b8085f393a22c421bee9d053233.diff
LOG: AMDGPU: Set transient stack alignment to 4 (#193517)
Added:
Modified:
llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp b/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
index c56a746d63000..e6a13d5e0f115 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
@@ -185,7 +185,9 @@ GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS,
InstrItins(getInstrItineraryForCPU(GPU)),
InstrInfo(initializeSubtargetDependencies(TT, GPU, FS)),
TLInfo(TM, *this),
- FrameLowering(TargetFrameLowering::StackGrowsUp, getStackAlignment(), 0) {
+ // Frame index expansion sometimes assumes the low bit of SP is 0
+ FrameLowering(TargetFrameLowering::StackGrowsUp, getStackAlignment(), 0,
+ /*TransAl=*/Align(4)) {
// clang-format on
MaxWavesPerEU = AMDGPU::IsaInfo::getMaxWavesPerEU(this);
EUsPerCU = AMDGPU::IsaInfo::getEUsPerCU(this);
More information about the llvm-commits
mailing list