[llvm] [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot` to expose more optimizations (PR #164561)

[via llvm-commits]

https://github.com/zhaoqi5 updated https://github.com/llvm/llvm-project/pull/164561

>From 8df441230d9003fad789cbc114734fdd0ab20ccc Mon Sep 17 00:00:00 2001
From: Qi Zhao <zhaoqi01 at loongson.cn>
Date: Wed, 22 Oct 2025 14:50:59 +0800
Subject: [PATCH] [LoongArch] Override `isLoadFromStackSlot/isStoreToStackSlot`
 to expose more optimizations

---
 .../Target/LoongArch/LoongArchInstrInfo.cpp   | 76 +++++++++++++++++++
 .../lib/Target/LoongArch/LoongArchInstrInfo.h |  9 +++
 2 files changed, 85 insertions(+)

diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
index 4b5ce311f7d52..c28038dc554bc 100644
--- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
@@ -192,6 +192,82 @@ void LoongArchInstrInfo::loadRegFromStackSlot(
       .addMemOperand(MMO);
 }
 
+Register LoongArchInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
+                                                 int &FrameIndex) const {
+  TypeSize Dummy = TypeSize::getZero();
+  return isLoadFromStackSlot(MI, FrameIndex, Dummy);
+}
+
+Register LoongArchInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,
+                                                 int &FrameIndex,
+                                                 TypeSize &MemBytes) const {
+  switch (MI.getOpcode()) {
+  default:
+    return 0;
+  case LoongArch::LD_W:
+  case LoongArch::FLD_S:
+    MemBytes = TypeSize::getFixed(4);
+    break;
+  case LoongArch::LD_D:
+  case LoongArch::FLD_D:
+    MemBytes = TypeSize::getFixed(8);
+    break;
+  case LoongArch::VLD:
+    MemBytes = TypeSize::getFixed(16);
+    break;
+  case LoongArch::XVLD:
+    MemBytes = TypeSize::getFixed(32);
+    break;
+  }
+
+  if ((MI.getOperand(1).isFI()) &&  // is a stack slot
+      (MI.getOperand(2).isImm()) && // the imm is zero
+      (MI.getOperand(2).getImm() == 0)) {
+    FrameIndex = MI.getOperand(1).getIndex();
+    return MI.getOperand(0).getReg();
+  }
+
+  return 0;
+}
+
+Register LoongArchInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
+                                                int &FrameIndex) const {
+  TypeSize Dummy = TypeSize::getZero();
+  return isStoreToStackSlot(MI, FrameIndex, Dummy);
+}
+
+Register LoongArchInstrInfo::isStoreToStackSlot(const MachineInstr &MI,
+                                                int &FrameIndex,
+                                                TypeSize &MemBytes) const {
+  switch (MI.getOpcode()) {
+  default:
+    return 0;
+  case LoongArch::ST_W:
+  case LoongArch::FST_S:
+    MemBytes = TypeSize::getFixed(4);
+    break;
+  case LoongArch::ST_D:
+  case LoongArch::FST_D:
+    MemBytes = TypeSize::getFixed(8);
+    break;
+  case LoongArch::VST:
+    MemBytes = TypeSize::getFixed(16);
+    break;
+  case LoongArch::XVST:
+    MemBytes = TypeSize::getFixed(32);
+    break;
+  }
+
+  if ((MI.getOperand(1).isFI()) &&  // is a stack slot
+      (MI.getOperand(2).isImm()) && // the imm is zero
+      (MI.getOperand(2).getImm() == 0)) {
+    FrameIndex = MI.getOperand(1).getIndex();
+    return MI.getOperand(0).getReg();
+  }
+
+  return 0;
+}
+
 void LoongArchInstrInfo::movImm(MachineBasicBlock &MBB,
                                 MachineBasicBlock::iterator MBBI,
                                 const DebugLoc &DL, Register DstReg,
diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.h b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
index c25906e082c1c..a6b16ac9c59af 100644
--- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
+++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
@@ -48,6 +48,15 @@ class LoongArchInstrInfo : public LoongArchGenInstrInfo {
       unsigned SubReg = 0,
       MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
 
+  Register isLoadFromStackSlot(const MachineInstr &MI,
+                               int &FrameIndex) const override;
+  Register isLoadFromStackSlot(const MachineInstr &MI, int &FrameIndex,
+                               TypeSize &MemBytes) const override;
+  Register isStoreToStackSlot(const MachineInstr &MI,
+                              int &FrameIndex) const override;
+  Register isStoreToStackSlot(const MachineInstr &MI, int &FrameIndex,
+                              TypeSize &MemBytes) const override;
+
   // Materializes the given integer Val into DstReg.
   void movImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
               const DebugLoc &DL, Register DstReg, uint64_t Val,