[clang] [llvm] [AArch64] Add 9.7 CVT data processing intrinsics (PR #186807)

[via llvm-commits]

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@@ -997,6 +997,33 @@ def SVCVTLT_Z_F32_F16  : SInst<"svcvtlt_f32[_f16]", "dPh", "f", MergeZeroExp, "a
 def SVCVTLT_Z_F64_F32  : SInst<"svcvtlt_f64[_f32]", "dPh", "d", MergeZeroExp, "aarch64_sve_fcvtlt_f64f32",  [IsOverloadNone, VerifyRuntimeMode]>;
 
 }
+
+let SVETargetGuard = "sve2p3|sme2p3", SMETargetGuard = "sve2p3|sme2p3" in {
+def SVCVTZN_S8_F16  : SInst<"svcvtzn_s8[_f16_x2]",  "d2.O", "c", MergeNone, "aarch64_sve_fcvtzsn_x2", [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>;
+def SVCVTZN_S16_F32  : SInst<"svcvtzn_s16[_f32_x2]",  "d2.M", "s", MergeNone, "aarch64_sve_fcvtzsn_x2", [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>;
+def SVCVTZN_S32_F64  : SInst<"svcvtzn_s32[_f64_x2]",  "d2.N", "i", MergeNone, "aarch64_sve_fcvtzsn_x2", [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>;
+
+def SVCVTZN_U8_F16  : SInst<"svcvtzn_u8[_f16_x2]",  "d2.O", "Uc", MergeNone, "aarch64_sve_fcvtzun_x2", [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>;
+def SVCVTZN_U16_F32  : SInst<"svcvtzn_u16[_f32_x2]",  "d2.M", "Us", MergeNone, "aarch64_sve_fcvtzun_x2", [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>;
+def SVCVTZN_U32_F64  : SInst<"svcvtzn_u32[_f64_x2]",  "d2.N", "Ui", MergeNone, "aarch64_sve_fcvtzun_x2", [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>;
+
+def SVCVTT_F16_S8  : SInst<"svcvtt_f16[_s8]",  "Od", "c", MergeNone, "aarch64_sve_scvtflt_f16i8", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVCVTT_F32_S16  : SInst<"svcvtt_f32[_s16]",  "Md", "s", MergeNone, "aarch64_sve_scvtflt_f32i16", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVCVTT_F64_S32  : SInst<"svcvtt_f64[_s32]",  "Nd", "i", MergeNone, "aarch64_sve_scvtflt_f64i32", [IsOverloadNone, VerifyRuntimeMode]>;
+
+def SVCVTT_F16_U8  : SInst<"svcvtt_f16[_u8]",  "Od", "Uc", MergeNone, "aarch64_sve_ucvtflt_f16i8", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVCVTT_F32_U16  : SInst<"svcvtt_f32[_u16]",  "Md", "Us", MergeNone, "aarch64_sve_ucvtflt_f32i16", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVCVTT_F64_U32  : SInst<"svcvtt_f64[_u32]",  "Nd", "Ui", MergeNone, "aarch64_sve_ucvtflt_f64i32", [IsOverloadNone, VerifyRuntimeMode]>;
+
+def SVCVTB_F16_S8  : SInst<"svcvtb_f16[_s8]",  "Od", "c", MergeNone, "aarch64_sve_scvtfb_f16i8", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVCVTB_F32_S16  : SInst<"svcvtb_f32[_s16]",  "Md", "s", MergeNone, "aarch64_sve_scvtfb_f32i16", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVCVTB_F64_S32  : SInst<"svcvtb_f64[_s32]",  "Nd", "i", MergeNone, "aarch64_sve_scvtfb_f64i32", [IsOverloadNone, VerifyRuntimeMode]>;
+
+def SVCVTB_F16_U8  : SInst<"svcvtb_f16[_u8]",  "Od", "Uc", MergeNone, "aarch64_sve_ucvtfb_f16i8", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVCVTB_F32_U16  : SInst<"svcvtb_f32[_u16]",  "Md", "Us", MergeNone, "aarch64_sve_ucvtfb_f32i16", [IsOverloadNone, VerifyRuntimeMode]>;
+def SVCVTB_F64_U32  : SInst<"svcvtb_f64[_u32]",  "Nd", "Ui", MergeNone, "aarch64_sve_ucvtfb_f64i32", [IsOverloadNone, VerifyRuntimeMode]>;
----------------
Lukacma wrote:

```suggestion
foreach suffix = ["b", "t"  ] in {
def SVCVT # !toupper(suffix) # _S: SInst<"svcvt" # suffix # "[_{d}_{1}]",  "d^", "hfd", MergeNone, "aarch64_sve_scvtf" # suffix, [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>;

def SVCVT # !toupper(suffix) # _U: SInst<"svcvt" # suffix # "[_{d}_{1}]",  "de", "hfd", MergeNone, "aarch64_sve_ucvtf" # suffix, [IsOverloadWhileOrMultiVecCvt, VerifyRuntimeMode]>;
}
```

Okay so as you can see this can be expressed more concisely (assuming it compiles, but it should). This will require adding new option to Prototype modifiers whose behaviour will be analogous to 'e' just with signed integer instead. I named it "^" for now, but you should use different letter. I would personally drop toupper as is just a name, but I am fine either way. Also I am not sure why you defined so many LLVM intrinsics instead of overloading? Additionally I think _f* might not need to be part of the short name. The only way it would be needed is if they planned 4-way widening for this. This might be worth discussing in ACLE.

https://github.com/llvm/llvm-project/pull/186807