[llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)

[Luke Lau via llvm-commits]

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@@ -2051,14 +2053,16 @@ define signext i32 @vreduce_mul_nxv4i32(<vscale x 4 x i32> %v) {
 ; RV64-LABEL: vreduce_mul_nxv4i32:
 ; RV64:       # %bb.0:
 ; RV64-NEXT:    li a1, 0
+; RV64-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
+; RV64-NEXT:    vmul.vv v8, v8, v9
 ; RV64-NEXT:    csrr a2, vlenb
-; RV64-NEXT:    srli a2, a2, 1
+; RV64-NEXT:    srli a2, a2, 2
 ; RV64-NEXT:    li a0, 1
-; RV64-NEXT:    vsetivli zero, 1, e32, m2, ta, ma
 ; RV64-NEXT:  .LBB122_1: # %rdx.loop
 ; RV64-NEXT:    # =>This Inner Loop Header: Depth=1
-; RV64-NEXT:    vslidedown.vx v10, v8, a1
-; RV64-NEXT:    vmv.x.s a3, v10
+; RV64-NEXT:    vsetivli zero, 1, e32, m1, ta, ma
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lukel97 wrote:

I feel like I've seen this pattern of `RISCVInsertVSETVLI::doPRE` failing quite a bit, it would be nice to hoist this vsetvli out. Doesn't need to block this PR though given that we previously didn't have any baseline for this lowering

https://github.com/llvm/llvm-project/pull/193528