[llvm] [RISCV] Optimize scalable multiply reductions lowerings (PR #193528)

[Philip Reames via llvm-commits]

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@@ -2034,14 +2034,16 @@ define signext i32 @vreduce_mul_nxv4i32(<vscale x 4 x i32> %v) {
 ; RV32-LABEL: vreduce_mul_nxv4i32:
 ; RV32:       # %bb.0:
 ; RV32-NEXT:    li a1, 0
+; RV32-NEXT:    vsetvli a0, zero, e32, m1, ta, ma
+; RV32-NEXT:    vmul.vv v8, v8, v9
 ; RV32-NEXT:    csrr a2, vlenb
-; RV32-NEXT:    srli a2, a2, 1
+; RV32-NEXT:    srli a2, a2, 2
 ; RV32-NEXT:    li a0, 1
-; RV32-NEXT:    vsetivli zero, 1, e32, m2, ta, ma
 ; RV32-NEXT:  .LBB122_1: # %rdx.loop
 ; RV32-NEXT:    # =>This Inner Loop Header: Depth=1
-; RV32-NEXT:    vslidedown.vx v10, v8, a1
-; RV32-NEXT:    vmv.x.s a3, v10
+; RV32-NEXT:    vsetivli zero, 1, e32, m1, ta, ma
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preames wrote:

Just to note, this extra vsetvli is due to an unrelated problem in InsertVSETVLI's PRE.  Apparently we depend on one input being unknown to run PRE, and don't special case the loop case.  I'm exploring this separately.

https://github.com/llvm/llvm-project/pull/193528