[llvm] [AMDGPU] Enable co-exec scheduler for gfx950. (PR #193713)

[Matt Arsenault via llvm-commits]

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@@ -424,6 +426,12 @@ void AMDGPUCoExecSchedStrategy::initPolicy(MachineBasicBlock::iterator Begin,
          "coexec scheduler only supports top-down scheduling");
   RegionPolicy.OnlyTopDown = true;
   RegionPolicy.OnlyBottomUp = false;
+
+  // Enable lane-mask tracking so reaching-def queries used by the coexec
+  // heuristics see the correct sub-lane liveness after vgpr<->agpr conversions.
+  // Only needed on subtargets that actually have MAI/AGPR instructions.
+  if (Context->MF->getSubtarget<GCNSubtarget>().hasMAIInsts())
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arsenm wrote:

Also not related to the title 

https://github.com/llvm/llvm-project/pull/193713