[llvm] [SelectionDAG] Change SSUBO to do (LHS < RHS) XOR (RESULT < 0) (PR #191747)

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Thu Apr 23 01:57:46 PDT 2026


arsenm wrote:

> What's the motivation for this? Is it supposed to generate better code overall? (If so, that is not obvious to me from skimming the codegen changes.)

Some of the RISCV changes look like net -1 instruction 

https://github.com/llvm/llvm-project/pull/191747


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