[llvm] [AArch64][SDAG] Fix invalid index into STEP_VECTOR operand (PR #193236)

[David Sherwood via llvm-commits]

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@@ -0,0 +1,39 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu -mcpu=grace < %s -o -| FileCheck %s
+
+; Function Attrs: vscale_range(1,16)
+define <vscale x 8 x ptr> @masked_scatter_shft_left(ptr %f, <vscale x 8 x i1> %0, <vscale x 8 x i1> %1) #0 {
+; CHECK-LABEL: masked_scatter_shft_left:
+; CHECK:       // %bb.0: // %entry
+; CHECK-NEXT:    mov w9, #64 // =0x40
+; CHECK-NEXT:    punpklo p1.h, p0.b
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
+; CHECK-NEXT:    uunpklo z2.s, z1.h
+; CHECK-NEXT:    mov x8, xzr
+; CHECK-NEXT:    punpkhi p0.h, p0.b
+; CHECK-NEXT:    index z0.s, #0, w9
+; CHECK-NEXT:    rdvl x9, #16
+; CHECK-NEXT:    uunpkhi z1.s, z1.h
+; CHECK-NEXT:    st1b { z2.s }, p1, [x8, z0.s, sxtw]
+; CHECK-NEXT:    mov z2.s, w9
+; CHECK-NEXT:    add z0.s, z0.s, z2.s
+; CHECK-NEXT:    st1b { z1.s }, p0, [x8, z0.s, sxtw]
+; CHECK-NEXT:    index z0.d, x0, #8
+; CHECK-NEXT:    mov z1.d, z0.d
+; CHECK-NEXT:    mov z2.d, z0.d
+; CHECK-NEXT:    incd z1.d, all, mul #8
+; CHECK-NEXT:    incd z2.d, all, mul #16
+; CHECK-NEXT:    mov z3.d, z1.d
+; CHECK-NEXT:    incd z3.d, all, mul #16
+; CHECK-NEXT:    ret
+entry:
+  %2 = tail call <vscale x 8 x i64> @llvm.stepvector.nxv8i64()
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david-arm wrote:

Might be good to have more meaningful names for the SSA variables?

https://github.com/llvm/llvm-project/pull/193236