[llvm] [Mips] Optimize instr `slti+mfc1+cvt.s.d` to `slti+mfhc1` (PR #187463)

[YunQiang Su via llvm-commits]

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wzssyqa wrote:

I have a try to set MIPS32R6 here, 
```
llc -mtriple=mipsel-unknown-linux-gnu -mcpu=mips32r2
```
still produce this optimized code.
I think that we need to fix this problem first. otherwise, it will break ISA before r2.

https://github.com/llvm/llvm-project/pull/187463