[llvm] [AMDGPU][WIP] Added mask intrinsics (PR #193538)

[Jay Foad via llvm-commits]

jayfoad wrote:

I think these are way too low level. I don't see how the compiler could ever support them correctly. I don't even know what the "correct" behaviour would be. You would have to explain their semantics in LLVM IR. You can't just say "they have the random side effect of disabling _some_ of the instructions that the compiler might generate".

https://github.com/llvm/llvm-project/pull/193538