[llvm] [AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (PR #193712)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 23 04:05:39 PDT 2026
https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/193712
Updated test-names to test_names to allow use of update_llc_test_checks script
Hit this as it was proving impossible to keep up to date while working on topological dag regressions
>From 9eba3e62bd8ec630b8e53edd4d4c078afdd97b76 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Thu, 23 Apr 2026 12:03:48 +0100
Subject: [PATCH] [AArch64] Regenerate ldst-opt.ll checks to use
update_llc_test_checks
Updated test-names to test_names to allow use of update_llc_test_checks
Hit this as it was proving impossible to keep up to date while working on topological dag regressions
---
llvm/test/CodeGen/AArch64/ldst-opt.ll | 1330 ++++++++++++++++++-------
1 file changed, 950 insertions(+), 380 deletions(-)
diff --git a/llvm/test/CodeGen/AArch64/ldst-opt.ll b/llvm/test/CodeGen/AArch64/ldst-opt.ll
index 4e09e76457582..e002f3fba9d5b 100644
--- a/llvm/test/CodeGen/AArch64/ldst-opt.ll
+++ b/llvm/test/CodeGen/AArch64/ldst-opt.ll
@@ -1,5 +1,6 @@
-; RUN: llc -mtriple=aarch64-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 -disable-lsr -verify-machineinstrs -o - %s | FileCheck --check-prefix=CHECK --check-prefix=NOSTRICTALIGN %s
-; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+strict-align -aarch64-enable-atomic-cfg-tidy=0 -disable-lsr -verify-machineinstrs -o - %s | FileCheck --check-prefix=CHECK --check-prefix=STRICTALIGN %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=aarch64-linux-gnu -aarch64-enable-atomic-cfg-tidy=0 -disable-lsr -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,NOSTRICTALIGN %s
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+strict-align -aarch64-enable-atomic-cfg-tidy=0 -disable-lsr -verify-machineinstrs -o - %s | FileCheck --check-prefixes=CHECK,STRICTALIGN %s
; This file contains tests for the AArch64 load/store optimizer.
@@ -31,9 +32,11 @@
declare void @bar_byte(ptr, i8)
-define void @load-pre-indexed-byte(ptr %ptr) nounwind {
-; CHECK-LABEL: load-pre-indexed-byte
-; CHECK: ldrb w{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @load_pre_indexed_byte(ptr %ptr) nounwind {
+; CHECK-LABEL: load_pre_indexed_byte:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldrb w1, [x0, #32]!
+; CHECK-NEXT: b bar_byte
entry:
%a = getelementptr inbounds %struct.byte, ptr %ptr, i64 0, i32 1, i32 0
%add = load i8, ptr %a, align 4
@@ -44,9 +47,11 @@ bar:
ret void
}
-define void @store-pre-indexed-byte(ptr %ptr, i8 %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-byte
-; CHECK: strb w{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @store_pre_indexed_byte(ptr %ptr, i8 %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_byte:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: strb w1, [x0, #32]!
+; CHECK-NEXT: b bar_byte
entry:
%a = getelementptr inbounds %struct.byte, ptr %ptr, i64 0, i32 1, i32 0
store i8 %val, ptr %a, align 4
@@ -59,9 +64,11 @@ bar:
declare void @bar_halfword(ptr, i16)
-define void @load-pre-indexed-halfword(ptr %ptr) nounwind {
-; CHECK-LABEL: load-pre-indexed-halfword
-; CHECK: ldrh w{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @load_pre_indexed_halfword(ptr %ptr) nounwind {
+; CHECK-LABEL: load_pre_indexed_halfword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldrh w1, [x0, #32]!
+; CHECK-NEXT: b bar_halfword
entry:
%a = getelementptr inbounds %struct.halfword, ptr %ptr, i64 0, i32 1, i32 0
%add = load i16, ptr %a, align 4
@@ -72,9 +79,11 @@ bar:
ret void
}
-define void @store-pre-indexed-halfword(ptr %ptr, i16 %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-halfword
-; CHECK: strh w{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @store_pre_indexed_halfword(ptr %ptr, i16 %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_halfword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: strh w1, [x0, #32]!
+; CHECK-NEXT: b bar_halfword
entry:
%a = getelementptr inbounds %struct.halfword, ptr %ptr, i64 0, i32 1, i32 0
store i16 %val, ptr %a, align 4
@@ -87,9 +96,11 @@ bar:
declare void @bar_word(ptr, i32)
-define void @load-pre-indexed-word(ptr %ptr) nounwind {
-; CHECK-LABEL: load-pre-indexed-word
-; CHECK: ldr w{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @load_pre_indexed_word(ptr %ptr) nounwind {
+; CHECK-LABEL: load_pre_indexed_word:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldr w1, [x0, #32]!
+; CHECK-NEXT: b bar_word
entry:
%a = getelementptr inbounds %struct.word, ptr %ptr, i64 0, i32 1, i32 0
%add = load i32, ptr %a, align 4
@@ -100,9 +111,11 @@ bar:
ret void
}
-define void @store-pre-indexed-word(ptr %ptr, i32 %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-word
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @store_pre_indexed_word(ptr %ptr, i32 %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_word:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str w1, [x0, #32]!
+; CHECK-NEXT: b bar_word
entry:
%a = getelementptr inbounds %struct.word, ptr %ptr, i64 0, i32 1, i32 0
store i32 %val, ptr %a, align 4
@@ -115,9 +128,11 @@ bar:
declare void @bar_doubleword(ptr, i64)
-define void @load-pre-indexed-doubleword(ptr %ptr) nounwind {
-; CHECK-LABEL: load-pre-indexed-doubleword
-; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @load_pre_indexed_doubleword(ptr %ptr) nounwind {
+; CHECK-LABEL: load_pre_indexed_doubleword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldr x1, [x0, #32]!
+; CHECK-NEXT: b bar_doubleword
entry:
%a = getelementptr inbounds %struct.doubleword, ptr %ptr, i64 0, i32 1, i32 0
%add = load i64, ptr %a, align 8
@@ -128,9 +143,11 @@ bar:
ret void
}
-define void @store-pre-indexed-doubleword(ptr %ptr, i64 %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-doubleword
-; CHECK: str x{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @store_pre_indexed_doubleword(ptr %ptr, i64 %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_doubleword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x1, [x0, #32]!
+; CHECK-NEXT: b bar_doubleword
entry:
%a = getelementptr inbounds %struct.doubleword, ptr %ptr, i64 0, i32 1, i32 0
store i64 %val, ptr %a, align 8
@@ -143,9 +160,11 @@ bar:
declare void @bar_quadword(ptr, fp128)
-define void @load-pre-indexed-quadword(ptr %ptr) nounwind {
-; CHECK-LABEL: load-pre-indexed-quadword
-; CHECK: ldr q{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @load_pre_indexed_quadword(ptr %ptr) nounwind {
+; CHECK-LABEL: load_pre_indexed_quadword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldr q0, [x0, #32]!
+; CHECK-NEXT: b bar_quadword
entry:
%a = getelementptr inbounds %struct.quadword, ptr %ptr, i64 0, i32 1, i32 0
%add = load fp128, ptr %a, align 16
@@ -156,9 +175,11 @@ bar:
ret void
}
-define void @store-pre-indexed-quadword(ptr %ptr, fp128 %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-quadword
-; CHECK: str q{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @store_pre_indexed_quadword(ptr %ptr, fp128 %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_quadword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str q0, [x0, #32]!
+; CHECK-NEXT: b bar_quadword
entry:
%a = getelementptr inbounds %struct.quadword, ptr %ptr, i64 0, i32 1, i32 0
store fp128 %val, ptr %a, align 16
@@ -171,9 +192,11 @@ bar:
declare void @bar_float(ptr, float)
-define void @load-pre-indexed-float(ptr %ptr) nounwind {
-; CHECK-LABEL: load-pre-indexed-float
-; CHECK: ldr s{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @load_pre_indexed_float(ptr %ptr) nounwind {
+; CHECK-LABEL: load_pre_indexed_float:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldr s0, [x0, #32]!
+; CHECK-NEXT: b bar_float
entry:
%a = getelementptr inbounds %struct.float, ptr %ptr, i64 0, i32 1, i32 0
%add = load float, ptr %a, align 4
@@ -184,9 +207,11 @@ bar:
ret void
}
-define void @store-pre-indexed-float(ptr %ptr, float %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-float
-; CHECK: str s{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @store_pre_indexed_float(ptr %ptr, float %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_float:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str s0, [x0, #32]!
+; CHECK-NEXT: b bar_float
entry:
%a = getelementptr inbounds %struct.float, ptr %ptr, i64 0, i32 1, i32 0
store float %val, ptr %a, align 4
@@ -199,9 +224,11 @@ bar:
declare void @bar_double(ptr, double)
-define void @load-pre-indexed-double(ptr %ptr) nounwind {
-; CHECK-LABEL: load-pre-indexed-double
-; CHECK: ldr d{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @load_pre_indexed_double(ptr %ptr) nounwind {
+; CHECK-LABEL: load_pre_indexed_double:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldr d0, [x0, #32]!
+; CHECK-NEXT: b bar_double
entry:
%a = getelementptr inbounds %struct.double, ptr %ptr, i64 0, i32 1, i32 0
%add = load double, ptr %a, align 8
@@ -212,9 +239,11 @@ bar:
ret void
}
-define void @store-pre-indexed-double(ptr %ptr, double %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-double
-; CHECK: str d{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @store_pre_indexed_double(ptr %ptr, double %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_double:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str d0, [x0, #32]!
+; CHECK-NEXT: b bar_double
entry:
%a = getelementptr inbounds %struct.double, ptr %ptr, i64 0, i32 1, i32 0
store double %val, ptr %a, align 8
@@ -234,10 +263,12 @@ bar:
; (ldp|stp) w1, w2, [x0, #32]!
;
-define void @load-pair-pre-indexed-word(ptr %ptr) nounwind {
-; CHECK-LABEL: load-pair-pre-indexed-word
-; CHECK: ldp w{{[0-9]+}}, w{{[0-9]+}}, [x0, #32]!
-; CHECK-NOT: add x0, x0, #32
+define void @load_pair_pre_indexed_word(ptr %ptr) nounwind {
+; CHECK-LABEL: load_pair_pre_indexed_word:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: ldp w8, w9, [x0, #32]!
+; CHECK-NEXT: add w1, w8, w9
+; CHECK-NEXT: b bar_word
entry:
%a = getelementptr inbounds %struct.word, ptr %ptr, i64 0, i32 1, i32 0
%a1 = load i32, ptr %a, align 4
@@ -251,10 +282,11 @@ bar:
ret void
}
-define void @store-pair-pre-indexed-word(ptr %ptr, i32 %val) nounwind {
-; CHECK-LABEL: store-pair-pre-indexed-word
-; CHECK: stp w{{[0-9]+}}, w{{[0-9]+}}, [x0, #32]!
-; CHECK-NOT: add x0, x0, #32
+define void @store_pair_pre_indexed_word(ptr %ptr, i32 %val) nounwind {
+; CHECK-LABEL: store_pair_pre_indexed_word:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stp w1, w1, [x0, #32]!
+; CHECK-NEXT: b bar_word
entry:
%a = getelementptr inbounds %struct.word, ptr %ptr, i64 0, i32 1, i32 0
store i32 %val, ptr %a, align 4
@@ -283,10 +315,18 @@ bar:
%pre.struct.float = type { i32, float, float, float}
%pre.struct.double = type { i32, double, double, double}
-define i32 @load-pre-indexed-word2(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-word2
-; CHECK: ldr w{{[0-9]+}}, [x{{[0-9]+}}, #4]!
+define i32 @load_pre_indexed_word2(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_word2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB16_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr w0, [x8, #4]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB16_2: // %if.end
+; CHECK-NEXT: add x8, x2, #8
+; CHECK-NEXT: ldr w0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -301,10 +341,18 @@ return:
ret i32 %ret
}
-define i64 @load-pre-indexed-doubleword2(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-doubleword2
-; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}, #8]!
+define i64 @load_pre_indexed_doubleword2(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_doubleword2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB17_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr x0, [x8, #8]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB17_2: // %if.end
+; CHECK-NEXT: add x8, x2, #16
+; CHECK-NEXT: ldr x0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -319,10 +367,18 @@ return:
ret i64 %ret
}
-define <2 x i64> @load-pre-indexed-quadword2(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-quadword2
-; CHECK: ldr q{{[0-9]+}}, [x{{[0-9]+}}, #16]!
+define <2 x i64> @load_pre_indexed_quadword2(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_quadword2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB18_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr q0, [x8, #16]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB18_2: // %if.end
+; CHECK-NEXT: add x8, x2, #32
+; CHECK-NEXT: ldr q0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -337,10 +393,18 @@ return:
ret <2 x i64> %ret
}
-define float @load-pre-indexed-float2(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-float2
-; CHECK: ldr s{{[0-9]+}}, [x{{[0-9]+}}, #4]!
+define float @load_pre_indexed_float2(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_float2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB19_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr s0, [x8, #4]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB19_2: // %if.end
+; CHECK-NEXT: add x8, x2, #8
+; CHECK-NEXT: ldr s0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -355,10 +419,18 @@ return:
ret float %ret
}
-define double @load-pre-indexed-double2(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-double2
-; CHECK: ldr d{{[0-9]+}}, [x{{[0-9]+}}, #8]!
+define double @load_pre_indexed_double2(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_double2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB20_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr d0, [x8, #8]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB20_2: // %if.end
+; CHECK-NEXT: add x8, x2, #16
+; CHECK-NEXT: ldr d0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -373,10 +445,18 @@ return:
ret double %ret
}
-define i32 @load-pre-indexed-word3(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-word3
-; CHECK: ldr w{{[0-9]+}}, [x{{[0-9]+}}, #12]!
+define i32 @load_pre_indexed_word3(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_word3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB21_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr w0, [x8, #12]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB21_2: // %if.end
+; CHECK-NEXT: add x8, x2, #16
+; CHECK-NEXT: ldr w0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -391,10 +471,18 @@ return:
ret i32 %ret
}
-define i64 @load-pre-indexed-doubleword3(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-doubleword3
-; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}, #16]!
+define i64 @load_pre_indexed_doubleword3(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_doubleword3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB22_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr x0, [x8, #16]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB22_2: // %if.end
+; CHECK-NEXT: add x8, x2, #24
+; CHECK-NEXT: ldr x0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -409,10 +497,18 @@ return:
ret i64 %ret
}
-define <2 x i64> @load-pre-indexed-quadword3(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-quadword3
-; CHECK: ldr q{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define <2 x i64> @load_pre_indexed_quadword3(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_quadword3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB23_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr q0, [x8, #32]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB23_2: // %if.end
+; CHECK-NEXT: add x8, x2, #48
+; CHECK-NEXT: ldr q0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -427,10 +523,18 @@ return:
ret <2 x i64> %ret
}
-define float @load-pre-indexed-float3(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-float3
-; CHECK: ldr s{{[0-9]+}}, [x{{[0-9]+}}, #8]!
+define float @load_pre_indexed_float3(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_float3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB24_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr s0, [x8, #8]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB24_2: // %if.end
+; CHECK-NEXT: add x8, x2, #12
+; CHECK-NEXT: ldr s0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -445,10 +549,18 @@ return:
ret float %ret
}
-define double @load-pre-indexed-double3(ptr %this, i1 %cond,
- ptr %load2) nounwind {
-; CHECK-LABEL: load-pre-indexed-double3
-; CHECK: ldr d{{[0-9]+}}, [x{{[0-9]+}}, #16]!
+define double @load_pre_indexed_double3(ptr %this, i1 %cond, ptr %load2) nounwind {
+; CHECK-LABEL: load_pre_indexed_double3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB25_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: ldr d0, [x8, #16]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB25_2: // %if.end
+; CHECK-NEXT: add x8, x2, #24
+; CHECK-NEXT: ldr d0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -473,11 +585,18 @@ return:
;
; with X being either w0, x0, s0, d0 or q0.
-define void @store-pre-indexed-word2(ptr %this, i1 %cond,
- ptr %load2,
- i32 %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-word2
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}, #4]!
+define void @store_pre_indexed_word2(ptr %this, i1 %cond, ptr %load2, i32 %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_word2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB26_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str w3, [x8, #4]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB26_2: // %if.end
+; CHECK-NEXT: add x8, x2, #8
+; CHECK-NEXT: str w3, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -492,11 +611,18 @@ return:
ret void
}
-define void @store-pre-indexed-doubleword2(ptr %this, i1 %cond,
- ptr %load2,
- i64 %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-doubleword2
-; CHECK: str x{{[0-9]+}}, [x{{[0-9]+}}, #8]!
+define void @store_pre_indexed_doubleword2(ptr %this, i1 %cond, ptr %load2, i64 %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_doubleword2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB27_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str x3, [x8, #8]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB27_2: // %if.end
+; CHECK-NEXT: add x8, x2, #16
+; CHECK-NEXT: str x3, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -511,11 +637,18 @@ return:
ret void
}
-define void @store-pre-indexed-quadword2(ptr %this, i1 %cond,
- ptr %load2,
- <2 x i64> %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-quadword2
-; CHECK: str q{{[0-9]+}}, [x{{[0-9]+}}, #16]!
+define void @store_pre_indexed_quadword2(ptr %this, i1 %cond, ptr %load2, <2 x i64> %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_quadword2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB28_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str q0, [x8, #16]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB28_2: // %if.end
+; CHECK-NEXT: add x8, x2, #32
+; CHECK-NEXT: str q0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -530,11 +663,18 @@ return:
ret void
}
-define void @store-pre-indexed-float2(ptr %this, i1 %cond,
- ptr %load2,
- float %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-float2
-; CHECK: str s{{[0-9]+}}, [x{{[0-9]+}}, #4]!
+define void @store_pre_indexed_float2(ptr %this, i1 %cond, ptr %load2, float %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_float2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB29_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str s0, [x8, #4]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB29_2: // %if.end
+; CHECK-NEXT: add x8, x2, #8
+; CHECK-NEXT: str s0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -549,11 +689,18 @@ return:
ret void
}
-define void @store-pre-indexed-double2(ptr %this, i1 %cond,
- ptr %load2,
- double %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-double2
-; CHECK: str d{{[0-9]+}}, [x{{[0-9]+}}, #8]!
+define void @store_pre_indexed_double2(ptr %this, i1 %cond, ptr %load2, double %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_double2:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB30_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str d0, [x8, #8]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB30_2: // %if.end
+; CHECK-NEXT: add x8, x2, #16
+; CHECK-NEXT: str d0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -568,11 +715,18 @@ return:
ret void
}
-define void @store-pre-indexed-word3(ptr %this, i1 %cond,
- ptr %load2,
- i32 %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-word3
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}, #12]!
+define void @store_pre_indexed_word3(ptr %this, i1 %cond, ptr %load2, i32 %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_word3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB31_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str w3, [x8, #12]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB31_2: // %if.end
+; CHECK-NEXT: add x8, x2, #16
+; CHECK-NEXT: str w3, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -587,11 +741,18 @@ return:
ret void
}
-define void @store-pre-indexed-doubleword3(ptr %this, i1 %cond,
- ptr %load2,
- i64 %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-doubleword3
-; CHECK: str x{{[0-9]+}}, [x{{[0-9]+}}, #24]!
+define void @store_pre_indexed_doubleword3(ptr %this, i1 %cond, ptr %load2, i64 %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_doubleword3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB32_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str x3, [x8, #24]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB32_2: // %if.end
+; CHECK-NEXT: add x8, x2, #32
+; CHECK-NEXT: str x3, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -606,11 +767,18 @@ return:
ret void
}
-define void @store-pre-indexed-quadword3(ptr %this, i1 %cond,
- ptr %load2,
- <2 x i64> %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-quadword3
-; CHECK: str q{{[0-9]+}}, [x{{[0-9]+}}, #32]!
+define void @store_pre_indexed_quadword3(ptr %this, i1 %cond, ptr %load2, <2 x i64> %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_quadword3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB33_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str q0, [x8, #32]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB33_2: // %if.end
+; CHECK-NEXT: add x8, x2, #48
+; CHECK-NEXT: str q0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -625,11 +793,18 @@ return:
ret void
}
-define void @store-pre-indexed-float3(ptr %this, i1 %cond,
- ptr %load2,
- float %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-float3
-; CHECK: str s{{[0-9]+}}, [x{{[0-9]+}}, #8]!
+define void @store_pre_indexed_float3(ptr %this, i1 %cond, ptr %load2, float %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_float3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB34_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str s0, [x8, #8]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB34_2: // %if.end
+; CHECK-NEXT: add x8, x2, #12
+; CHECK-NEXT: str s0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -644,11 +819,18 @@ return:
ret void
}
-define void @store-pre-indexed-double3(ptr %this, i1 %cond,
- ptr %load2,
- double %val) nounwind {
-; CHECK-LABEL: store-pre-indexed-double3
-; CHECK: str d{{[0-9]+}}, [x{{[0-9]+}}, #16]!
+define void @store_pre_indexed_double3(ptr %this, i1 %cond, ptr %load2, double %val) nounwind {
+; CHECK-LABEL: store_pre_indexed_double3:
+; CHECK: // %bb.0:
+; CHECK-NEXT: tbz w1, #0, .LBB35_2
+; CHECK-NEXT: // %bb.1: // %if.then
+; CHECK-NEXT: ldr x8, [x0]
+; CHECK-NEXT: str d0, [x8, #16]!
+; CHECK-NEXT: ret
+; CHECK-NEXT: .LBB35_2: // %if.end
+; CHECK-NEXT: add x8, x2, #24
+; CHECK-NEXT: str d0, [x8]
+; CHECK-NEXT: ret
br i1 %cond, label %if.then, label %if.end
if.then:
%load1 = load ptr, ptr %this
@@ -673,9 +855,25 @@ return:
;
; with X being either w0, x0, s0, d0 or q0.
-define void @load-post-indexed-byte(ptr %array, i64 %count) nounwind {
-; CHECK-LABEL: load-post-indexed-byte
-; CHECK: ldrb w{{[0-9]+}}, [x{{[0-9]+}}], #4
+define void @load_post_indexed_byte(ptr %array, i64 %count) nounwind {
+; CHECK-LABEL: load_post_indexed_byte:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #2
+; CHECK-NEXT: .LBB36_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldurb w0, [x20, #-1]
+; CHECK-NEXT: bl "use-byte"
+; CHECK-NEXT: ldrb w0, [x20], #4
+; CHECK-NEXT: bl "use-byte"
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: b.ne .LBB36_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr i8, ptr %array, i64 2
br label %body
@@ -697,9 +895,25 @@ exit:
ret void
}
-define void @load-post-indexed-halfword(ptr %array, i64 %count) nounwind {
-; CHECK-LABEL: load-post-indexed-halfword
-; CHECK: ldrh w{{[0-9]+}}, [x{{[0-9]+}}], #8
+define void @load_post_indexed_halfword(ptr %array, i64 %count) nounwind {
+; CHECK-LABEL: load_post_indexed_halfword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #4
+; CHECK-NEXT: .LBB37_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldurh w0, [x20, #-2]
+; CHECK-NEXT: bl "use-halfword"
+; CHECK-NEXT: ldrh w0, [x20], #8
+; CHECK-NEXT: bl "use-halfword"
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: b.ne .LBB37_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr i16, ptr %array, i64 2
br label %body
@@ -721,9 +935,25 @@ exit:
ret void
}
-define void @load-post-indexed-word(ptr %array, i64 %count) nounwind {
-; CHECK-LABEL: load-post-indexed-word
-; CHECK: ldr w{{[0-9]+}}, [x{{[0-9]+}}], #16
+define void @load_post_indexed_word(ptr %array, i64 %count) nounwind {
+; CHECK-LABEL: load_post_indexed_word:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #8
+; CHECK-NEXT: .LBB38_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur w0, [x20, #-4]
+; CHECK-NEXT: bl "use-word"
+; CHECK-NEXT: ldr w0, [x20], #16
+; CHECK-NEXT: bl "use-word"
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: b.ne .LBB38_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr i32, ptr %array, i64 2
br label %body
@@ -745,9 +975,25 @@ exit:
ret void
}
-define void @load-post-indexed-doubleword(ptr %array, i64 %count) nounwind {
-; CHECK-LABEL: load-post-indexed-doubleword
-; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}], #32
+define void @load_post_indexed_doubleword(ptr %array, i64 %count) nounwind {
+; CHECK-LABEL: load_post_indexed_doubleword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #16
+; CHECK-NEXT: .LBB39_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur x0, [x20, #-8]
+; CHECK-NEXT: bl "use-doubleword"
+; CHECK-NEXT: ldr x0, [x20], #32
+; CHECK-NEXT: bl "use-doubleword"
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: b.ne .LBB39_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr i64, ptr %array, i64 2
br label %body
@@ -769,9 +1015,25 @@ exit:
ret void
}
-define void @load-post-indexed-quadword(ptr %array, i64 %count) nounwind {
-; CHECK-LABEL: load-post-indexed-quadword
-; CHECK: ldr q{{[0-9]+}}, [x{{[0-9]+}}], #64
+define void @load_post_indexed_quadword(ptr %array, i64 %count) nounwind {
+; CHECK-LABEL: load_post_indexed_quadword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #32
+; CHECK-NEXT: .LBB40_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur q0, [x20, #-16]
+; CHECK-NEXT: bl "use-quadword"
+; CHECK-NEXT: ldr q0, [x20], #64
+; CHECK-NEXT: bl "use-quadword"
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: b.ne .LBB40_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr <2 x i64>, ptr %array, i64 2
br label %body
@@ -793,9 +1055,25 @@ exit:
ret void
}
-define void @load-post-indexed-float(ptr %array, i64 %count) nounwind {
-; CHECK-LABEL: load-post-indexed-float
-; CHECK: ldr s{{[0-9]+}}, [x{{[0-9]+}}], #16
+define void @load_post_indexed_float(ptr %array, i64 %count) nounwind {
+; CHECK-LABEL: load_post_indexed_float:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #8
+; CHECK-NEXT: .LBB41_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur s0, [x20, #-4]
+; CHECK-NEXT: bl "use-float"
+; CHECK-NEXT: ldr s0, [x20], #16
+; CHECK-NEXT: bl "use-float"
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: b.ne .LBB41_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr float, ptr %array, i64 2
br label %body
@@ -817,9 +1095,25 @@ exit:
ret void
}
-define void @load-post-indexed-double(ptr %array, i64 %count) nounwind {
-; CHECK-LABEL: load-post-indexed-double
-; CHECK: ldr d{{[0-9]+}}, [x{{[0-9]+}}], #32
+define void @load_post_indexed_double(ptr %array, i64 %count) nounwind {
+; CHECK-LABEL: load_post_indexed_double:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #16
+; CHECK-NEXT: .LBB42_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur d0, [x20, #-8]
+; CHECK-NEXT: bl "use-double"
+; CHECK-NEXT: ldr d0, [x20], #32
+; CHECK-NEXT: bl "use-double"
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: b.ne .LBB42_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr double, ptr %array, i64 2
br label %body
@@ -851,9 +1145,25 @@ exit:
;
; with X being either w0, x0, s0, d0 or q0.
-define void @store-post-indexed-byte(ptr %array, i64 %count, i8 %val) nounwind {
-; CHECK-LABEL: store-post-indexed-byte
-; CHECK: strb w{{[0-9]+}}, [x{{[0-9]+}}], #4
+define void @store_post_indexed_byte(ptr %array, i64 %count, i8 %val) nounwind {
+; CHECK-LABEL: store_post_indexed_byte:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov w19, w2
+; CHECK-NEXT: mov x20, x1
+; CHECK-NEXT: add x21, x0, #2
+; CHECK-NEXT: .LBB43_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldurb w0, [x21, #-1]
+; CHECK-NEXT: bl "use-byte"
+; CHECK-NEXT: subs x20, x20, #4
+; CHECK-NEXT: strb w19, [x21], #4
+; CHECK-NEXT: b.ne .LBB43_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr i8, ptr %array, i64 2
br label %body
@@ -874,9 +1184,25 @@ exit:
ret void
}
-define void @store-post-indexed-halfword(ptr %array, i64 %count, i16 %val) nounwind {
-; CHECK-LABEL: store-post-indexed-halfword
-; CHECK: strh w{{[0-9]+}}, [x{{[0-9]+}}], #8
+define void @store_post_indexed_halfword(ptr %array, i64 %count, i16 %val) nounwind {
+; CHECK-LABEL: store_post_indexed_halfword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov w19, w2
+; CHECK-NEXT: mov x20, x1
+; CHECK-NEXT: add x21, x0, #4
+; CHECK-NEXT: .LBB44_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldurh w0, [x21, #-2]
+; CHECK-NEXT: bl "use-halfword"
+; CHECK-NEXT: subs x20, x20, #4
+; CHECK-NEXT: strh w19, [x21], #8
+; CHECK-NEXT: b.ne .LBB44_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr i16, ptr %array, i64 2
br label %body
@@ -897,9 +1223,25 @@ exit:
ret void
}
-define void @store-post-indexed-word(ptr %array, i64 %count, i32 %val) nounwind {
-; CHECK-LABEL: store-post-indexed-word
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}], #16
+define void @store_post_indexed_word(ptr %array, i64 %count, i32 %val) nounwind {
+; CHECK-LABEL: store_post_indexed_word:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov w19, w2
+; CHECK-NEXT: mov x20, x1
+; CHECK-NEXT: add x21, x0, #8
+; CHECK-NEXT: .LBB45_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur w0, [x21, #-4]
+; CHECK-NEXT: bl "use-word"
+; CHECK-NEXT: subs x20, x20, #4
+; CHECK-NEXT: str w19, [x21], #16
+; CHECK-NEXT: b.ne .LBB45_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr i32, ptr %array, i64 2
br label %body
@@ -920,9 +1262,25 @@ exit:
ret void
}
-define void @store-post-indexed-doubleword(ptr %array, i64 %count, i64 %val) nounwind {
-; CHECK-LABEL: store-post-indexed-doubleword
-; CHECK: str x{{[0-9]+}}, [x{{[0-9]+}}], #32
+define void @store_post_indexed_doubleword(ptr %array, i64 %count, i64 %val) nounwind {
+; CHECK-LABEL: store_post_indexed_doubleword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x2
+; CHECK-NEXT: mov x20, x1
+; CHECK-NEXT: add x21, x0, #16
+; CHECK-NEXT: .LBB46_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur x0, [x21, #-8]
+; CHECK-NEXT: bl "use-doubleword"
+; CHECK-NEXT: subs x20, x20, #4
+; CHECK-NEXT: str x19, [x21], #32
+; CHECK-NEXT: b.ne .LBB46_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldp x30, x21, [sp], #32 // 16-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr i64, ptr %array, i64 2
br label %body
@@ -943,9 +1301,28 @@ exit:
ret void
}
-define void @store-post-indexed-quadword(ptr %array, i64 %count, <2 x i64> %val) nounwind {
-; CHECK-LABEL: store-post-indexed-quadword
-; CHECK: str q{{[0-9]+}}, [x{{[0-9]+}}], #64
+define void @store_post_indexed_quadword(ptr %array, i64 %count, <2 x i64> %val) nounwind {
+; CHECK-LABEL: store_post_indexed_quadword:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: sub sp, sp, #48
+; CHECK-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #32
+; CHECK-NEXT: str x30, [sp, #16] // 8-byte Spill
+; CHECK-NEXT: str q0, [sp] // 16-byte Spill
+; CHECK-NEXT: .LBB47_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur q0, [x20, #-16]
+; CHECK-NEXT: bl "use-quadword"
+; CHECK-NEXT: ldr q0, [sp] // 16-byte Reload
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: str q0, [x20], #64
+; CHECK-NEXT: b.ne .LBB47_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp, #16] // 8-byte Reload
+; CHECK-NEXT: add sp, sp, #48
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr <2 x i64>, ptr %array, i64 2
br label %body
@@ -966,9 +1343,27 @@ exit:
ret void
}
-define void @store-post-indexed-float(ptr %array, i64 %count, float %val) nounwind {
-; CHECK-LABEL: store-post-indexed-float
-; CHECK: str s{{[0-9]+}}, [x{{[0-9]+}}], #16
+define void @store_post_indexed_float(ptr %array, i64 %count, float %val) nounwind {
+; CHECK-LABEL: store_post_indexed_float:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: fmov s8, s0
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #8
+; CHECK-NEXT: str x30, [sp, #8] // 8-byte Spill
+; CHECK-NEXT: .LBB48_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur s0, [x20, #-4]
+; CHECK-NEXT: bl "use-float"
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: str s8, [x20], #16
+; CHECK-NEXT: b.ne .LBB48_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Reload
+; CHECK-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr float, ptr %array, i64 2
br label %body
@@ -989,9 +1384,27 @@ exit:
ret void
}
-define void @store-post-indexed-double(ptr %array, i64 %count, double %val) nounwind {
-; CHECK-LABEL: store-post-indexed-double
-; CHECK: str d{{[0-9]+}}, [x{{[0-9]+}}], #32
+define void @store_post_indexed_double(ptr %array, i64 %count, double %val) nounwind {
+; CHECK-LABEL: store_post_indexed_double:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str d8, [sp, #-32]! // 8-byte Folded Spill
+; CHECK-NEXT: fmov d8, d0
+; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
+; CHECK-NEXT: mov x19, x1
+; CHECK-NEXT: add x20, x0, #16
+; CHECK-NEXT: str x30, [sp, #8] // 8-byte Spill
+; CHECK-NEXT: .LBB49_1: // %body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur d0, [x20, #-8]
+; CHECK-NEXT: bl "use-double"
+; CHECK-NEXT: subs x19, x19, #4
+; CHECK-NEXT: str d8, [x20], #32
+; CHECK-NEXT: b.ne .LBB49_1
+; CHECK-NEXT: // %bb.2: // %exit
+; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
+; CHECK-NEXT: ldr x30, [sp, #8] // 8-byte Reload
+; CHECK-NEXT: ldr d8, [sp], #32 // 8-byte Folded Reload
+; CHECK-NEXT: ret
entry:
%gep1 = getelementptr double, ptr %array, i64 2
br label %body
@@ -1028,10 +1441,13 @@ declare void @use-double(double)
; ->
; stp w0, [x20], #32
-define void @store-pair-post-indexed-word() nounwind {
-; CHECK-LABEL: store-pair-post-indexed-word
-; CHECK: stp w{{[0-9]+}}, w{{[0-9]+}}, [sp], #16
-; CHECK: ret
+define void @store_pair_post_indexed_word() nounwind {
+; CHECK-LABEL: store_pair_post_indexed_word:
+; CHECK: // %bb.0:
+; CHECK-NEXT: sub sp, sp, #16
+; CHECK-NEXT: ldp w8, w9, [sp, #8]
+; CHECK-NEXT: stp w8, w9, [sp], #16
+; CHECK-NEXT: ret
%src = alloca { i32, i32 }, align 8
%dst = alloca { i32, i32 }, align 8
@@ -1047,10 +1463,13 @@ define void @store-pair-post-indexed-word() nounwind {
ret void
}
-define void @store-pair-post-indexed-doubleword() nounwind {
-; CHECK-LABEL: store-pair-post-indexed-doubleword
-; CHECK: stp x{{[0-9]+}}, x{{[0-9]+}}, [sp], #32
-; CHECK: ret
+define void @store_pair_post_indexed_doubleword() nounwind {
+; CHECK-LABEL: store_pair_post_indexed_doubleword:
+; CHECK: // %bb.0:
+; CHECK-NEXT: sub sp, sp, #32
+; CHECK-NEXT: ldp x8, x9, [sp, #16]
+; CHECK-NEXT: stp x8, x9, [sp], #32
+; CHECK-NEXT: ret
%src = alloca { i64, i64 }, align 8
%dst = alloca { i64, i64 }, align 8
@@ -1066,10 +1485,13 @@ define void @store-pair-post-indexed-doubleword() nounwind {
ret void
}
-define void @store-pair-post-indexed-float() nounwind {
-; CHECK-LABEL: store-pair-post-indexed-float
-; CHECK: stp s{{[0-9]+}}, s{{[0-9]+}}, [sp], #16
-; CHECK: ret
+define void @store_pair_post_indexed_float() nounwind {
+; CHECK-LABEL: store_pair_post_indexed_float:
+; CHECK: // %bb.0:
+; CHECK-NEXT: sub sp, sp, #16
+; CHECK-NEXT: ldp s0, s1, [sp, #8]
+; CHECK-NEXT: stp s0, s1, [sp], #16
+; CHECK-NEXT: ret
%src = alloca { float, float }, align 8
%dst = alloca { float, float }, align 8
@@ -1085,10 +1507,13 @@ define void @store-pair-post-indexed-float() nounwind {
ret void
}
-define void @store-pair-post-indexed-double() nounwind {
-; CHECK-LABEL: store-pair-post-indexed-double
-; CHECK: stp d{{[0-9]+}}, d{{[0-9]+}}, [sp], #32
-; CHECK: ret
+define void @store_pair_post_indexed_double() nounwind {
+; CHECK-LABEL: store_pair_post_indexed_double:
+; CHECK: // %bb.0:
+; CHECK-NEXT: sub sp, sp, #32
+; CHECK-NEXT: ldp d0, d1, [sp, #16]
+; CHECK-NEXT: stp d0, d1, [sp], #32
+; CHECK-NEXT: ret
%src = alloca { double, double }, align 8
%dst = alloca { double, double }, align 8
@@ -1114,10 +1539,19 @@ define void @store-pair-post-indexed-double() nounwind {
;
; with X being either w0, x0, s0, d0 or q0.
-define void @post-indexed-sub-word(ptr %a, ptr %b, i64 %count) nounwind {
-; CHECK-LABEL: post-indexed-sub-word
-; CHECK: ldr w{{[0-9]+}}, [x{{[0-9]+}}], #-8
-; CHECK: str w{{[0-9]+}}, [x{{[0-9]+}}], #-8
+define void @post_indexed_sub_word(ptr %a, ptr %b, i64 %count) nounwind {
+; CHECK-LABEL: post_indexed_sub_word:
+; CHECK: // %bb.0:
+; CHECK-NEXT: .LBB54_1: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur w8, [x1, #-4]
+; CHECK-NEXT: subs x2, x2, #1
+; CHECK-NEXT: stur w8, [x0, #-4]
+; CHECK-NEXT: ldr w8, [x1], #-8
+; CHECK-NEXT: str w8, [x0], #-8
+; CHECK-NEXT: b.gt .LBB54_1
+; CHECK-NEXT: // %bb.2: // %end
+; CHECK-NEXT: ret
br label %for.body
for.body:
%phi1 = phi ptr [ %gep4, %for.body ], [ %b, %0 ]
@@ -1138,10 +1572,19 @@ end:
ret void
}
-define void @post-indexed-sub-doubleword(ptr %a, ptr %b, i64 %count) nounwind {
-; CHECK-LABEL: post-indexed-sub-doubleword
-; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}], #-16
-; CHECK: str x{{[0-9]+}}, [x{{[0-9]+}}], #-16
+define void @post_indexed_sub_doubleword(ptr %a, ptr %b, i64 %count) nounwind {
+; CHECK-LABEL: post_indexed_sub_doubleword:
+; CHECK: // %bb.0:
+; CHECK-NEXT: .LBB55_1: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur x8, [x1, #-8]
+; CHECK-NEXT: subs x2, x2, #1
+; CHECK-NEXT: stur x8, [x0, #-8]
+; CHECK-NEXT: ldr x8, [x1], #-16
+; CHECK-NEXT: str x8, [x0], #-16
+; CHECK-NEXT: b.gt .LBB55_1
+; CHECK-NEXT: // %bb.2: // %end
+; CHECK-NEXT: ret
br label %for.body
for.body:
%phi1 = phi ptr [ %gep4, %for.body ], [ %b, %0 ]
@@ -1162,10 +1605,19 @@ end:
ret void
}
-define void @post-indexed-sub-quadword(ptr %a, ptr %b, i64 %count) nounwind {
-; CHECK-LABEL: post-indexed-sub-quadword
-; CHECK: ldr q{{[0-9]+}}, [x{{[0-9]+}}], #-32
-; CHECK: str q{{[0-9]+}}, [x{{[0-9]+}}], #-32
+define void @post_indexed_sub_quadword(ptr %a, ptr %b, i64 %count) nounwind {
+; CHECK-LABEL: post_indexed_sub_quadword:
+; CHECK: // %bb.0:
+; CHECK-NEXT: .LBB56_1: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur q0, [x1, #-16]
+; CHECK-NEXT: subs x2, x2, #1
+; CHECK-NEXT: stur q0, [x0, #-16]
+; CHECK-NEXT: ldr q0, [x1], #-32
+; CHECK-NEXT: str q0, [x0], #-32
+; CHECK-NEXT: b.gt .LBB56_1
+; CHECK-NEXT: // %bb.2: // %end
+; CHECK-NEXT: ret
br label %for.body
for.body:
%phi1 = phi ptr [ %gep4, %for.body ], [ %b, %0 ]
@@ -1186,10 +1638,19 @@ end:
ret void
}
-define void @post-indexed-sub-float(ptr %a, ptr %b, i64 %count) nounwind {
-; CHECK-LABEL: post-indexed-sub-float
-; CHECK: ldr s{{[0-9]+}}, [x{{[0-9]+}}], #-8
-; CHECK: str s{{[0-9]+}}, [x{{[0-9]+}}], #-8
+define void @post_indexed_sub_float(ptr %a, ptr %b, i64 %count) nounwind {
+; CHECK-LABEL: post_indexed_sub_float:
+; CHECK: // %bb.0:
+; CHECK-NEXT: .LBB57_1: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur s0, [x1, #-4]
+; CHECK-NEXT: subs x2, x2, #1
+; CHECK-NEXT: stur s0, [x0, #-4]
+; CHECK-NEXT: ldr s0, [x1], #-8
+; CHECK-NEXT: str s0, [x0], #-8
+; CHECK-NEXT: b.gt .LBB57_1
+; CHECK-NEXT: // %bb.2: // %end
+; CHECK-NEXT: ret
br label %for.body
for.body:
%phi1 = phi ptr [ %gep4, %for.body ], [ %b, %0 ]
@@ -1210,10 +1671,19 @@ end:
ret void
}
-define void @post-indexed-sub-double(ptr %a, ptr %b, i64 %count) nounwind {
-; CHECK-LABEL: post-indexed-sub-double
-; CHECK: ldr d{{[0-9]+}}, [x{{[0-9]+}}], #-16
-; CHECK: str d{{[0-9]+}}, [x{{[0-9]+}}], #-16
+define void @post_indexed_sub_double(ptr %a, ptr %b, i64 %count) nounwind {
+; CHECK-LABEL: post_indexed_sub_double:
+; CHECK: // %bb.0:
+; CHECK-NEXT: .LBB58_1: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldur d0, [x1, #-8]
+; CHECK-NEXT: subs x2, x2, #1
+; CHECK-NEXT: stur d0, [x0, #-8]
+; CHECK-NEXT: ldr d0, [x1], #-16
+; CHECK-NEXT: str d0, [x0], #-16
+; CHECK-NEXT: b.gt .LBB58_1
+; CHECK-NEXT: // %bb.2: // %end
+; CHECK-NEXT: ret
br label %for.body
for.body:
%phi1 = phi ptr [ %gep4, %for.body ], [ %b, %0 ]
@@ -1234,10 +1704,19 @@ end:
ret void
}
-define void @post-indexed-sub-doubleword-offset-min(ptr %a, ptr %b, i64 %count) nounwind {
-; CHECK-LABEL: post-indexed-sub-doubleword-offset-min
-; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}], #-256
-; CHECK: str x{{[0-9]+}}, [x{{[0-9]+}}], #-256
+define void @post_indexed_sub_doubleword_offset_min(ptr %a, ptr %b, i64 %count) nounwind {
+; CHECK-LABEL: post_indexed_sub_doubleword_offset_min:
+; CHECK: // %bb.0:
+; CHECK-NEXT: .LBB59_1: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldr x8, [x1, #8]
+; CHECK-NEXT: subs x2, x2, #1
+; CHECK-NEXT: str x8, [x0, #8]
+; CHECK-NEXT: ldr x8, [x1], #-256
+; CHECK-NEXT: str x8, [x0], #-256
+; CHECK-NEXT: b.gt .LBB59_1
+; CHECK-NEXT: // %bb.2: // %end
+; CHECK-NEXT: ret
br label %for.body
for.body:
%phi1 = phi ptr [ %gep4, %for.body ], [ %b, %0 ]
@@ -1258,13 +1737,21 @@ end:
ret void
}
-define void @post-indexed-doubleword-offset-out-of-range(ptr %a, ptr %b, i64 %count) nounwind {
-; CHECK-LABEL: post-indexed-doubleword-offset-out-of-range
-; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}]
-; CHECK: add x{{[0-9]+}}, x{{[0-9]+}}, #256
-; CHECK: str x{{[0-9]+}}, [x{{[0-9]+}}]
-; CHECK: add x{{[0-9]+}}, x{{[0-9]+}}, #256
-
+define void @post_indexed_doubleword_offset_out_of_range(ptr %a, ptr %b, i64 %count) nounwind {
+; CHECK-LABEL: post_indexed_doubleword_offset_out_of_range:
+; CHECK: // %bb.0:
+; CHECK-NEXT: .LBB60_1: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldr x8, [x1, #8]
+; CHECK-NEXT: subs x2, x2, #1
+; CHECK-NEXT: str x8, [x0, #8]
+; CHECK-NEXT: ldr x8, [x1]
+; CHECK-NEXT: add x1, x1, #256
+; CHECK-NEXT: str x8, [x0]
+; CHECK-NEXT: add x0, x0, #256
+; CHECK-NEXT: b.gt .LBB60_1
+; CHECK-NEXT: // %bb.2: // %end
+; CHECK-NEXT: ret
br label %for.body
for.body:
%phi1 = phi ptr [ %gep4, %for.body ], [ %b, %0 ]
@@ -1285,10 +1772,17 @@ end:
ret void
}
-define void @post-indexed-paired-min-offset(ptr %a, ptr %b, i64 %count) nounwind {
-; CHECK-LABEL: post-indexed-paired-min-offset
-; CHECK: ldp x{{[0-9]+}}, x{{[0-9]+}}, [x{{[0-9]+}}], #-512
-; CHECK: stp x{{[0-9]+}}, x{{[0-9]+}}, [x{{[0-9]+}}], #-512
+define void @post_indexed_paired_min_offset(ptr %a, ptr %b, i64 %count) nounwind {
+; CHECK-LABEL: post_indexed_paired_min_offset:
+; CHECK: // %bb.0:
+; CHECK-NEXT: .LBB61_1: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldp x9, x8, [x1], #-512
+; CHECK-NEXT: subs x2, x2, #1
+; CHECK-NEXT: stp x9, x8, [x0], #-512
+; CHECK-NEXT: b.gt .LBB61_1
+; CHECK-NEXT: // %bb.2: // %end
+; CHECK-NEXT: ret
br label %for.body
for.body:
%phi1 = phi ptr [ %gep4, %for.body ], [ %b, %0 ]
@@ -1309,12 +1803,19 @@ end:
ret void
}
-define void @post-indexed-paired-offset-out-of-range(ptr %a, ptr %b, i64 %count) nounwind {
-; CHECK-LABEL: post-indexed-paired-offset-out-of-range
-; CHECK: ldp x{{[0-9]+}}, x{{[0-9]+}}, [x{{[0-9]+}}]
-; CHECK: add x{{[0-9]+}}, x{{[0-9]+}}, #512
-; CHECK: stp x{{[0-9]+}}, x{{[0-9]+}}, [x{{[0-9]+}}]
-; CHECK: add x{{[0-9]+}}, x{{[0-9]+}}, #512
+define void @post_indexed_paired_offset_out_of_range(ptr %a, ptr %b, i64 %count) nounwind {
+; CHECK-LABEL: post_indexed_paired_offset_out_of_range:
+; CHECK: // %bb.0:
+; CHECK-NEXT: .LBB62_1: // %for.body
+; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
+; CHECK-NEXT: ldp x8, x9, [x1]
+; CHECK-NEXT: subs x2, x2, #1
+; CHECK-NEXT: add x1, x1, #512
+; CHECK-NEXT: stp x9, x8, [x0]
+; CHECK-NEXT: add x0, x0, #512
+; CHECK-NEXT: b.gt .LBB62_1
+; CHECK-NEXT: // %bb.2: // %end
+; CHECK-NEXT: ret
br label %for.body
for.body:
%phi1 = phi ptr [ %gep4, %for.body ], [ %b, %0 ]
@@ -1339,11 +1840,15 @@ end:
; replaceZeroVectorStore should split the vector store back into
; scalar stores which should get merged by AArch64LoadStoreOptimizer.
define void @merge_zr32(ptr %p) {
-; CHECK-LABEL: merge_zr32:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: str xzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr32:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: str xzr, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr32:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0]
+; STRICTALIGN-NEXT: ret
entry:
store i32 0, ptr %p
%p1 = getelementptr i32, ptr %p, i32 1
@@ -1353,12 +1858,16 @@ entry:
; Same as merge_zr32 but the merged stores should also get paried.
define void @merge_zr32_2(ptr %p) {
-; CHECK-LABEL: merge_zr32_2:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}, #8]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr32_2:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr32_2:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0]
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0, #8]
+; STRICTALIGN-NEXT: ret
entry:
store i32 0, ptr %p
%p1 = getelementptr i32, ptr %p, i32 1
@@ -1372,14 +1881,18 @@ entry:
; Like merge_zr32_2, but checking the largest allowed stp immediate offset.
define void @merge_zr32_2_offset(ptr %p) {
-; CHECK-LABEL: merge_zr32_2_offset:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x{{[0-9]+}}, #504]
-; STRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}, #504]
-; STRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}, #508]
-; STRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}, #512]
-; STRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}, #516]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr32_2_offset:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x0, #504]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr32_2_offset:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: str wzr, [x0, #504]
+; STRICTALIGN-NEXT: str wzr, [x0, #508]
+; STRICTALIGN-NEXT: str wzr, [x0, #512]
+; STRICTALIGN-NEXT: str wzr, [x0, #516]
+; STRICTALIGN-NEXT: ret
entry:
%p0 = getelementptr i32, ptr %p, i32 126
store i32 0, ptr %p0
@@ -1396,15 +1909,19 @@ entry:
; vector store since the address offset is too large for the stp
; instruction.
define void @no_merge_zr32_2_offset(ptr %p) {
-; CHECK-LABEL: no_merge_zr32_2_offset:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
-; NOSTRICTALIGN-NEXT: str q[[REG]], [x{{[0-9]+}}, #4096]
-; STRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}, #4096]
-; STRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}, #4100]
-; STRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}, #4104]
-; STRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}, #4108]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: no_merge_zr32_2_offset:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: movi v0.2d, #0000000000000000
+; NOSTRICTALIGN-NEXT: str q0, [x0, #4096]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: no_merge_zr32_2_offset:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: str wzr, [x0, #4096]
+; STRICTALIGN-NEXT: str wzr, [x0, #4100]
+; STRICTALIGN-NEXT: str wzr, [x0, #4104]
+; STRICTALIGN-NEXT: str wzr, [x0, #4108]
+; STRICTALIGN-NEXT: ret
entry:
%p0 = getelementptr i32, ptr %p, i32 1024
store i32 0, ptr %p0
@@ -1421,15 +1938,19 @@ entry:
; vector store since the zero constant vector has multiple uses, so we
; err on the side that allows for stp q instruction generation.
define void @merge_zr32_3(ptr %p) {
-; CHECK-LABEL: merge_zr32_3:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
-; NOSTRICTALIGN-NEXT: stp q[[REG]], q[[REG]], [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}, #8]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}, #16]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}, #24]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr32_3:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: movi v0.2d, #0000000000000000
+; NOSTRICTALIGN-NEXT: stp q0, q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr32_3:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0]
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0, #8]
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0, #16]
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0, #24]
+; STRICTALIGN-NEXT: ret
entry:
store i32 0, ptr %p
%p1 = getelementptr i32, ptr %p, i32 1
@@ -1451,11 +1972,15 @@ entry:
; Like merge_zr32, but with 2-vector type.
define void @merge_zr32_2vec(ptr %p) {
-; CHECK-LABEL: merge_zr32_2vec:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: str xzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr32_2vec:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: str xzr, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr32_2vec:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0]
+; STRICTALIGN-NEXT: ret
entry:
store <2 x i32> zeroinitializer, ptr %p
ret void
@@ -1463,13 +1988,17 @@ entry:
; Like merge_zr32, but with 3-vector type.
define void @merge_zr32_3vec(ptr %p) {
-; CHECK-LABEL: merge_zr32_3vec:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}, #8]
-; NOSTRICTALIGN-NEXT: str xzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}, #4]
-; STRICTALIGN-NEXT: str wzr, [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr32_3vec:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: str wzr, [x0, #8]
+; NOSTRICTALIGN-NEXT: str xzr, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr32_3vec:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0, #4]
+; STRICTALIGN-NEXT: str wzr, [x0]
+; STRICTALIGN-NEXT: ret
entry:
store <3 x i32> zeroinitializer, ptr %p
ret void
@@ -1477,12 +2006,16 @@ entry:
; Like merge_zr32, but with 4-vector type.
define void @merge_zr32_4vec(ptr %p) {
-; CHECK-LABEL: merge_zr32_4vec:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}, #8]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr32_4vec:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr32_4vec:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0, #8]
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0]
+; STRICTALIGN-NEXT: ret
entry:
store <4 x i32> zeroinitializer, ptr %p
ret void
@@ -1490,11 +2023,15 @@ entry:
; Like merge_zr32, but with 2-vector float type.
define void @merge_zr32_2vecf(ptr %p) {
-; CHECK-LABEL: merge_zr32_2vecf:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: str xzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr32_2vecf:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: str xzr, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr32_2vecf:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0]
+; STRICTALIGN-NEXT: ret
entry:
store <2 x float> zeroinitializer, ptr %p
ret void
@@ -1502,12 +2039,16 @@ entry:
; Like merge_zr32, but with 4-vector float type.
define void @merge_zr32_4vecf(ptr %p) {
-; CHECK-LABEL: merge_zr32_4vecf:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}, #8]
-; STRICTALIGN-NEXT: stp wzr, wzr, [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr32_4vecf:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr32_4vecf:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0, #8]
+; STRICTALIGN-NEXT: stp wzr, wzr, [x0]
+; STRICTALIGN-NEXT: ret
entry:
store <4 x float> zeroinitializer, ptr %p
ret void
@@ -1516,9 +2057,9 @@ entry:
; Similar to merge_zr32, but for 64-bit values.
define void @merge_zr64(ptr %p) {
; CHECK-LABEL: merge_zr64:
-; CHECK: // %entry
-; CHECK-NEXT: stp xzr, xzr, [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stp xzr, xzr, [x0]
+; CHECK-NEXT: ret
entry:
store i64 0, ptr %p
%p1 = getelementptr i64, ptr %p, i64 1
@@ -1528,26 +2069,38 @@ entry:
; Similar to merge_zr32, but for 64-bit values and with unaligned stores.
define void @merge_zr64_unalign(ptr %p) {
-; CHECK-LABEL: merge_zr64_unalign:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x{{[0-9]+}}]
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; STRICTALIGN: strb
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr64_unalign:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr64_unalign:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: lsr x8, xzr, #40
+; STRICTALIGN-NEXT: lsr x9, xzr, #24
+; STRICTALIGN-NEXT: lsr x11, xzr, #16
+; STRICTALIGN-NEXT: mov x10, x0
+; STRICTALIGN-NEXT: lsr x12, xzr, #8
+; STRICTALIGN-NEXT: strb wzr, [x0]
+; STRICTALIGN-NEXT: strb w8, [x0, #13]
+; STRICTALIGN-NEXT: strb wzr, [x10, #8]!
+; STRICTALIGN-NEXT: strb w9, [x10, #3]
+; STRICTALIGN-NEXT: strb w11, [x10, #2]
+; STRICTALIGN-NEXT: strb w8, [x0, #5]
+; STRICTALIGN-NEXT: lsr x8, xzr, #32
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: lsr x9, xzr, #56
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: lsr x11, xzr, #48
+; STRICTALIGN-NEXT: strb w12, [x0, #9]
+; STRICTALIGN-NEXT: strb w12, [x0, #1]
+; STRICTALIGN-NEXT: strb w8, [x10, #4]!
+; STRICTALIGN-NEXT: strb w9, [x10, #3]
+; STRICTALIGN-NEXT: strb w11, [x10, #2]
+; STRICTALIGN-NEXT: strb w8, [x0, #4]!
+; STRICTALIGN-NEXT: strb w9, [x0, #3]
+; STRICTALIGN-NEXT: strb w11, [x0, #2]
+; STRICTALIGN-NEXT: ret
entry:
store <2 x i64> zeroinitializer, ptr %p, align 1
ret void
@@ -1556,13 +2109,17 @@ entry:
; Similar to merge_zr32_3, replaceZeroVectorStore should not split the
; vector store since the zero constant vector has multiple uses.
define void @merge_zr64_2(ptr %p) {
-; CHECK-LABEL: merge_zr64_2:
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
-; NOSTRICTALIGN-NEXT: stp q[[REG]], q[[REG]], [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp xzr, xzr, [x{{[0-9]+}}]
-; STRICTALIGN-NEXT: stp xzr, xzr, [x{{[0-9]+}}, #16]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_zr64_2:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: movi v0.2d, #0000000000000000
+; NOSTRICTALIGN-NEXT: stp q0, q0, [x0]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_zr64_2:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #16]
+; STRICTALIGN-NEXT: ret
entry:
store i64 0, ptr %p
%p1 = getelementptr i64, ptr %p, i64 1
@@ -1577,9 +2134,9 @@ entry:
; Like merge_zr64, but with 2-vector double type.
define void @merge_zr64_2vecd(ptr %p) {
; CHECK-LABEL: merge_zr64_2vecd:
-; CHECK: // %entry
-; CHECK-NEXT: stp xzr, xzr, [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stp xzr, xzr, [x0]
+; CHECK-NEXT: ret
entry:
store <2 x double> zeroinitializer, ptr %p
ret void
@@ -1588,10 +2145,10 @@ entry:
; Like merge_zr64, but with 3-vector i64 type.
define void @merge_zr64_3vec(ptr %p) {
; CHECK-LABEL: merge_zr64_3vec:
-; CHECK: // %entry
-; CHECK-NEXT: stp xzr, xzr, [x{{[0-9]+}}, #8]
-; CHECK-NEXT: str xzr, [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: stp xzr, xzr, [x0, #8]
+; CHECK-NEXT: str xzr, [x0]
+; CHECK-NEXT: ret
entry:
store <3 x i64> zeroinitializer, ptr %p
ret void
@@ -1600,10 +2157,10 @@ entry:
; Like merge_zr64_2, but with 4-vector double type.
define void @merge_zr64_4vecd(ptr %p) {
; CHECK-LABEL: merge_zr64_4vecd:
-; CHECK: // %entry
-; CHECK-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
-; CHECK-NEXT: stp q[[REG]], q[[REG]], [x{{[0-9]+}}]
-; CHECK-NEXT: ret
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: movi v0.2d, #0000000000000000
+; CHECK-NEXT: stp q0, q0, [x0]
+; CHECK-NEXT: ret
entry:
store <4 x double> zeroinitializer, ptr %p
ret void
@@ -1611,16 +2168,20 @@ entry:
; Verify that non-consecutive merges do not generate q0
define void @merge_multiple_128bit_stores(ptr %p) {
-; CHECK-LABEL: merge_multiple_128bit_stores
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
-; NOSTRICTALIGN-NEXT: str q0, [x0]
-; NOSTRICTALIGN-NEXT: stur q0, [x0, #24]
-; NOSTRICTALIGN-NEXT: str q0, [x0, #48]
-; STRICTALIGN-NEXT: stp xzr, xzr, [x0]
-; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #24]
-; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #48]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_multiple_128bit_stores:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: movi v0.2d, #0000000000000000
+; NOSTRICTALIGN-NEXT: str q0, [x0]
+; NOSTRICTALIGN-NEXT: stur q0, [x0, #24]
+; NOSTRICTALIGN-NEXT: str q0, [x0, #48]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_multiple_128bit_stores:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #24]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #48]
+; STRICTALIGN-NEXT: ret
entry:
store i64 0, ptr %p
%p1 = getelementptr i64, ptr %p, i64 1
@@ -1638,16 +2199,20 @@ entry:
; Verify that large stores generate stp q
define void @merge_multiple_128bit_stores_consec(ptr %p) {
-; CHECK-LABEL: merge_multiple_128bit_stores_consec
-; CHECK: // %entry
-; NOSTRICTALIGN-NEXT: movi v[[REG:[0-9]]].2d, #0000000000000000
-; NOSTRICTALIGN-NEXT: stp q[[REG]], q[[REG]], [x{{[0-9]+}}]
-; NOSTRICTALIGN-NEXT: stp q[[REG]], q[[REG]], [x{{[0-9]+}}, #32]
-; STRICTALIGN-NEXT: stp xzr, xzr, [x0]
-; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #16]
-; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #32]
-; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #48]
-; CHECK-NEXT: ret
+; NOSTRICTALIGN-LABEL: merge_multiple_128bit_stores_consec:
+; NOSTRICTALIGN: // %bb.0: // %entry
+; NOSTRICTALIGN-NEXT: movi v0.2d, #0000000000000000
+; NOSTRICTALIGN-NEXT: stp q0, q0, [x0]
+; NOSTRICTALIGN-NEXT: stp q0, q0, [x0, #32]
+; NOSTRICTALIGN-NEXT: ret
+;
+; STRICTALIGN-LABEL: merge_multiple_128bit_stores_consec:
+; STRICTALIGN: // %bb.0: // %entry
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #16]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #32]
+; STRICTALIGN-NEXT: stp xzr, xzr, [x0, #48]
+; STRICTALIGN-NEXT: ret
entry:
store i64 0, ptr %p
%p1 = getelementptr i64, ptr %p, i64 1
@@ -1668,13 +2233,14 @@ entry:
}
; Check for bug 34674 where invalid add of xzr was being generated.
-; CHECK-LABEL: bug34674:
-; CHECK: // %entry
-; CHECK-NEXT: mov [[ZREG:x[0-9]+]], xzr
-; CHECK-NEXT: mov x8, x0
-; CHECK-NEXT: add x0, [[ZREG]], #1
-; CHECK-NEXT: stp xzr, xzr, [x8]
define i64 @bug34674(ptr %p) {
+; CHECK-LABEL: bug34674:
+; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: mov x9, xzr
+; CHECK-NEXT: mov x8, x0
+; CHECK-NEXT: add x0, x9, #1
+; CHECK-NEXT: stp xzr, xzr, [x8]
+; CHECK-NEXT: ret
entry:
store <2 x i64> zeroinitializer, ptr %p
%ld = load i64, ptr %p
@@ -1682,18 +2248,22 @@ entry:
ret i64 %add
}
-; CHECK-LABEL: trunc_splat_zero:
-; CHECK-DAG: strh wzr, [x0]
define void @trunc_splat_zero(ptr %ptr) {
+; CHECK-LABEL: trunc_splat_zero:
+; CHECK: // %bb.0:
+; CHECK-NEXT: strh wzr, [x0]
+; CHECK-NEXT: ret
store <2 x i8> zeroinitializer, ptr %ptr, align 2
ret void
}
-; CHECK-LABEL: trunc_splat:
-; CHECK: mov [[VAL:w[0-9]+]], #42
-; CHECK: movk [[VAL]], #42, lsl #16
-; CHECK: str [[VAL]], [x0]
define void @trunc_splat(ptr %ptr) {
+; CHECK-LABEL: trunc_splat:
+; CHECK: // %bb.0:
+; CHECK-NEXT: mov w8, #42 // =0x2a
+; CHECK-NEXT: movk w8, #42, lsl #16
+; CHECK-NEXT: str w8, [x0]
+; CHECK-NEXT: ret
store <2 x i16> <i16 42, i16 42>, ptr %ptr, align 4
ret void
}
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