[llvm] [AArch64][ISel] Remove zero instruction for `rev` all true predicates (PR #192925)
Harry Ramsey via llvm-commits
llvm-commits at lists.llvm.org
Mon Apr 20 05:14:15 PDT 2026
================
@@ -0,0 +1,116 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve2p1 -verify-machineinstrs < %s | FileCheck %s
+
+define <vscale x 16 x i8> @test_revd_i8(<vscale x 16 x i8> %a) {
+; CHECK-LABEL: test_revd_i8:
+; CHECK: // %bb.0:
+; CHECK-NEXT: ptrue p0.b
+; CHECK-NEXT: revd z0.q, p0/m, z0.q
----------------
Harry-Ramsey wrote:
Sorry, I shall do that going forward. Just for archive reasons this was the previous code generated for `rev`.
```
_revd_8(__SVUint8_t):
movi v1.2d, #0000000000000000
ptrue p0.b
revd z1.q, p0/m, z0.q
mov z0.d, z1.d
ret
_revd_16(__SVUint16_t):
movi v1.2d, #0000000000000000
ptrue p0.h
revd z1.q, p0/m, z0.q
mov z0.d, z1.d
ret
_revd_32(__SVUint32_t):
movi v1.2d, #0000000000000000
ptrue p0.s
revd z1.q, p0/m, z0.q
mov z0.d, z1.d
ret
_revd_64(__SVUint64_t):
movi v1.2d, #0000000000000000
ptrue p0.d
revd z1.q, p0/m, z0.q
mov z0.d, z1.d
ret
_revb_16(__SVUint16_t):
movi v1.2d, #0000000000000000
ptrue p0.h
revb z1.h, p0/m, z0.h
mov z0.d, z1.d
ret
_revb_32(__SVUint32_t):
movi v1.2d, #0000000000000000
ptrue p0.s
revb z1.s, p0/m, z0.s
mov z0.d, z1.d
ret
_revb_64(__SVUint64_t):
movi v1.2d, #0000000000000000
ptrue p0.d
revb z1.d, p0/m, z0.d
mov z0.d, z1.d
ret
_revh_32(__SVUint32_t):
movi v1.2d, #0000000000000000
ptrue p0.s
revh z1.s, p0/m, z0.s
mov z0.d, z1.d
ret
_revh_64(__SVUint64_t):
movi v1.2d, #0000000000000000
ptrue p0.d
revh z1.d, p0/m, z0.d
mov z0.d, z1.d
ret
_revw_64(__SVUint64_t):
movi v1.2d, #0000000000000000
ptrue p0.d
revw z1.d, p0/m, z0.d
mov z0.d, z1.d
ret
```
https://github.com/llvm/llvm-project/pull/192925
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