[llvm] 3f6aa4d - [CodeGen][NFC] Remove InsertPt since it's always the same as MI (#193668)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 23 00:14:25 PDT 2026
Author: Phoebe Wang
Date: 2026-04-23T15:14:20+08:00
New Revision: 3f6aa4dd8052003cbf563986f02910c7699f9d21
URL: https://github.com/llvm/llvm-project/commit/3f6aa4dd8052003cbf563986f02910c7699f9d21
DIFF: https://github.com/llvm/llvm-project/commit/3f6aa4dd8052003cbf563986f02910c7699f9d21.diff
LOG: [CodeGen][NFC] Remove InsertPt since it's always the same as MI (#193668)
Added:
Modified:
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/lib/CodeGen/TargetInstrInfo.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
llvm/lib/Target/AArch64/AArch64InstrInfo.h
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.h
llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
llvm/lib/Target/RISCV/RISCVInstrInfo.h
llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
llvm/lib/Target/SystemZ/SystemZInstrInfo.h
llvm/lib/Target/X86/X86InstrInfo.cpp
llvm/lib/Target/X86/X86InstrInfo.h
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetInstrInfo.h b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
index 49562f16bf371..ba85e6859443a 100644
--- a/llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ b/llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -1442,11 +1442,10 @@ class LLVM_ABI TargetInstrInfo : public MCInstrInfo {
/// Target-independent code in foldMemoryOperand will
/// take care of adding a MachineMemOperand to the newly created instruction.
/// The instruction and any auxiliary instructions necessary will be inserted
- /// at InsertPt.
+ /// at MI.
virtual MachineInstr *
foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
- ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, int FrameIndex,
+ ArrayRef<unsigned> Ops, int FrameIndex,
MachineInstr *&CopyMI, LiveIntervals *LIS = nullptr,
VirtRegMap *VRM = nullptr) const {
return nullptr;
@@ -1456,11 +1455,12 @@ class LLVM_ABI TargetInstrInfo : public MCInstrInfo {
/// Target-independent code in foldMemoryOperand will
/// take care of adding a MachineMemOperand to the newly created instruction.
/// The instruction and any auxiliary instructions necessary will be inserted
- /// at InsertPt.
- virtual MachineInstr *foldMemoryOperandImpl(
- MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
- MachineInstr *&CopyMI, LiveIntervals *LIS = nullptr) const {
+ /// at MI.
+ virtual MachineInstr *
+ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
+ ArrayRef<unsigned> Ops, MachineInstr &LoadMI,
+ MachineInstr *&CopyMI,
+ LiveIntervals *LIS = nullptr) const {
return nullptr;
}
diff --git a/llvm/lib/CodeGen/TargetInstrInfo.cpp b/llvm/lib/CodeGen/TargetInstrInfo.cpp
index ba836df02048c..b9d7530aeecea 100644
--- a/llvm/lib/CodeGen/TargetInstrInfo.cpp
+++ b/llvm/lib/CodeGen/TargetInstrInfo.cpp
@@ -754,7 +754,7 @@ MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineInstr &MI,
return foldInlineAsmMemOperand(MI, Ops, FI, *this);
} else {
// Ask the target to do the actual folding.
- NewMI = foldMemoryOperandImpl(MF, MI, Ops, MI, FI, CopyMI, LIS, VRM);
+ NewMI = foldMemoryOperandImpl(MF, MI, Ops, FI, CopyMI, LIS, VRM);
}
if (NewMI) {
@@ -834,7 +834,7 @@ MachineInstr *TargetInstrInfo::foldMemoryOperand(MachineInstr &MI,
return foldInlineAsmMemOperand(MI, Ops, FrameIndex, *this);
} else {
// Ask the target to do the actual folding.
- NewMI = foldMemoryOperandImpl(MF, MI, Ops, MI, LoadMI, CopyMI, LIS);
+ NewMI = foldMemoryOperandImpl(MF, MI, Ops, LoadMI, CopyMI, LIS);
}
if (!NewMI)
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 9d805dad07c1c..afa0b477f2a57 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -6832,8 +6832,9 @@ void llvm::emitFrameOffset(MachineBasicBlock &MBB,
MachineInstr *AArch64InstrInfo::foldMemoryOperandImpl(
MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, int FrameIndex, MachineInstr *&CopyMI,
- LiveIntervals *LIS, VirtRegMap *VRM) const {
+ int FrameIndex, MachineInstr *&CopyMI, LiveIntervals *LIS,
+ VirtRegMap *VRM) const {
+ MachineBasicBlock::iterator InsertPt = MI;
// This is a bit of a hack. Consider this instruction:
//
// %0 = COPY %sp; GPR64all:%0
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.h b/llvm/lib/Target/AArch64/AArch64InstrInfo.h
index 60a8182fa163b..3398919a23d41 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.h
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.h
@@ -383,9 +383,8 @@ class AArch64InstrInfo final : public AArch64GenInstrInfo {
using TargetInstrInfo::foldMemoryOperandImpl;
MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
- ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt,
- int FrameIndex, MachineInstr *&CopyMI,
+ ArrayRef<unsigned> Ops, int FrameIndex,
+ MachineInstr *&CopyMI,
LiveIntervals *LIS = nullptr,
VirtRegMap *VRM = nullptr) const override;
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 18baf259b0514..f05735d20aa7d 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -10757,10 +10757,11 @@ MachineInstr *SIInstrInfo::createPHISourceCopy(
bool llvm::SIInstrInfo::isWave32() const { return ST.isWave32(); }
-MachineInstr *SIInstrInfo::foldMemoryOperandImpl(
- MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, int FrameIndex, MachineInstr *&CopyMI,
- LiveIntervals *LIS, VirtRegMap *VRM) const {
+MachineInstr *
+SIInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
+ ArrayRef<unsigned> Ops, int FrameIndex,
+ MachineInstr *&CopyMI, LiveIntervals *LIS,
+ VirtRegMap *VRM) const {
// This is a bit of a hack (copied from AArch64). Consider this instruction:
//
// %0:sreg_32 = COPY $m0
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index ade23c71da6c7..5fcafffc4c69a 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -1695,9 +1695,8 @@ class SIInstrInfo final : public AMDGPUGenInstrInfo {
void fixImplicitOperands(MachineInstr &MI) const;
MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
- ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt,
- int FrameIndex, MachineInstr *&CopyMI,
+ ArrayRef<unsigned> Ops, int FrameIndex,
+ MachineInstr *&CopyMI,
LiveIntervals *LIS = nullptr,
VirtRegMap *VRM = nullptr) const override;
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
index 6957c6ad14c1b..0095d640ca576 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
@@ -908,11 +908,12 @@ std::optional<unsigned> getFoldedOpcode(MachineFunction &MF, MachineInstr &MI,
}
// This is the version used during InlineSpiller::spillAroundUses
-MachineInstr *RISCVInstrInfo::foldMemoryOperandImpl(
- MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, int FrameIndex, MachineInstr *&CopyMI,
- LiveIntervals *LIS, VirtRegMap *VRM) const {
-
+MachineInstr *
+RISCVInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
+ ArrayRef<unsigned> Ops, int FrameIndex,
+ MachineInstr *&CopyMI, LiveIntervals *LIS,
+ VirtRegMap *VRM) const {
+ MachineBasicBlock::iterator InsertPt = MI;
std::optional<unsigned> LoadOpc = getFoldedOpcode(MF, MI, Ops, STI);
if (!LoadOpc)
return nullptr;
@@ -956,8 +957,8 @@ static unsigned getLoadPredicatedOpcode(unsigned Opcode) {
MachineInstr *RISCVInstrInfo::foldMemoryOperandImpl(
MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
- MachineInstr *&CopyMI, LiveIntervals *LIS) const {
+ MachineInstr &LoadMI, MachineInstr *&CopyMI, LiveIntervals *LIS) const {
+ MachineBasicBlock::iterator InsertPt = MI;
// For now, only handle RISCV::PseudoCCMOVGPR.
if (MI.getOpcode() != RISCV::PseudoCCMOVGPR)
return nullptr;
diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfo.h b/llvm/lib/Target/RISCV/RISCVInstrInfo.h
index 80e7801c1bcb3..1f5b0a49a08bc 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfo.h
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfo.h
@@ -128,16 +128,16 @@ class RISCVInstrInfo : public RISCVGenInstrInfo {
using TargetInstrInfo::foldMemoryOperandImpl;
MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
- ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt,
- int FrameIndex, MachineInstr *&CopyMI,
+ ArrayRef<unsigned> Ops, int FrameIndex,
+ MachineInstr *&CopyMI,
LiveIntervals *LIS = nullptr,
VirtRegMap *VRM = nullptr) const override;
- MachineInstr *foldMemoryOperandImpl(
- MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
- MachineInstr *&CopyMI, LiveIntervals *LIS = nullptr) const override;
+ MachineInstr *
+ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
+ ArrayRef<unsigned> Ops, MachineInstr &LoadMI,
+ MachineInstr *&CopyMI,
+ LiveIntervals *LIS = nullptr) const override;
// Materializes the given integer Val into DstReg.
void movImm(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
index 5d85a64844592..a62f5d9ae300a 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
@@ -1225,8 +1225,9 @@ SystemZInstrInfo::getInverseOpcode(unsigned Opcode) const {
MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, int FrameIndex, MachineInstr *&CopyMI,
- LiveIntervals *LIS, VirtRegMap *VRM) const {
+ int FrameIndex, MachineInstr *&CopyMI, LiveIntervals *LIS,
+ VirtRegMap *VRM) const {
+ MachineBasicBlock::iterator InsertPt = MI;
const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
MachineRegisterInfo &MRI = MF.getRegInfo();
const MachineFrameInfo &MFI = MF.getFrameInfo();
@@ -1557,8 +1558,8 @@ MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
MachineInstr *SystemZInstrInfo::foldMemoryOperandImpl(
MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
- MachineInstr *&CopyMI, LiveIntervals *LIS) const {
+ MachineInstr &LoadMI, MachineInstr *&CopyMI, LiveIntervals *LIS) const {
+ MachineBasicBlock::iterator InsertPt = MI;
MachineRegisterInfo *MRI = &MF.getRegInfo();
MachineBasicBlock *MBB = MI.getParent();
diff --git a/llvm/lib/Target/SystemZ/SystemZInstrInfo.h b/llvm/lib/Target/SystemZ/SystemZInstrInfo.h
index 9fbd8e9a28d1d..b09148740cca2 100644
--- a/llvm/lib/Target/SystemZ/SystemZInstrInfo.h
+++ b/llvm/lib/Target/SystemZ/SystemZInstrInfo.h
@@ -293,15 +293,15 @@ class SystemZInstrInfo : public SystemZGenInstrInfo {
std::optional<unsigned> getInverseOpcode(unsigned Opcode) const override;
MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
- ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt,
- int FrameIndex, MachineInstr *&CopyMI,
+ ArrayRef<unsigned> Ops, int FrameIndex,
+ MachineInstr *&CopyMI,
LiveIntervals *LIS = nullptr,
VirtRegMap *VRM = nullptr) const override;
- MachineInstr *foldMemoryOperandImpl(
- MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
- MachineInstr *&CopyMI, LiveIntervals *LIS = nullptr) const override;
+ MachineInstr *
+ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
+ ArrayRef<unsigned> Ops, MachineInstr &LoadMI,
+ MachineInstr *&CopyMI,
+ LiveIntervals *LIS = nullptr) const override;
bool expandPostRAPseudo(MachineInstr &MBBI) const override;
bool reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const
override;
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 3656f9ba68c53..8e68b0876cb73 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -7658,10 +7658,12 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
return nullptr;
}
-MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
- MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, int FrameIndex, MachineInstr *&CopyMI,
- LiveIntervals *LIS, VirtRegMap *VRM) const {
+MachineInstr *
+X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
+ ArrayRef<unsigned> Ops, int FrameIndex,
+ MachineInstr *&CopyMI, LiveIntervals *LIS,
+ VirtRegMap *VRM) const {
+ MachineBasicBlock::iterator InsertPt = MI;
// Check switch flag
if (NoFusing)
return nullptr;
@@ -8175,8 +8177,8 @@ static bool isNonFoldablePartialRegisterLoad(const MachineInstr &LoadMI,
MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
- MachineInstr *&CopyMI, LiveIntervals *LIS) const {
+ MachineInstr &LoadMI, MachineInstr *&CopyMI, LiveIntervals *LIS) const {
+ MachineBasicBlock::iterator InsertPt = MI;
// If LoadMI is a masked load, check MI having the same mask.
const MCInstrDesc &MCID = get(LoadMI.getOpcode());
@@ -8228,8 +8230,7 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
if (isLoadFromStackSlot(LoadMI, FrameIndex)) {
if (isNonFoldablePartialRegisterLoad(LoadMI, MI, MF))
return nullptr;
- return foldMemoryOperandImpl(MF, MI, Ops, InsertPt, FrameIndex, CopyMI,
- LIS);
+ return foldMemoryOperandImpl(MF, MI, Ops, FrameIndex, CopyMI, LIS);
}
// Check switch flag
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 1c37fcd7e73b9..083888cba22c8 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -493,18 +493,18 @@ class X86InstrInfo final : public X86GenInstrInfo {
///
/// \returns true on success.
MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
- ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt,
- int FrameIndex, MachineInstr *&CopyMI,
+ ArrayRef<unsigned> Ops, int FrameIndex,
+ MachineInstr *&CopyMI,
LiveIntervals *LIS = nullptr,
VirtRegMap *VRM = nullptr) const override;
/// Same as the previous version except it allows folding of any load and
/// store from / to any address, not just from a specific stack slot.
- MachineInstr *foldMemoryOperandImpl(
- MachineFunction &MF, MachineInstr &MI, ArrayRef<unsigned> Ops,
- MachineBasicBlock::iterator InsertPt, MachineInstr &LoadMI,
- MachineInstr *&CopyMI, LiveIntervals *LIS = nullptr) const override;
+ MachineInstr *
+ foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI,
+ ArrayRef<unsigned> Ops, MachineInstr &LoadMI,
+ MachineInstr *&CopyMI,
+ LiveIntervals *LIS = nullptr) const override;
bool
unfoldMemoryOperand(MachineFunction &MF, MachineInstr &MI, Register Reg,
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