The Week Of Monday 24 July 2023 Archives by author

• Messages sorted by: [ thread ] [ subject ] [ date ]
• More info on this list...

Starting: Mon Jul 24 00:04:33 PDT 2023
Ending: Sun Jul 30 23:59:43 PDT 2023
Messages: 2716

• [PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D155784: [X86] Update features for sierraforest, grandridge   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156285: [X86] Update Model value for Raptor Lake.   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156285: [X86] Update Model value for Raptor Lake.   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D155662: [X86] Promote VAES implied feature to AVX2   Freddy, Ye via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy, Ye via Phabricator via llvm-commits
• [llvm] 0d12683 - Revert "[OpenMP] Add the `ompx_attribute` clause for target directives"   Aaron Ballman via llvm-commits
• [llvm] 1a53b5c - Revert "[llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map"   Aaron Ballman via llvm-commits
• [PATCH] D154858: [AMDGPU] Add llvm.amdgcn.wave.reduce.umin/umax Intrinsic.   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156184: [OpenMP] Add the `ompx_attribute` clause for target directives   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D154858: [AMDGPU] Add llvm.amdgcn.wave.reduce.umin/umax Intrinsic.   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.5   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156438: [Docs] Fix code-blocks missing colon   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156518: Fix handling of medial hyphens in Unicode Names.   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D105759: Implement P2361 Unevaluated string literals   Aaron Ballman via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   Aaron Siddhartha Mondal via Phabricator via llvm-commits
• [PATCH] D156433: [bazel] Include builtin headers with clang-tidy   Aaron Siddhartha Mondal via Phabricator via llvm-commits
• [PATCH] D155867: [AMDGPU][GlobalISel] Fix applyMappingImpl function for G_ABS and type v2s16   Acim Maravic via Phabricator via llvm-commits
• [PATCH] D155865: [AMDGPU][GlobalISel] Update legalizer for G_ABS, G_SMIN, G_SMAX, G_UMIN, G_UMAX   Acim Maravic via Phabricator via llvm-commits
• [PATCH] D155867: [AMDGPU][GlobalISel] Update applyMappingImpl for G_ABS and type v2s16   Acim Maravic via Phabricator via llvm-commits
• [PATCH] D155865: [AMDGPU][GlobalISel] Update legalizer for G_ABS, G_SMIN, G_SMAX, G_UMIN, G_UMAX   Acim Maravic via Phabricator via llvm-commits
• [PATCH] D156540: [llc] Add the command line option `-sched-model-force-enable-intervals`.   Adam Nemet via Phabricator via llvm-commits
• [PATCH] D156316: [mlir][capi] Add a Bazel target for the C bindings to the SCF dialect   Adam Paszke via Phabricator via llvm-commits
• [PATCH] D152714: [AArch64][Optimization]Emit FCCMP for AND of two float compares   Aditya Kumar via Phabricator via llvm-commits
• [PATCH] D156166: Emit DW_RLE_base_addressx + DW_RLE_offset_pairs instead of DW_ELE_start_length in debug_rnglists section   Adrian Prantl via Phabricator via llvm-commits
• [PATCH] D156545: [DebugInfo][InstrRef] Don't produce over-sized DW_OP_deref_size expressions for very wide stack spills   Adrian Prantl via Phabricator via llvm-commits
• [PATCH] D156358: [AArch64] Do not unnecessarily spill LR because of @llvm.returnaddress   Ahmed Bougacha via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Akash Banerjee via Phabricator via llvm-commits
• [PATCH] D138846: MC/DC in LLVM Source-Based Code Coverage: LLVM back-end and compiler-rt   Alan Phipps via Phabricator via llvm-commits
• [PATCH] D138846: MC/DC in LLVM Source-Based Code Coverage: LLVM back-end and compiler-rt   Alan Phipps via Phabricator via llvm-commits
• [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization   Alan Phipps via Phabricator via llvm-commits
• [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization   Alan Phipps via Phabricator via llvm-commits
• [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization   Alan Phipps via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Alan Zhao via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Alan Zhao via Phabricator via llvm-commits
• [llvm] 236e678 - [IRCE] Add NSW to OverflowingBinaryOperator but not BinaryOperator   Aleksandr Popov via llvm-commits
• [PATCH] D156138: [NFC][GuardWidening] Remove dead code   Aleksandr Popov via Phabricator via llvm-commits
• [PATCH] D156577: [IRCE] Add NSW to OverflowingBinaryOperator but not BinaryOperator   Aleksandr Popov via Phabricator via llvm-commits
• [PATCH] D156577: [IRCE] Add NSW to OverflowingBinaryOperator but not BinaryOperator   Aleksandr Popov via Phabricator via llvm-commits
• [PATCH] D156577: [IRCE] Add NSW to OverflowingBinaryOperator but not BinaryOperator   Aleksandr Popov via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Alessandro Decina via Phabricator via llvm-commits
• [PATCH] D147991: [LLVM][Casting.h] Fix dyn_cast for std::unique_ptr.   Alex Bezzubikov via Phabricator via llvm-commits
• [PATCH] D142327: [clang][RISCV] Fix ABI handling of empty structs with hard FP calling conventions in C++   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156083: [RISCV] Add test case for D156082 to condops.ll   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D155953: [RISCV][MC] Add CLI option to disable branch relaxation   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D154958: [RISCV][MC] Relax conditional branches to unresolved symbols   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D155916: [RISCV] Remove some instructions from Zvfbfwma by implying Zfbfmin according to the latest spec   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156048: [RISCV] Remove unused check prefixes for tests. NFC   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156075: [RISCV] Remove combineCmpOp and associated code. NFCI   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D142327: [clang][RISCV] Fix ABI handling of empty structs with hard FP calling conventions in C++   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156200: [RISCV] Don't print a tab after mnemonics that don't have operands.   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D151547: [RISCV] Remove experimental for zihintntl.   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156196: [RISCV] Add isAllocatable=0 to VCSR register class.   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156159: [RISCV] Add DAG combine to pull xor with 1 through select idiom that uses czero_eqz/nez.   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156153: [RISCV] Generalize combineAddOfBooleanXor to support any boolean not just setcc.   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156144: [RISCV] Add simple DAG combine to pull xor with 1 through select_cc.   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156314: [RISCV] Make Zcf and Zcd imply the F and D extensions respectively   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D142880: [RISCV][LLD] Support R_RISCV_SET_ULEB128 and R_RISCV_SUB_ULEB128   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D142327: [clang][RISCV] Fix ABI handling of empty structs with hard FP calling conventions in C++   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Alex Bradbury via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when __riscv_v not defined   Alex Bradbury via Phabricator via llvm-commits
• [compiler-rt] cdc6f4c - [builtins] Fix building trunc*fhf2_test with GCC   Alex Richardson via llvm-commits
• [compiler-rt] b114940 - [builtins] Drop -fnested-functions flag from tests   Alex Richardson via llvm-commits
• [compiler-rt] e3374c8 - [builtins] Avoid using CRT_LDBL_128BIT in implementation. NFC   Alex Richardson via llvm-commits
• [PATCH] D155856: [LLVM][Opt][RFC] Add LLVM support for C++ Parallel Algorithm Offload   Alex Voicu via Phabricator via llvm-commits
• [PATCH] D155775: [Clang][Driver][RFC] Add driver support for C++ Parallel Algorithm Offload   Alex Voicu via Phabricator via llvm-commits
• [PATCH] D156316: [mlir][capi] Add a Bazel target for the C bindings to the SCF dialect   Alex Zinenko via Phabricator via llvm-commits
• [llvm] 0def4e6 - Revert "[AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre"   Alexander Kornienko via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Alexander Kornienko via Phabricator via llvm-commits
• [PATCH] D156328: Revert "[AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre"   Alexander Kornienko via Phabricator via llvm-commits
• [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.   Alexander Kornienko via Phabricator via llvm-commits
• [PATCH] D156328: Revert "[AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre"   Alexander Kornienko via Phabricator via llvm-commits
• [PATCH] D156328: Revert "[AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre"   Alexander Kornienko via Phabricator via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Alexander Kornienko via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Alexander Kornienko via Phabricator via llvm-commits
• [PATCH] D156381: Revert "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"   Alexander Kornienko via Phabricator via llvm-commits
• [PATCH] D156374: [BOLT][DWARF] Don't convert low_pc/high_pc to ranges for size 1, and fix handling of sub-program with ranges   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156374: [BOLT][DWARF] Don't convert low_pc/high_pc to ranges for size 1, and fix handling of sub-program with ranges   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156374: [BOLT][DWARF] Update how ranges for size 1 are handled, and fix handling of sub-program with ranges   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156374: [BOLT][DWARF] Update how ranges for size 1 are handled, and fix handling of sub-program with ranges   Alexander Yermolovich via Phabricator via llvm-commits
• [PATCH] D156374: [BOLT][DWARF] Update handling of size 1 ranges and fix sub-programs with ranges   Alexander Yermolovich via Phabricator via llvm-commits
• [llvm] 03f1d09 - [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via llvm-commits
• [llvm] 59a5c58 - [FuncSpec][NFC] Leave a comment for future improvements.   Alexandros Lamprineas via llvm-commits
• [llvm] 20c8f58 - [FuncSpec] Split the specialization bonus into CodeSize and Latency.   Alexandros Lamprineas via llvm-commits
• [llvm] c52ab9e - Revert "[FuncSpec] Add Phi nodes to the InstCostVisitor."   Alexandros Lamprineas via llvm-commits
• [llvm] 2e00eba - [FuncSpec][NFC] Remove SSA copy intrinsics in the unittests.   Alexandros Lamprineas via llvm-commits
• [llvm] 96ff464 - [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D155103: [FuncSpec] Split the specialization bonus into CodeSize and Latency.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D155103: [FuncSpec] Split the specialization bonus into CodeSize and Latency.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D156260: [FunctionSpecialization] Use SmallVector::operator== to simplify some code. NFC   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D156365: [FuncSpec][NFC] Remove SSA copy intrinsics in the unittests.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D156365: [FuncSpec][NFC] Remove SSA copy intrinsics in the unittests.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Alexandros Lamprineas via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Alexei Starovoitov via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Alexei Starovoitov via Phabricator via llvm-commits
• [llvm] 44eca64 - [SLP]Check scalars before trying scheduling.   Alexey Bataev via llvm-commits
• [llvm] 48bc5b0 - [SLP][PR64099]Fix unsound undef to poison transformation when handling   Alexey Bataev via llvm-commits
• [PATCH] D154891: [SLP]Check scalars before trying scheduling.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D156184: [OpenMP] Add the `ompx_attribute` clause for target directives   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D148855: [SLP]Improve tryToGatherExtractElements by using per-register analysis.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D149742: [SLP]Improve isGatherShuffledEntry by trying per-register shuffle.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D155246: [SLP]Improve stores vectorization.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D156166: Emit DW_RLE_base_addressx + DW_RLE_offset_pairs instead of DW_ELE_start_length in debug_rnglists section   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D153268: [DWARFLinkerParallel] Add limited functionality to DWARFLinkerParallel.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156111: [LV] Ignore the option prefer-predicate-over-epilogue for target unspported mask   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156111: [LV] Ignore the option prefer-predicate-over-epilogue for target unspported mask   Allen zhong via Phabricator via llvm-commits
• [PATCH] D155708: [AArch64][NFC] Call the API getVScaleRange directly   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D155708: [AArch64][NFC] Call the API getVScaleRange directly   Allen zhong via Phabricator via llvm-commits
• [PATCH] D155708: [AArch64][NFC] Call the API getVScaleRange directly   Allen zhong via Phabricator via llvm-commits
• [PATCH] D155708: [AArch64][NFC] Call the API getVScaleRange directly   Allen zhong via Phabricator via llvm-commits
• [PATCH] D155708: [AArch64][NFC] Call the API getVScaleRange directly   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156521: [tests] precommit tests for D156499   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156591: [tests] precommit tests for D154953   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Allen zhong via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Amara Emerson via Phabricator via llvm-commits
• [PATCH] D156176: [BOLT] Add blocks order kind to YAML profile header   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156176: [BOLT] Add blocks order kind to YAML profile header   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156176: [BOLT] Add blocks order kind to YAML profile header   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156176: [BOLT] Add blocks order kind to YAML profile header   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156176: [BOLT] Add blocks order kind to YAML profile header   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156176: [BOLT] Add blocks order kind to YAML profile header   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156206: [BOLT] Accept function start as valid jump table entry   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156043: [BOLT][NFC] Simplify YAMLProfileReader   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156340: [BOLT][test] Add missing stderr redirections   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156389: [BOLT] Add support for instrumenting conditional tail calls   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156389: [BOLT] Add support for instrumenting conditional tail calls   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156389: [BOLT] Add support for instrumenting conditional tail calls   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156389: [BOLT] Add support for instrumenting conditional tail calls   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156389: [BOLT] Add support for instrumenting conditional tail calls   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D156644: [BOLT][YAML] Only read first profile per function   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D155544: [AIX][TLS][clang] Add -maix-small-local-exec-tls clang option.   Amy Kwan via Phabricator via llvm-commits
• [PATCH] D156203: [AIX][TLS] Add backend portion for the -maix-small-local-exec-tls option.   Amy Kwan via Phabricator via llvm-commits
• [PATCH] D156203: [AIX][TLS] Add target attribute for -maix-small-local-exec-tls option.   Amy Kwan via Phabricator via llvm-commits
• [PATCH] D156203: [AIX][TLS] Add target attribute for -maix-small-local-exec-tls option.   Amy Kwan via Phabricator via llvm-commits
• [PATCH] D156203: [AIX][TLS] Add target attribute for -maix-small-local-exec-tls option.   Amy Kwan via Phabricator via llvm-commits
• [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant globals into one pool.   Amy Kwan via Phabricator via llvm-commits
• [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant globals into one pool.   Amy Kwan via Phabricator via llvm-commits
• [PATCH] D155730: [PowerPC] Add a pass to merge all of the constant globals into one pool.   Amy Kwan via Phabricator via llvm-commits
• [llvm] 4210204 - [AArch64] Refactor checks in sign-return-address.ll test   Anatoly Trosinenko via llvm-commits
• [PATCH] D85917: [MSP430] Fix passing C structs and unions as function arguments   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156327: [AArch64] Refactor checks in sign-return-address.ll test   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156358: [AArch64] Do not unnecessarily spill LR because of @llvm.returnaddress   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156327: [AArch64] Refactor checks in sign-return-address.ll test   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156358: [AArch64] Do not unnecessarily spill LR because of @llvm.returnaddress   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D156327: [AArch64] Refactor checks in sign-return-address.ll test   Anatoly Trosinenko via Phabricator via llvm-commits
• [PATCH] D145658: [Xtensa] Initial support of the ALU operations.   Andrei Safronov via Phabricator via llvm-commits
• [PATCH] D145660: [Xtensa] Codegen support for memory operations   Andrei Safronov via Phabricator via llvm-commits
• [PATCH] D155119: [sancov] Switch to OptTable from llvm::cl   Andres Villegas via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D154984: [lit] Drop "Script:", make -v and -a imply -vv   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D154984: [lit] Drop "Script:", make -v and -a imply -vv   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Andrzej Warzynski via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Andrzej Warzynski via Phabricator via llvm-commits
• [llvm] a8016e2 - [sancov] Switch to OptTable from llvm::cl   Andrés Villegas via llvm-commits
• [llvm] eaf6117 - [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via llvm-commits
• [llvm] e85fd3c - Revert "[LV] Complete load groups and release store groups in presence of dependency"   Anna Thomas via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Anna Thomas via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Anna Thomas via Phabricator via llvm-commits
• [llvm] 2dea969 - [clang][CodeGen] Introduce `-frecord-command-line` for MachO   Antonio Frighetto via llvm-commits
• [PATCH] D155716: [clang][CodeGen] Introduce `-frecord-command-line` for MachO   Antonio Frighetto via Phabricator via llvm-commits
• [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths   Argyrios Kyrtzidis via Phabricator via llvm-commits
• [llvm] 81b193f - [gn build] Port 16c1f43642e4   Arthur Eubanks via llvm-commits
• [llvm] 6f1395a - [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE   Arthur Eubanks via llvm-commits
• [llvm] ae2ebc2 - [gn build] Enable builtins on Windows   Arthur Eubanks via llvm-commits
• [llvm] f800c1f - [PEI] Don't zero out noreg operands   Arthur Eubanks via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D145210: [Pipeline] Adjust PostOrderFunctionAttrs placement in simplification pipeline   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D153107: [llvm-c] Add LLVMSetTailCallKind and LLVMGetTailCallKind   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D156485: [PEI] Don't zero out noreg operands   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D156485: [PEI] Don't zero out noreg operands   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D156532: [Pipelines] Perform hoisting prior to GVN   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D156485: [PEI] Don't zero out noreg operands   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D146266: gn build: Fix Android build.   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D75362: [InstCombine] Process blocks in RPO   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D156397: [FunctionAttrs] Unconditionally perform argument attribute inference in the first function-attrs pass   Arthur Eubanks via Phabricator via llvm-commits
• [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.   Asmaa via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D154858: [AMDGPU] Add llvm.amdgcn.wave.reduce.umin/umax Intrinsic.   Balázs Benics via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Ben Langmuir via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Ben Langmuir via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Ben Langmuir via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Ben Langmuir via Phabricator via llvm-commits
• [llvm] 7ca6b76 - [CSKY] Optimize conditional branches with float comparison   Ben Shi via llvm-commits
• [llvm] 14e0a67 - [CSKY] Add more IR patterns to select FNMUL   Ben Shi via llvm-commits
• [PATCH] D155918: [AVR] Simplify AVRSubtarget.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D155424: [CSKY] Optimize conditional branches with floating point comparison   Ben Shi via Phabricator via llvm-commits
• [PATCH] D155169: [CSKY] Add more patterns to select FNMUL   Ben Shi via Phabricator via llvm-commits
• [PATCH] D155424: [CSKY] Optimize conditional branches with floating point comparison   Ben Shi via Phabricator via llvm-commits
• [PATCH] D155169: [CSKY] Add more patterns to select FNMUL   Ben Shi via Phabricator via llvm-commits
• [PATCH] D155169: [CSKY] Add more patterns to select FNMUL   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D156543: [CSKY][NFC][test] Add more tests of CodeGen for intrinsics   Ben Shi via Phabricator via llvm-commits
• [PATCH] D156543: [CSKY][NFC][test] Add more tests of CodeGen for intrinsics   Ben Shi via Phabricator via llvm-commits
• [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'   Ben Shi via Phabricator via llvm-commits
• [PATCH] D155169: [CSKY] Add more patterns to select FNMUL   Ben Shi via Phabricator via llvm-commits
• [llvm] 5e32f1d - [NVPTX] Expand select_cc on bfloat16 type   Benjamin Kramer via llvm-commits
• [PATCH] D156085: [NVPTX] Expand select_cc on bfloat16 type   Benjamin Kramer via Phabricator via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Bing Yu via Phabricator via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Bing Yu via Phabricator via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Bing Yu via Phabricator via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Bing Yu via Phabricator via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Bing Yu via Phabricator via llvm-commits
• [llvm] 9a53fe5 - [LangRef] Fix typo in example describing memory layout of a vector. NFC   Bjorn Pettersson via llvm-commits
• [PATCH] D94964: [LangRef] Describe memory layout for vectors types   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D94964: [LangRef] Describe memory layout for vectors types   Bjorn Pettersson via Phabricator via llvm-commits
• [PATCH] D144936: [SPARC][IAS] Recognize more SPARCv9 instructions/pseudoinstructions   Brad Smith via Phabricator via llvm-commits
• [PATCH] D154589: MIPS: setMaxAtomicSizeInBitsSupported to 32 for MIPS I   Brad Smith via Phabricator via llvm-commits
• [PATCH] D153206: [PPC32] Parse bl __tls_get_addr(x at tlsgd)@plt+32768   Brad Smith via Phabricator via llvm-commits
• [PATCH] D155669: [RISCV] Remove zvk uimm constraints   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D155669: [RISCV] Remove zvk uimm constraints   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D146054: [RISCV] Add --print-supported-extensions support   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D146054: [RISCV] Add --print-supported-extensions support   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D154576: [RISCV] RISCV vector calling convention (1/2)   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D146054: [RISCV] Add --print-supported-extensions support   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D146054: [RISCV] Add --print-supported-extensions support   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D146054: [RISCV] Add --print-supported-extensions support   Brandon Wu via Phabricator via llvm-commits
• [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Brian Sumner via Phabricator via llvm-commits
• [llvm] ddd7d35 - [RegAlloc] Fix assertion failure caused by inline assembly   Bryan Chan via llvm-commits
• [PATCH] D155087: [RegAlloc] Fix assertion failure caused by inline assembly   Bryan Chan via Phabricator via llvm-commits
• [PATCH] D155087: [RegAlloc] Fix assertion failure caused by inline assembly   Bryan Chan via Phabricator via llvm-commits
• [PATCH] D155087: [RegAlloc] Fix assertion failure caused by inline assembly   Bryan Chan via Phabricator via llvm-commits
• [PATCH] D155389: [ValueTracking][ScalarEvolution] improving llvm.assume's support for the argument value without context & reducing the result range of ScalarEvolution::getRange using computeConstantRange   CaprYang via Phabricator via llvm-commits
• [PATCH] D155389: [ValueTracking][ScalarEvolution] improving llvm.assume's support for the argument value without context & reducing the result range of ScalarEvolution::getRange using computeConstantRange   CaprYang via Phabricator via llvm-commits
• [llvm] 2e6530c - [LiveIntervals] Fix comment to match code for getNextValue (NFC)   Carl Ritson via llvm-commits
• [PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.   Carl Ritson via Phabricator via llvm-commits
• [PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.   Carl Ritson via Phabricator via llvm-commits
• [PATCH] D152205: [Aarch64][SVE]SVE2] Enable tbl, tbl2 for shuffle lowering for fixed vector types.   Caroline via Phabricator via llvm-commits
• [PATCH] D156109: [AArch64][SME] Create new interface for isFullSVEAvailable.   Caroline via Phabricator via llvm-commits
• [PATCH] D136264: [libunwind][RISCV] Support reading of VLENB CSR register   Catherine via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when __riscv_v not defined   Catherine via Phabricator via llvm-commits
• [PATCH] D145210: [Pipeline] Adjust PostOrderFunctionAttrs placement in simplification pipeline   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D156397: [FunctionAttrs] Unconditionally perform argument attribute inference in the first function-attrs pass   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D145210: [Pipeline] Adjust PostOrderFunctionAttrs placement in simplification pipeline   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D156397: [FunctionAttrs] Unconditionally perform argument attribute inference in the first function-attrs pass   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D156397: [FunctionAttrs] Unconditionally perform argument attribute inference in the first function-attrs pass   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D156397: [FunctionAttrs] Unconditionally perform argument attribute inference in the first function-attrs pass   Changpeng Fang via Phabricator via llvm-commits
• [PATCH] D154488: [PowerPC] Define SchedModel for Power8   ChenZheng via Phabricator via llvm-commits
• [PATCH] D155876: [PowerPC] vector cost model add cost to extract i1   ChenZheng via Phabricator via llvm-commits
• [PATCH] D156213: [XCOFF] Enable available_externally linkage for functions.   ChenZheng via Phabricator via llvm-commits
• [compiler-rt] b31771c - [scudo] Remove dead code in pushBlocksImpl (NFC)   Chia-hung Duan via llvm-commits
• [compiler-rt] bf89531 - [scudo] Enabled MAP_ALLOWNOMEM for all platforms   Chia-hung Duan via llvm-commits
• [compiler-rt] e4316a5 - [scudo] Return NULL when MAP_ALLOWNOMEM is set on Trusty   Chia-hung Duan via llvm-commits
• [compiler-rt] 4c6b8bb - [scudo] seperate cache retrieval logic   Chia-hung Duan via llvm-commits
• [compiler-rt] a0b9f1f - [scudo] set/check invalid cache entries   Chia-hung Duan via llvm-commits
• [compiler-rt] 774b614 - [scudo] Acquire FLLock in mergeGroupsToReleaseBack   Chia-hung Duan via llvm-commits
• [PATCH] D156347: [InstCombine] Tests for D156026 (Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer))   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Christoph Stiller via Phabricator via llvm-commits
• [PATCH] D156347: [InstCombine] Tests for D156026 (Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer))   Christoph Stiller via Phabricator via llvm-commits
• [compiler-rt] 867f2d9 - [scudo] Make Options a reference for functions.   Christopher Ferris via llvm-commits
• [PATCH] D155646: [AMDGPU] Use AV regclass in wwm-reg spill pseudos for gfx908+   Christudasan Devadasan via Phabricator via llvm-commits
• [llvm] bb4121e - [Coroutines] Add an O(n) algorithm for computing the cross suspend point   Chuanqi Xu via llvm-commits
• [llvm] 97615ed - Revert "[Coroutines] Add an O(n) algorithm for computing the cross suspend point"   Chuanqi Xu via llvm-commits
• [llvm] 77ef88d - [Coroutines] Add an O(n) algorithm for computing the cross suspend point   Chuanqi Xu via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D155103: [FuncSpec] Split the specialization bonus into CodeSize and Latency.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   Chuanqi Xu via Phabricator via llvm-commits
• [llvm] 7a4968b - [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Corbin Robeck via llvm-commits
• [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Corbin Robeck via Phabricator via llvm-commits
• [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Corbin Robeck via Phabricator via llvm-commits
• [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Corbin Robeck via Phabricator via llvm-commits
• [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Corbin Robeck via Phabricator via llvm-commits
• [llvm] 68410fb - Fix handling of medial hyphens in Unicode Names.   Corentin Jabot via llvm-commits
• [PATCH] D155175: [Clang] Fix consteval propagation for aggregates and defaulted constructors   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D155175: [Clang] Fix consteval propagation for aggregates and defaulted constructors   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D155175: [Clang] Fix consteval propagation for aggregates and defaulted constructors   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D155175: [Clang] Fix consteval propagation for aggregates and defaulted constructors   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D156518: Fix handling of medial hyphens in Unicode Names.   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D156518: Fix handling of medial hyphens in Unicode Names.   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D105759: Implement P2361 Unevaluated string literals   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D156518: Fix handling of medial hyphens in Unicode Names.   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D156518: Fix handling of medial hyphens in Unicode Names.   Corentin Jabot via Phabricator via llvm-commits
• [PATCH] D105759: Implement P2361 Unevaluated string literals   Corentin Jabot via Phabricator via llvm-commits
• [llvm] 9da0db4 - [RISCV] Add CZERO_EQZ/CZERO_NEZ to computeKnownBitsForTargetNode.   Craig Topper via llvm-commits
• [llvm] 82686d7 - [RISCV] Add test case for D156082 to condops.ll   Craig Topper via llvm-commits
• [llvm] 5990199 - [RISCV] Add CZERO_EQZ/CZERO_NEZ to ComputeNumSignBitsForTargetNode.   Craig Topper via llvm-commits
• [llvm] 9d9cde5 - [RISCV] Remove combineCmpOp and associated code. NFCI   Craig Topper via llvm-commits
• [llvm] 4942978 - [RISCV] Add lowering for scalar fmaximum/fminimum.   Craig Topper via llvm-commits
• [llvm] 7084c3e - [RISCV] Don't print a tab after mnemonics that don't have operands.   Craig Topper via llvm-commits
• [llvm] 1f5a1b8 - [DAGCombiner] Minor improvements to foldAndOrOfSETCC. NFC   Craig Topper via llvm-commits
• [llvm] 12832c1 - [RISCV] Add isAllocatable=0 to VCSR register class.   Craig Topper via llvm-commits
• [llvm] 5ff5dac - [RISCV] Add simple DAG combine to pull xor with 1 through select_cc.   Craig Topper via llvm-commits
• [llvm] b34a8b3 - [RISCV] Generalize combineAddOfBooleanXor to support any boolean not just setcc.   Craig Topper via llvm-commits
• [llvm] f6dc75c - [RISCV] Add DAG combine to pull xor with 1 through select idiom that uses czero_eqz/nez.   Craig Topper via llvm-commits
• [llvm] 19761f8 - [RISCV] Simplify tablegen class for Zfa FLI instructions. NFC   Craig Topper via llvm-commits
• [llvm] 02c11c5 - [RISCV] Remove stale TODOs from RISCVISAInfo.cpp. NFC   Craig Topper via llvm-commits
• [llvm] e5df048 - [FunctionSpecialization] Use SmallVector::operator== to simplify some code. NFC   Craig Topper via llvm-commits
• [llvm] e28307e - [RISCV] Handle seteq/setne conditions for CZERO_NEZ/CZERO_EQZ during isel.   Craig Topper via llvm-commits
• [llvm] aad360d - [RISCV] Add EmitPriority=0 to Zcb load/store aliases with no immediate offset.   Craig Topper via llvm-commits
• [llvm] a81e1f0 - [RISCV] When using vror.vi for left rotate, mask the inverted immediate to SEW.   Craig Topper via llvm-commits
• [llvm] 3046fb6 - [RISCV] Rename timm5 to tsimm5 to better reflect that it is a signed immediate.   Craig Topper via llvm-commits
• [llvm] 2f95564 - [RISCV] Simplify RVKUnary_rnum slightly. NFC   Craig Topper via llvm-commits
• [llvm] 6804716 - [RISCV] Add RVInstIUnary class to RISCVInstrFormats.td. NFC   Craig Topper via llvm-commits
• [llvm] 20edd99 - [RISCV] Use RVInstIUnary for THRev_r in RISCVInstrInfoXTHead.td. NFC   Craig Topper via llvm-commits
• [llvm] 0c7d897 - [RISCV] Rename DecoderNamespace for XCVsimd to be consistent with other XCV extensions. NFC   Craig Topper via llvm-commits
• [llvm] b4bb111 - [RISCV] Rename XTHead DecoderNamespaces to match their extension names include the 'X'. NFC   Craig Topper via llvm-commits
• [llvm] 54e8cfe - [RISCV] Simplify some predicate functions in RISCVSubtarget.h. NFC   Craig Topper via llvm-commits
• [llvm] eff53ce - [RISCV] Remove unused CHECK prefix from test. NFC   Craig Topper via llvm-commits
• [llvm] 56b54ed - [RISCV] Combine setOperationAction code for ISD::CTLZ for Zbb and XTheadBB. NFC   Craig Topper via llvm-commits
• [PATCH] D156084: [RISCV] Update Zvk shorthand extension to 1.0.0-rc1   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156084: [RISCV] Update Zvk shorthand extension to 1.0.0-rc1   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156081: [RISCV] Add CZERO_EQZ/CZERO_NEZ to computeKnownBitsForTargetNode.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156083: [RISCV] Add test case for D156082 to condops.ll   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156082: [RISCV] Add CZERO_EQZ/CZERO_NEZ to ComputeNumSignBitsForTargetNode.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156075: [RISCV] Remove combineCmpOp and associated code. NFCI   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156140: [DAGCombiner] Minor improvements to foldAndOrOfSETCC. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156144: [RISCV] Add simple DAG combine to pull xor with 1 through select_cc.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156153: [RISCV] Generalize combineAddOfBooleanXor to support any boolean not just setcc.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155669: [RISCV] Remove zvk uimm constraints   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156159: [RISCV] Add DAG combine to pull xor with 1 through select idiom that uses czero_eqz/nez.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155466: [RISCV] Match ext_vl+sra_vl/srl_vl+trunc_vector_vl to vnsra.wv/vnsrl.wv   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156092: [RISCV] Add a common class for cm.push, cm.popret, cm.popretz and cm.pop.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155929: [RISCV] Use the first element of source as the start value of reduction.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155927: [RISCV] Add tests for vnsrl.vx where shift amount is truncated   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155928: [RISCV] Add patterns for vnsrl.vx where shift amount is truncated   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155936: [RISCV] Add SDNode patterns for vwsll.[vv,vx,vi]   Craig Topper via Phabricator via llvm-commits
• [PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156110: [TableGen] Refine obtaining qualified register class ids.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156069: [RISCV] Add lowering for scalar fmaximum/fminimum.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155929: [RISCV] Use the first element of source as the start value of reduction.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155669: [RISCV] Remove zvk uimm constraints   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156196: [RISCV] Add isAllocatable=0 to VCSR register class.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P   Craig Topper via Phabricator via llvm-commits
• [PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P   Craig Topper via Phabricator via llvm-commits
• [PATCH] D154412: [RISCV] Add support for XCVbi extension in CV32E40P   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155683: [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156200: [RISCV] Don't print a tab after mnemonics that don't have operands.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156200: [RISCV] Don't print a tab after mnemonics that don't have operands.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156140: [DAGCombiner] Minor improvements to foldAndOrOfSETCC. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156196: [RISCV] Add isAllocatable=0 to VCSR register class.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156144: [RISCV] Add simple DAG combine to pull xor with 1 through select_cc.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156153: [RISCV] Generalize combineAddOfBooleanXor to support any boolean not just setcc.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156159: [RISCV] Add DAG combine to pull xor with 1 through select idiom that uses czero_eqz/nez.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155683: [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156250: [RISCV] Handle seteq/setne conditions for CZERO_NEZ/CZERO_EQZ during isel.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155344: [RISCV] Generalize 'tryFoldSelectIntOp` to other operations.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155481: [RISCV] A test for conditional binary ops.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156260: [FunctionSpecialization] Use SmallVector::operator== to simplify some code. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155663: [RISCV] Add Zbs instructions to SiFive7 SchedModel   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156314: [RISCV] Make Zcf and Zcd imply the F and D extensions respectively   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156306: [RISCV][NFC] Change type of isOrdered to boolean   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156335: [RISCV] Simplify tablegen for XCV mac and mul instructions. NFC.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156342: [RISCV] Improve policy emission for RVV pseudo instructions   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156342: [RISCV] Improve policy emission for RVV pseudo instructions   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156319: [RISCV] Relax ta/ma policy into tu/mu in InsertVSETVLI   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156250: [RISCV] Handle seteq/setne conditions for CZERO_NEZ/CZERO_EQZ during isel.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156260: [FunctionSpecialization] Use SmallVector::operator== to simplify some code. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156250: [RISCV] Handle seteq/setne conditions for CZERO_NEZ/CZERO_EQZ during isel.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156250: [RISCV] Handle seteq/setne conditions for CZERO_NEZ/CZERO_EQZ during isel.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155155: [RISCV] emit .option directive for functions with target features which differ from module default   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156348: [RISCV] When using vror.vi for left rotate, mask the inverted immediate to SEW.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155928: [RISCV] Add patterns for vnsrl.vx where shift amount is truncated   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156390: [SDAG][RISCV] Avoid expanding is-power-of-2 pattern on riscv32/64 with zbb   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156335: [RISCV] Simplify tablegen for XCV mac and mul instructions. NFC.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156380: [RISCV][GlobalISel] Fix tests for addition, subtraction and logical instructions   Craig Topper via Phabricator via llvm-commits
• [PATCH] D154411: [RISCV][NFC] Simplify lowerVPOp.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155916: [RISCV] Remove some instructions from Zvfbfwma by implying Zfbfmin according to the latest spec   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156349: [DAG] Support store merging of vector constant stores   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156432: [RISCV][NFC] Use !format to simplify some code   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138809: [RISCV] Support vector crypto extension LLVM IR   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156444: [llvm][IR]   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156444: [llvm][IR]   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156449: [LLVM][Transforms]   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156442: [llvm][RISCV][Backend]   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156442: Zext flag conversion in RISC-V Backend   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156404: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156390: [SDAG][RISCV] Avoid expanding is-power-of-2 pattern on riscv32/64 with zbb   Craig Topper via Phabricator via llvm-commits
• [PATCH] D99750: [LV, VP]VP intrinsics support for the Loop Vectorizer   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156348: [RISCV] When using vror.vi for left rotate, mask the inverted immediate to SEW.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156477: [RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156449: [LLVM][Transforms] Zext flag in various optimization passes for RISC-V   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156507: [RISCV] Upgrade Zihintntl extension to version 1.0 and move out of experimental state.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156404: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D147373: [InstCombine] fold double reverses   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156589: [RISCV] Add a common base class for RVInstI variations. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156589: [RISCV] Add a common base class for RVInstI variations. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156589: [RISCV] Add a common base class for RVInstI variations. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156589: [RISCV] Add a common base class for RVInstI variations. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156590: [RISCV] Add a common base class for RVInstR variations. NFC   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156444: [llvm][RISCV][IR] Zext flag in IR for RISC-V   Craig Topper via Phabricator via llvm-commits
• [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets   Craig Topper via Phabricator via llvm-commits
• [PATCH] D156610: [WIP][LSR] Transform div instruction to add in loop   Craig Topper via Phabricator via llvm-commits
• [PATCH] D155306: [mlir][ArmSME] Add tile load op and extend tile store tile size support   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D155306: [mlir][ArmSME] Add tile load op and extend tile store tile size support   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D155306: [mlir][ArmSME] Add tile load op and extend tile store tile size support   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156516: [lli] Fix crash on empty entry-function   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156517: [mlir][ArmSME] Add -canonicalize to vector to ArmSME test   Cullen Rhodes via Phabricator via llvm-commits
• [PATCH] D156558: [mlir][ArmSME] Remove "pure" side-effect from 'get_tile_id' op to prevent CSE   Cullen Rhodes via Phabricator via llvm-commits
• [llvm] 0882c70 - [TextAPI] Introduce SymbolSet   Cyndy Ishida via llvm-commits
• [llvm] a066695 - [TextAPI] Remove TBD file attributes that aren't used anymore.   Cyndy Ishida via llvm-commits
• [llvm] 16c1f43 - [TextAPI] Add functionality to manipulate over InterfaceFiles   Cyndy Ishida via llvm-commits
• [llvm] 27459a3 - [TextAPI] Update missing enum cases & utility functions   Cyndy Ishida via llvm-commits
• [llvm] 20c92d2 - [docs] Add links to recent transparency reports   Cyndy Ishida via llvm-commits
• [llvm] 3b73139 - [TextAPI] Make min-os deployment version optional in tbd-v5.   Cyndy Ishida via llvm-commits
• [PATCH] D149860: [TextAPI] Introduce SymbolSet   Cyndy Ishida via Phabricator via llvm-commits
• [PATCH] D149861: [TextAPI] Remove TBD file attributes that aren't used anymore.   Cyndy Ishida via Phabricator via llvm-commits
• [PATCH] D153398: [TextAPI] Add functionality to manipulate over InterfaceFiles   Cyndy Ishida via Phabricator via llvm-commits
• [PATCH] D156456: [docs] Add links to recent transparency reports   Cyndy Ishida via Phabricator via llvm-commits
• [PATCH] D156487: [TextAPI] Make min-os deployment version optional in tbd-v5.   Cyndy Ishida via Phabricator via llvm-commits
• [PATCH] D156456: [docs] Add links to recent transparency reports   Cyndy Ishida via Phabricator via llvm-commits
• [PATCH] D156456: [docs] Add links to recent transparency reports   Cyndy Ishida via Phabricator via llvm-commits
• [PATCH] D156487: [TextAPI] Make min-os deployment version optional in tbd-v5.   Cyndy Ishida via Phabricator via llvm-commits
• [PATCH] D156021: [mlir][CAPI] Add C API for Pattern Matching   Daan Vanoverloop via Phabricator via llvm-commits
• [PATCH] D156021: [mlir][CAPI] Add C API for Pattern Matching   Daan Vanoverloop via Phabricator via llvm-commits
• [PATCH] D156021: [mlir][CAPI] Add C API for Pattern Matching   Daan Vanoverloop via Phabricator via llvm-commits
• [PATCH] D156021: [mlir][CAPI] Add C API for Pattern Matching   Daan Vanoverloop via Phabricator via llvm-commits
• [llvm] 3435a6a - [AArch64] [XRay] Account for XRay event instrs in Branch Relaxation   Daniel Hoekwater via llvm-commits
• [llvm] f1c21fa - [AArch64] Switch magic numbers to library functions in fixup   Daniel Hoekwater via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156272: [AArch64] [XRay] Account for XRay event instrs in Branch Relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156272: [AArch64] [XRay] Account for XRay event instrs in Branch Relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156272: [AArch64] [XRay] Account for XRay event instrs in Branch Relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156272: [AArch64] [XRay] Account for XRay event instrs in Branch Relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156272: [AArch64] [XRay] Account for XRay event instrs in Branch Relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156354: [XRay] Only avoid outlining pseudo-instructions, not whole blocks   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156354: [XRay] Only avoid outlining pseudo-instructions, not whole blocks   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156272: [AArch64] [XRay] Account for XRay event instrs in Branch Relaxation   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D152843: Switch magic numbers to library functions in fixup   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156354: [XRay] Only avoid outlining pseudo-instructions, not whole blocks   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Daniel Hoekwater via Phabricator via llvm-commits
• [PATCH] D156459: [vim] Clean up HiLink in .mir syntax   Daniel Woodworth via Phabricator via llvm-commits
• [PATCH] D156505: [AArch64][ELF] Support R_AARCH64_AUTH_ABS64 static relocation   Daniil Kovalev via Phabricator via llvm-commits
• [PATCH] D156505: [AArch64][ELF] Support R_AARCH64_AUTH_ABS64 static relocation   Daniil Kovalev via Phabricator via llvm-commits
• [PATCH] D155811: MachineSink: Fix strict weak ordering in GetAllSortedSuccessors   Danila Kutenin via Phabricator via llvm-commits
• [PATCH] D94964: [LangRef] Describe memory layout for vectors types   Danila Malyutin via Phabricator via llvm-commits
• [PATCH] D94964: [LangRef] Describe memory layout for vectors types   Danila Malyutin via Phabricator via llvm-commits
• [PATCH] D94964: [LangRef] Describe memory layout for vectors types   Danila Malyutin via Phabricator via llvm-commits
• [PATCH] D156577: [IRCE] Add NSW to OverflowingBinaryOperator but not BinaryOperator   Danila Malyutin via Phabricator via llvm-commits
• [PATCH] D154722: [AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC)   Dave Green via Phabricator via llvm-commits
• [PATCH] D155470: [AArch64] LSLFast to fold onto base address by default   Dave Green via Phabricator via llvm-commits
• [PATCH] D155565: [AArch64] SelectionDAG Funnel Shift Lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D156111: [LV] Ignore the option prefer-predicate-over-epilogue for target unspported mask   Dave Green via Phabricator via llvm-commits
• [PATCH] D154841: [AIC] Fix the sext cost operands in tryToFPToSat   Dave Green via Phabricator via llvm-commits
• [PATCH] D155872: [AArch64] Add vselect(fmin/fmax) SVE patterns   Dave Green via Phabricator via llvm-commits
• [PATCH] D156094: [AArch64] Ignore instructions not supported by CPU in AArch64SVESchedPseudoTest   Dave Green via Phabricator via llvm-commits
• [PATCH] D155972: [SVE] Add vselect(mla/mls) patterns for cases where a multiplicand is used for the false lanes.   Dave Green via Phabricator via llvm-commits
• [PATCH] D155484: [AArch64] Global Isel Funnel Shift Lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D152828: [MachineSink][AArch64] Sink instruction copies when they can replace copy into hard register or folded into addressing mode   Dave Green via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D156235: [MachineBlockPlacement] Remove the pad limit for no-fallthrough loops   Dave Green via Phabricator via llvm-commits
• [PATCH] D156296: [AArch64] Correct the regtype of indexed fmlal   Dave Green via Phabricator via llvm-commits
• [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.   Dave Green via Phabricator via llvm-commits
• [PATCH] D156328: Revert "[AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre"   Dave Green via Phabricator via llvm-commits
• [PATCH] D156296: [AArch64] Correct the regtype of indexed fmlal   Dave Green via Phabricator via llvm-commits
• [PATCH] D154722: [AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC)   Dave Green via Phabricator via llvm-commits
• [PATCH] D152827: [AArch64] Correctly determine if {ADD,SUB}{W,X}rs instructions are cheap   Dave Green via Phabricator via llvm-commits
• [PATCH] D155459: [AArch64] Change the cost of vector insert/extract to 2   Dave Green via Phabricator via llvm-commits
• [PATCH] D155459: [AArch64] Change the cost of vector insert/extract to 2   Dave Green via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   Dave Green via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   Dave Green via Phabricator via llvm-commits
• [PATCH] D155459: [AArch64] Change the cost of vector insert/extract to 2   Dave Green via Phabricator via llvm-commits
• [PATCH] D155459: [AArch64] Change the cost of vector insert/extract to 2   Dave Green via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   Dave Green via Phabricator via llvm-commits
• [PATCH] D156614: [AArch64][GISel] Handling for G_VECREDUCE_FMIN and G_VECREDUCE_FMAX   Dave Green via Phabricator via llvm-commits
• [PATCH] D156615: [AArch64][GISel] Add handling for G_VECREDUCE_FMAXIMUM and G_VECREDUCE_FMINIMUM   Dave Green via Phabricator via llvm-commits
• [PATCH] D155601: [AArch64][GISel] Additional FPExt vector lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D155601: [AArch64][GISel] Additional FPExt vector lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Dave Green via Phabricator via llvm-commits
• [PATCH] D155355: [AArch64] Set maximum vscale VF with shouldMaximizeVectorBandwidth   Dave Green via Phabricator via llvm-commits
• [llvm] 27f0bf7 - ADT: ArrayRef: Assert that begin <= end   David Blaikie via llvm-commits
• [llvm] dd84f5f - test/.../print-dot-dom.ll: Avoid writing to cwd of test by creating/cding into %t instead   David Blaikie via llvm-commits
• [PATCH] D155723: [DWARFVerifier] Allow simplified template names in debug_name   David Blaikie via Phabricator via llvm-commits
• [PATCH] D155818: [CloneFunction][DebugInfo] Clone DISubprogram's local types   David Blaikie via Phabricator via llvm-commits
• [PATCH] D155943: [NFC] Update formatting of some symbolizer tests   David Blaikie via Phabricator via llvm-commits
• [PATCH] D156135: [ADT] Support iterating size-based integer ranges.   David Blaikie via Phabricator via llvm-commits
• [PATCH] D155789: [Support] Implement LLVM_ENABLE_REVERSE_ITERATION for StringMap   David Blaikie via Phabricator via llvm-commits
• [PATCH] D155789: [Support] Implement LLVM_ENABLE_REVERSE_ITERATION for StringMap   David Blaikie via Phabricator via llvm-commits
• [PATCH] D154885: [DAGCombiner] Limit graph traversal to cap compile times   David Blaikie via Phabricator via llvm-commits
• [PATCH] D155093: [DWARF] Fix undefined behaviour in dwarf type printer   David Blaikie via Phabricator via llvm-commits
• [PATCH] D152095: [Verifier] definition subprograms cannot be nested within DICompositeType when enabling ODR.   David Blaikie via Phabricator via llvm-commits
• [PATCH] D155402: [Bindings] Remove duplicate declaration   David Blaikie via Phabricator via llvm-commits
• [PATCH] D152095: [Verifier] definition subprograms cannot be nested within DICompositeType when enabling ODR.   David Blaikie via Phabricator via llvm-commits
• [PATCH] D155818: [CloneFunction][DebugInfo] Clone DISubprogram's local types   David Blaikie via Phabricator via llvm-commits
• [PATCH] D155789: [Support] Implement LLVM_ENABLE_REVERSE_ITERATION for StringMap   David Blaikie via Phabricator via llvm-commits
• [compiler-rt] b2a2538 - [Fuzzer] Assign names to workers   David CARLIER via llvm-commits
• [compiler-rt] e3f935c - [Fuzzer] SetThreadName implementation for Windows   David CARLIER via llvm-commits
• [compiler-rt] cb924dd - Revert "[Fuzzer] SetThreadName implementation for Windows"   David Carlier via llvm-commits
• [llvm] d020fa2 - [AA] Skip the layer of indirection in returning conservative results.   David Goldblatt via llvm-commits
• [PATCH] D149100: [AA] Skip the layer of indirection in returning conservative results.   David Goldblatt via Phabricator via llvm-commits
• [PATCH] D149100: [AA] Skip the layer of indirection in returning conservative results.   David Goldblatt via Phabricator via llvm-commits
• [llvm] 0e30ca2 - [AArch64] Extra testing for vselect(fmin/max patterns. NFC   David Green via llvm-commits
• [llvm] c3c8f00 - [AArch64] Add vselect(fmin/fmax) SVE patterns   David Green via llvm-commits
• [llvm] e012c5c - [AArch64] Add test showing incorrect register usage of FMLAL. NFC   David Green via llvm-commits
• [llvm] 509cb33 - [AArch64] Correct the regtype of indexed fmlal   David Green via llvm-commits
• [llvm] beabfe7 - [AArch64] Sink splat to fmlal intrinsics   David Green via llvm-commits
• [llvm] 2a859b2 - [AArch64] Change the cost of vector insert/extract to 2   David Green via llvm-commits
• [llvm] 76f0d18 - [AArch64] Regenerate arm64-vabs.ll, arm64-subvector-extend.ll and some mir tests. NFC   David Green via llvm-commits
• [llvm] cf39dea - [AArch64] Add a fminnum/fmaxnum test. NFC   David Green via llvm-commits
• [llvm] e8e49a3 - [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   David Green via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   David Li via Phabricator via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   David Li via Phabricator via llvm-commits
• [PATCH] D143602: Allow 32-bit pointers to be written in 64-bit slots   David M. Lloyd via Phabricator via llvm-commits
• [PATCH] D156111: [LV] Ignore the option prefer-predicate-over-epilogue for target unspported mask   David Sherwood via Phabricator via llvm-commits
• [PATCH] D152366: [LoopVectorize] Allow inner loop runtime checks to be hoisted above an outer loop   David Sherwood via Phabricator via llvm-commits
• [PATCH] D156112: [AArch64][LoopVectorize] Improve tail-folding heuristic on neoverse-v1   David Sherwood via Phabricator via llvm-commits
• [PATCH] D154075: [LoopVectorize] Add pre-commit tests for D152366   David Sherwood via Phabricator via llvm-commits
• [PATCH] D154075: [LoopVectorize] Add pre-commit tests for D152366   David Sherwood via Phabricator via llvm-commits
• [PATCH] D152366: [LoopVectorize] Allow inner loop runtime checks to be hoisted above an outer loop   David Sherwood via Phabricator via llvm-commits
• [PATCH] D152366: [LoopVectorize] Allow inner loop runtime checks to be hoisted above an outer loop   David Sherwood via Phabricator via llvm-commits
• [PATCH] D154075: [LoopVectorize] Add pre-commit tests for D152366   David Sherwood via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   David Sherwood via Phabricator via llvm-commits
• [llvm] 7d2fa9e - [llvm][llvm-reduce] Disable use list order test on AArch64/arm64   David Spickett via llvm-commits
• [llvm] cea72fe - [llvm][llvm-reduce] Disable uselistorder test everywhere   David Spickett via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   David Spickett via Phabricator via llvm-commits
• [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   David Spickett via Phabricator via llvm-commits
• [PATCH] D156118: [lldb][AArch64] Add reading of TLS tpidr register from core files   David Spickett via Phabricator via llvm-commits
• [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   David Spickett via Phabricator via llvm-commits
• [PATCH] D155708: [AArch64][NFC] Call the API getVScaleRange directly   David Spickett via Phabricator via llvm-commits
• [PATCH] D149055: [llvm][TableGen][Jupyter] Add configurable default reset behaviour   David Spickett via Phabricator via llvm-commits
• [PATCH] D137085: [LLVM][TableGen][Jupyter] Add first tutorial notebook   David Spickett via Phabricator via llvm-commits
• [PATCH] D156118: [lldb][AArch64] Add reading of TLS tpidr register from core files   David Spickett via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   David Spickett via Phabricator via llvm-commits
• [PATCH] D156202: [XCOFF] Do not put MergeableCStrings in their own section   David Tenty via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Derek Schuff via Phabricator via llvm-commits
• [PATCH] D156472: [WebAssembly] Create separation between MC and CodeGen layers   Derek Schuff via Phabricator via llvm-commits
• [llvm] de7a7aa - [NFC][ValueTracking]: Remove redundant computeKnownBits call for LoadInst in isKnownNonZero   Dhruv Chawla via llvm-commits
• [llvm] d899dc5 - [NFC][ValueTracking]: Move some code from isKnownNonZero to isKnownNonZeroFromOperator   Dhruv Chawla via llvm-commits
• [PATCH] D155958: [NFC][ValueTracking]: Remove redundant computeKnownBits call for LoadInst in isKnownNonZero   Dhruv Chawla via Phabricator via llvm-commits
• [PATCH] D156141: [NFC][ValueTracking]: Move some code from isKnownNonZero to isKnownNonZeroFromOperator   Dhruv Chawla via Phabricator via llvm-commits
• [PATCH] D156141: [NFC][ValueTracking]: Move some code from isKnownNonZero to isKnownNonZeroFromOperator   Dhruv Chawla via Phabricator via llvm-commits
• [PATCH] D156141: [NFC][ValueTracking]: Move some code from isKnownNonZero to isKnownNonZeroFromOperator   Dhruv Chawla via Phabricator via llvm-commits
• [PATCH] D156141: [NFC][ValueTracking]: Move some code from isKnownNonZero to isKnownNonZeroFromOperator   Dhruv Chawla via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Di Mo via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   DianQK via Phabricator via llvm-commits
• [PATCH] D152095: [Verifier] definition subprograms cannot be nested within DICompositeType when enabling ODR.   DianQK via Phabricator via llvm-commits
• [PATCH] D152095: [Verifier] definition subprograms cannot be nested within DICompositeType when enabling ODR.   DianQK via Phabricator via llvm-commits
• [PATCH] D152095: [Verifier] definition subprograms cannot be nested within DICompositeType when enabling ODR.   DianQK via Phabricator via llvm-commits
• [PATCH] D155711: [SimplifyCFG] Hoist common instructions on Switch.   DianQK via Phabricator via llvm-commits
• [PATCH] D156612: [SimplifyCFG] Add unsigned max-min comparison to `switchToLookupTable`.   DianQK via Phabricator via llvm-commits
• [PATCH] D156617: [SimplifyCFG] Pre-commit test for extending HoistThenElseCodeToIf.   DianQK via Phabricator via llvm-commits
• [PATCH] D155711: [SimplifyCFG] Hoist common instructions on Switch.   DianQK via Phabricator via llvm-commits
• [PATCH] D155711: [SimplifyCFG] Hoist common instructions on Switch.   DianQK via Phabricator via llvm-commits
• [PATCH] D155711: [SimplifyCFG] Hoist common instructions on Switch.   DianQK via Phabricator via llvm-commits
• [PATCH] D153517: [AMDGPU] ISel for amdgpu_cs_chain[_preserve] functions   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156408: [AMDGPU] Update amdgpu_cs_chain_preserve docs. NFC   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156409: [AMDGPU] More verifier checks for llvm.amdgcn.cs.chain   Diana Picus via Phabricator via llvm-commits
• [PATCH] D153761: [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (WIP)   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156410: [AMDGPU] Add IsChainFunction to the MachineFunctionInfo   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156412: [AMDGPU] Callee saves for amdgpu_cs_chain[_preserve]   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156413: [AMDGPU][PEI] Set up SP for chain functions   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156412: [AMDGPU][PEI] Callee saves for amdgpu_cs_chain[_preserve]   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156413: [AMDGPU][PEI] Set up SP for chain functions   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156412: [AMDGPU][PEI] Callee saves for amdgpu_cs_chain[_preserve]   Diana Picus via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Diego Caballero via Phabricator via llvm-commits
• [PATCH] D156471: [mlir] Support fast-math friendly constants for identity value   Diego Caballero via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   Digger Lin via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Digger Lin via Phabricator via llvm-commits
• [PATCH] D144872: [AIX] Align the content of an xcoff object file which has auxiliary header in big archive.   Digger Lin via Phabricator via llvm-commits
• [PATCH] D154841: [AIC] Fix the sext cost operands in tryToFPToSat   Diogo N. Sampaio via Phabricator via llvm-commits
• [PATCH] D156423: [OMPIRBuilder] Fix module finalization   Dominik Adamski via Phabricator via llvm-commits
• [PATCH] D154568: [Clang][OpenMP] GPU simd directive code generation   Dominik Adamski via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Dominik Montada via Phabricator via llvm-commits
• [llvm] 32683b2 - Revert "[FuncSpec] Add Phi nodes to the InstCostVisitor."   Douglas Yung via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Douglas Yung via Phabricator via llvm-commits
• [PATCH] D156458: GVNSink: add test to show GVN-aware sinking   Dávid Bolvanský via Phabricator via llvm-commits
• [PATCH] D144829: [BPF] Add a few new insns under cpu=v4   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D144829: [BPF] Add a few new insns under cpu=v4   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D143967: [DebugInfo][BPF] Add 'btf:type_tag' annotation in DWARF   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D150079: [BPF][DebugInfo] Show CO-RE relocations in llvm-objdump   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D155790: PreISelIntrinsicLowering: don't expand memcpys in minsize functions, even with no-builtins.   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156235: [MachineBlockPlacement] Remove the pad limit for no-fallthrough loops   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D154869: [Flang] [FlangRT] Implement FlangRT library as solution to Flang's runtime LLVM integration   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D154911: Enabling fstack_clash_protection for arm32 bit, thumb and thumb2 mode   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156327: [AArch64] Refactor checks in sign-return-address.ll test   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156235: [MachineBlockPlacement] Remove the pad limit for no-fallthrough loops   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156358: [AArch64] Do not unnecessarily spill LR because of @llvm.returnaddress   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156396: [AArch64] Respect pre-/post-decrement indexing mode during instruction selection   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156454: [Object] [NFC] Use llvm::COFF::is64Bit in COFF import file implementation.   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156327: [AArch64] Refactor checks in sign-return-address.ll test   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D155459: [AArch64] Change the cost of vector insert/extract to 2   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D145211: Relax cross-section branches   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156358: [AArch64] Do not unnecessarily spill LR because of @llvm.returnaddress   Eli Friedman via Phabricator via llvm-commits
• [PATCH] D156046: [Support] Rewrite GlobPattern   Ellis Hoag via Phabricator via llvm-commits
• [PATCH] D156046: [Support] Rewrite GlobPattern   Ellis Hoag via Phabricator via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   Ellis Hoag via Phabricator via llvm-commits
• [PATCH] D156569: [InstrProf] Encode linkage names in IRPGO counter names   Ellis Hoag via Phabricator via llvm-commits
• [PATCH] D151920: [BOLT] Instrumentation: Fix tests   Elvina Yakubova via Phabricator via llvm-commits
• [PATCH] D151942: [BOLT] Instrumentation: AArch64 instrumentation support in runtime   Elvina Yakubova via Phabricator via llvm-commits
• [PATCH] D156084: [RISCV] Update Zvk shorthand extension to 1.0.0-rc1   Eric Gouriou via Phabricator via llvm-commits
• [PATCH] D156084: [RISCV] Update Zvk shorthand extension to 1.0.0-rc1   Eric Gouriou via Phabricator via llvm-commits
• [PATCH] D154568: [Clang][OpenMP] GPU simd directive code generation   Eric Wright via Phabricator via llvm-commits
• [PATCH] D156213: [XCOFF] Enable available_externally linkage for functions.   Esme Yi via Phabricator via llvm-commits
• [PATCH] D156213: [XCOFF] Enable available_externally linkage for functions.   Esme Yi via Phabricator via llvm-commits
• [PATCH] D152926: [DAGCombine] Support truncated constants for fptosi.sat combining   Evgenii Kudriashov via Phabricator via llvm-commits
• [PATCH] D152926: [DAGCombine] Support truncated constants for fptosi.sat combining   Evgenii Kudriashov via Phabricator via llvm-commits
• [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.   Evgeny Eltsin via Phabricator via llvm-commits
• [llvm] e8e7a95 - [SLP] Fix -Wunused-variable in -DLLVM_ENABLE_ASSERTIONS=off builds after D154891   Fangrui Song via llvm-commits
• [llvm] bf5581d - [llvm-objdump][test] Improve elf-aarch64-mapping-symbols.test   Fangrui Song via llvm-commits
• [llvm] fb2a971 - [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Fangrui Song via llvm-commits
• [llvm] fae7b98 - [Support] Change SetVector's default template parameter to SmallVector<*, 0>   Fangrui Song via llvm-commits
• [llvm] 1b162fa - [Support] Change SetVector's default template parameter to SmallVector<*, 0>   Fangrui Song via llvm-commits
• [llvm] f5ae7e3 - [unittest] Improve GlobPattern tests   Fangrui Song via llvm-commits
• [llvm] 6a684db - [Support] Remove llvm::is_trivially_{copy/move}_constructible   Fangrui Song via llvm-commits
• [llvm] eb52fee - [unittest] Remove some tests from f5ae7e3489f317ce8c60df7258dbe31c8f988aa9 that current GlobPattern cannot handle   Fangrui Song via llvm-commits
• [llvm] 16b2569 - [unittest] Add [*] test to GlobPatternTest.cpp   Fangrui Song via llvm-commits
• [llvm] 4553dc4 - [Support] Rewrite GlobPattern   Fangrui Song via llvm-commits
• [llvm] 2d40bd1 - [llvm-objdump] Remove bool MachOOnlyFirst from printPrivateHeaders after D155045. NFC   Fangrui Song via llvm-commits
• [llvm] 845d83d - [test] Add --show-all-symbols to some llvm-objdump -d commands   Fangrui Song via llvm-commits
• [llvm] e09a1b5 - [MCDisassembler] Reorder XCOFF specific constructor parameters. NFC   Fangrui Song via llvm-commits
• [llvm] c06a314 - [CSKY] Make mapping symbols SF_FormatSpecific   Fangrui Song via llvm-commits
• [llvm] 74b6b11 - [llvm-nm][test] Drop LLVM_TARGETS_TO_BUILD requirement for special-syms.test   Fangrui Song via llvm-commits
• [llvm] 9ea44c6 - [llvm-objdump] -d: don't display mapping symbols as labels   Fangrui Song via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D154885: [DAGCombiner] Limit graph traversal to cap compile times   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D154589: MIPS: setMaxAtomicSizeInBitsSupported to 32 for MIPS I   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D152921: [lld] Synthesize metadata for MTE globals   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156046: [Support] Rewrite GlobPattern   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156046: [Support] Rewrite GlobPattern   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D155789: [Support] Implement LLVM_ENABLE_REVERSE_ITERATION for StringMap   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D155045: [llvm-objdump] Create ObjectFile specific dumpers   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D132311: [llvm] Remove llvm::is_trivially_{copy/move}_constructible (NFC)   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D132311: [llvm] Remove llvm::is_trivially_{copy/move}_constructible (NFC)   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156046: [Support] Rewrite GlobPattern   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156046: [Support] Rewrite GlobPattern   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156046: [Support] Rewrite GlobPattern   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.5   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156291: [llvm-objdump] Remove bool MachOOnlyFirst from printPrivateHeaders. NFC   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156291: [llvm-objdump] Remove bool MachOOnlyFirst from printPrivateHeaders after D155045. NFC   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D152921: [lld] Synthesize metadata for MTE globals   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156293: [lld][ELF][test] Fix excessive output file size in loongarch-add-sub.s   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D142880: [RISCV][LLD] Support R_RISCV_SET_ULEB128 and R_RISCV_SUB_ULEB128   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D54487: Implement llvm.commandline named metadata   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D152843: Switch magic numbers to library functions in fixup   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D154984: [lit] Drop "Script:", make -v and -a imply -vv   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156354: [XRay] Only avoid outlining pseudo-instructions, not whole blocks   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156236: [RISCV] Make mapping symbols SF_FormatSpecific   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156236: [RISCV] Make mapping symbols SF_FormatSpecific   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D155953: [RISCV][MC] Add CLI option to disable branch relaxation   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D130206: MC: force eager evaluation of relocations in `.debug_info`   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D150079: [BPF][DebugInfo] Show CO-RE relocations in llvm-objdump   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156514: [llvm-nm][RISCV] Recognize mapping symbols   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156202: [XCOFF] Do not put MergeableCStrings in their own section   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156286: [docs] Bump minimum GCC version to 7.5   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156603: [SymbolSize] Improve the performance of SymbolSize computation   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D146054: [RISCV] Add --print-supported-extensions support   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when __riscv_v not defined   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when __riscv_v not defined   Fangrui Song via Phabricator via llvm-commits
• [llvm] eea9258 - [LV] Re-use existing broadcast value for live-ins.   Florian Hahn via llvm-commits
• [llvm] 4d02b47 - [LAA] Add assertion to check both Start and End are invariant (NFC).   Florian Hahn via llvm-commits
• [llvm] cc39866 - [LV] Reorganize and extend in-loop reduction tests.   Florian Hahn via llvm-commits
• [llvm] 4162f36 - [LV] Regenerate check lines for shrinking tests.   Florian Hahn via llvm-commits
• [llvm] 822c749 - [LV] Shrink operands before creating new instr to force eval order.   Florian Hahn via llvm-commits
• [PATCH] D156034: [LAA] Make MaxSafeDepDistBytes private in LoopAccessAnalysis   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D152730: [ConstraintElim] Add A < B if A is an increasing phi for A != B.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D154075: [LoopVectorize] Add pre-commit tests for D152366   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D152366: [LoopVectorize] Allow inner loop runtime checks to be hoisted above an outer loop   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D156124: LoopVectorize/iv-select-cmp: add test for wide trip count (NFC)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D156124: LoopVectorize/iv-select-cmp: add test for wide trip count (NFC)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D155845: [VPlan] Fix in-loop reduction chains using VPlan def-use chains (NFCI)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D154075: [LoopVectorize] Add pre-commit tests for D152366   Florian Hahn via Phabricator via llvm-commits
• [compiler-rt] 17db2a1 - Re-enable lto.c test on ARM64   Florian Mayer via llvm-commits
• [compiler-rt] fdac98a - Remove stable-runtime from many tests   Florian Mayer via llvm-commits
• [llvm] 6cc9244 - Enable hwasan-use-after-scope by default   Florian Mayer via llvm-commits
• [compiler-rt] c1f008e - [HWASan] fix broken test   Florian Mayer via llvm-commits
• [llvm] 12982d2 - [NFC] [HWASan] remove unused include   Florian Mayer via llvm-commits
• [llvm] 9a67c6b - [NFC] [HWASan] simplify code   Florian Mayer via llvm-commits
• [PATCH] D156267: Enable hwasan-use-after-scope by default   Florian Mayer via Phabricator via llvm-commits
• [PATCH] D156267: Enable hwasan-use-after-scope by default   Florian Mayer via Phabricator via llvm-commits
• [PATCH] D156267: Enable hwasan-use-after-scope by default   Florian Mayer via Phabricator via llvm-commits
• [PATCH] D156267: Enable hwasan-use-after-scope by default   Florian Mayer via Phabricator via llvm-commits
• [PATCH] D156267: Enable hwasan-use-after-scope by default   Florian Mayer via Phabricator via llvm-commits
• [PATCH] D156382: [NFC] [HWASan] simplify code   Florian Mayer via Phabricator via llvm-commits
• [PATCH] D156382: [NFC] [HWASan] simplify code   Florian Mayer via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156530: [MISched] Do not erase resource booking history for subunits.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156540: [llc] Add the command line option `-sched-model-force-enable-intervals`.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156530: [MISched] Do not erase resource booking history for subunits.   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D156416: [RemarkUtil] Refactor remarkutil tool to use a command registry.   Francis Visoiu Mistrih via Phabricator via llvm-commits
• [PATCH] D156515: [RemarkUtil] Refactor llvm-remarkutil to include size-diff   Francis Visoiu Mistrih via Phabricator via llvm-commits
• [PATCH] D156467: [mlir][ArmSME] Add conversion from ArmSME to SCF to materialize loops   Frank (Fang) Gao via Phabricator via llvm-commits
• [llvm] 5cc4b10 - [X86] Update features for sierraforest, grandridge   Freddy Ye via llvm-commits
• [llvm] 6d23a3f - [X86] Support -march=graniterapids-d and update -march=graniterapids   Freddy Ye via llvm-commits
• [compiler-rt] cafbcfa - [X86] Update Model value for Raptor Lake.   Freddy Ye via llvm-commits
• [llvm] c9d92e6 - [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy Ye via llvm-commits
• [compiler-rt] c9d92e6 - [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Freddy Ye via llvm-commits
• [PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P   Funan Zeng via Phabricator via llvm-commits
• [PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P   Funan Zeng via Phabricator via llvm-commits
• [PATCH] D154412: [RISCV] Add support for XCVbi extension in CV32E40P   Funan Zeng via Phabricator via llvm-commits
• [PATCH] D153721: [RISCV] Add support for XCVsimd extension in CV32E40P   Funan Zeng via Phabricator via llvm-commits
• [PATCH] D154412: [RISCV] Add support for XCVbi extension in CV32E40P   Funan Zeng via Phabricator via llvm-commits
• [llvm] 536e805 - [X86] AMD Genoa (znver4) Change LoopMicroOpBufferSize to handle minimal unrolling of loops   Ganesh Gopalasubramanian via llvm-commits
• [PATCH] D156240: [X86] AMD Genoa (znver4) LoopMicroOpBufferSize update   Ganesh Gopalasubramanian via Phabricator via llvm-commits
• [PATCH] D156240: [X86] AMD Genoa (znver4) LoopMicroOpBufferSize update   Ganesh Gopalasubramanian via Phabricator via llvm-commits
• [PATCH] D156240: [X86] AMD Genoa (znver4) LoopMicroOpBufferSize update   Ganesh Gopalasubramanian via Phabricator via llvm-commits
• [PATCH] D156240: [X86] AMD Genoa (znver4) LoopMicroOpBufferSize update   Ganesh Gopalasubramanian via Phabricator via llvm-commits
• [PATCH] D154568: [Clang][OpenMP] GPU simd directive code generation   Gheorghe-Teodor Bercea via Phabricator via llvm-commits
• [llvm] e882edd - Fixed an issue where llvm-gsymutil would crash when parsing bad inline ranges.   Greg Clayton via llvm-commits
• [PATCH] D155254: Fixed an issue where llvm-gsymutil would crash when parsing bad inline ranges.   Greg Clayton via Phabricator via llvm-commits
• [PATCH] D156135: [ADT] Support iterating size-based integer ranges.   Guillaume Chatelet via Phabricator via llvm-commits
• [PATCH] D74162: [Inliner] Inlining should honor nobuiltin attributes   Guillaume Chatelet via Phabricator via llvm-commits
• [PATCH] D119916: Add a machine function pass to convert binop(phi(constants), v) to phi(binop)   Guozhi Wei via Phabricator via llvm-commits
• [PATCH] D119916: Add a machine function pass to convert binop(phi(constants), v) to phi(binop)   Guozhi Wei via Phabricator via llvm-commits
• [PATCH] D156491: [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register   Guozhi Wei via Phabricator via llvm-commits
• [PATCH] D156491: [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register   Guozhi Wei via Phabricator via llvm-commits
• [PATCH] D156491: [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register   Guozhi Wei via Phabricator via llvm-commits
• [llvm] 0cbcf17 - [llvm][nvptx] Add sm_90a   Guray Ozen via llvm-commits
• [llvm] 1b21067 - [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Heejin Ahn via Phabricator via llvm-commits
• [llvm] a90228b - [AArch64][Windows] Fix the slot offset of the swift async context register.   Hiroshi Yamauchi via llvm-commits
• [PATCH] D155732: [MC][COFF][AArch64] Avoid incorrect IMAGE_REL_ARM64_BRANCH26 relocations.   Hiroshi Yamauchi via Phabricator via llvm-commits
• [PATCH] D156391: [AArch64][Windows] Fix the slot offset of the swift async context register.   Hiroshi Yamauchi via Phabricator via llvm-commits
• [PATCH] D156391: [AArch64][Windows] Fix the slot offset of the swift async context register.   Hiroshi Yamauchi via Phabricator via llvm-commits
• [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156395: [Reassociate][NFC] Update the header comment of Reassociate Pass   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D156395: [Reassociate][NFC] Update the header comment of Reassociate Pass   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155939: [SimplifyCFG][NFC] Add tests for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155711: [SimplifyCFG] Hoist common instructions on Switch.   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Hongyu Chen via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155957: [PPC][AIX] Fix toc-data peephole bug and some related cleanup.   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D156213: [XCOFF] Enable available_externally linkage for functions.   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D156203: [AIX][TLS] Add backend portion for the -maix-small-local-exec-tls option.   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D156203: [AIX][TLS] Add backend portion for the -maix-small-local-exec-tls option.   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155544: [AIX][TLS][clang] Add -maix-small-local-exec-tls clang option.   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D156203: [AIX][TLS] Add target attribute for -maix-small-local-exec-tls option.   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D156203: [AIX][TLS] Add target attribute for -maix-small-local-exec-tls option.   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D105759: Implement P2361 Unevaluated string literals   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D105759: Implement P2361 Unevaluated string literals   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D105759: Implement P2361 Unevaluated string literals   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Hubert Tong via Phabricator via llvm-commits
• [PATCH] D156112: [AArch64][LoopVectorize] Improve tail-folding heuristic on neoverse-v1   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D155218: [InstCombine] Optimize addition/subtraction operations of splats of vscale multiplied by a constant   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D155218: [InstCombine] Optimize addition/subtraction operations of splats of vscale multiplied by a constant   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D156112: [AArch64][LoopVectorize] Improve tail-folding heuristic on neoverse-v1   Igor Kirillov via Phabricator via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Igor Kudrin via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Ilia Diachkov via Phabricator via llvm-commits
• [PATCH] D156049: [SPIR-V] Remove -opaque-pointers=0 from LITs, fixes for opaque pointers support   Ilia Diachkov via Phabricator via llvm-commits
• [PATCH] D156355: [mlir][irdl] Fix BUILD files.   Ingo Müller via Phabricator via llvm-commits
• [PATCH] D156355: [mlir][irdl] Fix BUILD files.   Ingo Müller via Phabricator via llvm-commits
• [PATCH] D156355: [mlir][irdl] Fix BUILD files.   Ingo Müller via Phabricator via llvm-commits
• [PATCH] D156471: [mlir] Support fast-math friendly constants for identity value   Ivan Butygin via Phabricator via llvm-commits
• [llvm] e9df4c9 - [ADT] Support iterating size-based integer ranges.   Ivan Kosarev via llvm-commits
• [llvm] 5775db2 - [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.   Ivan Kosarev via llvm-commits
• [PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156100: [AMDGPU] Have a command-line flag to enable true True16 codegen.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156101: [AMDGPU] Introduce real and keep fake True16 instructions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156102: [AMDGPU] Don't suppress printing the .l and .h register suffixes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156103: [AMDGPU][NFC] Add True16 operand definitions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156104: [AMDGPU] Switch to using real True16 operands.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156105: [AMDGPU][True16] Support generating differently-sized register transfers.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156106: [AMDGPU] Test codegen'ing True16 additions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156110: [TableGen] Refine obtaining qualified register class ids.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156135: [ADT] Support iterating size-based integer ranges.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156100: [AMDGPU] Have a command-line flag to enable true True16 codegen.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156100: [AMDGPU] Have a command-line flag to enable true True16 codegen.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156106: [AMDGPU] Test codegen'ing True16 additions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156100: [AMDGPU] Have a command-line flag to enable true True16 codegen.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156101: [AMDGPU] Introduce real and keep fake True16 instructions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156105: [AMDGPU][True16] Support generating differently-sized register transfers.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156106: [AMDGPU] Test codegen'ing True16 additions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156110: [TableGen] Refine obtaining qualified register class ids.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156135: [ADT] Support iterating size-based integer ranges.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156110: [TableGen] Refine obtaining qualified register class ids.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156135: [ADT] Support iterating size-based integer ranges.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156529: [AMDGPU][True16] Pre-commit addition tests.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156529: [AMDGPU][True16] Pre-commit addition tests.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156106: [AMDGPU] Test codegen'ing True16 additions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156101: [AMDGPU] Introduce real and keep fake True16 instructions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156102: [AMDGPU] Don't suppress printing the .l and .h register suffixes.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156103: [AMDGPU][NFC] Add True16 operand definitions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156103: [AMDGPU][NFC] Add True16 operand definitions.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D156104: [AMDGPU] Switch to using real True16 operands.   Ivan Kosarev via Phabricator via llvm-commits
• [llvm] 7450e0c - [yaml2obj] Add support for load config section data.   Jacek Caban via llvm-commits
• [llvm] c33397f - Recognize ARM64EC binaries in COFFObjectFile::getMachine.   Jacek Caban via llvm-commits
• [llvm] 2382156 - [llvm-objdump] [NFC] Add missing REQUIRES to arm64ec.yaml.   Jacek Caban via llvm-commits
• [llvm] 6c48f57 - [llvm-objdump] [NFC] Factor out DisassemblerTarget class.   Jacek Caban via llvm-commits
• [llvm] b9f3eaf - Revert "[llvm-objdump] [NFC] Factor out DisassemblerTarget class."   Jacek Caban via llvm-commits
• [llvm] b6cf0ea - [llvm-objdump] [NFC] Factor out DisassemblerTarget class.   Jacek Caban via llvm-commits
• [llvm] 1b4a95c - [llvm-objdump] [NFC] Use DisassemblerTarget for primary target in disassembleObject.   Jacek Caban via llvm-commits
• [lld] ca34812 - [lld] [NFC] Use llvm::COFF::is64Bit in is64.   Jacek Caban via llvm-commits
• [llvm] 6b04ec1 - [Object] [NFC] Use llvm::COFF::is64Bit in COFF import file implementation.   Jacek Caban via llvm-commits
• [llvm] bacc7ae - [Object] Use COFF archive format for import libraries.   Jacek Caban via llvm-commits
• [PATCH] D149440: [yaml2obj] Add support for load config section data.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149440: [yaml2obj] Add support for load config section data.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149093: [llvm-objdump] [NFC] Factor out DisassemblerTarget class.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149094: [llvm-objdump] [NFC] Use DisassemblerTarget for primary target in disassembleObject.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149094: [llvm-objdump] [NFC] Use DisassemblerTarget for primary target in disassembleObject.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156454: [Object] [NFC] Use llvm::COFF::is64Bit in COFF import file implementation.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156473: [Object] Use COFF archive format for import libraries.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156473: [Object] Use COFF archive format for import libraries.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149094: [llvm-objdump] [NFC] Use DisassemblerTarget for primary target in disassembleObject.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156450: [lld] [NFC] Use llvm::COFF::is64Bit in is64.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156454: [Object] [NFC] Use llvm::COFF::is64Bit in COFF import file implementation.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156473: [Object] Use COFF archive format for import libraries.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D156622: [llvm-objdump] [NFC] Use a single vector to store all symbol mappings.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   Jacek Caban via Phabricator via llvm-commits
• [PATCH] D149440: [yaml2obj] Add support for load config section data.   James Henderson via Phabricator via llvm-commits
• [PATCH] D143539: [AMDGPU] Add AMDGPU support for llvm-objcopy   James Henderson via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   James Henderson via Phabricator via llvm-commits
• [PATCH] D155943: [NFC] Update formatting of some symbolizer tests   James Henderson via Phabricator via llvm-commits
• [PATCH] D149759: [symbolizer] Support symbol lookup   James Henderson via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   James Henderson via Phabricator via llvm-commits
• [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE   James Henderson via Phabricator via llvm-commits
• [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE   James Henderson via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   James Henderson via Phabricator via llvm-commits
• [PATCH] D155045: [llvm-objdump] Create ObjectFile specific dumpers   James Henderson via Phabricator via llvm-commits
• [PATCH] D156291: [llvm-objdump] Remove bool MachOOnlyFirst from printPrivateHeaders. NFC   James Henderson via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   James Henderson via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   James Henderson via Phabricator via llvm-commits
• [PATCH] D149094: [llvm-objdump] [NFC] Use DisassemblerTarget for primary target in disassembleObject.   James Henderson via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   James Henderson via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   James Henderson via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   James Henderson via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   James Henderson via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   James Henderson via Phabricator via llvm-commits
• [PATCH] D153376: Introducing llvm-cm: A Cost Model Tool   James Henderson via Phabricator via llvm-commits
• [PATCH] D156236: [RISCV] Make mapping symbols SF_FormatSpecific   James Henderson via Phabricator via llvm-commits
• [PATCH] D156454: [Object] [NFC] Use llvm::COFF::is64Bit in COFF import file implementation.   James Henderson via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   James Henderson via Phabricator via llvm-commits
• [PATCH] D149094: [llvm-objdump] [NFC] Use DisassemblerTarget for primary target in disassembleObject.   James Henderson via Phabricator via llvm-commits
• [PATCH] D149095: [llvm-objdump] Support CHPE code ranges in disassembler.   James Henderson via Phabricator via llvm-commits
• [PATCH] D156603: [SymbolSize] Improve the performance of SymbolSize computation   James Henderson via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Jan Ole Hüser via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Jan Ole Hüser via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Jan Ole Hüser via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Jan Ole Hüser via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Jan Ole Hüser via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   Jan Ole Hüser via Phabricator via llvm-commits
• [llvm] caa35a1 - [OpenMP][OpenMPIRBuilder] Make outlined function parameters i64 or ptr   Jan Sjodin via llvm-commits
• [PATCH] D155628: [OpenMP][OpenMPIRBuilder] Make outlined function parameters i64 and ptr   Jan Sjödin via Phabricator via llvm-commits
• [PATCH] D155633: [OpenMP][OpenMPIRBuilder] Add kernel launch codegen to emitTargetCall   Jan Sjödin via Phabricator via llvm-commits
• [PATCH] D155633: [OpenMP][OpenMPIRBuilder] Add kernel launch codegen to emitTargetCall   Jan Sjödin via Phabricator via llvm-commits
• [PATCH] D155633: [OpenMP][OpenMPIRBuilder] Add kernel launch codegen to emitTargetCall   Jan Sjödin via Phabricator via llvm-commits
• [PATCH] D155794: [OpenMP][OpenMPIRBuilder] Migrate setPropertyExecutionMode() from Clang to OpenMPIRBuilder.   Jan-Patrick Lehr via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Jason Molenda via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Jason Molenda via Phabricator via llvm-commits
• [PATCH] D156433: [bazel] Include builtin headers with clang-tidy   Jathu Satkunarajah via Phabricator via llvm-commits
• [PATCH] D156433: [bazel] Include builtin headers with clang-tidy   Jathu Satkunarajah via Phabricator via llvm-commits
• [PATCH] D156433: [bazel] Include builtin headers with clang-tidy   Jathu Satkunarajah via Phabricator via llvm-commits
• [PATCH] D156433: [bazel] Include builtin headers with clang-tidy   Jathu Satkunarajah via Phabricator via llvm-commits
• [PATCH] D156433: [bazel] Include builtin headers with clang-tidy   Jathu Satkunarajah via Phabricator via llvm-commits
• [llvm] 0f10850 - [CodeGen] Add machine verification to some tests   Jay Foad via llvm-commits
• [llvm] 6fcad9c - [DAGCombiner] Simplify foldAndOrOfSETCC. NFC.   Jay Foad via llvm-commits
• [llvm] 2dcf051 - [CodeGen] Store call frame size in MachineBasicBlock   Jay Foad via llvm-commits
• [llvm] a543203 - [CodeGen] Clean up ScheduleDAGInstrs::addPhysRegDeps   Jay Foad via llvm-commits
• [llvm] 9451233 - [PEI][ARM] Switch to backwards frame index elimination   Jay Foad via llvm-commits
• [llvm] 5a64c89 - [MachineScheduler] Test case for physical register dependencies   Jay Foad via llvm-commits
• [llvm] 1a54671 - [MachineScheduler] Track physical register dependencies per-regunit   Jay Foad via llvm-commits
• [llvm] e2e3f06 - Revert "[MachineScheduler] Track physical register dependencies per-regunit"   Jay Foad via llvm-commits
• [llvm] 5864256 - [Hexagon] Add machine verification to some tests   Jay Foad via llvm-commits
• [PATCH] D156088: [AMDGPU] - Mark inverse.ballot as divergent   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156088: [AMDGPU] - Mark inverse.ballot as divergent   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Perform basic folds on llvm.amdgcn.wave.reduce.umin/umax.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156101: [AMDGPU] Introduce real and keep fake True16 instructions.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156107: ConstantFolding: Constant fold denormal inputs to canonicalize for IEEE   Jay Foad via Phabricator via llvm-commits
• [PATCH] D155789: [Support] Implement LLVM_ENABLE_REVERSE_ITERATION for StringMap   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156220: [DAGCombiner] Simplify foldAndOrOfSETCC. NFC.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156226: [DebugInfo] Fix crash when printing malformed DBG machine instructions   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156226: [DebugInfo] Fix crash when printing malformed DBG machine instructions   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156220: [DAGCombiner] Simplify foldAndOrOfSETCC. NFC.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Jay Foad via Phabricator via llvm-commits
• [PATCH] D153472: AMDGPU: Correctly expand f64 sqrt intrinsic   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FP global atomics in AMDGPUAtomicOptimizer.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D155867: [AMDGPU][GlobalISel] Fix applyMappingImpl function for G_ABS and type v2s16   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156215: [DAGCombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Jay Foad via Phabricator via llvm-commits
• [PATCH] D154766: [GlobalISel] convergent intrinsics   Jay Foad via Phabricator via llvm-commits
• [PATCH] D153257: AMDGPU: Implement llvm.set.rounding   Jay Foad via Phabricator via llvm-commits
• [PATCH] D153258: AMDGPU: Optimize set_rounding if input is known to fit in 2 bits   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156422: AMDGPU: Always custom lower extract_subvector   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156434: [PEI][ARM] Switch to backwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156226: [DebugInfo] Fix crash when printing malformed DBG machine instructions   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156529: [AMDGPU][True16] Pre-commit addition tests.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156101: [AMDGPU] Introduce real and keep fake True16 instructions.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156105: [AMDGPU][True16] Support generating differently-sized register transfers.   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156551: [MachineScheduler] Test case for physical register dependencies   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156551: [MachineScheduler] Test case for physical register dependencies   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156434: [PEI][ARM] Switch to backwards frame index elimination   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156551: [MachineScheduler] Test case for physical register dependencies   Jay Foad via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Jay Foad via Phabricator via llvm-commits
• [PATCH] D154802: [llvm][orc] Consider other ELF init sections as well   Jeff Niu via Phabricator via llvm-commits
• [llvm] 391249d - [AMDGPU] Allow 8,16 bit sources in calculateSrcByte   Jeffrey Byrnes via llvm-commits
• [PATCH] D155864: [AMDGPU] Allow 8,16 bit sources in calculateSrcByte   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D155995: [AMDGPU] WIP: Allow matching into v_dot4   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D155995: [AMDGPU] WIP: Allow matching into v_dot4   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D155864: [AMDGPU] Allow 8,16 bit sources in calculateSrcByte   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D156226: [DebugInfo] Fix crash when printing malformed DBG machine instructions   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D152468: [NFC][DebugInfo][RemoveDIs] Use iterators over instruction pointers when using IRBuilder in various passes   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D152468: [NFC][DebugInfo][RemoveDIs] Use iterators over instruction pointers when using IRBuilder in various passes   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D153777: [ADT][DebugInfo][RemoveDIs] Permit extra flags in ilist_iterator's for communicating debug-info facts   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D154372: [DebugInfo][RemoveDIs] Plumb remove-DIs command line switch into pass managers for ease of testing   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D156226: [DebugInfo] Fix crash when printing malformed DBG machine instructions   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D156545: [DebugInfo][InstrRef] Don't produce over-sized DW_OP_deref_size expressions for very wide stack spills   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D156048: [RISCV] Remove unused check prefixes for tests. NFC   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D156200: [RISCV] Don't print a tab after mnemonics that don't have operands.   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D156200: [RISCV] Don't print a tab after mnemonics that don't have operands.   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D156283: MIPS: unwind, don't save/restore hi/lo for R6   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Fix getMaxPushPopReg like getLibCallID   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Fix getMaxPushPopReg like getLibCallID   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D156442: [llvm][RISCV][Backend]   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D156589: [RISCV] Add a common base class for RVInstI variations. NFC   Jessica Clarke via Phabricator via llvm-commits
• [PATCH] D153277: [BOLT][RISCV] Recognize mapping symbols   Jessica Clarke via Phabricator via llvm-commits
• [llvm] 93dc66a - [AMDGPU] - Mark inverse.ballot as not convergent   Jessica Del via llvm-commits
• [PATCH] D156088: [AMDGPU] - Mark inverse.ballot as divergent   Jessica Del via Phabricator via llvm-commits
• [PATCH] D156088: [AMDGPU] - Mark inverse.ballot as divergent   Jessica Del via Phabricator via llvm-commits
• [PATCH] D156088: [AMDGPU] - Mark inverse.ballot as not convergent   Jessica Del via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   Jessica Paquette via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   Jessica Paquette via Phabricator via llvm-commits
• [PATCH] D156272: [AArch64] [XRay] Account for XRay event instrs in Branch Relaxation   Jessica Paquette via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   Jessica Paquette via Phabricator via llvm-commits
• [PATCH] D156272: [AArch64] [XRay] Account for XRay event instrs in Branch Relaxation   Jessica Paquette via Phabricator via llvm-commits
• [PATCH] D156515: [RemarkUtil] Refactor llvm-remarkutil to include size-diff   Jessica Paquette via Phabricator via llvm-commits
• [llvm] 84d4618 - [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp   Jianjian GUAN via llvm-commits
• [llvm] 1f5d75c - [AVR][NFC] Simplify AVRSubtarget   Jianjian GUAN via llvm-commits
• [llvm] 5d6d649 - [RISCV][NFC] Simplify lowerVPOp.   Jianjian GUAN via llvm-commits
• [llvm] b7408eb - [RISCV] Use x0 in vsetvli when avl is equal to vlmax.   Jianjian GUAN via llvm-commits
• [PATCH] D155683: [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D155683: [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D155683: [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D151547: [RISCV] Remove experimental for zihintntl.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D155683: [RISCV] Fix the check assertion in hasMergeOp and hasMaskOp   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D154411: [RISCV][NFC] Simplify lowerVPOp.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D155918: [AVR][NFC] Simplify AVRSubtarget   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D154411: [RISCV][NFC] Simplify lowerVPOp.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D156404: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D151414: [RISCV] Add Zvfhmin extension support for llvm RISCV backend.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D156404: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D156404: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D156404: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.   Jianjian Guan via Phabricator via llvm-commits
• [llvm] c1ad11e - [AMDGPU] Remove unused variable 'CNI' in /AMDGPUMachineCFGStructurizer.cpp (NFC)   Jie Fu via llvm-commits
• [llvm] 2398e26 - [RISCV] Add a common class for cm.push, cm.popret, cm.popretz and cm.pop.   Jim Lin via llvm-commits
• [llvm] 4eff7fa - [RISCV] Merge rv32/rv64 vector narrowing integer right shift intrinsic tests that have the same content. NFC.   Jim Lin via llvm-commits
• [llvm] 5555b9f - [RISCV] Reuse FrameIdx for emitting cfi offset. NFC.   Jim Lin via llvm-commits
• [llvm] 2f726c2 - [RISCV] Merge rv32/rv64 vector slideup and slidedown intrinsic tests that have the same content. NFC.   Jim Lin via llvm-commits
• [llvm] fca4a9d - [RISCV] Update Zvk shorthand extension to 1.0.0-rc1   Jim Lin via llvm-commits
• [llvm] 657f8b3 - [RISCV] Fix incorrect return type of isPushable() to bool. NFC.   Jim Lin via llvm-commits
• [llvm] fa140fe - [RISCV] Simplify tablegen for XCV mac and mul instructions. NFC.   Jim Lin via llvm-commits
• [llvm] f2e4423 - [RISCV] Clean up RISCVInstrInfoXTHead.td to look like the same style with other td file. NFC.   Jim Lin via llvm-commits
• [PATCH] D156084: [RISCV] Update Zvk shorthand extension to 1.0.0-rc1   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156092: [RISCV] Add a common class for cm.push, cm.popret, cm.popretz and cm.pop.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156092: [RISCV] Add a common class for cm.push, cm.popret, cm.popretz and cm.pop.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156084: [RISCV] Update Zvk shorthand extension to 1.0.0-rc1   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156084: [RISCV] Update Zvk shorthand extension to 1.0.0-rc1   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156335: [RISCV] Simplify tablegen for XCV mac and mul instructions. NFC.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156335: [RISCV] Simplify tablegen for XCV mac and mul instructions. NFC.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156335: [RISCV] Simplify tablegen for XCV mac and mul instructions. NFC.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Fix getMaxPushPopReg like getLibCallID   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Fix getMaxPushPopReg like getLibCallID   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Fix getMaxPushPopReg like getLibCallID   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Refine getMaxPushPopReg like getLibCallID. NFC.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Reverse CFI offset order for callee-saved registers stored by Zcmp push for correct stack unwinding.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Reverse CFI offset order for callee-saved registers stored by Zcmp push for correct stack unwinding.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156507: [RISCV] Upgrade Zihintntl extension to version 1.0 and move out of experimental state.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D156645: [DAGCombiner] Don't reduce BUILD_VECTOR to BITCAST before LegalizeTypes if VT is legal.   Jim Lin via Phabricator via llvm-commits
• [PATCH] D154205: [MachineLICM] Handle subloops   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D154205: [MachineLICM] Handle subloops   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D154205: [MachineLICM] Handle subloops   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D154205: [MachineLICM] Handle subloops   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D154205: [MachineLICM] Handle subloops   JinGu Kang via Phabricator via llvm-commits
• [PATCH] D156538: [AArch64] Try to combine FMUL with FDIV   JinGu Kang via Phabricator via llvm-commits
• [llvm] 76f023b - [RISCV] Make mapping symbols SF_FormatSpecific   Job Noorman via llvm-commits
• [llvm] afb2e9f - [RISCV][MC] Add CLI option to disable branch relaxation   Job Noorman via llvm-commits
• [llvm] 856745c - [RISCV][MC] Relax conditional branches to unresolved symbols   Job Noorman via llvm-commits
• [llvm] a0d8a53 - [RISCV][MC] Implement mapping symbols   Job Noorman via llvm-commits
• [llvm] ec4d061 - [JITLink][RISCV] Fix tests after D154958   Job Noorman via llvm-commits
• [llvm] 1f12f6f - [llvm-nm][RISCV] Recognize mapping symbols   Job Noorman via llvm-commits
• [PATCH] D155953: [RISCV][MC] Add CLI option to disable branch relaxation   Job Noorman via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156236: [RISCV] Make mapping symbols SF_FormatSpecific   Job Noorman via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D154604: [BOLT] Calculate output values using BOLTLinker   Job Noorman via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Job Noorman via Phabricator via llvm-commits
• [PATCH] D155604: [BOLT] Calculate input to output address map using BOLTLinker   Job Noorman via Phabricator via llvm-commits
• [PATCH] D155604: [BOLT] Calculate input to output address map using BOLTLinker   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156236: [RISCV] Make mapping symbols SF_FormatSpecific   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156514: [llvm-nm][RISCV] Recognize mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156236: [RISCV] Make mapping symbols SF_FormatSpecific   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156236: [RISCV] Make mapping symbols SF_FormatSpecific   Job Noorman via Phabricator via llvm-commits
• [PATCH] D155953: [RISCV][MC] Add CLI option to disable branch relaxation   Job Noorman via Phabricator via llvm-commits
• [PATCH] D155953: [RISCV][MC] Add CLI option to disable branch relaxation   Job Noorman via Phabricator via llvm-commits
• [PATCH] D154958: [RISCV][MC] Relax conditional branches to unresolved symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D154958: [RISCV][MC] Relax conditional branches to unresolved symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156514: [llvm-nm][RISCV] Recognize mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156514: [llvm-nm][RISCV] Recognize mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D153277: [BOLT][RISCV] Recognize mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Job Noorman via Phabricator via llvm-commits
• [PATCH] D156398: [AMDGPU] Remove post-PromoteAlloca SROA run   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156105: [AMDGPU][True16] Support generating differently-sized register transfers.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156101: [AMDGPU] Introduce real and keep fake True16 instructions.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156102: [AMDGPU] Don't suppress printing the .l and .h register suffixes.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156103: [AMDGPU][NFC] Add True16 operand definitions.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156104: [AMDGPU] Switch to using real True16 operands.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156529: [AMDGPU][True16] Pre-commit addition tests.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156104: [AMDGPU] Switch to using real True16 operands.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156526: AMDGPU/GlobalISel: Set dead on scc on manually selected instructions   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156102: [AMDGPU] Don't suppress printing the .l and .h register suffixes.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D156103: [AMDGPU][NFC] Add True16 operand definitions.   Joe Nash via Phabricator via llvm-commits
• [PATCH] D154984: [lit] Drop "Script:", make -v and -a imply -vv   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154984: [lit] Drop "Script:", make -v and -a imply -vv   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154984: [lit] Drop "Script:", make -v and -a imply -vv   Joel E. Denny via Phabricator via llvm-commits
• [PATCH] D154984: [lit] Drop "Script:", make -v and -a imply -vv   Joel E. Denny via Phabricator via llvm-commits
• [llvm] ef9ec4b - [OpenMP] Add the `ompx_attribute` clause for target directives   Johannes Doerfert via llvm-commits
• [llvm] 08a2207 - Reapply "[OpenMP] Add the `ompx_attribute` clause for target directives"   Johannes Doerfert via llvm-commits
• [llvm] 0f7aa38 - [Attributor][NFC] Precommit test   Johannes Doerfert via llvm-commits
• [llvm] e31724f - [Attributor] Check readonly call sites for nosync in AANoSync   Johannes Doerfert via llvm-commits
• [llvm] ae6ad31 - [Attributor] Try to remove argmem effects after signature rewrite   Johannes Doerfert via llvm-commits
• [llvm] 4223c9b - [Attributor] Always deduce nosync from readonly + non-convergent   Johannes Doerfert via llvm-commits
• [llvm] ba0be69 - [Attributor][NFC] Rename variable to be less confusing   Johannes Doerfert via llvm-commits
• [llvm] 0cd8a28 - [Attributor][FIX] No IntraFnReachability does not mean unreachable   Johannes Doerfert via llvm-commits
• [llvm] 160ae64 - [Attributor][NFC] Fix nofpclass test   Johannes Doerfert via llvm-commits
• [llvm] 88b5d23 - [Attributor] Allow multiple LHS/RHS values when simplifying comparisons   Johannes Doerfert via llvm-commits
• [llvm] be22b90 - [Attributor][NFC] Precommit tests   Johannes Doerfert via llvm-commits
• [llvm] b3fec10 - [Attributor] Improve NonNull deduction   Johannes Doerfert via llvm-commits
• [llvm] a598e39 - [AAInterFnReachabilityFunction][NFC] Remove unused members   Johannes Doerfert via llvm-commits
• [llvm] 2f7ef7b - [Attributor][FIX] Swap cases in ternary op to avoid nullptr reference   Johannes Doerfert via llvm-commits
• [PATCH] D155628: [OpenMP][OpenMPIRBuilder] Make outlined function parameters i64 and ptr   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D155884: [Attributor][AMDGPU] Improve indirect call support in closed modules   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156184: [OpenMP] Add the `ompx_attribute` clause for target directives   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156184: [OpenMP] Add the `ompx_attribute` clause for target directives   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D154568: [Clang][OpenMP] GPU simd directive code generation   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D155794: [OpenMP][OpenMPIRBuilder] Migrate setPropertyExecutionMode() from Clang to OpenMPIRBuilder.   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D155633: [OpenMP][OpenMPIRBuilder] Add kernel launch codegen to emitTargetCall   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D116908: [OpenMP][1/3] Introduce the KernelEnvironment into the device runtimes   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D116909: [OpenMP][2/3] Introduce the KernelEnvironment into the middle-end   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D116907: [OpenMP][NFCI] Move headers into llvm/Frontend/OpenMP to be reusable   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D154507: [NVPTX] Apply global var demotion to private symbols   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156478: [IR] Mark `llvm.assume` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156478: [IR] Mark `llvm.assume` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156478: [IR] Mark `llvm.assume` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D152081: [Attributor] Add lightweight version for attribute deduction only. (WIP)   Johannes Doerfert via Phabricator via llvm-commits
• [llvm] 8336d38 - [ARM] Correctly handle combining segmented stacks with execute-only   John Brawn via llvm-commits
• [PATCH] D156339: [ARM] Correctly handle combining segmented stacks with execute-only   John Brawn via Phabricator via llvm-commits
• [PATCH] D156339: [ARM] Correctly handle combining segmented stacks with execute-only   John Brawn via Phabricator via llvm-commits
• [PATCH] D155773: [llvm][MemoryBuiltins] Add alloca support to getInitialValueOfAllocation   John McIver via Phabricator via llvm-commits
• [llvm] c67e443 - [AArch64][NFC] Expand coverage of ReplaceWithVeclib testing using SLEEF vector library   Jolanta Jensen via llvm-commits
• [PATCH] D155623: [AArch64][NFC] Expand coverage of ReplaceWithVeclib testing using SLEEF vector library   Jolanta Jensen via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   Jolanta Jensen via Phabricator via llvm-commits
• [llvm] 80fae88 - Upgrade a rdar://8459039 link to a github issue   Jon Roelofs via llvm-commits
• [llvm] 3e0cdf3 - Upgrade a rdar://5907648 link to a github issue   Jon Roelofs via llvm-commits
• [llvm] 2b418c3 - [BitcodeReader] Add missing () to disambiguate precedence. NFC   Jon Roelofs via llvm-commits
• [PATCH] D141913: WIP: Unwindabort: Add "unwindabort" syntax for the "call" instruction.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D141913: WIP: Unwindabort: Add "unwindabort" syntax for the "call" instruction.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D141914: WIP: Unwindabort: Add "unwindabort" syntax for the "resume" instruction.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D141916: WIP: Unwindabort: add support for IR transforms and analysis.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D141913: WIP: Unwindabort: Add "unwindabort" syntax for the "call" instruction.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D141917: WIP: Unwindabort: Implement CodeGen for DWARF-style exception handling.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D141913: WIP: Unwindabort: Add "unwindabort" syntax for the "call" instruction.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D141916: WIP: Unwindabort: add support for IR transforms and analysis.   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D156575: [llvm[NFC] Adjust mem fn auto upgrade detection   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D125472: Fix an or+and miscompile w/ GlobalISel   Jon Roelofs via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Jonas Devlieghere via Phabricator via llvm-commits
• [llvm] c956f91 - [RISCV][MC][MSan] Fix uninitialized data members   Jordan Rupprecht via llvm-commits
• [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable   Joseph Faulls via Phabricator via llvm-commits
• [llvm] 6a51997 - [NVPTX] Fix lack of `.noreturn` on certain functions for aliases   Joseph Huber via llvm-commits
• [llvm] 05b181d - [OpenMP] Make the nested parallelism global hidden   Joseph Huber via llvm-commits
• [PATCH] D156012: [NVPTX] Fix lack of `.noreturn` on certain functions for aliases   Joseph Huber via Phabricator via llvm-commits
• [PATCH] D156184: [OpenMP] Add the `ompx_attribute` clause for target directives   Joseph Huber via Phabricator via llvm-commits
• [PATCH] D156379: [SystemZ] Avoid type legalization on structs   Josh Stone via Phabricator via llvm-commits
• [PATCH] D156025: ConstantFolding: Constant fold denormal inputs to canonicalize for IEEE   Joshua Cranmer via Phabricator via llvm-commits
• [llvm] 2b6df4a - [RISCV] Add codegen support for bf16 vector   Jun Sha via llvm-commits
• [llvm] e56bf13 - [RISCV] Remove some instructions from Zvfbfwma by implying Zfbfmin according to the latest spec   Jun Sha via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Jun Sha via Phabricator via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Jun Sha via Phabricator via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Jun Sha via Phabricator via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Jun Sha via Phabricator via llvm-commits
• [PATCH] D155916: [RISCV] Remove some instructions from Zvfbfwma by implying Zfbfmin according to the latest spec   Jun Sha via Phabricator via llvm-commits
• [PATCH] D151313: [RISCV][BF16] Make backend type bf16 to follow the psABI   Jun Sha via Phabricator via llvm-commits
• [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets   Jun Sha via Phabricator via llvm-commits
• [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets   Jun Sha via Phabricator via llvm-commits
• [PATCH] D156646: [RISCV] Expand load extension / truncate store for bf16   Jun Sha via Phabricator via llvm-commits
• [PATCH] D150929: [RISCV][BF16] Enable __bf16 for riscv targets   Jun Sha via Phabricator via llvm-commits
• [llvm] eafb473 - [Option] Explicitly specify all args in test. NFC   Justin Bogner via llvm-commits
• [llvm] f26af16 - [PowerPC][AIX] Enable quadword atomics by default for AIX   Kai Luo via llvm-commits
• [llvm] cee4494 - [JITLink][PowerPC] Pre-commit test for D155925. NFC.   Kai Luo via llvm-commits
• [llvm] 11a02de - [JITLink][PowerPC] Change method to check if a symbol is external to current object   Kai Luo via llvm-commits
• [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX   Kai Luo via Phabricator via llvm-commits
• [PATCH] D151312: [PowerPC][AIX] Enable quadword atomics by default for AIX   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155925: [JITLink][PowerPC][WIP] Change method to check if a symbol is external to current object   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155925: [JITLink][PowerPC][WIP] Change method to check if a symbol is external to current object   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC][WIP] Add basic TLS support for ppc64   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC][WIP] Add basic TLS support for ppc64   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155925: [JITLink][PowerPC] Change method to check if a symbol is external to current object   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155925: [JITLink][PowerPC] Change method to check if a symbol is external to current object   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155771: [JITLink][PowerPC] Support R_PPC64_PCREL34   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155771: [JITLink][PowerPC] Support R_PPC64_PCREL34   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155925: [JITLink][PowerPC] Change method to check if a symbol is external to current object   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC][WIP] Add basic TLS support for ppc64   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC] Add basic TLS support for ppc64   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC] Add basic TLS support for ppc64   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC] Add basic TLS support for ppc64   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156399: [Orc] Enable ELFNixPlatform support for ppc64le   Kai Luo via Phabricator via llvm-commits
• [PATCH] D155926: [JITLink][PowerPC] Add basic TLS support for ppc64   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156399: [Orc] Enable ELFNixPlatform support for ppc64le   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156399: [Orc] Enable ELFNixPlatform support for ppc64le   Kai Luo via Phabricator via llvm-commits
• [PATCH] D156437: [RISCV] Reverse CFI offset order for callee-saved registers stored by Zcmp push for correct stack unwinding.   KaiYi via Phabricator via llvm-commits
• [PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids   Kan Shengchen via Phabricator via llvm-commits
• [PATCH] D156440: [llvm 16] libclc: disable opaque pointers when compiling to SPIR-V   Karol Herbst via Phabricator via llvm-commits
• [llvm] 9270d56 - [bugpoint] Remove unused declaration PassInfo   Kazu Hirata via llvm-commits
• [llvm] 7ea9d95 - [dsymutil] Remove unused forward declaration BinaryHolder   Kazu Hirata via llvm-commits
• [PATCH] D156500: [RISCV] Fix typo in C9LeftShift   Kazu Hirata via Phabricator via llvm-commits
• [PATCH] D156433: [bazel] Include builtin headers with clang-tidy   Keith Smiley via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   Kerry McLaughlin via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   Kerry McLaughlin via Phabricator via llvm-commits
• [llvm] d5f496a - Revert "[RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF"   Kevin Athey via llvm-commits
• [llvm] 76c22b1 - [FPEnv][AMDGPU] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [llvm] d685706 - [FPEnv][X86] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [llvm] 58ad569 - [FPEnv][SystemZ] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [llvm] 5ad2760 - [FPEnv][RISC-V] Correct a strictfp test.   Kevin P. Neal via llvm-commits
• [llvm] 7e0e8b7 - [FPEnv][PowerPC] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [llvm] f57fb82 - [FPEnv][AArch64] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [llvm] 3a5f8c3 - Revert "[FPEnv][X86] Correct strictfp tests."   Kevin P. Neal via llvm-commits
• [llvm] 33e25cd - [FPEnv][X86] Correct strictfp tests.   Kevin P. Neal via llvm-commits
• [Diffusion] rG76c22b18eafd: [FPEnv][AMDGPU] Correct strictfp tests.   Kevin P. Neal via Phabricator via llvm-commits
• [Diffusion] rG76c22b18eafd: [FPEnv][AMDGPU] Correct strictfp tests.   Kevin P. Neal via Phabricator via llvm-commits
• [Diffusion] rG76c22b18eafd: [FPEnv][AMDGPU] Correct strictfp tests.   Kevin P. Neal via Phabricator via llvm-commits
• [Diffusion] rG76c22b18eafd: [FPEnv][AMDGPU] Correct strictfp tests.   Kevin P. Neal via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Khem Raj via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Khem Raj via Phabricator via llvm-commits
• [PATCH] D142880: [RISCV][LLD] Support R_RISCV_SET_ULEB128 and R_RISCV_SUB_ULEB128   Khem Raj via Phabricator via llvm-commits
• [PATCH] D142880: [RISCV][LLD] Support R_RISCV_SET_ULEB128 and R_RISCV_SUB_ULEB128   Khem Raj via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Kiran Chandramohan via Phabricator via llvm-commits
• [PATCH] D146648: [MLIR][OpenMP] Added MLIR translation support for use_device clauses   Kiran Chandramohan via Phabricator via llvm-commits
• [PATCH] D156344: Disable call to fma for soft-float   Kishan Parmar via Phabricator via llvm-commits
• [PATCH] D156344: Disable call to fma for soft-float   Kishan Parmar via Phabricator via llvm-commits
• [PATCH] D156344: Disable call to fma for soft-float   Kishan Parmar via Phabricator via llvm-commits
• [PATCH] D156344: Disable call to fma for soft-float   Kishan Parmar via Phabricator via llvm-commits
• [PATCH] D156344: Disable call to fma for soft-float   Kishan Parmar via Phabricator via llvm-commits
• [PATCH] D156249: [RISCV] Implement getOptimalMemOpType for memcpy/memset lowering   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Fix getMaxPushPopReg like getLibCallID   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Fix getMaxPushPopReg like getLibCallID   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Refine getMaxPushPopReg like getLibCallID   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D142880: [RISCV][LLD] Support R_RISCV_SET_ULEB128 and R_RISCV_SUB_ULEB128   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D142880: [RISCV][LLD] Support R_RISCV_SET_ULEB128 and R_RISCV_SUB_ULEB128   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D139827: [RISCV][Asan] Use dynamic shadow offset to make it work on different width of virtual-memory system.   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Kiva via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Kiva via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Kiva via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Kiva via Phabricator via llvm-commits
• [PATCH] D155406: [MemCpyOpt] implement multi BB stack-move optimization   Kohei Asano via Phabricator via llvm-commits
• [PATCH] D156131: [LV] Generate predicate in a proper VPBasicBlock   Kolya Panchenko via Phabricator via llvm-commits
• [PATCH] D156131: [LV] Generate predicate in a proper VPBasicBlock   Kolya Panchenko via Phabricator via llvm-commits
• [llvm] 194e2ba - [CMake] Use `LLVM_ENABLE_ASSERTIONS` to enable the hardened mode in libc++.   Konstantin Varlamov via llvm-commits
• [PATCH] D156377: [CMake] Use `LLVM_ENABLE_ASSERTIONS` to enable the hardened mode in libc++.   Konstantin Varlamov via Phabricator via llvm-commits
• [PATCH] D156377: [CMake] Use `LLVM_ENABLE_ASSERTIONS` to enable the hardened mode in libc++.   Konstantin Varlamov via Phabricator via llvm-commits
• [PATCH] D156377: [CMake] Use `LLVM_ENABLE_ASSERTIONS` to enable the hardened mode in libc++.   Konstantin Varlamov via Phabricator via llvm-commits
• [PATCH] D156377: [CMake] Use `LLVM_ENABLE_ASSERTIONS` to enable the hardened mode in libc++.   Konstantin Varlamov via Phabricator via llvm-commits
• [PATCH] D156140: [DAGCombiner] Minor improvements to foldAndOrOfSETCC. NFC   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGcombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGcombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGcombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGcombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGcombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGcombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGCombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156220: [DAGCombiner] Simplify foldAndOrOfSETCC. NFC.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D155915: [NFC][DAGCombiner] Tests for future commit.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156215: [DAGCombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D155267: [DAGCombiner] Change foldAndOrOfSETCC() to optimize and/or patterns with floating points.   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   Konstantina Mitropoulou via Phabricator via llvm-commits
• [PATCH] D156456: [docs] Add links to recent transparency reports   Kristof Beyls via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Krzysztof Parzyszek via Phabricator via llvm-commits
• [llvm] c13e310 - [DAGCombine] Support truncated constants for fptosi.sat combining   Kudryashov Evgeny via llvm-commits
• [llvm] 4384b52 - [gn build] Port 7c36b416b6b1   LLVM GN Syncbot via llvm-commits
• [llvm] 47987f9 - [gn build] Port 0882c70df222   LLVM GN Syncbot via llvm-commits
• [llvm] 9e44ba6 - [gn build] Port 6084ee742064   LLVM GN Syncbot via llvm-commits
• [llvm] 15c7077 - [gn build] Port fc4876578131   LLVM GN Syncbot via llvm-commits
• [llvm] 074998d - [gn build] Port 3397dae69e09   LLVM GN Syncbot via llvm-commits
• [llvm] 7029e74 - [gn build] Port a496c8be6e63   LLVM GN Syncbot via llvm-commits
• [llvm] 50c8f91 - [gn build] Port 315946c57da2   LLVM GN Syncbot via llvm-commits
• [llvm] ef4bf1d - [gn build] Port 66ba71d913df   LLVM GN Syncbot via llvm-commits
• [llvm] 2f976b9 - [gn build] Port b3c0055c172b   LLVM GN Syncbot via llvm-commits
• [llvm] e76304d - [gn build] Port 30d8e0837d68   LLVM GN Syncbot via llvm-commits
• [llvm] 37ca2f5 - [gn build] Port 1a53b5c367b5   LLVM GN Syncbot via llvm-commits
• [llvm] 7c1a6c0 - [gn build] Port 87d0aedaa285   LLVM GN Syncbot via llvm-commits
• [llvm] 9b97105 - [gn build] Port 893d53d11c01   LLVM GN Syncbot via llvm-commits
• [llvm] fac7c32 - [gn build] Port f27f22b34516   LLVM GN Syncbot via llvm-commits
• [llvm] 559d5bb - [gn build] Port 575900d0d98a   LLVM GN Syncbot via llvm-commits
• [llvm] 7c36b41 - [llvm-jitlink] Move statistics code into a separate file.   Lang Hames via llvm-commits
• [llvm] 331a54d - [llvm-jitlink] Don't return immediately in -noexec mode, just skip execution.   Lang Hames via llvm-commits
• [llvm] b3c0055 - [JITLink] Don't try to abandon non-existent allocations.   Lang Hames via llvm-commits
• [compiler-rt] 6098e2e - [ORC-RT] Fix typo in debugging output.   Lang Hames via llvm-commits
• [llvm] d467396 - [emamples][OrcV2Examples] Fix a missing newline in LLJITRemovableCode output.   Lang Hames via llvm-commits
• [llvm] 7bd481d - [ORC] Add ExecutionSession::removeJITDylibs (plural), use it in endSession.   Lang Hames via llvm-commits
• [llvm] 144236a - [ORC] Remove stray debugging output accidentally committed in 7bd481d9afc.   Lang Hames via llvm-commits
• [PATCH] D154708: Fix buffer overflow   Lang Hames via Phabricator via llvm-commits
• [PATCH] D154802: [llvm][orc] Consider other ELF init sections as well   Lang Hames via Phabricator via llvm-commits
• [PATCH] D155925: [JITLink][PowerPC] Change method to check if a symbol is external to current object   Lang Hames via Phabricator via llvm-commits
• [PATCH] D155771: [JITLink][PowerPC] Support R_PPC64_PCREL34   Lang Hames via Phabricator via llvm-commits
• [PATCH] D156516: [lli] Fix crash on empty entry-function   Lang Hames via Phabricator via llvm-commits
• [PATCH] D156544: Add more efficient vector bitcast for v16i8 on AArch64.   Lawrence Benson via Phabricator via llvm-commits
• [PATCH] D155466: [RISCV] Match ext_vl+sra_vl/srl_vl+trunc_vector_vl to vnsra.wv/vnsrl.wv   Liao Chunyu via Phabricator via llvm-commits
• [PATCH] D156618: fix memory leak in Function::dropAllReferences()   Liqiang Tao via Phabricator via llvm-commits
• [PATCH] D155049: [ScalarEvolution] Infer loop max trip count from memory accesses   Liren.Peng via Phabricator via llvm-commits
• [PATCH] D154808: [RISCV] Add tests for (and (add x, c1), (lshr y, c2))   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154760: [DAGCombine] Canonicalize operands for visitANDLike   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154809: [LoongArch] Add tests for (and (add x, c1), (lshr y, c2))   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154762: [LoongArch] Implement isLegalAddImmediate   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154810: [LoongArch][NFC] Add tests for (X & -256) == 256 -> (X >> 8) == 1   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154811: [LoongArch] Implement isLegalICmpImmediate   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154818: [LoongArch] Add test case showing suboptimal codegen when loading unsigned char/short   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154819: [LoongArch] Implement isZextFree   Lu Weining via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154931: [LoongArch] Support InlineAsm for LSX and LASX   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154918: [LoongArch] Add test case showing suboptimal codegen when zero extending   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154919: [LoongArch] Implement isSExtCheaperThanZExt   Lu Weining via Phabricator via llvm-commits
• [PATCH] D154919: [LoongArch] Implement isSExtCheaperThanZExt   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156195: [docs] Add llvm & clang release notes for LoongArch   Lu Weining via Phabricator via llvm-commits
• [PATCH] D142327: [clang][RISCV] Fix ABI handling of empty structs with hard FP calling conventions in C++   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156195: [docs] Add llvm & clang release notes for LoongArch   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156195: [docs] Add llvm & clang release notes for LoongArch   Lu Weining via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156195: [docs] Add llvm & clang release notes for LoongArch   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   Lu Weining via Phabricator via llvm-commits
• [PATCH] D156293: [lld][ELF][test] Fix excessive output file size in loongarch-add-sub.s   Lu Weining via Phabricator via llvm-commits
• [llvm] 5b95bba - [RISCV] Set Fast flag for unaligned memory accesses   Luke Lau via llvm-commits
• [llvm] 7c652fe - [RISCV] Add tests for vnsrl.vx where shift amount is truncated   Luke Lau via llvm-commits
• [llvm] ce8f094 - [RISCV] Add patterns for vnsrl.vx where shift amount is truncated   Luke Lau via llvm-commits
• [llvm] 33a93a4 - [RISCV] Add SDNode patterns for vwsll.[vv,vx,vi]   Luke Lau via llvm-commits
• [PATCH] D150771: [RISCV] Set Fast flag for unaligned memory accesses   Luke Lau via Phabricator via llvm-commits
• [PATCH] D155928: [RISCV] Add patterns for vnsrl.vx where shift amount is truncated   Luke Lau via Phabricator via llvm-commits
• [PATCH] D155928: [RISCV] Add patterns for vnsrl.vx where shift amount is truncated   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156319: [RISCV] Relax ta/ma policy into tu/mu in InsertVSETVLI   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156319: [RISCV] Relax ta/ma policy into tu/mu in InsertVSETVLI   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156348: [RISCV] When using vror.vi for left rotate, mask the inverted immediate to SEW.   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156319: [RISCV] Relax ta/ma policy into tu/mu in InsertVSETVLI   Luke Lau via Phabricator via llvm-commits
• [PATCH] D155927: [RISCV] Add tests for vnsrl.vx where shift amount is truncated   Luke Lau via Phabricator via llvm-commits
• [PATCH] D155928: [RISCV] Add patterns for vnsrl.vx where shift amount is truncated   Luke Lau via Phabricator via llvm-commits
• [PATCH] D155936: [RISCV] Add SDNode patterns for vwsll.[vv,vx,vi]   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156404: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156390: [SDAG][RISCV] Avoid expanding is-power-of-2 pattern on riscv32/64 with zbb   Luke Lau via Phabricator via llvm-commits
• [PATCH] D156610: [WIP][LSR] Transform div instruction to add in loop   LuoYuanke via Phabricator via llvm-commits
• [PATCH] D156610: [WIP][LSR] Transform div instruction to add in loop   LuoYuanke via Phabricator via llvm-commits
• [PATCH] D156610: [WIP][LSR] Transform div instruction to add in loop   LuoYuanke via Phabricator via llvm-commits
• [PATCH] D41766: [MachineCombiner] Add check for optimal pattern order.   Madhur Amilkanthwar via Phabricator via llvm-commits
• [llvm] 5af6720 - [InstCombine] Fold icmp or sub chain ((x1 - y1) | (x2 - y2)) == 0 tests   Maksim Kita via llvm-commits
• [llvm] ac357a4 - [InstCombine] Fold icmp or sub chain ((x1 - y1) | (x2 - y2)) == 0   Maksim Kita via llvm-commits
• [llvm] 6af131a - [AggressiveInstCombine][Docs] Update pass documentation   Maksim Kita via llvm-commits
• [llvm] 0c8d3db - [AggressiveInstCombine] Fold strcmp for short string literals with size 2 tests   Maksim Kita via llvm-commits
• [llvm] cbfcf90 - [AggressiveInstCombine] Fold strcmp for short string literals with size 2   Maksim Kita via llvm-commits
• [PATCH] D156029: [InstCombine] icmp udiv transform   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156029: [InstCombine] icmp udiv transform   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156028: [InstCombine] icmp udiv transform tests   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156029: [InstCombine] icmp udiv transform   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155704: [InstCombine] Fold icmp or sub chain ((x1 - y1) | (x2 - y2)) == 0   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155704: [InstCombine] Fold icmp or sub chain ((x1 - y1) | (x2 - y2)) == 0   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156134: [AggressiveInstCombine][Docs] Update pass documentation   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156134: [AggressiveInstCombine][Docs] Update pass documentation   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155703: [InstCombine] Fold icmp or sub chain ((x1 - y1) | (x2 - y2)) == 0 tests   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155704: [InstCombine] Fold icmp or sub chain ((x1 - y1) | (x2 - y2)) == 0   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155703: [InstCombine] Fold icmp or sub chain ((x1 - y1) | (x2 - y2)) == 0 tests   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155704: [InstCombine] Fold icmp or sub chain ((x1 - y1) | (x2 - y2)) == 0   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156134: [AggressiveInstCombine][Docs] Update pass documentation   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155742: [AggressiveInstCombine] Fold strcmp for short string literals with size 2 tests   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155743: [AggressiveInstCombine] Fold strcmp for short string literals with size 2   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156029: [InstCombine] icmp udiv transform   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156029: [InstCombine] icmp udiv transform   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155743: [AggressiveInstCombine] Fold strcmp for short string literals with size 2   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155742: [AggressiveInstCombine] Fold strcmp for short string literals with size 2 tests   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155743: [AggressiveInstCombine] Fold strcmp for short string literals with size 2   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156556: [AggressiveInstCombine] Fold strcmp eq, not eq operator improvements   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D155743: [AggressiveInstCombine] Fold strcmp for short string literals with size 2   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156619: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition tests   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156556: [AggressiveInstCombine] Fold strcmp eq, not eq operator improvements   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156621: [ScalarEvolution][NFC] Typo fix   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156621: [ScalarEvolution][NFC] Typo fix   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156619: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition tests   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Maksim Kita via Phabricator via llvm-commits
• [PATCH] D156176: [BOLT] Add blocks order kind to YAML profile header   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156176: [BOLT] Add blocks order kind to YAML profile header   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156206: [BOLT] Accept function start as valid jump table entry   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D154737: [BOLT] Add stale-related logging   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156206: [BOLT] Accept function start as valid jump table entry   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D155604: [BOLT] Calculate input to output address map using BOLTLinker   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156389: [BOLT] Add support for instrumenting conditional tail calls   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156374: [BOLT][DWARF] Don't convert low_pc/high_pc to ranges for size 1, and fix handling of sub-program with ranges   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156389: [BOLT] Add support for instrumenting conditional tail calls   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156389: [BOLT] Fix instrumenting conditional tail calls   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156374: [BOLT][DWARF] Update how ranges for size 1 are handled, and fix handling of sub-program with ranges   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D155604: [BOLT] Calculate input to output address map using BOLTLinker   Maksim Panchenko via Phabricator via llvm-commits
• [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156338: [NewGVN] Regenerate test checks (NFC)   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156338: [NewGVN] Regenerate test checks (NFC)   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156338: [NewGVN] Regenerate test checks (NFC)   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   Manuel Brito via Phabricator via llvm-commits
• [PATCH] D155175: [Clang] Fix consteval propagation for aggregates and defaulted constructors   Mariya Podchishchaeva via Phabricator via llvm-commits
• [PATCH] D155175: [Clang] Fix consteval propagation for aggregates and defaulted constructors   Mariya Podchishchaeva via Phabricator via llvm-commits
• [llvm] 245ec67 - Revert "[LV] Re-use existing broadcast value for live-ins."   Martin Storsjö via llvm-commits
• [llvm] ca18b4a - [test] [MCJIT] Don't overwrite config.unsupported to False   Martin Storsjö via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D156473: [Object] Use COFF archive format for import libraries.   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D149995: [test] [MCJIT] Don't overwrite config.unsupported to False   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D149996: [test] [ExecutionEngine] Skip the ExecutionEngine tests on mingw targets   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D149995: [test] [MCJIT] Don't overwrite config.unsupported to False   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D149083: [PowerPC] Optimize VPERM and fix code order for swapping vector operands on LE   Maryam Moghadas via Phabricator via llvm-commits
• [llvm] e561e7c - AMDGPU: Implement combineRepeatedFPDivisors   Matt Arsenault via llvm-commits
• [llvm] 2a53b6c - RegisterCoalescer: Fix verifier error on redef of subregister for live out implicit_defs   Matt Arsenault via llvm-commits
• [llvm] 0d797b7 - RegisterCoaleser: Fix empty subrange verifier error   Matt Arsenault via llvm-commits
• [llvm] a09d9b4 - ConstantFolding: Constant fold denormal inputs to canonicalize for IEEE   Matt Arsenault via llvm-commits
• [llvm] e93ae28 - Attributor: Fix typo   Matt Arsenault via llvm-commits
• [llvm] 47b3ada - AMDGPU: Add more sqrt f64 lowering tests   Matt Arsenault via llvm-commits
• [llvm] e3fd8f8 - AMDGPU: Correctly expand f64 sqrt intrinsic   Matt Arsenault via llvm-commits
• [llvm] 395cd33 - AMDGPU: Remove trailing whitespace from documentation   Matt Arsenault via llvm-commits
• [llvm] 3898107 - GlobalISel: Fix broken parameter documentation   Matt Arsenault via llvm-commits
• [llvm] d4a6b05 - AutoUpgrade: Use consume_front   Matt Arsenault via llvm-commits
• [llvm] 95e5a46 - AMDGPU: Always custom lower extract_subvector   Matt Arsenault via llvm-commits
• [llvm] e5f0483 - ARM: Use explicit triple in a test to avoid inheriting windows from the host   Matt Arsenault via llvm-commits
• [llvm] c26dfc8 - [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Matt Arsenault via llvm-commits
• [llvm] 3240ae7 - AMDGPU/GlobalISel: Set dead on scc on manually selected instructions   Matt Arsenault via llvm-commits
• [PATCH] D156107: ConstantFolding: Constant fold denormal inputs to canonicalize for IEEE   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Perform basic folds on llvm.amdgcn.wave.reduce.umin/umax.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Perform basic folds on llvm.amdgcn.wave.reduce.umin/umax.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156100: [AMDGPU] Have a command-line flag to enable true True16 codegen.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156100: [AMDGPU] Have a command-line flag to enable true True16 codegen.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155699: [AMDGPU] Allow vector access types in PromoteAllocaToVector   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156105: [AMDGPU][True16] Support generating differently-sized register transfers.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155790: PreISelIntrinsicLowering: don't expand memcpys in minsize functions, even with no-builtins.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156119: [GlobalISel] Fix GIM_CheckIsSameOperandIgnoreCopies   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156002: AMDGPU: Implement combineRepeatedFPDivisors   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156025: ConstantFolding: Constant fold denormal inputs to canonicalize for IEEE   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D147732: [AMDGPU] Add type mangling for {read, write, readfirst, perm}lane intrinsics   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156088: [AMDGPU] - Mark inverse.ballot as not convergent   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153877: RegisterCoaleser: Fix empty subrange verifier error   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153859: RegisterCoalescer: Fix verifier error on redef of subregister for live out implicit_defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156139: AMDGPU: Fix counting debug instructions in execz skip threshold   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155881: [AMDGPU] Remove std::optional from VOPD::ComponentProps. NFC.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155087: [RegAlloc] Fix assertion failure caused by inline assembly   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156184: [OpenMP] Add the `ompx_attribute` clause for target directives   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156107: ConstantFolding: Constant fold denormal inputs to canonicalize for IEEE   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153472: AMDGPU: Correctly expand f64 sqrt intrinsic   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153472: AMDGPU: Correctly expand f64 sqrt intrinsic   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153472: AMDGPU: Correctly expand f64 sqrt intrinsic   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153472: AMDGPU: Correctly expand f64 sqrt intrinsic   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156040: [AMDGPU] Add dynamic stack bit info to kernel-resource-usage Rpass output   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156215: [DAGcombiner] Reassociate the operands from (OR (OR(CMP1, CMP2)), CMP3) to (OR (OR(CMP1, CMP3)), CMP2)   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155087: [RegAlloc] Fix assertion failure caused by inline assembly   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156265: RegisterCoalescer: Remove dubious dropping of implicit virtual register defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156271: RegisterCoalescer: Forcibly leave SSA to avoid MIR test errors   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156271: RegisterCoalescer: Forcibly leave SSA to avoid MIR test errors   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156308: [AMDGPU] Fix PromoteAlloca Subvector Stores for Single Elements   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156331: RegisterCoalescer: Handle implicit-def of a super register when rematerializing   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FP global atomics in AMDGPUAtomicOptimizer.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FP global atomics in AMDGPUAtomicOptimizer.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156302: [AMDGPU][GlobalISel] Select G_ICMP with G_SELECT to avoid extra copies   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156302: [AMDGPU][GlobalISel] Select G_ICMP with G_SELECT to avoid extra copies   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155811: MachineSink: Fix strict weak ordering in GetAllSortedSuccessors   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156343: RegisterCoalescer: Avoid redundant implicit-def on rematerialize   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D154083: [AMDGPU] Rematerialize scalar loads   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D152843: Switch magic numbers to library functions in fixup   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D143602: Allow 32-bit pointers to be written in 64-bit slots   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155867: [AMDGPU][GlobalISel] Fix applyMappingImpl function for G_ABS and type v2s16   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D145329: AMDGPU: Always split blocks for si_end_cf
    Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D149853: [AMDGPU] Remove extract_subvector patterns   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156422: AMDGPU: Always custom lower extract_subvector   Matt Arsenault via Phabricator via llvm-commits
• [Diffusion] rG76c22b18eafd: [FPEnv][AMDGPU] Correct strictfp tests.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156398: [AMDGPU] Remove post-PromoteAlloca SROA run   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156479: GlobalISel: Pass MachineIRBuilder to applyMappingImpl   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156486: [AMDGPU] Avoid CodeGen dependencies from AMDGPU/Utils and MCTargetDesc   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156485: [PEI] Don't zero out noreg operands   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156491: [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156520: [TII] NFCI: Simplify the interface for isTriviallyReMaterializable   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156413: [AMDGPU][PEI] Set up SP for chain functions   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156412: [AMDGPU][PEI] Callee saves for amdgpu_cs_chain[_preserve]   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156412: [AMDGPU][PEI] Callee saves for amdgpu_cs_chain[_preserve]   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156479: GlobalISel: Pass MachineIRBuilder to applyMappingImpl   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156479: GlobalISel: Pass MachineIRBuilder to applyMappingImpl   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156479: GlobalISel: Pass MachineIRBuilder to applyMappingImpl   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D154766: [GlobalISel] convergent intrinsics   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156526: AMDGPU/GlobalISel: Set dead on scc on manually selected instructions   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156526: AMDGPU/GlobalISel: Set dead on scc on manually selected instructions   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D153472: AMDGPU: Correctly expand f64 sqrt intrinsic   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156529: [AMDGPU][True16] Pre-commit addition tests.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156534: GlobalISel: Add shifts to constant_fold combine   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156529: [AMDGPU][True16] Pre-commit addition tests.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156534: GlobalISel: Add shifts to constant_fold combine   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156422: AMDGPU: Always custom lower extract_subvector   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156526: AMDGPU/GlobalISel: Set dead on scc on manually selected instructions   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D86154: AMDGPU: Add llvm.amdgcn.{read,readfirst,write}lane2 intrinsics with type overloads   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D86317: IRBuilder: add CreateIntrinsicByType method   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D149587: InstSimplify: Simplifications for ldexp   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D149587: InstSimplify: Simplifications for ldexp   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156579: InstCombine: Fold fneg (ldexp x, n) -> ldexp (fneg x), n   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156603: [SymbolSize] Improve the performance of SymbolSize computation   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D156311: [AArch64][SME2][SVE2p1] Choose strided or contiguous loads   Matt Devereau via Phabricator via llvm-commits
• [PATCH] D155299: [AArch64][SVE2] Combine add+lsr to rshrnb for stores   Matt Devereau via Phabricator via llvm-commits
• [llvm] 380dbfd - Revert "Reapply [IR] Mark and/or constant expressions as undesirable"   Matthew Voss via llvm-commits
• [llvm] 9eb73f9 - Revert "[ConstantFold] Avoid creation of undesirable binop"   Matthew Voss via llvm-commits
• [PATCH] D156271: RegisterCoalescer: Forcibly leave SSA to avoid MIR test errors   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156271: RegisterCoalescer: Forcibly leave SSA to avoid MIR test errors   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156271: RegisterCoalescer: Forcibly leave SSA to avoid MIR test errors   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D155520: [LV] Complete load groups and release store groups in presence of dependency   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156491: [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156491: [RA] Split a virtual register in cold blocks if it is not assigned preferred physical register   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   Matthias Braun via Phabricator via llvm-commits
• [PATCH] D156396: [AArch64] Respect pre-/post-decrement indexing mode during instruction selection   Maurice Heumann via Phabricator via llvm-commits
• [PATCH] D156396: [AArch64] Respect pre-/post-decrement indexing mode during instruction selection   Maurice Heumann via Phabricator via llvm-commits
• [PATCH] D156396: [AArch64] Respect pre-/post-decrement indexing mode during instruction selection   Maurice Heumann via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   Mehdi AMINI via Phabricator via llvm-commits
• [PATCH] D156603: [SymbolSize] Improve the performance of SymbolSize computation   Mehdi AMINI via Phabricator via llvm-commits
• [PATCH] D156124: LoopVectorize/iv-select-cmp: add test for wide trip count (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D156124: LoopVectorize/iv-select-cmp: add test for wide trip count (NFC)   Mel Chen via Phabricator via llvm-commits
• [PATCH] D156152: LoopVectorize/iv-select-cmp: add test for decreasing IV, const start   Mel Chen via Phabricator via llvm-commits
• [PATCH] D155786: [LV] Rename the Select[I|F]Cmp reduction pattern to [I|F]AnyOf. (NFC)   Mel Chen via Phabricator via llvm-commits
• [llvm] ce89048 - [LAA] Make MaxSafeDepDistBytes private in LoopAccessAnalysis. NFC   Michael Maitland via llvm-commits
• [llvm] cdffaac - [RISCV] Add Zbs instructions to SiFive7 SchedModel   Michael Maitland via llvm-commits
• [llvm] 3a60223 - [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Michael Maitland via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D155932: [RISCV] Add subclasses of Sched to simplify code   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156034: [LAA] Make MaxSafeDepDistBytes private in LoopAccessAnalysis   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156158: [LAA] Rename and fix semantics of MaxSafeDepDistBytes to MinDepDistBytes   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156165: [LAA] MaxSafeVectorWidthBits depends on changes to MinDepDist   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156158: [LAA] Rename and fix semantics of MaxSafeDepDistBytes to MinDepDistBytes   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D155932: [RISCV] Add subclasses of Sched to simplify code   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156306: [RISCV][NFC] Change type of isOrdered to boolean   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D155663: [RISCV] Add Zbs instructions to SiFive7 SchedModel   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156158: [LAA] Rename and fix semantics of MaxSafeDepDistBytes to MinDepDistBytes   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D156231: [SPIRV][NFC] Fix typo in SPV_KHR_16bit_storage extension name   Michal Paszkowski via Phabricator via llvm-commits
• [PATCH] D156231: [SPIRV][NFC] Fix typo in SPV_KHR_16bit_storage extension name   Michal Paszkowski via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Michal Paszkowski via Phabricator via llvm-commits
• [llvm] cb15e65 - [RISCV] A test for conditional binary ops.   Mikhail Gudim via llvm-commits
• [PATCH] D155344: [RISCV] Generalize 'tryFoldSelectIntOp` to other operations.   Mikhail Gudim via Phabricator via llvm-commits
• [PATCH] D155344: [RISCV] Generalize 'tryFoldSelectIntOp` to other operations.   Mikhail Gudim via Phabricator via llvm-commits
• [PATCH] D155481: [RISCV] A test for conditional binary ops.   Mikhail Gudim via Phabricator via llvm-commits
• [PATCH] D25846: scripts: Document existing problems with the symbolizer build script.   Mingjie Xu via Phabricator via llvm-commits
• [PATCH] D25846: scripts: Document existing problems with the symbolizer build script.   Mingjie Xu via Phabricator via llvm-commits
• [PATCH] D156302: [AMDGPU][GlobalISel] Select G_ICMP with G_SELECT to avoid extra copies   Mirko Brkusanin via Phabricator via llvm-commits
• [PATCH] D156302: [AMDGPU][GlobalISel] Select G_ICMP with G_SELECT to avoid extra copies   Mirko Brkusanin via Phabricator via llvm-commits
• [PATCH] D152921: [lld] Synthesize metadata for MTE globals   Mitch Phillips via Phabricator via llvm-commits
• [PATCH] D152921: [lld] Synthesize metadata for MTE globals   Mitch Phillips via Phabricator via llvm-commits
• [PATCH] D152921: [lld] Synthesize metadata for MTE globals   Mitch Phillips via Phabricator via llvm-commits
• [PATCH] D152921: [lld] Synthesize metadata for MTE globals   Mitch Phillips via Phabricator via llvm-commits
• [PATCH] D154722: [AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC)   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D154722: [AArch64] Refactor AArch64InstrInfo::isAsCheapAsAMove (NFC)   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D156235: [MachineBlockPlacement] Remove the pad limit for no-fallthrough loops   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D156323: [TargetLowering] Remove unused basic block parameter from `getMaxPermittedBytesForAlignment` (NFC)   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D156324: [MachineBlockPlacement] Respect target limits on padding amount when aligning all blocks   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D156235: [MachineBlockPlacement] Remove the pad limit for no-fallthrough loops   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D156235: [MachineBlockPlacement] Remove the pad limit for no-fallthrough loops   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D156235: [MachineBlockPlacement] Remove the pad limit for no-fallthrough loops   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D156235: [MachineBlockPlacement] Remove the pad limit for no-fallthrough loops   Momchil Velikov via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D156095: [Bazel] Introduce `//compiler-rt:profile`   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D156575: [llvm[NFC] Adjust mem fn auto upgrade detection   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D156600: [llvm][NFC] Make test less brittle   Nathan Sidwell via Phabricator via llvm-commits
• [PATCH] D155600: [AIX][TLS] Produce a faster local-exec access sequence with -maix-small-local-exec-tls (And optimize when load/store offsets are 0)   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D156204: [PowerPC][MC] Recognize tlbilx and its mnemonics   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D156203: [AIX][TLS] Add backend portion for the -maix-small-local-exec-tls option.   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D156204: [PowerPC][MC] Recognize tlbilx and its mnemonics   Nemanja Ivanovic via Phabricator via llvm-commits
• [PATCH] D156488: [PPC] Fix layering issues between MCTargetDesc and CodeGen   Nemanja Ivanovic via Phabricator via llvm-commits
• [llvm] a08b9fb - [gn] port a8016e296e6ec1 (sancov Opts)   Nico Weber via llvm-commits
• [llvm] ca32bc4 - [AArch64] Fix build on Windows after 57329ca9463   Nico Weber via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Nico Weber via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho]Avoid crashing in predicate functions.   Nico Weber via Phabricator via llvm-commits
• [PATCH] D154412: [RISCV] Add support for XCVbi extension in CV32E40P   Nico Weber via Phabricator via llvm-commits
• [llvm] e49103b - [Mips] Fix argument lowering for illegal vector types (PR63608)   Nikita Popov via llvm-commits
• [llvm] 9645ced - [InstCombine] Add test for infinite combine loop (NFC)   Nikita Popov via llvm-commits
• [llvm] 724e2b1 - [InstCombine] Add tests for bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A<0, icmp)) fold (NFC)   Nikita Popov via llvm-commits
• [llvm] 8a0b2ca - [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp))   Nikita Popov via llvm-commits
• [llvm] 8249d67 - [InstCombine] Avoid uses of ConstantExpr::getOr()   Nikita Popov via llvm-commits
• [llvm] a1403dc - [ConstantFolding] Avoid use of ConstantExpr::getOr() (NFC)   Nikita Popov via llvm-commits
• [llvm] 0cab8d2 - Reapply [IR] Mark and/or constant expressions as undesirable   Nikita Popov via llvm-commits
• [llvm] 673a467 - [ConstantFold] Avoid creation of undesirable binop   Nikita Popov via llvm-commits
• [llvm] 90d825b - Reapply [ConstantFold] Avoid creation of undesirable binop   Nikita Popov via llvm-commits
• [llvm] 0d677c8 - [InstCombine] Add test for PR64114 (NFC)   Nikita Popov via llvm-commits
• [llvm] 3c4d222 - [InstCombine] Add more tests for unreachable code (NFC)   Nikita Popov via llvm-commits
• [llvm] 70aca7b - [InstCombine] Explicitly track dead edges   Nikita Popov via llvm-commits
• [llvm] 3984a3d - [MergedLoadStoreMotion] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] bbe2887 - [PhaseOrdering] Add test for GVN/hoist order (NFC)   Nikita Popov via llvm-commits
• [llvm] 279c297 - [ThinLTO] Use module hash instead of module ID for cache key   Nikita Popov via llvm-commits
• [llvm] ed23609 - [PatternMatch] Do not match constant expressions for binops   Nikita Popov via llvm-commits
• [llvm] ad7f020 - [InstCombine] Process blocks in RPO   Nikita Popov via llvm-commits
• [PATCH] D154445: [Mips] Fix argument lowering for illegal vector types (PR63608)   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154789: [InstCombine] Add tests for bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A<0, icmp)) fold (NFC)   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154791: [InstCombine] Transform bitwise (A >> C - 1, zext(icmp)) -> zext (bitwise(A < 0, icmp)) fold.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155708: [AArch64][NFC] Call the API getVScaleRange directly   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155924: [IR] Remove support for and constant expressions   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156141: [NFC][ValueTracking]: Move some code from isKnownNonZero to isKnownNonZeroFromOperator   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156209: [indvars] Fix pointer IV expand type in genLoopLimit   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155638: [llvm-reduce] Reduce function calling convention   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156194: [SimplifyCFG] Guard branch folding by speculate blocks flag   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156141: [NFC][ValueTracking]: Move some code from isKnownNonZero to isKnownNonZeroFromOperator   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156134: [AggressiveInstCombine][Docs] Update pass documentation   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156117: [GVN] Freeze SrcVal if materializes load to a smaller type load   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154323: [MemoryDependencyAnalysis] Delete cache infos if CacheInfo->size != Loc.size   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156235: [MachineBlockPlacement] Remove the pad limit for no-fallthrough loops   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154807: [InstCombine] Transform `(add (shl (neg X), Cnt))` -> `(sub (shl X, Cnt))`   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154807: [InstCombine] Transform `(add (shl (neg X), Cnt))` -> `(sub (shl X, Cnt))`   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154806: [InstCombine] Add tests for transforming `(add (shl (neg X), Cnt))`; NFC   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155743: [AggressiveInstCombine] Fold strcmp for short string literals with size 2   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156397: [FunctionAttrs] Unconditionally perform argument attribute inference in the first function-attrs pass   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156401: [PatternMatch] Do not match constant expressions for binops   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156347: [InstCombine] Tests for D156026 (Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer))   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156318: Local: fix debug output of replaceDominatedUsesWith()   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156029: [InstCombine] icmp udiv transform   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156318: Local: fix debug output of replaceDominatedUsesWith()   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156395: [Reassociate][NFC] Update the header comment of Reassociate Pass   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155940: [SimplifyCFG] Transform for merging the combination of phis in switch   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155956: [FunctionAttrs] Consider recursive argmem effects (PR63936)   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154010: [InstCombine] Canonicalize `getelementptr` patterns to `@llvm.ptrmask`   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156444: [llvm][IR]   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156401: [PatternMatch] Do not match constant expressions for binops   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156451: GVNSink: port some tests from MergedLoadStoreMotion   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156458: GVNSink: add test to show GVN-aware sinking   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156478: [IR] Mark `llvm.assume` as `memory(inaccessiblemem: write)`   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156510: [ValueTracking] Dereferenceable ret attributes implys noundef   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D153717: [SCCP] Replace valuestate.isConstant with helper isConstant   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D75408: [ConstantFolding] Make sure constants are fully folded   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156525: [ThinLTO} Use module hash instead of module ID for cache key   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156451: GVNSink: port some tests from MergedLoadStoreMotion   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156532: [Pipelines] Perform hoisting prior to GVN   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156458: GVNSink: add test to show GVN-aware sinking   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156525: [ThinLTO] Use module hash instead of module ID for cache key   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156525: [ThinLTO] Use module hash instead of module ID for cache key   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D154579: [InstCombine] Only perform one iteration   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156532: [Pipelines] Perform hoisting prior to GVN   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156556: [AggressiveInstCombine] Fold strcmp eq, not eq operator improvements   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156401: [PatternMatch] Do not match constant expressions for binops   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156600: [llvm][NFC] Make test less brittle   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156347: [InstCombine] Tests for D156026 (Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer))   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156621: [ScalarEvolution][NFC] Typo fix   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D75362: [InstCombine] Process blocks in RPO   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156612: [SimplifyCFG] Add unsigned max-min comparison to `switchToLookupTable`.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D155389: [ValueTracking][ScalarEvolution] improving llvm.assume's support for the argument value without context & reducing the result range of ScalarEvolution::getRange using computeConstantRange   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D156496: [libunwind] Fix build with -Wunused-function   Nikolas Klauser via Phabricator via llvm-commits
• [PATCH] D156496: [libunwind] Fix build with -Wunused-function   Nikolas Klauser via Phabricator via llvm-commits
• [llvm] 474cf4f - [RISCV][GlobalISel] Test legalization of binary logical instructions with wider types   Nitin John Raj via llvm-commits
• [PATCH] D155639: [RISCV][GlobalISel] Test legalization of binary logical instructions with wider types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D156380: [RISCV][GlobalISel] Fix tests for addition, subtraction and logical instructions   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D155772: [RISCV][GlobalISel] Legalize bitshift instructions for narrow types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D155772: [RISCV][GlobalISel] Legalize bitshift instructions for narrow types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D155772: [RISCV][GlobalISel] Legalize bitshift instructions for narrow types that are a power of 2   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D155772: [RISCV][GlobalISel] Legalize bitshift instructions for narrow types that are a power of 2   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types   Nitin John Raj via Phabricator via llvm-commits
• [PATCH] D156383: [RISCV][GlobalISel] Legalize constants, undefined values, extension instructions, and (un)merge instructions for narrow types   Nitin John Raj via Phabricator via llvm-commits
• [llvm] aa88df8 - [InstCombine] Add tests for folding `@llvm.ptrmask` with itself; NFC   Noah Goldstein via llvm-commits
• [llvm] edf2e0e - [InstCombine] Folding `@llvm.ptrmask` with itself   Noah Goldstein via llvm-commits
• [llvm] 09b6765 - [InstCombine] Remove trailing space in comment; NFC   Noah Goldstein via llvm-commits
• [PATCH] D156141: [NFC][ValueTracking]: Move some code from isKnownNonZero to isKnownNonZeroFromOperator   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D155704: [InstCombine] Fold icmp or sub chain ((x1 - y1) | (x2 - y2)) == 0   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156029: [InstCombine] icmp udiv transform   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154806: [InstCombine] Add tests for transforming `(add (shl (neg X), Cnt))`; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154807: [InstCombine] Transform `(add (shl (neg X), Cnt))` -> `(sub (shl X, Cnt))`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154807: [InstCombine] Transform `(add (shl (neg X), Cnt))` -> `(sub (shl X, Cnt))`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D155743: [AggressiveInstCombine] Fold strcmp for short string literals with size 2   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154010: [InstCombine] Canonicalize `getelementptr` patterns to `@llvm.ptrmask`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156029: [InstCombine] icmp udiv transform   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156401: [PatternMatch] Do not match constant expressions for binops   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156401: [PatternMatch] Do not match constant expressions for binops   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154005: [InstCombine] Add tests for folding `@llvm.ptrmask` with itself; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154006: [InstCombine] Folding `@llvm.ptrmask` with itself   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156499: [InstCombine] Fold abs of known sign operand when source is sub   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156556: [AggressiveInstCombine] Fold strcmp eq, not eq operator improvements   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156579: InstCombine: Fold fneg (ldexp x, n) -> ldexp (fneg x), n   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D147373: [InstCombine] fold double reverses   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154953: [InstSimplify] Remove the remainder loop if we know the mask is always true   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156026: [InstCombine] Contracting x^2 + 2*x*y + y^2 to (x + y)^2 (integer)   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156620: [InstCombine] Improve foldOpIntoPhi() to use isImpliedCondition   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156631: [InstSimplify] Hoist some basic simplifications from `simplifyAndInst` to helper; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156632: [InstSimplify] Add tests for simplify `llvm.ptrmask`; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156633: [InstSimplify] Add some basic simplifications for `llvm.ptrmask`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156634: [InstCombine] Add tests for combining `llvm.ptrmask`; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156635: [InstCombine] Make combines on `llvm.ptrmask` fail loudly if we have vec types; NFC   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156636: [InstCombine] Deduce `align` and `nonnull` return attributes for `llvm.ptrmask`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156637: [InstCombine] Implement `SimplifyDemandedBits` for `llvm.ptrmask`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156638: [InstCombine] Preserve return attributes when merging `llvm.ptrmask`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156639: [InstCombine] Merge consecutive `llvm.ptrmask` with different mask types if a mask is constant.   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D156640: [InstCombine] Fold `(ptrtoint (ptrmask p0, m0))` -> `(and (ptrtoint p0), m0)`   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp   Noah Goldstein via Phabricator via llvm-commits
• [llvm] eb1617a - [InstCombineVectorOps] Use poison instead of undef as placeholder [NFC]   Nuno Lopes via llvm-commits
• [PATCH] D156055: [NewGVN][PHIOFOPS] Relax conditions when checking safety of memory accesses   Nuno Lopes via Phabricator via llvm-commits
• [PATCH] D156338: [NewGVN] Regenerate test checks (NFC)   Nuno Lopes via Phabricator via llvm-commits
• [PATCH] D91353: [CodeGenPrepare] Match complex multiply pattern (WIP).   Nuno Lopes via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Nuno Lopes via Phabricator via llvm-commits
• [PATCH] D156478: [IR] Mark `llvm.assume` as `memory(inaccessiblemem: write)`   Nuno Lopes via Phabricator via llvm-commits
• [PATCH] D156478: [IR] Mark `llvm.assume` as `memory(inaccessiblemem: write)`   Nuno Lopes via Phabricator via llvm-commits
• [PATCH] D156476: [IR] Mark `llvm.trap` as `memory(inaccessiblemem: write)`   Nuno Lopes via Phabricator via llvm-commits
• [PATCH] D156428: [AArch64][PtrAuth] Fix unwind state for tail calls   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D156339: [ARM] Correctly handle combining segmented stacks with execute-only   Oliver Stannard via Phabricator via llvm-commits
• [PATCH] D152468: [NFC][DebugInfo][RemoveDIs] Use iterators over instruction pointers when using IRBuilder in various passes   Orlando Cazalet-Hyams via Phabricator via llvm-commits
• [PATCH] D152534: [NFC][DebugInfo][RemoveDIs] Use moveBeforePreserving when transforms intend to move dbg.values   Orlando Cazalet-Hyams via Phabricator via llvm-commits
• [PATCH] D156545: [DebugInfo][InstrRef] Don't produce over-sized DW_OP_deref_size expressions for very wide stack spills   Orlando Cazalet-Hyams via Phabricator via llvm-commits
• [PATCH] D153990: [DebugInfo][RemoveDIs] Add prototype storage classes for non-instruction variable debug-info   Orlando Cazalet-Hyams via Phabricator via llvm-commits
• [PATCH] D148654: Modify BoundsSan to improve debuggability   Oskar Wirga via Phabricator via llvm-commits
• [PATCH] D156587: Implement vector rotations on AArch64 using shift-insert instructions.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D156442: [llvm][RISCV][Backend]   Panagiotis K via Phabricator via llvm-commits
• [PATCH] D156444: [llvm][IR]   Panagiotis K via Phabricator via llvm-commits
• [PATCH] D156449: [LLVM][Transforms]   Panagiotis K via Phabricator via llvm-commits
• [PATCH] D156444: Zext flag in IR for RISC-V   Panagiotis K via Phabricator via llvm-commits
• [PATCH] D156449: Zext flag in various optimization passes for RISC-V   Panagiotis K via Phabricator via llvm-commits
• [PATCH] D156442: [RISCV][Backend] Zext flag conversion in RISC-V Backend   Panagiotis K via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Paul C. Anagnostopoulos via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Paul C. Anagnostopoulos via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Paul C. Anagnostopoulos via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D146778: [lld] Preliminary fat-lto-object support   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D146778: [lld] Preliminary fat-lto-object support   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D146778: Reland "[lld] Preliminary fat-lto-object support"   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D146778: Reland "[lld] Preliminary fat-lto-object support"   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Paul Kirth via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152282: [Transforms][LICM] A test case for the upcoming fix D152281 for the issue with reassociation profitability   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Osmialowski via Phabricator via llvm-commits
• [PATCH] D154869: [Flang] [FlangRT] Implement FlangRT library as solution to Flang's runtime LLVM integration   Paul Scoropan via Phabricator via llvm-commits
• [llvm] 74445d6 - [SVE] Add vselect(mla/mls) patterns for cases where a multiplicand is used for the false lanes.   Paul Walker via llvm-commits
• [PATCH] D156112: [AArch64][LoopVectorize] Improve tail-folding heuristic on neoverse-v1   Paul Walker via Phabricator via llvm-commits
• [PATCH] D155972: [SVE] Add vselect(mla/mls) patterns for cases where a multiplicand is used for the false lanes.   Paul Walker via Phabricator via llvm-commits
• [PATCH] D152281: [Transforms][LICM] Add the ability to undo unprofitable reassociation   Paul Walker via Phabricator via llvm-commits
• [llvm] d6b73f5 - [SPIRV][NFC] Fix typo in SPV_KHR_16bit_storage extension name   Paulo Matos via llvm-commits
• [PATCH] D156231: [SPIRV][NFC] Fix typo in SPV_KHR_16bit_storage extension name   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156231: [SPIRV][NFC] Fix typo in SPV_KHR_16bit_storage extension name   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156297: [SPIRV] Add support for SPV_INTEL_optnone   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D156231: [SPIRV][NFC] Fix typo in SPV_KHR_16bit_storage extension name   Paulo Matos via Phabricator via llvm-commits
• [PATCH] D152914: [Draft] Make __builtin_cpu builtins target-independent   Pavel Iliin via Phabricator via llvm-commits
• [PATCH] D146303: [llvm-exegesis] Prevent llvm-exegesis from using unsupported opcodes   Pavel Kosov via Phabricator via llvm-commits
• [PATCH] D155867: [AMDGPU][GlobalISel] Fix applyMappingImpl function for G_ABS and type v2s16   Petar Avramovic via Phabricator via llvm-commits
• [PATCH] D154869: [Flang] [FlangRT] Implement FlangRT library as solution to Flang's runtime LLVM integration   Peter Klausler via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Peter Smith via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Peter Smith via Phabricator via llvm-commits
• [PATCH] D152973: Reland "[gold] Add preliminary FatLTO support to the Gold plugin""   Peter Smith via Phabricator via llvm-commits
• [PATCH] D156190: [llvm-objdump] -d: don't display mapping symbols as labels   Peter Smith via Phabricator via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Peter Smith via Phabricator via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Peter Smith via Phabricator via llvm-commits
• [PATCH] D156505: [AArch64][ELF] Support R_AARCH64_AUTH_ABS64 static relocation   Peter Smith via Phabricator via llvm-commits
• [PATCH] D138847: MC/DC in LLVM Source-Based Code Coverage: llvm-cov visualization   Petr Hosek via Phabricator via llvm-commits
• [PATCH] D156113: [CodeGen] Store call frame size in MachineBasicBlock   Petr Hosek via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Petr Hosek via Phabricator via llvm-commits
• [PATCH] D152926: [DAGCombine] Support truncated constants for fptosi.sat combining   Phabricator via llvm-commits
• [llvm] 4f4f491 - [RISCV] Add memcpy lowering test coverage with and without V   Philip Reames via llvm-commits
• [llvm] a6cd1f6 - [RISCV] Adjust memcpy lowering test coverage w/V   Philip Reames via llvm-commits
• [llvm] 9cf6759 - [RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF   Philip Reames via llvm-commits
• [PATCH] D153260: [RISCV][MC] Implement mapping symbols   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156249: [RISCV] Implement getOptimalMemOpType for memcpy/memset lowering   Philip Reames via Phabricator via llvm-commits
• [PATCH] D155612: [RISCV] Add test which shows alignment of constant pools and the functions which followed   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156258: [WIP][RISCV] Exploring directions for vector mem* lowering   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156249: [RISCV] Implement getOptimalMemOpType for memcpy/memset lowering   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156249: [RISCV] Implement getOptimalMemOpType for memcpy/memset lowering   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156349: [DAG] Support store merging of vector constant stores   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156448: [TwoAddressInstruction] Tweak constraining of tied operands w/undef source   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156477: [RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF   Philip Reames via Phabricator via llvm-commits
• [PATCH] D156477: [RISCVRVVInitUndef] Remove implicit single use assumption for IMPLICIT_DEF   Philip Reames via Phabricator via llvm-commits
• [PATCH] D155863: [X86][Regcall] Add an option to respect regcall ABI v.4 in win64&win32   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D156285: [X86] Update Model value for Raptor Lake.   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D154168: [X86] Split SDISel call lowering out to its own file   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D155145: [X86] Add AVX-VNNI-INT16 instructions.   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D155821: [TableGen][GlobalISel] Guarantee stable iteration order for stop-after-parse   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D155699: [AMDGPU] Allow vector access types in PromoteAllocaToVector   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D155699: [AMDGPU] Allow vector access types in PromoteAllocaToVector   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156119: [GlobalISel] Fix GIM_CheckIsSameOperandIgnoreCopies   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D155699: [AMDGPU] Allow vector access types in PromoteAllocaToVector   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156119: [GlobalISel] Fix GIM_CheckIsSameOperandIgnoreCopies   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156119: [GlobalISel] Fix GIM_CheckIsSameOperandIgnoreCopies   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D152706: [AMDGPU] Use SSAUpdater in PromoteAlloca   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D155699: [AMDGPU] Allow vector access types in PromoteAllocaToVector   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156208: [TableGen][GlobalISel] Fix unused variable warnings   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D153472: AMDGPU: Correctly expand f64 sqrt intrinsic   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156208: [TableGen][GlobalISel] Fix unused variable warnings   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156308: [AMDGPU] Fix PromoteAlloca Subvector Stores for Single Elements   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156309: [AMDGPU] Precommit tests for D156308   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156309: [AMDGPU] Precommit tests for D156308   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156308: [AMDGPU] Fix PromoteAlloca Subvector Stores for Single Elements   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D153258: AMDGPU: Optimize set_rounding if input is known to fit in 2 bits   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156398: [AMDGPU] Remove post-PromoteAlloca SROA run   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156398: [AMDGPU] Remove post-PromoteAlloca SROA run   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156398: [AMDGPU] Remove post-PromoteAlloca SROA run   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156479: GlobalISel: Pass MachineIRBuilder to applyMappingImpl   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156315: [RFC][GlobalISel] Overhauled MIR Patterns Support for Combiners   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D156414: [AMDGPU] Break Large PHIs: Take whole PHI chains into account   Pierre van Houtryve via Phabricator via llvm-commits
• [PATCH] D154083: [AMDGPU] Rematerialize scalar loads   Piotr Sobczak via Phabricator via llvm-commits
• [PATCH] D156520: [TII] NFCI: Simplify the interface for isTriviallyReMaterializable   Piotr Sobczak via Phabricator via llvm-commits
• [PATCH] D156438: [Docs] Fix code-blocks missing colon   Piotr Zegar via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho]Avoid crashing in predicate functions.   Pirama Arumuga Nainar via Phabricator via llvm-commits
• [PATCH] D155155: [RISCV] emit .option directive for functions with target features which differ from module default   Piyou Chen via Phabricator via llvm-commits
• [llvm] 6f305e0 - [DAGCombiner] Limit graph traversal to cap compile times   Pranav Kant via llvm-commits
• [PATCH] D154885: [DAGCombiner] Limit graph traversal to cap compile times   Pranav Kant via Phabricator via llvm-commits
• [PATCH] D154885: [DAGCombiner] Limit graph traversal to cap compile times   Pranav Kant via Phabricator via llvm-commits
• [PATCH] D154885: [DAGCombiner] Limit graph traversal to cap compile times   Pranav Kant via Phabricator via llvm-commits
• [llvm] d163b76 - [AMDGPU] Fix llvm.amdgcn.wave.reduce.umax/umin MIR tests   Pravin Jagtap via llvm-commits
• [llvm] 1462053 - [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Pravin Jagtap via llvm-commits
• [PATCH] D154858: [AMDGPU] Add llvm.amdgcn.wave.reduce.umin/umax Intrinsic.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156125: [AMDGPU] Fix llvm.amdgcn.wave.reduce.umax/umin MIR tests   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156125: [AMDGPU] Fix llvm.amdgcn.wave.reduce.umax/umin MIR tests   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D154858: [AMDGPU] Add llvm.amdgcn.wave.reduce.umin/umax Intrinsic.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Perform basic folds on llvm.amdgcn.wave.reduce.umin/umax.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Perform basic folds on llvm.amdgcn.wave.reduce.umin/umax.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FP global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Propagate constants for llvm.amdgcn.wave.reduce.umin/umax   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FP global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [PATCH] D156301: [WIP] Support FAdd/FSub global atomics in AMDGPUAtomicOptimizer.   Pravin Jagtap via Phabricator via llvm-commits
• [llvm] 092e60a - [RISCV] Add support for XCValu extension in CV32E40P   QIHAN CAI via llvm-commits
• [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P   QIHAN CAI via Phabricator via llvm-commits
• [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P   QIHAN CAI via Phabricator via llvm-commits
• [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P   QIHAN CAI via Phabricator via llvm-commits
• [PATCH] D153748: [RISCV] Add support for XCValu extension in CV32E40P   QIHAN CAI via Phabricator via llvm-commits
• [PATCH] D155087: [RegAlloc] Fix assertion failure caused by inline assembly   Qi Hu via Phabricator via llvm-commits
• [PATCH] D155087: [RegAlloc] Fix assertion failure caused by inline assembly   Qi Hu via Phabricator via llvm-commits
• [PATCH] D154488: [PowerPC] Define SchedModel for Power8   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D154488: [PowerPC] Define SchedModel for Power8   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D156204: [PowerPC][MC] Recognize tlbilx and its mnemonics   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D156204: [PowerPC][MC] Recognize tlbilx and its mnemonics   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D154488: [PowerPC] Define SchedModel for Power8   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D154488: [PowerPC] Define SchedModel for Power8   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D156292: [PowerPC] Support initial-exec TLS mode on AIX   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D156399: [Orc] Enable ELFNixPlatform support for ppc64le   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D154488: [PowerPC] Define SchedModel for Power8   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D153859: RegisterCoalescer: Fix verifier error on redef of subregister for live out implicit_defs   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D119916: Add a machine function pass to convert binop(phi(constants), v) to phi(binop)   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D154507: [NVPTX] Apply global var demotion to private symbols   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D119916: Add a machine function pass to convert binop(phi(constants), v) to phi(binop)   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D119916: Add a machine function pass to convert binop(phi(constants), v) to phi(binop)   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156471: [mlir] Support fast-math friendly constants for identity value   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156471: [mlir] Support fast-math friendly constants for identity value   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156471: [mlir] Support fast-math friendly constants for identity value   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D156345: RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG   Quentin Colombet via Phabricator via llvm-commits
• [PATCH] D155794: [OpenMP][OpenMPIRBuilder] Migrate setPropertyExecutionMode() from Clang to OpenMPIRBuilder.   Raghu via Phabricator via llvm-commits
• [PATCH] D155794: [OpenMP][OpenMPIRBuilder] Migrate setPropertyExecutionMode() from Clang to OpenMPIRBuilder.   Raghu via Phabricator via llvm-commits
• [PATCH] D155794: [OpenMP][OpenMPIRBuilder] Migrate setPropertyExecutionMode() from Clang to OpenMPIRBuilder.   Raghu via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   Rainer Orth via Phabricator via llvm-commits
• [PATCH] D156504: [sanitizer_common] Remove hacks for __builtin_return_address abuse on SPARC   Rainer Orth via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   Rainer Orth via Phabricator via llvm-commits
• [llvm] 110ec18 - LoopVectorize/iv-select-cmp: add test for decreasing IV, const start   Ramkumar Ramachandra via llvm-commits
• [llvm] 23caf9e - Local: fix debug output of replaceDominatedUsesWith()   Ramkumar Ramachandra via llvm-commits
• [llvm] aabc714 - ConstantFolding: remove function in context of opaque ptrs   Ramkumar Ramachandra via llvm-commits
• [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156124: LoopVectorize/iv-select-cmp: add test for wide trip count (NFC)   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156152: LoopVectorize/iv-select-cmp: add test for decreasing IV, const start   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156124: LoopVectorize/iv-select-cmp: add test for wide trip count (NFC)   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156152: LoopVectorize/iv-select-cmp: add test for decreasing IV, const start   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156318: Local: fix debug output of replaceDominatedUsesWith()   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156152: LoopVectorize/iv-select-cmp: add test for decreasing IV, const start   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D150851: [LoopVectorize] Vectorize select-cmp reduction pattern for increasing integer induction variable   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156318: Local: fix debug output of replaceDominatedUsesWith()   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156124: LoopVectorize/iv-select-cmp: add test for wide trip count (NFC)   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156124: LoopVectorize/iv-select-cmp: add test for wide trip count (NFC)   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156124: LoopVectorize/iv-select-cmp: add tests for truncated IV   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156318: Local: fix debug output of replaceDominatedUsesWith()   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156318: Local: fix debug output of replaceDominatedUsesWith()   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156451: GVNSink: port some tests from MergedLoadStoreMotion   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156458: GVNSink: add test to show GVN-aware sinking   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156458: GVNSink: add test to show GVN-aware sinking   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156451: GVNSink: port some tests from MergedLoadStoreMotion   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156458: GVNSink: add test to show GVN-aware sinking   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156458: GVNSink: add test to show GVN-aware sinking   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156532: [Pipelines] Perform hoisting prior to GVN   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156458: GVNSink: add test to show GVN-aware sinking   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156451: GVNSink: port some tests from MergedLoadStoreMotion   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156451: GVNSink: port some tests from MergedLoadStoreMotion   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156532: [Pipelines] Perform hoisting prior to GVN   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156532: [Pipelines] Perform hoisting prior to GVN   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156555: ConstantFolding: remove function in context of opaque ptrs   Ramkumar Ramachandra via Phabricator via llvm-commits
• [PATCH] D156555: ConstantFolding: remove function in context of opaque ptrs   Ramkumar Ramachandra via Phabricator via llvm-commits
• [llvm] 2d03b7c - Adjust includes in MCTargetDesc to avoid unnecessary CodeGen deps, NFC   Reid Kleckner via llvm-commits
• [llvm] f6909cf - Adjust includes in MCTargetDesc to avoid unnecessary CodeGen deps, NFC   Reid Kleckner via llvm-commits
• [llvm] f86c81b - [AMDGPU] Avoid CodeGen dependencies from AMDGPU/Utils and MCTargetDesc   Reid Kleckner via llvm-commits
• [llvm] 26a7308 - [X86] Split SDISel call lowering out to its own file   Reid Kleckner via llvm-commits
• [PATCH] D156472: [WebAssembly] Create separation between MC and CodeGen layers   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D154168: [X86] Split SDISel call lowering out to its own file   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D156486: [AMDGPU] Avoid CodeGen dependencies from AMDGPU/Utils and MCTargetDesc   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D156488: [PPC] Fix layering issues between MCTargetDesc and CodeGen   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D156486: [AMDGPU] Avoid CodeGen dependencies from AMDGPU/Utils and MCTargetDesc   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D156486: [AMDGPU] Avoid CodeGen dependencies from AMDGPU/Utils and MCTargetDesc   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D156486: [AMDGPU] Avoid CodeGen dependencies from AMDGPU/Utils and MCTargetDesc   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D154168: [X86] Split SDISel call lowering out to its own file   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D156488: [PPC] Fix layering issues between MCTargetDesc and CodeGen   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D154168: [X86] Split SDISel call lowering out to its own file   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D154168: [X86] Split SDISel call lowering out to its own file   Reid Kleckner via Phabricator via llvm-commits
• [PATCH] D156471: [mlir] Support fast-math friendly constants for identity value   Renato Golin via Phabricator via llvm-commits
• [PATCH] D156471: [mlir] Support fast-math friendly constants for identity value   Renato Golin via Phabricator via llvm-commits
• [PATCH] D156471: [mlir] Support fast-math friendly constants for identity value   Renato Golin via Phabricator via llvm-commits
• [PATCH] D142327: [clang][RISCV] Fix ABI handling of empty structs with hard FP calling conventions in C++   Roger Ferrer Ibanez via Phabricator via llvm-commits
• [PATCH] D142327: [clang][RISCV] Fix ABI handling of empty structs with hard FP calling conventions in C++   Roger Ferrer Ibanez via Phabricator via llvm-commits
• [PATCH] D142327: [clang][RISCV] Fix ABI handling of empty structs with hard FP calling conventions in C++   Roger Ferrer Ibanez via Phabricator via llvm-commits
• [PATCH] D156438: [Docs] Fix code-blocks missing colon   Roger Ferrer Ibanez via Phabricator via llvm-commits
• [PATCH] D156438: [Docs] Fix code-blocks missing colon   Roger Ferrer Ibanez via Phabricator via llvm-commits
• [PATCH] D155876: [PowerPC] vector cost model add cost to extract i1   Roland Froese via Phabricator via llvm-commits
• [PATCH] D155876: [PowerPC] vector cost model add cost to extract i1   Roland Froese via Phabricator via llvm-commits
• [PATCH] D155793: [Support] Avoid wait4 on Fuchsia   Roland McGrath via Phabricator via llvm-commits
• [llvm] d4a5bef - ExecutionEngine: support `IMAGE_REL_AMD64_SECTION` relocations   Saleem Abdulrasool via llvm-commits
• [PATCH] D156391: [AArch64][Windows] Fix the slot offset of the swift async context register.   Saleem Abdulrasool via Phabricator via llvm-commits
• [lld] 47ba908 - [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   Sam Clegg via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   Sam Clegg via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   Sam Clegg via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   Sam Clegg via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   Sam Clegg via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Sam McCall via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Sam McCall via Phabricator via llvm-commits
• [llvm] b14e30f - [LLVM] refactor GenericSSAContext and its specializations   Sameer Sahasrabuddhe via llvm-commits
• [llvm] baa3386 - [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Sameer Sahasrabuddhe via llvm-commits
• [llvm] d0f7850 - Revert "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 7c760b2 - Restore "[GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR"   Sameer Sahasrabuddhe via llvm-commits
• [llvm] f7b0951 - [LLVM] Add missing verifier checks for convergence control   Sameer Sahasrabuddhe via llvm-commits
• [llvm] d9847cd - [GlobalISel] convergent intrinsics   Sameer Sahasrabuddhe via llvm-commits
• [PATCH] D156088: [AMDGPU] - Mark inverse.ballot as divergent   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156077: [AMDGPU] Perform basic folds on llvm.amdgcn.wave.reduce.umin/umax.   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156088: [AMDGPU] - Mark inverse.ballot as not convergent   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156288: [LLVM] refactor GenericSSAContext and its specializations   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156288: [LLVM] refactor GenericSSAContext and its specializations   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D154766: [GlobalISel] convergent intrinsics   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D154766: [GlobalISel] convergent intrinsics   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156522: [LLVM] move verification of convergence control to a class template   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D156129: Attributor: Try to propagate concrete denormal-fp-math{-f32}   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D154766: [GlobalISel] convergent intrinsics   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D154766: [GlobalISel] convergent intrinsics   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive   Sandeep via Phabricator via llvm-commits
• [PATCH] D152054: [OpenMP] Codegen support for thread_limit on target directive   Sandeep via Phabricator via llvm-commits
• [llvm] 6865fbd - [AArch64][SME] Use `fmov` instead of NEON `movi` for FP value.   Sander de Smalen via llvm-commits
• [llvm] 07d6502 - [AArch64][SME] NFC: Pass target feature on RUN line, instead of function attribute.   Sander de Smalen via llvm-commits
• [llvm] c809765 - [AArch64] NFC: Move fadda tests to separate file.   Sander de Smalen via llvm-commits
• [llvm] 57329ca - [AArch64] Ignore instructions not supported by CPU in AArch64SVESchedPseudoTest   Sander de Smalen via llvm-commits
• [PATCH] D155432: [AArch64][SME] Use `fmov` instead of NEON `movi` for FP value.   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156094: [AArch64] Ignore instructions not supported by CPU in AArch64SVESchedPseudoTest   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156109: [AArch64][SME] Create new interface for isFullSVEAvailable.   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D155708: [AArch64][NFC] Call the API getVScaleRange directly   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156094: [AArch64] Ignore instructions not supported by CPU in AArch64SVESchedPseudoTest   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156094: [AArch64] Ignore instructions not supported by CPU in AArch64SVESchedPseudoTest   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156109: [AArch64][SME] Create new interface for isFullSVEAvailable.   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156109: [AArch64][SME] Create new interface for isFullSVEAvailable.   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156520: [TII] NFCI: Simplify the interface for isTriviallyReMaterializable   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156520: [TII] NFCI: Simplify the interface for isTriviallyReMaterializable   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156520: [TII] NFCI: Simplify the interface for isTriviallyReMaterializable   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D156520: [TII] NFCI: Simplify the interface for isTriviallyReMaterializable   Sander de Smalen via Phabricator via llvm-commits
• [PATCH] D155884: [Attributor][AMDGPU] Improve indirect call support in closed modules   Scott Linder via Phabricator via llvm-commits
• [PATCH] D155881: [AMDGPU] Remove std::optional from VOPD::ComponentProps. NFC.   Scott Linder via Phabricator via llvm-commits
• [PATCH] D155884: [Attributor][AMDGPU] Improve indirect call support in closed modules   Scott Linder via Phabricator via llvm-commits
• [PATCH] D155881: [AMDGPU] Remove std::optional from VOPD::ComponentProps. NFC.   Scott Linder via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when __riscv_v not defined   Sean Cross via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when __riscv_v not defined   Sean Cross via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when __riscv_v not defined   Sean Cross via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when csr instructions aren't present   Sean Cross via Phabricator via llvm-commits
• [PATCH] D156642: libunwind: riscv: disable vector test when csr instructions aren't present   Sean Cross via Phabricator via llvm-commits
• [PATCH] D156025: ConstantFolding: Constant fold denormal inputs to canonicalize for IEEE   Serge Pavlov via Phabricator via llvm-commits
• [PATCH] D154317: [VE] Replace OperandMatchResultTy with ParseStatus (NFC)   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D152834: A new code layout algorithm for function reordering [2/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D152834: A new code layout algorithm for function reordering [2/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D154737: [BOLT] Add stale-related logging   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D154737: [BOLT] Add stale-related logging   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D154737: [BOLT] Add stale-related logging   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D152834: A new code layout algorithm for function reordering [2/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D155748: [BOLT] updates for stale hashing   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D153039: [BOLT] A new code layout algorithm for function reordering [3b/3]   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D156278: [BOLT] Fine-tuning hash computation for stale matching   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D155748: [BOLT] (Minor) Changes in stale inference   Sergey Pupyrev via Phabricator via llvm-commits
• [PATCH] D156313: [Flang][OpenMP] Improve support for `if` clause on combined constructs   Sergio Afonso via Phabricator via llvm-commits
• [llvm] 10068cd - [OpenMP] Introduce kernel environment   Shilei Tian via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D142569: [OpenMP] Introduce kernel environment   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D142569: [OpenMP] Introduce kernel environment   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D142569: [OpenMP] Introduce kernel environment   Shilei Tian via Phabricator via llvm-commits
• [llvm] 64d1954 - [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   Shivam Gupta via llvm-commits
• [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   Shivam Gupta via Phabricator via llvm-commits
• [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   Shivam Gupta via Phabricator via llvm-commits
• [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   Shivam Gupta via Phabricator via llvm-commits
• [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   Shivam Gupta via Phabricator via llvm-commits
• [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   Shivam Gupta via Phabricator via llvm-commits
• [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   Shivam Gupta via Phabricator via llvm-commits
• [PATCH] D154280: [LIT] Added an option to llvm-lit to emit the necessary test coverage data, divided per test case   Shivam Gupta via Phabricator via llvm-commits
• [PATCH] D156485: [PEI] Don't zero out noreg operands   Shivam Gupta via Phabricator via llvm-commits
• [PATCH] D156496: [libunwind] Fix build with -Wunused-function   Shoaib Meenai via Phabricator via llvm-commits
• [PATCH] D156496: [libunwind] Fix build with -Wunused-function   Shoaib Meenai via Phabricator via llvm-commits
• [PATCH] D156496: [libunwind] Fix build with -Wunused-function   Shoaib Meenai via Phabricator via llvm-commits
• [PATCH] D156496: [libunwind] Fix build with -Wunused-function   Shoaib Meenai via Phabricator via llvm-commits
• [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.   Shu-Chun Weng via Phabricator via llvm-commits
• [llvm] b66b176 - Emit DW_RLE_base_addressx + DW_RLE_offset_pairs   Shubham Sandeep Rastogi via llvm-commits
• [PATCH] D156166: Emit DW_RLE_base_addressx + DW_RLE_offset_pairs instead of DW_ELE_start_length in debug_rnglists section   Shubham Sandeep Rastogi via Phabricator via llvm-commits
• [PATCH] D156166: Emit DW_RLE_base_addressx + DW_RLE_offset_pairs instead of DW_ELE_start_length in debug_rnglists section   Shubham Sandeep Rastogi via Phabricator via llvm-commits
• [PATCH] D156166: Emit DW_RLE_base_addressx + DW_RLE_offset_pairs instead of DW_ELE_start_length in debug_rnglists section   Shubham Sandeep Rastogi via Phabricator via llvm-commits
• [llvm] 7bf9c5b - [JITLink] ppc64.h - fix MSVC "not all control paths return a value" warning. NFC.   Simon Pilgrim via llvm-commits
• [llvm] ce47e13 - [X86] Add reduce_add(ctpop(x)) 'count all bits in a vector' tests   Simon Pilgrim via llvm-commits
• [llvm] 454bea0 - [X86] combineConcatVectorOps - add concat(psadbw(x,y),psadbw(z,w)) -> psadbw(concat(x,z),concat(y,w)) handling   Simon Pilgrim via llvm-commits
• [llvm] 2773098 - [X86] combineConcatVectorOps - add basic concat(unpack(x,y),unpack(z,w)) -> unpack(concat(x,z),concat(y,w)) handling   Simon Pilgrim via llvm-commits
• [llvm] bcf728e - [X86] Add some basic concat(ctpop)/concat(ctlz)/concat(cttz) widening tests   Simon Pilgrim via llvm-commits
• [llvm] de3f7f0 - [X86] combineConcatVectorOps - add concat(ctpop)/concat(ctlz)/concat(cttz) handling   Simon Pilgrim via llvm-commits
• [llvm] 1e86b63 - [X86] fpclamptosat.ll - add nounwind to get rid of cfi noise   Simon Pilgrim via llvm-commits
• [llvm] 3d83912 - Revert rGfae7b98c221b5b28797f7b56b656b6b819d99f27 "[Support] Change SetVector's default template parameter to SmallVector<*, 0>"   Simon Pilgrim via llvm-commits
• [llvm] 94304d7 - [X86] isUpperSubvectorUndef - return the lower half directly.   Simon Pilgrim via llvm-commits
• [llvm] 4aa06ba - [X86] Cleanup vector-trunc-* test prefixes   Simon Pilgrim via llvm-commits
• [llvm] 33b00b4 - [SLP][X86] Add basic funnel-shift / rotation test coverage   Simon Pilgrim via llvm-commits
• [llvm] bbfdb8c - [CostModel][X86] Add scalar rotate-by-immediate costs   Simon Pilgrim via llvm-commits
• [llvm] 6dfa95d - [X86] X86DAGToDAGISel::matchAddressRecursively - use SelectionDAG::MaxRecursionDepth instead of hard coded constant. NFCI.   Simon Pilgrim via llvm-commits
• [llvm] 0c5e906 - [X86] getSingleConstraintMatchWeight - cleanup variable names. NFCI.   Simon Pilgrim via llvm-commits
• [PATCH] D155472: [DAG] Attempt shl narrowing in SimplifyDemandedBits (WIP)   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154841: [AIC] Fix the sext cost operands in tryToFPToSat   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D152926: [DAGCombine] Support truncated constants for fptosi.sat combining   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156240: [X86] AMD Genoa (znver4) LoopMicroOpBufferSize update   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156240: [X86] AMD Genoa (znver4) LoopMicroOpBufferSize update   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D153911: [cmake] Add -Wcast-qual to C flags if LLVM_ENABLE_WARNINGS is defined.   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156239: [X86] Support -march=arrowlake, arrowlake-s, lunarlake   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156318: Local: fix debug output of replaceDominatedUsesWith()   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple elements coming from the same DWORD/WORD super-element   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D152926: [DAGCombine] Support truncated constants for fptosi.sat combining   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154168: [X86] Split SDISel call lowering out to its own file   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156350: [X86] Allow pre-SSE41 targets to extract multiple v16i8 elements coming from the same DWORD/WORD super-element   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154805: [DAGCombiner] Fold IEEE `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D154804: [X86] Add tests for folding `fmul`/`fdiv` by Pow2 to `add`/`sub` of exp; NFC   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D155485: Retain all jump table range checks when using BTI.   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Simon Tatham via Phabricator via llvm-commits
• [PATCH] D138846: MC/DC in LLVM Source-Based Code Coverage: LLVM back-end and compiler-rt   Snehasish Kumar via Phabricator via llvm-commits
• [PATCH] D156460: [MemProf] Convert PGO raw profile to text format   Snehasish Kumar via Phabricator via llvm-commits
• [PATCH] D156460: [MemProf] Convert PGO raw profile to text format   Snehasish Kumar via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D156105: [AMDGPU][True16] Support generating differently-sized register transfers.   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D156106: [AMDGPU] Test codegen'ing True16 additions.   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D155881: [AMDGPU] Remove std::optional from VOPD::ComponentProps. NFC.   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D155881: [AMDGPU] Remove std::optional from VOPD::ComponentProps. NFC.   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D156099: [AMDGPU] Add True16 register classes.   Stanislav Mekhanoshin via Phabricator via llvm-commits
• [PATCH] D149995: [test] [MCJIT] Don't overwrite config.unsupported to False   Stefan Gränitz via Phabricator via llvm-commits
• [PATCH] D107087: Fix SectionMemoryManager deconstruction error with MSVC   Stefan Gränitz via Phabricator via llvm-commits
• [PATCH] D142660: [AIX] supporting -X options for llvm-ranlib in AIX OS   Stephen Peckham via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Steven Johnson via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Steven Johnson via Phabricator via llvm-commits
• [llvm] f5974e8 - [SymbolSize] Improve the performance of SymbolSize computation   Steven Wu via llvm-commits
• [PATCH] D156603: [SymbolSize] Improve the performance of SymbolSize computation   Steven Wu via Phabricator via llvm-commits
• [PATCH] D156603: [SymbolSize] Improve the performance of SymbolSize computation   Steven Wu via Phabricator via llvm-commits
• [PATCH] D156603: [SymbolSize] Improve the performance of SymbolSize computation   Steven Wu via Phabricator via llvm-commits
• [PATCH] D156603: [SymbolSize] Improve the performance of SymbolSize computation   Steven Wu via Phabricator via llvm-commits
• [PATCH] D154911: Enabling fstack_clash_protection for arm32 bit, thumb and thumb2 mode   Tamar Christina via Phabricator via llvm-commits
• [PATCH] D154911: Enabling fstack_clash_protection for arm32 bit, thumb and thumb2 mode   Tamar Christina via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] Do not miscompile, allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156445: [BPF] Avoid repeating MI->getOperand(NumDefs) x3   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156443: [BPF] Narrow some interfaces   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Emit better error on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Emit better error on missing line info   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156446: [BPF] Avoid crashing on missing callee DI   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156497: [BPF] report fatal error rather than miscompile   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Tamir Duberstein via Phabricator via llvm-commits
• [llvm] 5986559 - [SimplifyCFG] Guard branch folding by speculate blocks flag   Teresa Johnson via llvm-commits
• [llvm] ca31f82 - [MemProf] Convert PGO raw profile to text format   Teresa Johnson via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156194: [SimplifyCFG] Guard branch folding by speculate blocks flag   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156194: [SimplifyCFG] Guard branch folding by speculate blocks flag   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D151165: [ThinLTO] Make the cache key independent of the module identifier paths   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156460: [MemProf] Convert PGO raw profile to text format   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156460: [MemProf] Convert PGO raw profile to text format   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156460: [MemProf] Convert PGO raw profile to text format   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156460: [MemProf] Convert PGO raw profile to text format   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156525: [ThinLTO] Use module hash instead of module ID for cache key   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156525: [ThinLTO] Use module hash instead of module ID for cache key   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D156580: [FunctionImport] Reduce string duplication (NFC)   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155997: [Phase Ordering] Don't speculate in SimplifyCFG before PGO annotation   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D155659: [WPD][LLD] Add option to validate RTTI is enabled on all native types and prevent devirtualization on types with native RTTI   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE   Thomas Köppe via Phabricator via llvm-commits
• [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE   Thomas Köppe via Phabricator via llvm-commits
• [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE   Thomas Köppe via Phabricator via llvm-commits
• [PATCH] D153262: [llvm-objcopy] --set-section-flags: allow "large" to add SHF_X86_64_LARGE   Thomas Köppe via Phabricator via llvm-commits
• [PATCH] D155535: [WebAssembly][Objcopy] Write output section headers identically to inputs   Thomas Lively via Phabricator via llvm-commits
• [PATCH] D150880: [RFC, FileCheck, 3/4] Allow AP value for numeric expressions   Thomas Preud'homme via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Thorsten via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Thorsten via Phabricator via llvm-commits
• [PATCH] D156171: [AArch64][GlobalISel] G_FMINNUM and G_FMAXNUM vector lowering   Thorsten via Phabricator via llvm-commits
• [PATCH] D156614: [AArch64][GISel] Handling for G_VECREDUCE_FMIN and G_VECREDUCE_FMAX   Thorsten via Phabricator via llvm-commits
• [PATCH] D156518: Fix handling of medial hyphens in Unicode Names.   Timm Bäder via Phabricator via llvm-commits
• [llvm] ab72028 - Bump trunk version to 18.0.0git   Tobias Hieta via llvm-commits
• [lld] 4706251 - Clear release notes for 18.x   Tobias Hieta via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tom Honermann via Phabricator via llvm-commits
• [PATCH] D155402: [Bindings] Remove duplicate declaration   Tom Stellard via Phabricator via llvm-commits
• [PATCH] D156595: Workflows: Allow pull requests for .github directory   Tom Stellard via Phabricator via llvm-commits
• [PATCH] D156598: Support: Delete copy constructors for RedirectingFileSystem   Tom Stellard via Phabricator via llvm-commits
• [PATCH] D156599: [profiling] Move option declarations into headers   Tom Stellard via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [PATCH] D154130: [lit][clang] Avoid realpath on Windows due to MAX_PATH limitations   Tristan Labelle via Phabricator via llvm-commits
• [llvm] 8eeabf6 - [AArch64] Add funnel shift lowering for SelectionDAG   Tuan Chuong Goh via llvm-commits
• [PATCH] D155565: [AArch64] SelectionDAG Funnel Shift Lowering   Tuan Chuong Goh via Phabricator via llvm-commits
• [PATCH] D156332: [AMDGPU] Enable GCNRewritePartialRegUses pass by default.   Valery Pykhtin via Phabricator via llvm-commits
• [PATCH] D156332: [AMDGPU] Enable GCNRewritePartialRegUses pass by default.   Valery Pykhtin via Phabricator via llvm-commits
• [PATCH] D156332: [AMDGPU] Enable GCNRewritePartialRegUses pass by default.   Valery Pykhtin via Phabricator via llvm-commits
• [PATCH] D156332: [AMDGPU] Enable GCNRewritePartialRegUses pass by default.   Valery Pykhtin via Phabricator via llvm-commits
• [PATCH] D156304: [LoopAccessAnalysis] Add a const qualifier to getMaxSafeDepDistBytes()   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D156304: [LoopAccessAnalysis] Add a const qualifier to getMaxSafeDepDistBytes()   Vedant Paranjape via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156086: [lldb][NFC] Use MCInstrAnalysis when available in the disassembler plugin   Venkata Ramanaiah Nalamothu via Phabricator via llvm-commits
• [PATCH] D156179: [CMake] Support per-target compiler and linker flags   Vincent Lee via Phabricator via llvm-commits
• [compiler-rt] 2ba8a63 - [NFC] Add MprotectReadWrite   Vitaly Buka via llvm-commits
• [compiler-rt] 45f9f3f - [NFC] Remove redundant branch   Vitaly Buka via llvm-commits
• [compiler-rt] b986343 - [NFC] Remove Win specific Destroy from ThreadStart   Vitaly Buka via llvm-commits
• [compiler-rt] 2af8621 - Fix typo in b9863430   Vitaly Buka via llvm-commits
• [compiler-rt] 03399a9 - [test] Disable the test without pointer tagging   Vitaly Buka via llvm-commits
• [compiler-rt] 8ccc8b1 - [test] Added test for secondary allocator shadow release   Vitaly Buka via llvm-commits
• [compiler-rt] 2d0ac43 - [test][hwasan] Remove mistaken XFAIL from test   Vitaly Buka via llvm-commits
• [compiler-rt] 4e1b55a - [NFC][asan] Split AsanThread::ThreadStart   Vitaly Buka via llvm-commits
• [compiler-rt] fd16d46 - [NFC][asan] Replace start_routine_ and arg_ with opaque start_data_ field   Vitaly Buka via llvm-commits
• [compiler-rt] e00e0b6 - [asan] Block signals when starting threads   Vitaly Buka via llvm-commits
• [compiler-rt] b55f05a - [NFC][hwasan] Don't tag secondary allocations on free   Vitaly Buka via llvm-commits
• [llvm] 673a467 - [ConstantFold] Avoid creation of undesirable binop   Vitaly Buka via llvm-commits
• [compiler-rt] 63458d9 - [asan] Block signals only on platforms with implementation   Vitaly Buka via llvm-commits
• [llvm] a496c8b - Revert "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"   Vitaly Buka via llvm-commits
• [compiler-rt] f4aa7b5 - Revert "[Fuzzer] SetThreadName implementation for Windows"   Vitaly Buka via llvm-commits
• [compiler-rt] 404bc5c - [Asan] Loose call stack CHECK conditions   Vitaly Buka via llvm-commits
• [compiler-rt] 885275b - [Fuzzer] SetThreadName implementation for Windows   Vitaly Buka via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D150388: [CodeGen]Allow targets to use target specific COPY instructions for live range splitting   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D156164: [HACK] X86: Disable isCopyInstrImpl for undef subregister defs   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D156267: Enable hwasan-use-after-scope by default   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D156381: Revert "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D156346: CodeGen: Disable isCopyInstrImpl if there are implicit operands   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D155556: [GlobalISel] GIntrinsic subclass to represent intrinsics in Generic Machine IR   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D156381: Revert "[CodeGen]Allow targets to use target specific COPY instructions for live range splitting"   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D25846: scripts: Document existing problems with the symbolizer build script.   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D139827: [RISCV][Asan] Use dynamic shadow offset to make it work on different width of virtual-memory system.   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Vlad Serebrennikov via Phabricator via llvm-commits
• [PATCH] D154987: [lit] Implement PYTHON directive and config.prologue   Vlad Serebrennikov via Phabricator via llvm-commits
• [PATCH] D154852: [FuncSpec] Add Phi nodes to the InstCostVisitor.   Vlad Vereschaka via Phabricator via llvm-commits
• [PATCH] D155818: [CloneFunction][DebugInfo] Clone DISubprogram's local types   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D155818: [CloneFunction][DebugInfo] Clone DISubprogram's local types   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D155818: [CloneFunction][DebugInfo] Clone DISubprogram's local types   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D144006: [DebugMetadata][DwarfDebug] Support function-local types in lexical block scopes (4/7)   Vladislav Dzhidzhoev via Phabricator via llvm-commits
• [PATCH] D156018: [BOLT] Impl createRelocation for AArch64   Vladislav Khmelevsky via Phabricator via llvm-commits
• [PATCH] D156468: [lld-macho]Avoid crashing in predicate functions.   Vy Nguyen via Phabricator via llvm-commits
• [llvm] 9d4e8c0 - [XCOFF] Do not put MergeableCStrings in their own section   Wael Yehia via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155932: [RISCV] Add subclasses of Sched to simplify code   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156083: [RISCV] Add test case for D156082 to condops.ll   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156081: [RISCV] Add CZERO_EQZ/CZERO_NEZ to computeKnownBitsForTargetNode.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156082: [RISCV] Add CZERO_EQZ/CZERO_NEZ to ComputeNumSignBitsForTargetNode.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156200: [RISCV] Don't print a tab after mnemonics that don't have operands.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156214: [LLVM][RISCV] Check more extension dependencies   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155932: [RISCV] Add subclasses of Sched to simplify code   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155932: [RISCV] Add subclasses of Sched to simplify code   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155932: [RISCV] Add subclasses of Sched to simplify code   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156250: [RISCV] Handle seteq/setne conditions for CZERO_NEZ/CZERO_EQZ during isel.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156287: [RISCV] Add codegen support for bf16 vector   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155932: [RISCV] Add subclasses of Sched to simplify code   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155932: [RISCV] Add subclasses of Sched to simplify code   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155932: [RISCV] Add subclasses of Sched to simplify code   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156306: [RISCV][NFC] Change type of isOrdered to boolean   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156250: [RISCV] Handle seteq/setne conditions for CZERO_NEZ/CZERO_EQZ during isel.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D155654: [RISCV] Add SchedRead for Merge operands on MASK Pseudos   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156306: [RISCV][NFC] Change type of isOrdered to boolean   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156342: [RISCV] Improve policy emission for RVV pseudo instructions   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156319: [RISCV] Relax ta/ma policy into tu/mu in InsertVSETVLI   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156319: [RISCV] Relax ta/ma policy into tu/mu in InsertVSETVLI   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156306: [RISCV][NFC] Change type of isOrdered to boolean   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156306: [RISCV][NFC] Change type of isOrdered to boolean   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156429: [TableGen] Add new bang operator !format   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156432: [RISCV][NFC] Use !format to simplify some code   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156500: [RISCV] Fix typo in C9LeftShift   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156502: [TableGen][NFC] Group tokens with same attribute togather   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Wang Pengcheng via Phabricator via llvm-commits
• [PATCH] D156420: [TableGen] Add `!dump` and `dump`.   Wang Pengcheng via Phabricator via llvm-commits
• [llvm] cea980f - [RISCV] Add tests for (and (add x, c1), (lshr y, c2))   Weining Lu via llvm-commits
• [llvm] 595d5f3 - [DAGCombine] Canonicalize operands for visitANDLike   Weining Lu via llvm-commits
• [llvm] c100f35 - [LoongArch] Add tests for (and (add x, c1), (lshr y, c2))   Weining Lu via llvm-commits
• [llvm] 42dccf9 - [LoongArch] Implement isLegalAddImmediate   Weining Lu via llvm-commits
• [llvm] 0cceea9 - [LoongArch][NFC] Add tests for (X & -256) == 256 -> (X >> 8) == 1   Weining Lu via llvm-commits
• [llvm] 899aaff - [LoongArch] Implement isLegalICmpImmediate   Weining Lu via llvm-commits
• [llvm] 90e08c2 - [LoongArch] Add test case showing suboptimal codegen when loading unsigned char/short   Weining Lu via llvm-commits
• [llvm] 9c21f95 - [LoongArch] Implement isZextFree   Weining Lu via llvm-commits
• [llvm] d25c79d - [LoongArch] Support InlineAsm for LSX and LASX   Weining Lu via llvm-commits
• [llvm] 1a3da0b - [LoongArch] Add test case showing suboptimal codegen when zero extending   Weining Lu via llvm-commits
• [llvm] e7c9a99 - [LoongArch] Implement isSExtCheaperThanZExt   Weining Lu via llvm-commits
• [lld] 6084ee7 - [lld][ELF] Support LoongArch   Weining Lu via llvm-commits
• [llvm] 6223050 - [docs] Add llvm & clang release notes for LoongArch   Weining Lu via llvm-commits
• [llvm] 92c0611 - [LoongArch] Support -march=native and -mtune=   Weining Lu via llvm-commits
• [llvm] c56514f - Reland "[LoongArch] Support -march=native and -mtune="   Weining Lu via llvm-commits
• [PATCH] D156209: [indvars] Fix pointer IV expand type in genLoopLimit   Wenju He via Phabricator via llvm-commits
• [PATCH] D156209: [indvars] Fix pointer IV expand type in genLoopLimit   Wenju He via Phabricator via llvm-commits
• [PATCH] D156209: [indvars] Fix pointer IV expand type in genLoopLimit   Wenju He via Phabricator via llvm-commits
• [llvm] 66ba71d - [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   William Huang via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D156195: [docs] Add llvm & clang release notes for LoongArch   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D156195: [docs] Add llvm & clang release notes for LoongArch   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D155824: [LoongArch] Support -march=native and -mtune=   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D156293: [lld][ELF][test] Fix excessive output file size in loongarch-add-sub.s   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D156293: [lld][ELF][test] Fix excessive output file size in loongarch-add-sub.s   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   Xi Ruoyao via Phabricator via llvm-commits
• [PATCH] D138135: [lld][ELF] Support LoongArch   Xi Ruoyao via Phabricator via llvm-commits
• [PATCH] D156293: [lld][ELF][test] Fix excessive output file size in loongarch-add-sub.s   Xi Ruoyao via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   YAMAMOTO Takashi via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   YAMAMOTO Takashi via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   YAMAMOTO Takashi via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   YAMAMOTO Takashi via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   YAMAMOTO Takashi via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   YAMAMOTO Takashi via Phabricator via llvm-commits
• [PATCH] D156305: [lit] Fix errors on wasm32-wasi   YAMAMOTO Takashi via Phabricator via llvm-commits
• [PATCH] D155542: [lld][WebAssembly] Fix func reloc for internal GOT with extended-const   YAMAMOTO Takashi via Phabricator via llvm-commits
• [PATCH] D153107: [llvm-c] Add LLVMSetTailCallKind and LLVMGetTailCallKind   YAMAMOTO Takashi via Phabricator via llvm-commits
• [PATCH] D155986: [clang][AMDGPU]: Don't use byval for struct arguments in function ABI   Yaxun Liu via Phabricator via llvm-commits
• [PATCH] D156071: [HIP] Update compile options   Yaxun Liu via Phabricator via llvm-commits
• [PATCH] D156073: refactor hip_build.sh to facilitate local test   Yaxun Liu via Phabricator via llvm-commits
• [PATCH] D155929: [RISCV] Use the first element of source as the start value of reduction.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D155929: [RISCV] Use the first element of source as the start value of reduction.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D152793: [RISCV] Add MC layer support for Zicfiss.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156393: [RISCV] Fix getMaxPushPopReg like getLibCallID   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156407: [RISCV] Use max pushed register to get pushed register number.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156549: [RISCV] Implement shadow stack with Zicfiss.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D156016: [Support] Change MapVector's default template parameter to SmallVector<*, 0>   Yevgeny Rouban via Phabricator via llvm-commits
• [llvm] 92a11eb - [ConstraintElim] Add facts implied by MinMaxIntrinsic   Yingwei Zheng via llvm-commits
• [PATCH] D155412: [ConstraintElim] Add facts implied by MinMaxIntrinsic   Yingwei Zheng via Phabricator via llvm-commits
• [PATCH] D156227: [InstCombine] Add test cases from PR62898. NFC.   Yingwei Zheng via Phabricator via llvm-commits
• [PATCH] D156238: [InstCombine] Generalize foldICmpWithMinMax   Yingwei Zheng via Phabricator via llvm-commits
• [PATCH] D156390: [SDAG][RISCV] Avoid expanding is-power-of-2 pattern on riscv32/64 with zbb   Yingwei Zheng via Phabricator via llvm-commits
• [PATCH] D156390: [SDAG][RISCV] Avoid expanding is-power-of-2 pattern on riscv32/64 with zbb   Yingwei Zheng via Phabricator via llvm-commits
• [PATCH] D156390: [SDAG][RISCV] Avoid expanding is-power-of-2 pattern on riscv32/64 with zbb   Yingwei Zheng via Phabricator via llvm-commits
• [PATCH] D156390: [SDAG][RISCV] Avoid expanding is-power-of-2 pattern on riscv32/64 with zbb   Yingwei Zheng via Phabricator via llvm-commits
• [llvm] 6c412b6 - [BPF] Add a few new insns under cpu=v4   Yonghong Song via llvm-commits
• [PATCH] D144829: [BPF] Add a few new insns under cpu=v4   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D144829: [BPF] Add a few new insns under cpu=v4   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D144829: [BPF] Add a few new insns under cpu=v4   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D144829: [BPF] Add a few new insns under cpu=v4   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D144829: [BPF] Add a few new insns under cpu=v4   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D144829: [BPF] Add a few new insns under cpu=v4   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D153523: [BPF] Remove unused TableGen classes and multiclasses.   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D155894: [BPF] allow external calls   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D156136: [BPF] Clean up SelLowering   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D156085: [NVPTX] Expand select_cc on bfloat16 type   Yuanqiang Liu via Phabricator via llvm-commits
• [PATCH] D156085: [NVPTX] Expand select_cc on bfloat16 type   Yuanqiang Liu via Phabricator via llvm-commits
• [PATCH] D156342: [RISCV] Improve policy emission for RVV pseudo instructions   Yueh-Ting (eop) Chen via Phabricator via llvm-commits
• [PATCH] D156342: [RISCV] Improve policy emission for RVV pseudo instructions   Yueh-Ting (eop) Chen via Phabricator via llvm-commits
• [PATCH] D156342: [RISCV] Correct policy operand for RVV ISel patterns with merge operand as implicit_def (NFC)   Yueh-Ting (eop) Chen via Phabricator via llvm-commits
• [PATCH] D156342: [RISCV] Correct policy operand for RVV ISel patterns with merge operand as implicit_def (NFC)   Yueh-Ting (eop) Chen via Phabricator via llvm-commits
• [PATCH] D156611: [llvm-cov] Fix a bug about using `convert-for-testing` on multi-source object files   Yuhao Gu via Phabricator via llvm-commits
• [PATCH] D154589: MIPS: setMaxAtomicSizeInBitsSupported to 32 for MIPS I   YunQiang Su via Phabricator via llvm-commits
• [PATCH] D156283: MIPS: unwind, don't save/restore hi/lo for R6   YunQiang Su via Phabricator via llvm-commits
• [PATCH] D156283: MIPS: unwind, don't save/restore hi/lo for R6   YunQiang Su via Phabricator via llvm-commits
• [llvm] 3161db8 - [Remark] Overload `<<` for Remark, RemarkType and RemarkLocation.   Zain Jaffal via llvm-commits
• [llvm] 30d8e08 - [RemarkUtil] Refactor remarkutil tool to use a command registry.   Zain Jaffal via llvm-commits
• [PATCH] D155058: [Remark] Overload `<<` for Remark, RemarkType and RemarkLocation.   Zain Jaffal via Phabricator via llvm-commits
• [PATCH] D156416: [RemarkUtil] Refactor remarkutil tool to use a command registry.   Zain Jaffal via Phabricator via llvm-commits
• [PATCH] D156416: [RemarkUtil] Refactor remarkutil tool to use a command registry.   Zain Jaffal via Phabricator via llvm-commits
• [PATCH] D156515: [RemarkUtil] Refactor llvm-remarkutil to include size-diff   Zain Jaffal via Phabricator via llvm-commits
• [PATCH] D147373: [InstCombine] fold double reverses   Zhengyang Liu via Phabricator via llvm-commits
• [PATCH] D147373: [InstCombine] fold double reverses   Zhengyang Liu via Phabricator via llvm-commits
• [PATCH] D148854: [llvm-stress] Switch to a FuzzMutate driver   Zhenkai Weng via Phabricator via llvm-commits
• [PATCH] D156193: Fix thinLTO long compile time problem   Zhuohang Li via Phabricator via llvm-commits
• [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.   Zhuojia Shen via Phabricator via llvm-commits
• [PATCH] D152407: [AArch64] Merge LDRSWpre-LD[U]RSW pair into LDPSWpre.   Zhuojia Shen via Phabricator via llvm-commits
• [PATCH] D156487: [TextAPI] Make min-os deployment version optional in tbd-v5.   Zixu Wang via Phabricator via llvm-commits
• [PATCH] D155169: [CSKY] Add more patterns to select FNMUL   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D155424: [CSKY] Optimize conditional branches with floating point comparison   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D154588: [CSKY] Optimize implementation of intrinsic 'llvm.cttz.i32'   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D155169: [CSKY] Add more patterns to select FNMUL   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D156184: [OpenMP] Add the `ompx_attribute` clause for target directives   antoine moynault via Phabricator via llvm-commits
• [PATCH] D149091: [Object] Recognize ARM64EC binaries in COFFObjectFile::getMachine.   antoine moynault via Phabricator via llvm-commits
• [PATCH] D147740: [llvm-profdata] Refactoring Sample Profile Reader to increase FDO build speed using MD5 as key to Sample Profile map   antoine moynault via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D156087: [MLIR] Add index to side effect   donald chen via Phabricator via llvm-commits
• [PATCH] D155851: [llvm][nvptx] Add sm_90a   guray ozen via Phabricator via llvm-commits
• [PATCH] D155851: [llvm][nvptx] Add sm_90a   guray ozen via Phabricator via llvm-commits
• [PATCH] D156094: [AArch64] Ignore instructions not supported by CPU in AArch64SVESchedPseudoTest   harvin iriawan via Phabricator via llvm-commits
• [PATCH] D156117: [GVN] Freeze SrcVal if materializes load to a smaller type load   luxufan via Phabricator via llvm-commits
• [PATCH] D156117: [GVN] Freeze SrcVal if materializes load to a smaller type load   luxufan via Phabricator via llvm-commits
• [PATCH] D156510: [ValueTracking] Dereferenceable ret attributes implys noundef   luxufan via Phabricator via llvm-commits
• [PATCH] D153717: [SCCP] Replace valuestate.isConstant with helper isConstant   luxufan via Phabricator via llvm-commits
• [PATCH] D155623: [AArch64][NFC] Expand coverage of ReplaceWithVeclib testing using SLEEF vector library   mgabka via Phabricator via llvm-commits
• [PATCH] D156439: [TLI][AArch64] Extend ReplaceWithVeclib to replace vector FREM instructions for scalable vectors   mgabka via Phabricator via llvm-commits
• [PATCH] D156436: [llvm/OptTable] Print options without documentation   serge via Phabricator via llvm-commits
• [PATCH] D156202: [XCOFF] Don't prefix the name of a mergable string.   wael yehia via Phabricator via llvm-commits
• [PATCH] D156202: [XCOFF] Do not put MergeableCStrings in their own section   wael yehia via Phabricator via llvm-commits
• [PATCH] D156202: [XCOFF] Do not put MergeableCStrings in their own section   wael yehia via Phabricator via llvm-commits
• [PATCH] D156293: [lld][ELF][test] Fix excessive output file size in loongarch-add-sub.s   wanglei via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D154695: [Coroutines] Add an O(n) algorithm for computing the cross suspend point information.   witstorm via Phabricator via llvm-commits
• [PATCH] D154922: [BOLT] fix the endless loop of --iterative-guess   yinchengwu via Phabricator via llvm-commits
• [llvm] d7c6d05 - [TableGen][GlobalISel] Guarantee stable iteration order for stop-after-parse   via llvm-commits
• [llvm] 32e7d42 - [TableGen][GlobalISel] Fix warning when casting to `void *`   via llvm-commits
• [llvm] 2f1244c - [test][TableGen] Reenable pattern-parsing.td with reverse_iteration   via llvm-commits
• [llvm] b525430 - [GlobalISel] Fix GIM_CheckIsSameOperandIgnoreCopies   via llvm-commits
• [llvm] 3890a3b - [AMDGPU] Use SSAUpdater in PromoteAlloca   via llvm-commits
• [llvm] 3cd4afc - [AMDGPU] Allow vector access types in PromoteAllocaToVector   via llvm-commits
• [llvm] 620e61c - [RISCV] Match ext_vl+sra_vl/srl_vl+trunc_vector_vl to vnsra.wv/vnsrl.wv   via llvm-commits
• [llvm] d664541 - [RISCV] Remove zvk uimm constraints   via llvm-commits
• [llvm] 212d6aa - Revert "[LoongArch] Support -march=native and -mtune="   via llvm-commits
• [llvm] 2ee4d03 - [Verifier] definition subprograms cannot be nested within DICompositeType when enabling ODR.   via llvm-commits
• [llvm] e83b8a5 - [XCOFF] Enable available_externally linkage for functions.   via llvm-commits
• [llvm] fc12fd7 - [TableGen][GlobalISel] Fix unused variable warnings   via llvm-commits
• [llvm] 67005c8 - [AArch64][NFC] Call the API getVScaleRange directly   via llvm-commits
• [llvm] 5a95848 - [RISCV] Add subclasses of Sched to simplify code   via llvm-commits
• [llvm] ebaac2b - Revert "[AArch64][NFC] Call the API getVScaleRange directly"   via llvm-commits
• [llvm] 05aae08 - Reland [AArch64][NFC] Call the API getVScaleRange directly   via llvm-commits
• [llvm] 6a767fb - [AMDGPU] Precommit tests for D156308   via llvm-commits
• [llvm] a8aabba - [AMDGPU] Fix PromoteAlloca Subvector Stores for Single Elements   via llvm-commits
• [llvm] 30f2170 - Revert "[DebugInfo] Fix potential CU mismatch for attachRangesOrLowHighPC"   via llvm-commits
• [llvm] f2d307c - [DebugInfo] Remove the `cross-cu-inlining-2.ll` test case.   via llvm-commits
• [lld] ffe2b6f - [lld][ELF][test] Fix excessive output file size in loongarch-add-sub.s   via llvm-commits
• [llvm] fb4a836 - [NewGVN] Regenerate test checks (NFC)   via llvm-commits
• [llvm] e76ac80 - [llvm][orc] Consider other ELF init sections as well   via llvm-commits
• [llvm] a32023e - [RISCV][NFC] Change type of isOrdered to boolean   via llvm-commits
• [llvm] 25e1d61 - [RISCV] Correct policy operand for RVV ISel patterns with merge operand as implicit_def (NFC)   via llvm-commits
• [llvm] bc59faa - A new code layout algorithm for function reordering [2/3]   via llvm-commits
• [compiler-rt] 5252606 - [NFC][compiler-rt] Add missing space in libfuzzer -help docs   via llvm-commits
• [llvm] 3c0604b - [RISCV] Add support for XCVsimd extension in CV32E40P   via llvm-commits
• [llvm] bf2ad26 - [RISCV] Add support for XCVbi extension in CV32E40P   via llvm-commits
• [llvm] e4777dc - Revert "[RISCV] Add support for XCVbi extension in CV32E40P"   via llvm-commits
• [llvm] afb9c04 - [RISCV] Add support for XCVbi extension in CV32E40P   via llvm-commits
• [llvm] 6d55f6d - [SimplifyCFG] Regenerate test checks (NFC)   via llvm-commits