[PATCH] D156153: [RISCV] Generalize combineAddOfBooleanXor to support any boolean not just setcc.

[Alex Bradbury via Phabricator via llvm-commits]

asb accepted this revision.
asb added a comment.
This revision is now accepted and ready to land.

LGTM modulo tiny suggestion for comment.



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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:10551
+
+  // Xor input should be 0 or 1.
+  APInt Mask = APInt::getBitsSetFrom(VT.getSizeInBits(), 1);
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I'd prefer being a little more specific. e.g. "First xor input should be 0 or 1". 


Repository:
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  https://reviews.llvm.org/D156153/new/

https://reviews.llvm.org/D156153