[PATCH] D156097: [TableGen][RegisterInfoEmitter] Make entries of base register class tables human-readable.

Ivan Kosarev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jul 24 09:10:24 PDT 2023


kosarev added a comment.

> Does this improve compile time at all?

Removing a level of indirection shouldn't it make slower and switching from `uint8_t` to `uint16_t` shouldn't cause any noticeable difference in compile time I think. Generating the tables should take same amount of time or less with the new code as it now stops traversing the base classes as soon as we found one that contains the register.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D156097/new/

https://reviews.llvm.org/D156097



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