[PATCH] D156552: [MachineScheduler] Track physical register dependencies per-regunit

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
Herald added subscribers: bzcheeseman, StephenFan, kerbowa, pengfei, dmgreen, hiraditya, tpr, jvesely, MatzeB.
Herald added a project: All.
foad requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

Change the scheduler's physical register dependency tracking from
registers-and-their-aliases to regunits. This has a couple of advantages
when subregisters are used:

- The dependency tracking is more accurate and creates fewer useless edges in the dependency graph. An AMDGPU example, edited for clarity:

  SU(0): $vgpr1 = V_MOV_B32 $sgpr0 SU(1): $vgpr1 = V_ADDC_U32 0, $vgpr1 SU(2): $vgpr0_vgpr1 = FLAT_LOAD_DWORDX2 $vgpr0_vgpr1, 0, 0

  There is a data dependency on $vgpr1 from SU(0) to SU(1) and from SU(1) to SU(2). But the old dependency tracking code also added a useless edge from SU(0) to SU(2) because it thought that SU(0)'s def of $vgpr1 aliased with SU(2)'s use of $vgpr0_vgpr1.

- On targets like AMDGPU that make heavy use of subregisters, each register can have a huge number of aliases - it can be quadratic in the size of the largest defined register tuple. There is a much lower bound on the number of regunits per register, so iterating over regunits is faster than iterating over aliases.

The LLVM compile-time tracker shows a tiny overall improvement of 0.03%
on X86. I expect a larger compile-time improvement on targets like
AMDGPU.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D156552

Files:
  llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
  llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
  llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
  llvm/test/CodeGen/AMDGPU/load-global-i16.ll
  llvm/test/CodeGen/AMDGPU/schedule-physregdeps.mir
  llvm/test/CodeGen/Hexagon/autohvx/fp-to-int.ll
  llvm/test/CodeGen/Hexagon/autohvx/int-to-fp.ll
  llvm/test/CodeGen/Hexagon/autohvx/vmpy-parts.ll
  llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting-explicit-regs.ll
  llvm/test/CodeGen/SystemZ/inline-asm-fp-int-casting.ll
  llvm/test/CodeGen/Thumb2/mve-vldst4.ll
  llvm/test/CodeGen/Thumb2/mve-vst3.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D156552.545183.patch
Type: text/x-patch
Size: 34067 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230728/48bc1162/attachment.bin>