[llvm] b7408eb - [RISCV] Use x0 in vsetvli when avl is equal to vlmax.

[Jianjian GUAN via llvm-commits]

Author: Jianjian GUAN
Date: 2023-07-31T09:49:40+08:00
New Revision: b7408ebbb7d8c5cd2a4883cb3fceb70ecfb3d6f4

URL: https://github.com/llvm/llvm-project/commit/b7408ebbb7d8c5cd2a4883cb3fceb70ecfb3d6f4
DIFF: https://github.com/llvm/llvm-project/commit/b7408ebbb7d8c5cd2a4883cb3fceb70ecfb3d6f4.diff

LOG: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.

We could use x0 form in vsetvli when we already know the vlmax and avl is equal to it.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D156404

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index ddc42b4e13c401..9be755c9d68631 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -552,6 +552,12 @@ void RISCVDAGToDAGISel::selectVSETVLI(SDNode *Node) {
 
   SDValue VLOperand;
   unsigned Opcode = RISCV::PseudoVSETVLI;
+  if (auto *C = dyn_cast<ConstantSDNode>(Node->getOperand(1))) {
+    const unsigned VLEN = Subtarget->getRealMinVLen();
+    if (VLEN == Subtarget->getRealMaxVLen())
+      if (VLEN / RISCVVType::getSEWLMULRatio(SEW, VLMul) == C->getZExtValue())
+        VLMax = true;
+  }
   if (VLMax || isAllOnesConstant(Node->getOperand(1))) {
     VLOperand = CurDAG->getRegister(RISCV::X0, XLenVT);
     Opcode = RISCV::PseudoVSETVLIX0;

diff  --git a/llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll b/llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
index b7c0f84e01c8b5..11b164fbf51e83 100644
--- a/llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
@@ -1,8 +1,14 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
-; RUN:   -verify-machineinstrs | FileCheck %s
+; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,VLENUNKNOWN
 ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
-; RUN:   -verify-machineinstrs | FileCheck %s
+; RUN:   -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,VLENUNKNOWN
+; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
+; RUN:   -riscv-v-vector-bits-max=128 -verify-machineinstrs \
+; RUN:   | FileCheck %s --check-prefixes=CHECK,VLEN128
+; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
+; RUN:   -riscv-v-vector-bits-max=128 -verify-machineinstrs \
+; RUN:   | FileCheck %s --check-prefixes=CHECK,VLEN128
 
 declare iXLen @llvm.riscv.vsetvli.iXLen(iXLen, iXLen, iXLen)
 declare iXLen @llvm.riscv.vsetvlimax.iXLen(iXLen, iXLen)
@@ -135,3 +141,18 @@ define iXLen @test_vsetvli_negone_e8m1(iXLen %avl) nounwind {
   %vl = call iXLen @llvm.riscv.vsetvli.iXLen(iXLen -1, iXLen 0, iXLen 0)
   ret iXLen %vl
 }
+
+define iXLen @test_vsetvli_eqvlmax_e8m8(iXLen %avl) nounwind {
+; VLENUNKNOWN-LABEL: test_vsetvli_eqvlmax_e8m8:
+; VLENUNKNOWN:       # %bb.0:
+; VLENUNKNOWN-NEXT:    li a0, 128
+; VLENUNKNOWN-NEXT:    vsetvli a0, a0, e8, m8, ta, ma
+; VLENUNKNOWN-NEXT:    ret
+;
+; VLEN128-LABEL: test_vsetvli_eqvlmax_e8m8:
+; VLEN128:       # %bb.0:
+; VLEN128-NEXT:    vsetvli a0, zero, e8, m8, ta, ma
+; VLEN128-NEXT:    ret
+  %vl = call iXLen @llvm.riscv.vsetvli.iXLen(iXLen 128, iXLen 0, iXLen 3)
+  ret iXLen %vl
+}