The Week Of Monday 26 February 2024 Archives by date

• Messages sorted by: [ thread ] [ subject ] [ author ]
• More info on this list...

Starting: Mon Feb 26 00:00:15 PST 2024
Ending: Sun Mar 3 23:59:50 PST 2024
Messages: 5245

• [llvm] [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (PR #82747)   via llvm-commits
• [llvm] [RISCV][NFC] Use sub to construct RVV registers without V0 (PR #82962)   Luke Lau via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Wang Pengcheng via llvm-commits
• [llvm] 4216a30 - [RISCV][NFC] Use sub to construct RVV registers without V0 (#82962)   via llvm-commits
• [llvm] [RISCV][NFC] Use sub to construct RVV registers without V0 (PR #82962)   Wang Pengcheng via llvm-commits
• [llvm] [AArch64] Disable FastISel/GlobalISel for ZT0 state (PR #82768)   David Green via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)   David Green via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   James Henderson via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Qiu Chaofan via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   via llvm-commits
• [llvm] [PowerPC] Check value uses in ValueBit tracking (PR #66040)   Qiu Chaofan via llvm-commits
• [llvm] [PowerPC] Check value uses in ValueBit tracking (PR #66040)   Qiu Chaofan via llvm-commits
• [llvm] e510fc7 - [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (#82627)   via llvm-commits
• [llvm] [VP][RISCV] Introduce vp.lrint/llrint and RISC-V support. (PR #82627)   Yeting Kuo via llvm-commits
• [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)   James Henderson via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Luke Lau via llvm-commits
• [polly] [polly] Add polly-debug flag to print debug info from all parts of polly (PR #78549)   Karthika Devi C via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Add support for determining constness of more expressions. (PR #82617)   Clement Courbet via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Wang Pengcheng via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Add support for determining constness of more expressions. (PR #82617)   Clement Courbet via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Brendan Sweeney via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Kito Cheng via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Add support for determining constness of more expressions. (PR #82617)   Clement Courbet via llvm-commits
• [llvm] [LTO] Set default Darwin CPU to apple-a7 for AArch64 (PR #81540)   Florian Hahn via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Wang Pengcheng via llvm-commits
• [llvm] [LV] Removing option that is no longer needed after recent updates to loop interleaving algorithm (PR #82955)   Florian Hahn via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Wang Pengcheng via llvm-commits
• [llvm] [Tests][LoopDistribute] Re-adding target triple in a test that was removed earlier to fix build errors (PR #82954)   Florian Hahn via llvm-commits
• [llvm] [Tests][LoopDistribute] Re-adding target triple in a test that was removed earlier to fix build errors (PR #82954)   Florian Hahn via llvm-commits
• [llvm] 6067711 - [RemoveDIs] Fix DPLabel crash reported in #82854   Orlando Cazalet-Hyams via llvm-commits
• [llvm] 3356818 - Reapply [RemoveDIs] Enable DPLabels conversion [3b/3] (#82639)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Nick Anderson via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Brandon Wu via llvm-commits
• [llvm] [ARM] Update IsRestored for LR based on all returns (PR #82745)   via llvm-commits
• [llvm] [RISCV][CostModel] Updates reduction and shuffle cost (PR #77342)   Shih-Po Hung via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [llvm] [VPlan] Add VPComputeVFxUFRecipe, use for type inference (PR #78309)   Florian Hahn via llvm-commits
• [llvm] [llvm-objcopy] Improve help messages (PR #82830)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Improve help messages (PR #82830)   James Henderson via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [compiler-rt] [llvm] A copy of https://github.com/llvm/llvm-project/pull/66825. Actually this is a superset (a copy plus the thinlto-import change) (PR #80761)   Mingming Liu via llvm-commits
• [llvm] [AArch64][SVE]Add error message in the AsmParser for SVEPattern (PR #82668)   via llvm-commits
• [llvm] [GlobalISel] Make the Combiner insert G_FREEZE when converting G_SELECT to binary operations. (PR #82733)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Fix insert_subvector with fixed vector type creating invalid node (PR #82975)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fix insert_subvector with fixed vector type creating invalid node (PR #82975)   via llvm-commits
• [llvm] [AMDGPU] Refactor unit test. NFC (PR #82976)   Diana Picus via llvm-commits
• [llvm] [Transforms] Let amdgcn take advantage of sin(-x) --> -sin(x) (PR #79700)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Refactor unit test. NFC (PR #82976)   via llvm-commits
• [llvm] [AMDGPU] Refactor unit test. NFC (PR #82976)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Refactor unit test. NFC (PR #82976)   Matt Arsenault via llvm-commits
• [llvm] [RemoveDIs] Add iterator-taking constructors and Create methods (PR #82778)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Add iterator-taking constructors and Create methods (PR #82778)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Add iterator-taking constructors and Create methods (PR #82778)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Add iterator-taking constructors and Create methods (PR #82778)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AArch64][SVE]Add error message in the AsmParser for SVEPattern (PR #82668)   Maciej Gabka via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)   David Green via llvm-commits
• [llvm] [AMDGPU] Refactor unit test. NFC (PR #82976)   Diana Picus via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Graham Hunter via llvm-commits
• [llvm] [llvm][CodeGen] Add ValueType v3i1. [NFCI] (PR #82338)   Francesco Petrogalli via llvm-commits
• [llvm] [llvm][CodeGen] Add ValueType v3i1. [NFCI] (PR #82338)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SVE]Add error message in the AsmParser for SVEPattern (PR #82668)   Momchil Velikov via llvm-commits
• [llvm] Add support for the 'freeze' instruction (PR #82979)   Vyacheslav Levytskyy via llvm-commits
• [llvm] Add support for the 'freeze' instruction (PR #82979)   Vyacheslav Levytskyy via llvm-commits
• [llvm] Add support for the 'freeze' instruction (PR #82979)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)   David Green via llvm-commits
• [llvm] [RISCV] Fix insert_subvector with fixed vector type creating invalid node (PR #82975)   Wang Pengcheng via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   Simon Pilgrim via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Jay Foad via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Jay Foad via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Matt Arsenault via llvm-commits
• [llvm] [libc][NFC] Delete unused file (PR #82980)   Guillaume Chatelet via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing (PR #82981)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [libc][NFC] Delete unused file (PR #82980)   Guillaume Chatelet via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing (PR #82981)   via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (PR #82981)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (PR #82981)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs][DebugInfo][IR] Add parsing for non-intrinsic debug values (PR #79818)   Jeremy Morse via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement only for max, not min (PR #81505)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement only for max, not min (PR #81505)   Matt Arsenault via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (PR #82981)   Jeremy Morse via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (PR #82981)   Jeremy Morse via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (PR #82981)   Jeremy Morse via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (PR #82981)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Thomas Symalla via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Thomas Symalla via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)   Matt Arsenault via llvm-commits
• [llvm] [llvm-ar] Use COFF archive format for COFF targets. (PR #82642)   via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (PR #82981)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   Simon Pilgrim via llvm-commits
• [llvm] 53697a5 - [AMDGPU] Refactor unit test. NFC (#82976)   via llvm-commits
• [llvm] [AMDGPU] Refactor unit test. NFC (PR #82976)   Diana Picus via llvm-commits
• [libc] [llvm] [LLVM] Add 'LLVM_EXTRA_RUNTIME_TARGETS' to append to default list (PR #82513)   Jan Patrick Lehr via llvm-commits
• [llvm] [SelectionDAG] Support sign tracking trough `{S|U}INT_TO_FP` (PR #82808)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Thomas Symalla via llvm-commits
• [llvm] [SelectionDAG] Remove pointer from MMO for VP strided load/store. (PR #82667)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Sander de Smalen via llvm-commits
• [llvm] [TableGen] Extend direct lookup to instruction values in generic tables. (PR #80486)   Piotr Sobczak via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][LoongArch] Improve loongarch_lasx_xvpermi_q instrinsic (PR #82984)   via llvm-commits
• [llvm] [llvm][LoongArch] Improve loongarch_lasx_xvpermi_q instrinsic (PR #82984)   via llvm-commits
• [llvm] bb87c91 - [AArch64][SVE]Add error message in the AsmParser for SVEPattern (#82668)   via llvm-commits
• [llvm] [AArch64][SVE]Add error message in the AsmParser for SVEPattern (PR #82668)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)   via llvm-commits
• [llvm] b4b4904 - [RISCV] Fix insert_subvector with fixed vector type creating invalid node (#82975)   via llvm-commits
• [llvm] [RISCV] Fix insert_subvector with fixed vector type creating invalid node (PR #82975)   Luke Lau via llvm-commits
• [llvm] [AArch64][SVE]Add error message in the AsmParser for SVEPattern (PR #82668)   Momchil Velikov via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)   David Green via llvm-commits
• [llvm] [AArch64] Disable FastISel/GlobalISel for ZT0 state (PR #82768)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Disable FastISel/GlobalISel for ZT0 state (PR #82768)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)   David Green via llvm-commits
• [llvm] [ARM] Update IsRestored for LR based on all returns (PR #82745)   Florian Hahn via llvm-commits
• [llvm] Non functional change. Initialize var EnumVal to 0. (PR #82987)   via llvm-commits
• [llvm] [RemoveDIs] Add iterator-taking constructors and Create methods (PR #82778)   Jeremy Morse via llvm-commits
• [llvm] 954a048 - [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (#82981)   via llvm-commits
• [llvm] [RemoveDIs] Fix SimplifyCFG behaviour to match existing behaviour (PR #82981)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] Non functional change. Initialize var EnumVal to 0. (PR #82987)   via llvm-commits
• [llvm] [SelectionDAG] Support sign tracking trough `{S|U}INT_TO_FP` (PR #82808)   Jay Foad via llvm-commits
• [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)   Jay Foad via llvm-commits
• [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)   Jay Foad via llvm-commits
• [llvm] [RFC][TableGen] Restructure TableGen Source (PR #80847)   Pierre van Houtryve via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_LOAD for v4s8 Vector (PR #82989)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_LOAD for v4s8 Vector (PR #82989)   via llvm-commits
• [llvm] [RISCV][MC] Implement ISA mapping symbols (PR #67541)   Joe Faulls via llvm-commits
• [llvm] [RISCV][MC] Implement ISA mapping symbols (PR #67541)   Joe Faulls via llvm-commits
• [llvm] [RISCV][MC] Implement ISA mapping symbols (PR #67541)   Joe Faulls via llvm-commits
• [llvm] [RemoveDIs][DebugInfo][IR] Add parsing for non-intrinsic debug values (PR #79818)   Stephen Tozer via llvm-commits
• [llvm] [SelectionDAG] Support sign tracking trough `{S|U}INT_TO_FP` (PR #82808)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Support sign tracking through `{S|U}INT_TO_FP` (PR #82808)   Simon Pilgrim via llvm-commits
• [llvm] 3d084e3 - [RISCV] Add tests for fixed length concat_vector. NFC   Luke Lau via llvm-commits
• [llvm] [llvm-config] Fix libLLVM.dylib detection (PR #82990)   Tim Neumann via llvm-commits
• [llvm] [CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (PR #77770)   via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)   Pierre van Houtryve via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Florian Hahn via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Florian Hahn via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Florian Hahn via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   Jay Foad via llvm-commits
• [llvm] 2823340 - [CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (#77770)   via llvm-commits
• [llvm] [CodeGen] [ARM] Make RISC-V Init Undef Pass Target Independent and add support for the ARM Architecture. (PR #77770)   Jack Styles via llvm-commits
• [clang] [llvm] [LLVM][TypeSize] Remove default constructor. (PR #82810)   Paul Walker via llvm-commits
• [compiler-rt] [NFC][hwasan] Move sanitizer_placement_new.h from header files into source files (PR #82993)   via llvm-commits
• [compiler-rt] [NFC][hwasan] Move sanitizer_placement_new.h from header files into source files (PR #82993)   via llvm-commits
• [llvm] Missing AArch64ISD::BICi handling (PR #76644)   Simon Pilgrim via llvm-commits
• [llvm] Missing AArch64ISD::BICi handling (PR #76644)   Simon Pilgrim via llvm-commits
• [llvm] Missing AArch64ISD::BICi handling (PR #76644)   Simon Pilgrim via llvm-commits
• [llvm] Missing AArch64ISD::BICi handling (PR #76644)   Simon Pilgrim via llvm-commits
• [llvm] Missing AArch64ISD::BICi handling (PR #76644)   Simon Pilgrim via llvm-commits
• [llvm] 8779cf6 - Pre-commit test showing bug #80287   Oliver Stannard via llvm-commits
• [llvm] [ARM] Update IsRestored for LR based on all returns (PR #82745)   via llvm-commits
• [llvm] [ARM] Update IsRestored for LR based on all returns (PR #82745)   via llvm-commits
• [llvm] [ARM] Update IsRestored for LR based on all returns (PR #82745)   via llvm-commits
• [llvm] 749384c - [ARM] Update IsRestored for LR based on all returns (#82745)   via llvm-commits
• [llvm] [ARM] Update IsRestored for LR based on all returns (PR #82745)   via llvm-commits
• [llvm] [libc][NFC] Delete unused file (PR #82980)   Clement Courbet via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   Simon Pilgrim via llvm-commits
• [llvm] Missing AArch64ISD::BICi handling (PR #76644)   David Green via llvm-commits
• [llvm] Non functional change. Initialize var EnumVal to 0. (PR #82987)   Phoebe Wang via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   Ivan Kosarev via llvm-commits
• [llvm] [RemoveDIs] Add iterator-taking constructors and Create methods (PR #82778)   Jeremy Morse via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [RemoveDIs] Add iterator-taking constructors and Create methods (PR #82778)   Jeremy Morse via llvm-commits
• [llvm] [RemoveDIs] Add iterator-taking constructors and Create methods (PR #82778)   Jeremy Morse via llvm-commits
• [llvm] [RemoveDIs] Add iterator-taking constructors and Create methods (PR #82778)   Jeremy Morse via llvm-commits
• [llvm] 76dd4bc - [RemoveDIs] Add iterator-taking constructors and Create methods (#82778)   via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   Jay Foad via llvm-commits
• [llvm] [MC/DC] Refactor: Isolate the final result out of TestVectors (PR #82282)   NAKAMURA Takumi via llvm-commits
• [llvm] [MC/DC] Refactor: Isolate the final result out of TestVectors (PR #82282)   NAKAMURA Takumi via llvm-commits
• [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Don't always seperate conditions in `(br (and/or cond0, cond1))` into seperate branches (PR #81689)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   Ivan Kosarev via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   via llvm-commits
• [llvm] 433f8e7 - MachineSSAUpdater: use all vreg attributes instead of reg class only (#78431)   via llvm-commits
• [llvm] MachineSSAUpdater: use all vreg attributes instead of reg class only (PR #78431)   Petar Avramovic via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)   NAKAMURA Takumi via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] Introduce orderign parameter to atomic intrinsics and introduce new llvm.amdgcn.image.atomic.load intrinsic. (PR #73613)   via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [llvm] 60e7ae3 - [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (#82992)   via llvm-commits
• [llvm] [AMDGPU] Only try DecoderTables for the current subtarget. NFCI. (PR #82992)   Jay Foad via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Jay Foad via llvm-commits
• [llvm] [NFC][RemoveDIs] Have CreateNeg only accept iterators, template for other patches (PR #82999)   Jeremy Morse via llvm-commits
• [llvm] [NFC][RemoveDIs] Have CreateNeg only accept iterators, template for other patches (PR #82999)   via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] [NFC][RemoveDIs] Have CreateNeg only accept iterators, template for other patches (PR #82999)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-merge-objc-categories) (PR #82928)   via llvm-commits
• [llvm] [NFC][RemoveDIs] Have CreateNeg only accept iterators, template for other patches (PR #82999)   Jeremy Morse via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [compiler-rt] [NFC][hwasan] Move sanitizer_placement_new.h from header files into source files (PR #82993)   via llvm-commits
• [compiler-rt] [NFC][hwasan] Do not include sanitizer_placement_new.h in header files (PR #82993)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [clang] [flang] [llvm] [Docs] Allow building man pages without myst_parser (PR #82402)   Aaron Ballman via llvm-commits
• [llvm] d41615e - [AMDGPU] Rename a DS class template argument. NFC.   Jay Foad via llvm-commits
• [llvm] 9c5ca6b - Revert "Enable JumpTableToSwitch pass by default (#82546)"   David Spickett via llvm-commits
• [llvm] [SPIR-V]: add SPIR-V extension: SPV_INTEL_variable_length_array (PR #83002)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [RemoveDIs] Use iterators for moving PHIs in loop-unroll-and-jam (PR #83003)   Jeremy Morse via llvm-commits
• [llvm] [RemoveDIs] Use iterators for moving PHIs in loop-unroll-and-jam (PR #83003)   via llvm-commits
• [llvm] Enable JumpTableToSwitch pass by default (PR #82546)   David Spickett via llvm-commits
• [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Pierre van Houtryve via llvm-commits
• [llvm] [mlir][bazel] Define MLIR_CUDA_CONVERSIONS_ENABLED in GPU targets. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Matt Arsenault via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   Matt Arsenault via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Pierre van Houtryve via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Pierre van Houtryve via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V]: add SPIR-V extension: SPV_INTEL_variable_length_array (PR #83002)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V]: add SPIR-V extension: SPV_INTEL_variable_length_array (PR #83002)   via llvm-commits
• [llvm] [mlir][bazel] Remove defines of obsolete MLIR_GPU_TO_CUBIN_PASS_ENABLE. (PR #83006)   Ingo Müller via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [RemoveDIs] Use iterators for moving PHIs in loop-unroll-and-jam (PR #83003)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Matt Arsenault via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)   Jacek Caban via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Thorsten Schütt via llvm-commits
• [llvm] [AArch64] Disable FastISel/GlobalISel for ZT0 state (PR #82768)   Kerry McLaughlin via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Thorsten Schütt via llvm-commits
• [llvm] [AMDGPU] Reduce duplication in DS Real instruction definitions. NFC. (PR #83007)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Reduce duplication in DS Real instruction definitions. NFC. (PR #83007)   via llvm-commits
• [llvm] [AMDGPU] Reduce duplication in DS Real instruction definitions. NFC. (PR #83007)   Matt Arsenault via llvm-commits
• [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)   Jacek Caban via llvm-commits
• [llvm] [RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (PR #82716)   Matt Arsenault via llvm-commits
• [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)   Jacek Caban via llvm-commits
• [llvm] ce78dfa - [gn build] Port 28233408a2c8   LLVM GN Syncbot via llvm-commits
• [llvm] 62e88bc - [gn build] Port 440b1743ee0c   LLVM GN Syncbot via llvm-commits
• [llvm] f887fad - [gn build] Port 8c5e9cf73713   LLVM GN Syncbot via llvm-commits
• [llvm] [AMDGPU] Reduce duplication in DS Real instruction definitions. NFC. (PR #83007)   Ivan Kosarev via llvm-commits
• [llvm] [libc][NFC] Delete unused file (PR #82980)   Guillaume Chatelet via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] 83feb84 - [AMDGPU] Reduce duplication in DS Real instruction definitions. NFC. (#83007)   via llvm-commits
• [llvm] [AMDGPU] Reduce duplication in DS Real instruction definitions. NFC. (PR #83007)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] Add a getTargetLowering method to IRTranslator. NFC (PR #83009)   David Green via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Connor Sughrue via llvm-commits
• [llvm] [GlobalISel] Add a getTargetLowering method to IRTranslator. NFC (PR #83009)   Matt Arsenault via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Thorsten Schütt via llvm-commits
• [llvm] [AMDGPU] Clear dbg info on CFG intrinsic due to incorrect behaviour in gdb. (PR #83010)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] Clear dbg info on CFG intrinsic due to incorrect behaviour in gdb. (PR #83010)   via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Kai Nacke via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Thorsten Schütt via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Alexandre Ganea via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Alexandre Ganea via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Alexandre Ganea via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Erich Keane via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Erich Keane via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Erich Keane via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Erich Keane via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Erich Keane via llvm-commits
• [llvm] [llvm][SimplifyLibCalls] Add option 'AllowMemcmpToBcmpTransform' (PR #82304)   Guillaume Chatelet via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Janek van Oirschot via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)   Paul T Robinson via llvm-commits
• [llvm] [RFC][TableGen] Restructure TableGen Source (PR #80847)   Matt Arsenault via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] 969d7ec - [llvm][CodeGen] Add ValueType v3i1. [NFCI] (#82338)   via llvm-commits
• [llvm] [llvm][CodeGen] Add ValueType v3i1. [NFCI] (PR #82338)   Francesco Petrogalli via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] [SPIR-V] Memeory leak fix in SPIRVEmitIntrinsics (PR #83012)   via llvm-commits
• [llvm] [SPIR-V] Memeory leak fix in SPIRVEmitIntrinsics (PR #83012)   via llvm-commits
• [llvm] [SPIR-V] Memeory leak fix in SPIRVEmitIntrinsics (PR #83012)   via llvm-commits
• [llvm] [SPIR-V] Memeory leak fix in SPIRVEmitIntrinsics (PR #83012)   via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V]: Memeory leak fix in SPIRVEmitIntrinsics (PR #83012)   via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83012)   via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Use unaligned store/load to move AVX registers onto stack for `insertelement` (PR #82130)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83012)   via llvm-commits
• [llvm] [Support] Report EISDIR when opening a directory (PR #79880)   via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Paul T Robinson via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83015)   via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83015)   via llvm-commits
• [llvm] [infra] Add git to Linux container (PR #82687)   Natalie Chouinard via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83015)   via llvm-commits
• [llvm] [infra] Add git to Linux container (PR #82687)   Natalie Chouinard via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Janek van Oirschot via llvm-commits
• [llvm] [BOLT] Fix runtime/instrument-wrong-target.s test (PR #82858)   Alexander Yermolovich via llvm-commits
• [llvm] 1253e53 - [RemoveDIs] Use iterators for moving PHIs in loop-unroll-and-jam (#83003)   via llvm-commits
• [llvm] [RemoveDIs] Use iterators for moving PHIs in loop-unroll-and-jam (PR #83003)   Jeremy Morse via llvm-commits
• [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)   via llvm-commits
• [llvm] [SPIR-V]: add SPIR-V extension: SPV_INTEL_variable_length_array (PR #83002)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Connor Sughrue via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Connor Sughrue via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Janek van Oirschot via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)   Chris B via llvm-commits
• [llvm] [docs] Remove the Packaging "Tips" which seems to be about pre-cmake ./configure (PR #82958)   Chris B via llvm-commits
• [llvm] [SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (PR #83017)   David Green via llvm-commits
• [llvm] [SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (PR #83017)   via llvm-commits
• [llvm] [SPIRV] Add vector reduction instructions (PR #82786)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (PR #82475)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (PR #82475)   Ulrich Weigand via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Christudasan Devadasan via llvm-commits
• [llvm] [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (PR #79221)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (PR #79221)   Ulrich Weigand via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   via llvm-commits
• [llvm] [SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (PR #83017)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Add a getTargetLowering method to IRTranslator. NFC (PR #83009)   David Green via llvm-commits
• [llvm] [RISCV] Use getVectorIdxConstant in RISCVISelLowering.cpp. NFC (PR #83019)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use getVectorIdxConstant in RISCVISelLowering.cpp. NFC (PR #83019)   via llvm-commits
• [llvm] [dsymutil][llvm-dwarfutil] Add command line option --deterministic. (PR #83020)   Alexey Lapshin via llvm-commits
• [llvm] [dsymutil][llvm-dwarfutil] Add command line option --deterministic. (PR #83020)   via llvm-commits
• [llvm] [SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (PR #83017)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Connor Sughrue via llvm-commits
• [llvm] [SystemZ] Use VT (not ArgVT) for SlotVT in LowerCall(). (PR #82475)   via llvm-commits
• [llvm] [SystemZ] Require D12 for i128 accesses in isLegalAddressingMode() (PR #79221)   via llvm-commits
• [llvm] [GlobalISel] Make the Combiner insert G_FREEZE when converting G_SELECT to binary operations. (PR #82733)   Owen Anderson via llvm-commits
• [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)   Matt Arsenault via llvm-commits
• [llvm] ebb64d8 - [GlobalISel] Make the Combiner insert G_FREEZE when converting G_SELECT to binary operations. (#82733)   via llvm-commits
• [llvm] [GlobalISel] Make the Combiner insert G_FREEZE when converting G_SELECT to binary operations. (PR #82733)   Owen Anderson via llvm-commits
• [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)   Nuno Lopes via llvm-commits
• [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)   Nuno Lopes via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)   Valery Pykhtin via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Momchil Velikov via llvm-commits
• [compiler-rt] [llvm] [nfc][compiler-rt]Replace Type::getInt8PtrTy with PointerType::getUnqual as a clean-up (PR #82434)   Paulo Matos via llvm-commits
• [llvm] 82acec1 - [HLSL] Implementation of dot intrinsic (#81190)   via llvm-commits
• [clang] [llvm] [HLSL] Implementation of dot intrinsic (PR #81190)   Chris B via llvm-commits
• [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)   via llvm-commits
• [llvm] [workflows] Delete user branches that are too long (PR #82845)   Jon Roelofs via llvm-commits
• [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)   Nuno Lopes via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   Jacek Caban via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   Alan Phipps via llvm-commits
• [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)   Antonio Frighetto via llvm-commits
• [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)   Antonio Frighetto via llvm-commits
• [llvm] [AMDGPU] Clear dbg info on CFG intrinsic due to incorrect behaviour in gdb. (PR #83010)   Emma Pilkington via llvm-commits
• [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)   Nuno Lopes via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)   Stephen Tozer via llvm-commits
• [llvm] [llvm][docs] Update the Python version requirement to 3.8.0 for lit testing on Windows with substitute (virtual) drives. (PR #81663)   Aaron Ballman via llvm-commits
• [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)   Stephen Tozer via llvm-commits
• [llvm] [workflows] Delete user branches that are too long (PR #82845)   Tom Stellard via llvm-commits
• [llvm] [llvm][docs] Update the Python version requirement to 3.8.0 for lit testing on Windows with substitute (virtual) drives. (PR #81663)   Shafik Yaghmour via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   Jacek Caban via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   Jacek Caban via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Jason Eckhardt via llvm-commits
• [llvm] [workflows] Delete user branches that are too long (PR #82845)   Tobias Hieta via llvm-commits
• [llvm] 1d2eced - [llvm][docs] Update the Python version requirement to 3.8.0 for lit testing on Windows with substitute (virtual) drives. (#81663)   via llvm-commits
• [llvm] [llvm][docs] Update the Python version requirement to 3.8.0 for lit testing on Windows with substitute (virtual) drives. (PR #81663)   Tom Honermann via llvm-commits
• [llvm] [AMDGPU] Clear dbg info on CFG intrinsic due to incorrect behaviour in gdb. (PR #83010)   Valery Pykhtin via llvm-commits
• [llvm] [llvm-objcopy] Improve help messages (PR #82830)   Ilia Kuklin via llvm-commits
• [llvm] [AMDGPU] Fix incorrect stepping in gdb for amdgcn.end.cf intrinsic. (PR #83010)   Valery Pykhtin via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   via llvm-commits
• [llvm] [llvm-objcopy] Improve help messages (PR #82830)   Ilia Kuklin via llvm-commits
• [llvm] [AMDGPU] Fix incorrect stepping in gdb for amdgcn.end.cf intrinsic. (PR #83010)   Valery Pykhtin via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   via llvm-commits
• [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Jason Eckhardt via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --set-symbol-visibility (PR #80872)   Ilia Kuklin via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --set-symbol-visibility (PR #80872)   Ilia Kuklin via llvm-commits
• [llvm] [llvm-objcopy] Add --set-symbol-visibility and --set-symbols-visibility options (PR #80872)   Ilia Kuklin via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   via llvm-commits
• [llvm] [DFAJumpThreading] Enable the pass by default (PR #83033)   Usman Nadeem via llvm-commits
• [llvm] [DFAJumpThreading] Enable the pass by default (PR #83033)   Usman Nadeem via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement only for max, not min (PR #81505)   via llvm-commits
• [lld] 4bc3b35 - [lld/ELF] Add documentation on large sections (#82560)   via llvm-commits
• [lld] [lld/ELF] Add documentation on large sections (PR #82560)   Arthur Eubanks via llvm-commits
• [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)   Shilei Tian via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   Fabio D'Urso via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   via llvm-commits
• [llvm] [WIP][AMDGPU] Split `isInlinableLiteral16` into three and call the specific version if possible (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   Florian Mayer via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   via llvm-commits
• [llvm] [Support] Refactor getN1Bits so it does not work around any g++ bug (PR #78933)   via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Luke Lau via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   via llvm-commits
• [compiler-rt] [compiler-rt] fix BSD procmaps stack size limit on build due to the k… (PR #82887)   David CARLIER via llvm-commits
• [llvm] [workflows] Delete user branches that are too long (PR #82845)   Tom Stellard via llvm-commits
• [llvm] [dsymutil][llvm-dwarfutil] Add command line option --deterministic. (PR #83020)   Jonas Devlieghere via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (PR #83038)   via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (PR #83038)   via llvm-commits
• [compiler-rt] [compiler-rt] fix BSD procmaps stack size limit on build due to the k… (PR #82887)   David CARLIER via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   Manish Kausik H via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   Yingwei Zheng via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   Manish Kausik H via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [ThinLTO] NFC: Merge duplicated functions together (PR #82421)   Teresa Johnson via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   Yingwei Zheng via llvm-commits
• [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #82763)   Nick Desaulniers via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Momchil Velikov via llvm-commits
• [clang] [llvm] [AArch64][PAC] Support ptrauth builtins and -fptrauth-intrinsics. (PR #65996)   Ahmed Bougacha via llvm-commits
• [llvm] 695b630 - [ThinLTO] NFC: Merge duplicated functions together (#82421)   via llvm-commits
• [llvm] [ThinLTO] NFC: Merge duplicated functions together (PR #82421)   Jan Svoboda via llvm-commits
• [clang] [llvm] [AArch64][PAC] Support ptrauth builtins and -fptrauth-intrinsics. (PR #65996)   Ahmed Bougacha via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [clang] [llvm] [AArch64][PAC] Support ptrauth builtins and -fptrauth-intrinsics. (PR #65996)   Ahmed Bougacha via llvm-commits
• [llvm] [llvm-objcopy] Improve help messages (PR #82830)   Fangrui Song via llvm-commits
• [llvm] [llvm-objcopy] Improve help messages (PR #82830)   Fangrui Song via llvm-commits
• [clang] [llvm] [AArch64][PAC] Support ptrauth builtins and -fptrauth-intrinsics. (PR #65996)   Ahmed Bougacha via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [llvm] [llvm-objcopy] Add --set-symbol-visibility and --set-symbols-visibility options (PR #80872)   Fangrui Song via llvm-commits
• [llvm] [RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (PR #80697)   Craig Topper via llvm-commits
• [llvm] [RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (PR #80697)   Craig Topper via llvm-commits
• [clang] [llvm] [AArch64][PAC] Support ptrauth builtins and -fptrauth-intrinsics. (PR #65996)   Ahmed Bougacha via llvm-commits
• [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)   Steven Johnson via llvm-commits
• [compiler-rt] [NFC][hwasan] Do not include sanitizer_placement_new.h in header files (PR #82993)   Fangrui Song via llvm-commits
• [compiler-rt] [NFC][hwasan] Do not include sanitizer_placement_new.h in header files (PR #82993)   Florian Mayer via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Paul Kirth via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Paul Kirth via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Paul Kirth via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Sam Clegg via llvm-commits
• [libc] [llvm] [LLVM] Add 'LLVM_EXTRA_RUNTIME_TARGETS' to append to default list (PR #82513)   Petr Hosek via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   Florian Hahn via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Paul Kirth via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] AMDGPU: Simplify FP8 conversion definitions. NFC. (PR #83043)   Changpeng Fang via llvm-commits
• [llvm] AMDGPU: Simplify FP8 conversion definitions. NFC. (PR #83043)   via llvm-commits
• [llvm] AMDGPU: Simplify FP8 conversion definitions. NFC. (PR #83043)   Jay Foad via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [clang] [compiler-rt] [llvm] [InstrProf] Single byte counters in coverage (PR #75425)   via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   Florian Hahn via llvm-commits
• [llvm] AMDGPU: Simplify FP8 conversion definitions. NFC. (PR #83043)   Changpeng Fang via llvm-commits
• [llvm] 9de78c4 - AMDGPU: Simplify FP8 conversion definitions. NFC. (#83043)   via llvm-commits
• [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)   Stephen Tozer via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   Simon Pilgrim via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   Florian Hahn via llvm-commits
• [llvm] 0b39825 - [RemoveDIs] Print non-intrinsic debug info in textual IR output (#79281)   via llvm-commits
• [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)   Stephen Tozer via llvm-commits
• [llvm] 257cbea - [DAG] Format DAGCombiner::mayAlias. NFC   David Green via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   via llvm-commits
• [llvm] [AMDGPU] Fix v_dot2_f16_f16/v_dot2_bf16_bf16 operands (PR #82423)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] New "initialized" parameter attribute LangRef (PR #82564)   Haopeng Liu via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] f1bb88b - [RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (#82716)   via llvm-commits
• [llvm] [RISCV] Use PromoteSetCCOperands to promote operands for UMAX/UMIN during type legalization. (PR #82716)   Craig Topper via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   Craig Topper via llvm-commits
• [llvm] [DFAJumpThreading] Enable the pass by default (PR #83033)   Nikita Popov via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   Craig Topper via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   Craig Topper via llvm-commits
• [llvm] dc06d75 - Revert "[RemoveDIs] Print non-intrinsic debug info in textual IR output (#79281)"   Stephen Tozer via llvm-commits
• [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)   Nico Weber via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Craig Topper via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   Florian Hahn via llvm-commits
• [llvm] [BOLT] Fix runtime/instrument-wrong-target.s test (PR #82858)   Maksim Panchenko via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --ignore-symbol (PR #80873)   Ilia Kuklin via llvm-commits
• [llvm] [dsymutil][llvm-dwarfutil] Add command line option --deterministic. (PR #83020)   Alexey Lapshin via llvm-commits
• [llvm] [Support] Report EISDIR when opening a directory (PR #79880)   Fangrui Song via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [flang] [libclc] [libcxx] [lld] [lldb] [llvm] [NFC] Remove trailing whitespace across all non-test related files (PR #82838)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   Craig Topper via llvm-commits
• [llvm] [Tests][LoopDistribute] Re-adding target triple in a test (PR #82954)   Nilanjana Basu via llvm-commits
• [llvm] [Tests][LoopDistribute] Re-adding target triple in a test (PR #82954)   Nilanjana Basu via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [compiler-rt] 1865c7e - [scudo] Store more blocks in each TransferBatch (#70390)   via llvm-commits
• [compiler-rt] [scudo] Store more blocks in each TransferBatch (PR #70390)   via llvm-commits
• [llvm] [Tests][LoopDistribute] Re-adding target triple in a test (PR #82954)   Nilanjana Basu via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [llvm] 911055e - [VPlan] Consistently use (Part, 0) for first lane scalar values (#80271)   via llvm-commits
• [llvm] [VPlan] Consistently use (Part, 0) for first lane scalar values (PR #80271)   Florian Hahn via llvm-commits
• [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)   Sumanth Gundapaneni via llvm-commits
• [llvm] [SimplifyCFG] Fix hoisting problem in SimplifyCFG (PR #78615)   via llvm-commits
• [clang] [compiler-rt] [asan][windows] Eliminate the static asan runtime on windows (PR #81677)   Charlie Barto via llvm-commits
• [llvm] [DFAJumpThreading] Enable the pass by default (PR #83033)   Usman Nadeem via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [llvm] [BOLT] Fix runtime/instrument-wrong-target.s test (PR #82858)   Alexander Yermolovich via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Erich Keane via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Brendan Sweeney via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   James Y Knight via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   via llvm-commits
• [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)   Fangrui Song via llvm-commits
• [llvm] [RemoveDIs] Print non-intrinsic debug info in textual IR output (PR #79281)   Fangrui Song via llvm-commits
• [llvm] 1d03d59 - Revert "add initialized attribute LangRef"   David Blaikie via llvm-commits
• [compiler-rt] [scudo] Don't preserve space for regions at init() (DO NOT MERGE) (PR #74531)   via llvm-commits
• [llvm] [mlir] [mlir][python] Fix generation of Python bindings for `async` dialect (PR #75960)   Abhishek Kulkarni via llvm-commits
• [llvm] [mlir] [mlir][python] Fix generation of Python bindings for `async` dialect (PR #75960)   Abhishek Kulkarni via llvm-commits
• [llvm] [mlir] [mlir][python] Fix generation of Python bindings for `async` dialect (PR #75960)   Abhishek Kulkarni via llvm-commits
• [llvm] [mlir] [mlir][python] Fix generation of Python bindings for `async` dialect (PR #75960)   Abhishek Kulkarni via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Jason Eckhardt via llvm-commits
• [llvm] Add guidance on bans to the CoC section and link to the developer policy (PR #82551)   David Blaikie via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [llvm] Add guidance on bans to the CoC section and link to the developer policy (PR #82551)   Tanya Lattner via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Jason Eckhardt via llvm-commits
• [llvm] [DFAJumpThreading] Enable the pass by default (PR #83033)   Nikita Popov via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [DebugInfo][LoopIdiomRecognize] Fix #82582: Wrong debug location update in processLoopStoreOfLoopLoad (PR #82608)   David Blaikie via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)   Xiang Li via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)   Xiang Li via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   via llvm-commits
• [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)   Alexander Yermolovich via llvm-commits
• [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)   Alexander Yermolovich via llvm-commits
• [lld] Improve readability of "undefined reference" message (PR #82671)   Fangrui Song via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   William Moses via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)   Xiang Li via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [llvm] 435e75d - [Tests][LoopDistribute] Re-adding target triple in a test (#82954)   via llvm-commits
• [llvm] [Tests][LoopDistribute] Re-adding target triple in a test (PR #82954)   Nilanjana Basu via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [llvm] 113052b - [AMDGPU] Prefer lower total register usage in regions with spilling   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Prefer lower total register usage in regions with spilling (PR #71882)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Prefer lower total register usage in regions with spilling (PR #71882)   Jeffrey Byrnes via llvm-commits
• [llvm] [AIX][TLS] Produce a faster local-exec access sequence for the "aix-small-tls" global variable attribute (PR #83053)   Amy Kwan via llvm-commits
• [llvm] [AIX][TLS] Produce a faster local-exec access sequence for the "aix-small-tls" global variable attribute (PR #83053)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)   Jeffrey Byrnes via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Jeffrey Byrnes via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   William Moses via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Harald van Dijk via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   William Moses via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Jeffrey Byrnes via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Jonas Devlieghere via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Jonas Devlieghere via llvm-commits
• [llvm] [dsymutil][llvm-dwarfutil] Add command line option --deterministic. (PR #83020)   Jonas Devlieghere via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   via llvm-commits
• [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)   Steven Johnson via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)   Steven Johnson via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Natalie Chouinard via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Natalie Chouinard via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Natalie Chouinard via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Fangrui Song via llvm-commits
• [llvm] [WebAssembly] Disable multivalue emission temporarily (PR #82714)   Derek Schuff via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Jason Eckhardt via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Jonas Devlieghere via llvm-commits
• [llvm] 860b6ed - MIPS: fix emitDirectiveCpsetup on N32 (#80534)   via llvm-commits
• [llvm] MIPS: fix emitDirectiveCpsetup on N32 (PR #80534)   Fangrui Song via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   William Moses via llvm-commits
• [llvm] [SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (PR #83017)   David Green via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Xiang Li via llvm-commits
• [clang] [llvm] [clang][Diagnostics] Add CLANG_HIGHLIGHT_COLORS= to configure syntax highlighting in diagnostics (#82945) (PR #83060)   via llvm-commits
• [clang] [llvm] [clang][Diagnostics] Add CLANG_HIGHLIGHT_COLORS= to configure syntax highlighting in diagnostics (#82945) (PR #83060)   via llvm-commits
• [clang] [llvm] [clang][Diagnostics] Add CLANG_HIGHLIGHT_COLORS= to configure syntax highlighting in diagnostics (#82945) (PR #83060)   via llvm-commits
• [clang] [llvm] [clang][Diagnostics] Add CLANG_HIGHLIGHT_COLORS= to configure syntax highlighting in diagnostics (#82945) (PR #83060)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Xiang Li via llvm-commits
• [llvm] e9cdd16 - [docs] Remove the Packaging "Tips" which seems to be about pre-cmake ./configure (#82958)   via llvm-commits
• [llvm] [docs] Remove the Packaging "Tips" which seems to be about pre-cmake ./configure (PR #82958)   Mehdi Amini via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Natalie Chouinard via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Natalie Chouinard via llvm-commits
• [llvm] [ItaniumDemangle] reject A-F in FP literals (PR #83061)   Ryan Prichard via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [llvm] 15a7de6 - [SelectionDAG] Support sign tracking through `{S|U}INT_TO_FP`   Noah Goldstein via llvm-commits
• [llvm] [SelectionDAG] Support sign tracking through `{S|U}INT_TO_FP` (PR #82808)   via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   James Y Knight via llvm-commits
• [llvm] [DONOTSUBMIT] Test of stage2 container build (PR #83064)   Natalie Chouinard via llvm-commits
• [llvm] [BOLT] Fix runtime/instrument-wrong-target.s test (PR #82858)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Fix runtime/instrument-wrong-target.s test (PR #82858)   Maksim Panchenko via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] [BOLT] Fix runtime/instrument-wrong-target.s test (PR #82858)   Alexander Yermolovich via llvm-commits
• [llvm] Reorder fields for better packing (PR #77998)   Maksim Panchenko via llvm-commits
• [clang] [llvm] [clang][Diagnostics] Add CLANG_HIGHLIGHT_COLORS= to configure syntax highlighting in diagnostics (#82945) (PR #83060)   via llvm-commits
• [llvm] [SelectionDAG] Remove pointer from MMO for VP strided load/store. (PR #82667)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Resolve FIXME: Find the same unit free in each cycle instead of one in each cycle (PR #82732)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] [Support] Refactor getN1Bits so it does not work around any g++ bug (PR #78933)   via llvm-commits
• [llvm] [CodeGen] Resolve TODO: Add DriverKit to mapToPlatformType (PR #78799)   via llvm-commits
• [llvm] [ARM] Add r12 and lr as scratch registers (PR #82454)   Eli Friedman via llvm-commits
• [llvm] [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (PR #82660)   Tom Stellard via llvm-commits
• [llvm] [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (PR #82660)   Tom Stellard via llvm-commits
• [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)   Maksim Panchenko via llvm-commits
• [llvm] [llvm-shlib] Change libLLVM-$MAJOR.so symlink to point to versioned SO (PR #82660)   via llvm-commits
• [llvm] [BOLT][DWARF] Add support for .debug_names (PR #81062)   Alexander Yermolovich via llvm-commits
• [llvm] [VPlan] Explicitly handle scalar pointer inductions. (PR #83068)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly handle scalar pointer inductions. (PR #83068)   via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83015)   Michal Paszkowski via llvm-commits
• [libc] [llvm] [libc] Repurpose `LIBC_GPU_BUILD` option to enable the new format (PR #82848)   Joseph Huber via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   Fabio D'Urso via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   Fabio D'Urso via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   via llvm-commits
• [llvm] b94913b - [AArch64] Vector insert zero upper tests. NFC   David Green via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Jun Wang via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Eli Friedman via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Eli Friedman via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Eli Friedman via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   Fabio D'Urso via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Chris B via llvm-commits
• [llvm] b191659 - [gn build] Port 6de5fcc74637   LLVM GN Syncbot via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Chris B via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Jonas Devlieghere via llvm-commits
• [llvm] e877245 - [docs] Remove ref to deleted "Packaging.rst"   Bill Wendling via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Fangrui Song via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Fangrui Song via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Fangrui Song via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Michael Jones via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Michael Jones via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Michael Jones via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [llvm] 23f895f - [InstrProf] Single byte counters in coverage (#75425)   via llvm-commits
• [clang] [compiler-rt] [llvm] [InstrProf] Single byte counters in coverage (PR #75425)   via llvm-commits
• [compiler-rt] Revert "[scudo] Store more blocks in each TransferBatch" (PR #83078)   via llvm-commits
• [compiler-rt] Revert "[scudo] Store more blocks in each TransferBatch" (PR #83078)   via llvm-commits
• [compiler-rt] Revert "[scudo] Store more blocks in each TransferBatch" (PR #83078)   Christopher Ferris via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Michael Jones via llvm-commits
• [compiler-rt] cda4130 - [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (#83034)   via llvm-commits
• [compiler-rt] [scudo] Do not unmap the memory containing the this object in unmapRingBuffer (PR #83034)   Fabio D'Urso via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [compiler-rt] [scudo] Don't preserve space for regions at init() (DO NOT MERGE) (PR #74531)   via llvm-commits
• [llvm] [lldb][llvm] Return an error instead of crashing when parsing a line table prologue. (PR #80769)   David Blaikie via llvm-commits
• [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)   Usman Nadeem via llvm-commits
• [llvm] [lldb][llvm] Return an error instead of crashing when parsing a line table prologue. (PR #80769)   David Blaikie via llvm-commits
• [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)   Usman Nadeem via llvm-commits
• [llvm] [GVN] Restrict equality propagation for pointers (PR #82458)   Usman Nadeem via llvm-commits
• [compiler-rt] 056d62b - Revert "[scudo] Store more blocks in each TransferBatch" (#83078)   via llvm-commits
• [compiler-rt] Revert "[scudo] Store more blocks in each TransferBatch" (PR #83078)   via llvm-commits
• [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)   Mingming Liu via llvm-commits
• [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)   Mingming Liu via llvm-commits
• [llvm] [SelectionDAG] Remove pointer from MMO for VP strided load/store. (PR #82667)   Craig Topper via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Michael Jones via llvm-commits
• [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)   Mingming Liu via llvm-commits
• [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)   Mingming Liu via llvm-commits
• [compiler-rt] [NFC][hwasan] Do not include sanitizer_placement_new.h in header files (PR #82993)   Vitaly Buka via llvm-commits
• [compiler-rt] 371e6d0 - [NFC][hwasan] Do not include sanitizer_placement_new.h in header files (#82993)   via llvm-commits
• [compiler-rt] [NFC][hwasan] Do not include sanitizer_placement_new.h in header files (PR #82993)   Vitaly Buka via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Xiang Li via llvm-commits
• [llvm] Default to LLDB debugger tuning for shared library builds (PR #83083)   Alexander Richardson via llvm-commits
• [llvm] Default to LLDB debugger tuning for shared library builds (PR #83083)   David Blaikie via llvm-commits
• [llvm] Default to LLDB debugger tuning for shared library builds (PR #83083)   David Blaikie via llvm-commits
• [llvm] [DSE] Test precommit for a bug caused by a read-clobber being skipped. (PR #83084)   via llvm-commits
• [llvm] [DSE] Test precommit for a bug caused by a read-clobber being skipped. (PR #83084)   via llvm-commits
• [llvm] [DSE] Test precommit for a bug caused by a read-clobber being skipped. (PR #83084)   via llvm-commits
• [llvm] [LSR][term-fold] Ensure the simple recurrence is reachable from the current loop (PR #83085)   Patrick O'Neill via llvm-commits
• [llvm] [LSR][term-fold] Ensure the simple recurrence is reachable from the current loop (PR #83085)   via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Nick Desaulniers via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] Default to LLDB debugger tuning for shared library builds (PR #83083)   Alexander Richardson via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Jason Eckhardt via llvm-commits
• [llvm] [RISCV] Use getVectorIdxConstant in RISCVISelLowering.cpp. NFC (PR #83019)   Craig Topper via llvm-commits
• [llvm] 62d0c01 - [SelectionDAG] Remove pointer from MMO for VP strided load/store. (#82667)   via llvm-commits
• [llvm] [SelectionDAG] Remove pointer from MMO for VP strided load/store. (PR #82667)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Harald van Dijk via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   via llvm-commits
• [llvm] [RISCV][MC] Implement ISA mapping symbols (PR #67541)   Craig Topper via llvm-commits
• [llvm] [DSE] Test precommit for a bug caused by a read-clobber being skipped. (PR #83084)   Alina Sbirlea via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Harald van Dijk via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Harald van Dijk via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   via llvm-commits
• [llvm] 91791c6 - [DSE] Test precommit for a bug caused by a read-clobber being skipped. (#83084)   via llvm-commits
• [llvm] [DSE] Test precommit for a bug caused by a read-clobber being skipped. (PR #83084)   via llvm-commits
• [llvm] [DSE] Test precommit for a bug caused by a read-clobber being skipped. (PR #83084)   via llvm-commits
• [llvm] Add support for the 'freeze' instruction (PR #82979)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V]: add SPIR-V extension: SPV_INTEL_variable_length_array (PR #83002)   Michal Paszkowski via llvm-commits
• [compiler-rt] [compiler-rt] Relax CHECK line in reaches_function.c (PR #83089)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Relax CHECK line in reaches_function.c (PR #83089)   via llvm-commits
• [llvm] Default to LLDB debugger tuning for shared library builds (PR #83083)   David Blaikie via llvm-commits
• [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)   via llvm-commits
• [llvm] b1d2e85 - Revert "[DSE] Test precommit for a bug caused by a read-clobber being skipped. (#83084)"   Vasileios Porpodas via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] 3892e8e - Non functional change. Initialize var EnumVal to 0. (#82987)   via llvm-commits
• [llvm] Non functional change. Initialize var EnumVal to 0. (PR #82987)   Phoebe Wang via llvm-commits
• [llvm] [RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (PR #80697)   Shih-Po Hung via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-merge-objc-categories) (PR #82928)   via llvm-commits
• [llvm] [WebAssembly] Add RefTypeMem2Local pass (PR #81965)   Heejin Ahn via llvm-commits
• [llvm] [SimplifyCFG] Fix hoisting problem in SimplifyCFG (PR #78615)   Quentin Dian via llvm-commits
• [llvm] [llvm][LoongArch] Improve loongarch_lasx_xvpermi_q instrinsic (PR #82984)   via llvm-commits
• [llvm] [RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (PR #80697)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (PR #80697)   via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [TailDuplicator] Add maximum predecessors and successors to consider tail duplicating blocks (PR #78582)   Quentin Dian via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Connor Sughrue via llvm-commits
• [clang] [llvm] [Driver] Default -msmall-data-limit= to 0 and clean up code (PR #83093)   Fangrui Song via llvm-commits
• [clang] [llvm] [Driver] Default -msmall-data-limit= to 0 and clean up code (PR #83093)   via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Connor Sughrue via llvm-commits
• [llvm] 86f6caa - [llvm][Support] Add support for executing a detached process (#81708)   via llvm-commits
• [llvm] [llvm][Support] Add support for executing a detached process (PR #81708)   Connor Sughrue via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   James Y Knight via llvm-commits
• [compiler-rt] Do not call disable / enable on null depot (PR #82542)   David Blaikie via llvm-commits
• [llvm] [RISCV] Use getVectorIdxConstant in RISCVISelLowering.cpp. NFC (PR #83019)   Luke Lau via llvm-commits
• [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)   Artem Belevich via llvm-commits
• [llvm] b791a51 - [CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (#82685)   via llvm-commits
• [llvm] [CodeGenSchedule] Don't allow invalid ReadAdvances to be formed (PR #82685)   Visoiu Mistrih Francis via llvm-commits
• [llvm] fix docs WritingAnLLVMNewPMPass '%' in console can not be copied (PR #82759)   via llvm-commits
• [llvm] fix link in doc - LLVM Alias Analysis Infrastructure (PR #81832)   via llvm-commits
• [llvm] fix link in doc - LLVM Alias Analysis Infrastructure (PR #81832)   via llvm-commits
• [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (PR #83098)   George Koehler via llvm-commits
• [llvm] [LLVM][DOCS]fix link in doc - LLVM Alias Analysis Infrastructure (PR #81832)   via llvm-commits
• [llvm] [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (PR #83098)   via llvm-commits
• [llvm] 2e56484 - [RISCV] Use getVectorIdxConstant in RISCVISelLowering.cpp. NFC (#83019)   via llvm-commits
• [llvm] [RISCV] Use getVectorIdxConstant in RISCVISelLowering.cpp. NFC (PR #83019)   Luke Lau via llvm-commits
• [llvm] f410f74 - Revert "[llvm][Support] Add support for executing a detached process (#81708)"   via llvm-commits
• [llvm] [workflows] Mention the correct user who makes a /cherry-pick comment (PR #82680)   Luke Lau via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Wang Pengcheng via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [llvm] [mlir] [mlir][python] Fix generation of Python bindings for `async` dialect (PR #75960)   Abhishek Kulkarni via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [llvm] [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (PR #82747)   via llvm-commits
• [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)   via llvm-commits
• [llvm] [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (PR #82747)   via llvm-commits
• [llvm] [BOLT] Add reading support for Linux kernel exception table (PR #83100)   Maksim Panchenko via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [CMake][LIT] Add option to run lit testsuites in parallel (PR #82899)   Joe Loser via llvm-commits
• [llvm] [CMake][LIT] Add option to run lit testsuites in parallel (PR #82899)   Joe Loser via llvm-commits
• [llvm] [RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (PR #80697)   Shih-Po Hung via llvm-commits
• [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   David Blaikie via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Wang Pengcheng via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV][ISEL] Lowering to load-acquire/store-release for RISCV Zalasr (PR #82914)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Take SEW/LMUL into account for value tracking of vsetvli[max] (PR #82163)   Wang Pengcheng via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [llvm] [MacroFusion] Support commutable instructions (PR #82751)   Wang Pengcheng via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Wang Pengcheng via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Wang Pengcheng via llvm-commits
• [llvm] [MC/DC] Refactor: Isolate the final result out of TestVectors (PR #82282)   Jessica Paquette via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve codegen for G_VECREDUCE_{SMIN,SMAX,UMIN,UMAX} for odd-sized vectors (PR #82740)   Dhruv Chawla via llvm-commits
• [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)   Jessica Paquette via llvm-commits
• [llvm] Enable JumpTableToSwitch pass by default (PR #82546)   Alexander Shaposhnikov via llvm-commits
• [llvm] e7900e6 - AMDGPU: Regenerate baseline mir tests   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Take SEW/LMUL into account for value tracking of vsetvli[max] (PR #82163)   Craig Topper via llvm-commits
• [llvm] [Transforms] Let amdgcn take advantage of sin(-x) --> -sin(x) (PR #79700)   Yashwant Singh via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Felipe de Azevedo Piovezan via llvm-commits
• [clang] [llvm] MIPS/clang: Fix asm constraint for softfloat (PR #79116)   Brad Smith via llvm-commits
• [clang] [llvm] MIPS/clang: Fix asm constraint for softfloat (PR #79116)   Fangrui Song via llvm-commits
• [clang] [llvm] MIPS/clang: Fix asm constraint for softfloat (PR #79116)   Fangrui Song via llvm-commits
• [clang] [llvm] MIPS/clang: Fix asm constraint for softfloat (PR #79116)   Fangrui Song via llvm-commits
• [llvm] [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (PR #82747)   Shengchen Kan via llvm-commits
• [llvm] [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (PR #82747)   Shengchen Kan via llvm-commits
• [llvm] [RISCV] Use predicated FP extension when promoting VP operands (PR #79328)   Matt Arsenault via llvm-commits
• [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)   Shengchen Kan via llvm-commits
• [llvm] f066377 - [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (#83047)   via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   via llvm-commits
• [clang] [llvm] MIPS/clang: Fix asm constraint for softfloat (PR #79116)   Fangrui Song via llvm-commits
• [clang] [llvm] MIPS/clang: Fix asm constraint for softfloat (PR #79116)   Fangrui Song via llvm-commits
• [clang] [llvm] MIPS: Fix asm constraints "f" and "r" for softfloat (PR #79116)   Fangrui Song via llvm-commits
• [llvm] c88beb4 - MIPS: Fix asm constraints "f" and "r" for softfloat (#79116)   via llvm-commits
• [clang] [llvm] MIPS: Fix asm constraints "f" and "r" for softfloat (PR #79116)   Fangrui Song via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Qiu Chaofan via llvm-commits
• [polly] [polly] Add polly-debug flag to print debug info from all parts of polly (PR #78549)   Karthika Devi C via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   via llvm-commits
• [llvm] [Mips] Fix missing sign extension in expansion of sub-word atomic max (PR #77072)   Brad Smith via llvm-commits
• [llvm] [MC/DC] Refactor: Isolate the final result out of TestVectors (PR #82282)   NAKAMURA Takumi via llvm-commits
• [llvm] [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (PR #82747)   via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Qiu Chaofan via llvm-commits
• [lld] Improve readability of "undefined reference" message (PR #82671)   Igor Kudrin via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)   Luke Lau via llvm-commits
• [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)   Luke Lau via llvm-commits
• [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)   Luke Lau via llvm-commits
• [llvm] [MC/DC] Refactor: Isolate the final result out of TestVectors (PR #82282)   NAKAMURA Takumi via llvm-commits
• [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)   Craig Topper via llvm-commits
• [llvm] [MC/DC] Refactor: Isolate the final result out of TestVectors (PR #82282)   NAKAMURA Takumi via llvm-commits
• [llvm] [MC/DC] Refactor: Isolate the final result out of TestVector (PR #82282)   NAKAMURA Takumi via llvm-commits
• [llvm] 0ed61db - [MC/DC] Refactor: Isolate the final result out of TestVector (#82282)   via llvm-commits
• [llvm] [MC/DC] Refactor: Isolate the final result out of TestVector (PR #82282)   NAKAMURA Takumi via llvm-commits
• [llvm] Enable JumpTableToSwitch pass by default (PR #82546)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Take SEW/LMUL into account for value tracking of vsetvli[max] (PR #82163)   Wang Pengcheng via llvm-commits
• [llvm] ed1aabe - remove expensive copy of options passed (#82577)   via llvm-commits
• [llvm] remove expensive copy of options passed (PR #82577)   Phoebe Wang via llvm-commits
• [llvm] remove expensive copy of options passed (PR #82577)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Nikita Popov via llvm-commits
• [llvm] [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (PR #82747)   Shengchen Kan via llvm-commits
• [polly] [polly] Add polly-debug flag to print debug info from all parts of polly (PR #78549)   Karthika Devi C via llvm-commits
• [llvm] [Mips] Fix missing sign extension in expansion of sub-word atomic max (PR #77072)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add more intrinsics into canSplatOperand. (PR #83106)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Add more intrinsics into canSplatOperand. (PR #83106)   via llvm-commits
• [llvm] [AArch64] Use FMOVDr for clearing upper bits (PR #83107)   David Green via llvm-commits
• [llvm] [AArch64] Use FMOVDr for clearing upper bits (PR #83107)   via llvm-commits
• [llvm] [RISCV] Add more intrinsics into canSplatOperand. (PR #83106)   Craig Topper via llvm-commits
• [llvm] [RISCV][WIP] Optimize sum of absolute differences pattern. (PR #82722)   Luke Lau via llvm-commits
• [llvm] [llvm][LoongArch] Improve loongarch_lasx_xvpermi_q instrinsic (PR #82984)   Lu Weining via llvm-commits
• [llvm] d7c80bb - [llvm][LoongArch] Improve loongarch_lasx_xvpermi_q instrinsic (#82984)   via llvm-commits
• [llvm] [llvm][LoongArch] Improve loongarch_lasx_xvpermi_q instrinsic (PR #82984)   Lu Weining via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Wang Pengcheng via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Rana Pratap Reddy via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   via llvm-commits
• [llvm] [ThinLTO] Add metedata 'thinlto_src_module' and 'thinlto_src_file' (PR #83110)   via llvm-commits
• [llvm] [ThinLTO] Add metedata 'thinlto_src_module' and 'thinlto_src_file' (PR #83110)   via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)   James Henderson via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)   James Henderson via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)   James Henderson via llvm-commits
• [llvm] [RISCV] Implement Intrinsics and CodeGen Support for XCValu Extension… (PR #78138)   via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   via llvm-commits
• [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [RISCV] Implement Intrinsics and CodeGen Support for XCValu Extension… (PR #78138)   via llvm-commits
• [llvm] 512a8a7 - [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (#82174)   via llvm-commits
• [llvm] [MC/DC] Introduce `class TestVector` with a pair of `BitVector` (PR #82174)   NAKAMURA Takumi via llvm-commits
• [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)   James Henderson via llvm-commits
• [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)   James Henderson via llvm-commits
• [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)   James Henderson via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Pierre van Houtryve via llvm-commits
• [llvm] [TableGen] Extend direct lookup to instruction values in generic tables. (PR #80486)   Piotr Sobczak via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   James Henderson via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   James Henderson via llvm-commits
• [llvm] [ThinLTO] Add metedata 'thinlto_src_module' and 'thinlto_src_file' (PR #83110)   via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   James Henderson via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Nick Anderson via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Nick Anderson via llvm-commits
• [llvm] [llvm-objcopy] Add --set-symbol-visibility and --set-symbols-visibility options (PR #80872)   James Henderson via llvm-commits
• [llvm] [RISCV] Implement Intrinsics and CodeGen Support for XCValu Extension… (PR #78138)   Craig Topper via llvm-commits
• [llvm] [llvm-objcopy] Improve help messages (PR #82830)   James Henderson via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Jinyang He via llvm-commits
• [llvm] [RISCV] Implement Intrinsics for XCVmac Extension in CV32E40P (PR #83112)   via llvm-commits
• [llvm] [RISCV] Implement Intrinsics for XCVmac Extension in CV32E40P (PR #83112)   via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [RISCV] Implement Intrinsics for XCVmac Extension in CV32E40P (PR #83112)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [RISCV] Implement Intrinsics and CodeGen Support for XCValu Extension… (PR #78138)   Craig Topper via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --ignore-symbol (PR #80873)   James Henderson via llvm-commits
• [llvm] [RISCV] Implement Intrinsics and CodeGen Support for XCValu Extension… (PR #78138)   Craig Topper via llvm-commits
• [llvm] [RISCV] Implement Intrinsics and CodeGen Support for XCValu Extension… (PR #78138)   Craig Topper via llvm-commits
• [llvm] [RISCV] Implement Intrinsics for XCVmac Extension in CV32E40P (PR #83112)   via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Jay Foad via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [dsymutil][llvm-dwarfutil] Add command line option --deterministic. (PR #83020)   Alexey Lapshin via llvm-commits
• [llvm] [dsymutil][llvm-dwarfutil] Add command line option --deterministic. (PR #83020)   Alexey Lapshin via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [RISCV] Add more intrinsics into canSplatOperand. (PR #83106)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Add more intrinsics into canSplatOperand. (PR #83106)   Yeting Kuo via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   NAKAMURA Takumi via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Wang Pengcheng via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Xi Ruoyao via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Xi Ruoyao via llvm-commits
• [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)   Pierre van Houtryve via llvm-commits
• [llvm] [llvm-exegesis] Add loop-register snippet annotation (PR #82873)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Jay Foad via llvm-commits
• [llvm] 4e9fe86 - [ConstraintElim] Add additional sext tests with unsigned predicates.   Florian Hahn via llvm-commits
• [llvm] [llvm-exegesis] Add loop-register snippet annotation (PR #82873)   Aiden Grossman via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [llvm] e421c12 - [VPlan] Remove left-over CHECK-NOT line.   Florian Hahn via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Xi Ruoyao via llvm-commits
• [llvm] [InferAddressSpaces] apply InferAddressSpaces to inttoptr-zext-ptrtoint address expression. (PR #79108)   via llvm-commits
• [llvm] [GlobalISel] Add a getTargetLowering method to IRTranslator. NFC (PR #83009)   David Green via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   Florian Hahn via llvm-commits
• [llvm] [RISCV][MC] Implement ISA mapping symbols (PR #67541)   Joe Faulls via llvm-commits
• [llvm] [Mips] Fix clang integrated assembler generates incorrect relocations… (PR #83115)   via llvm-commits
• [lld] Improve readability of "undefined reference" message (PR #82671)   Peter Smith via llvm-commits
• [llvm] 9796b0e - Add support for the 'freeze' instruction (#82979)   via llvm-commits
• [llvm] Add support for the 'freeze' instruction (PR #82979)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [GlobalISel] Add a TargetLowering to IRTranslator. NFC (PR #83009)   David Green via llvm-commits
• [llvm] ada70f5 - [SPIR-V]: add SPIR-V extension: SPV_INTEL_variable_length_array (#83002)   via llvm-commits
• [llvm] [SPIR-V]: add SPIR-V extension: SPV_INTEL_variable_length_array (PR #83002)   Vyacheslav Levytskyy via llvm-commits
• [llvm] aa43649 - Reapply "[RemoveDIs] Print non-intrinsic debug info in textual IR output (#79281)"   Stephen Tozer via llvm-commits
• [llvm] [Mips] Fix clang integrated assembler generates incorrect relocations… (PR #83115)   via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Luke Lau via llvm-commits
• [llvm] [arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   Florian Hahn via llvm-commits
• [llvm] [arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   Jay Foad via llvm-commits
• [llvm] [arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83116)   Rodolfo Wottrich via llvm-commits
• [llvm] [Mips] Fix clang integrated assembler generates incorrect relocations… (PR #83115)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve codegen for G_VECREDUCE_{SMIN,SMAX,UMIN,UMAX} for odd-sized vectors (PR #82740)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve codegen for G_VECREDUCE_{SMIN,SMAX,UMIN,UMAX} for odd-sized vectors (PR #82740)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve codegen for G_VECREDUCE_{SMIN,SMAX,UMIN,UMAX} for odd-sized vectors (PR #82740)   David Green via llvm-commits
• [clang] [clang-tools-extra] [flang] [lld] [llvm] [flang][clang] Add Visibility specific help text for options (PR #81869)   David Spickett via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   Mirko Brkušanin via llvm-commits
• [llvm] [arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] d128448 - Revert "Reapply "[RemoveDIs] Print non-intrinsic debug info in textual IR output (#79281)""   Stephen Tozer via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83116)   David Spickett via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)   David Green via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   Mirko Brkušanin via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Wang Pengcheng via llvm-commits
• [llvm] 2c9b6c1 - [AArch64][GlobalISel] Improve codegen for G_VECREDUCE_{SMIN,SMAX,UMIN,UMAX} for odd-sized vectors (#82740)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve codegen for G_VECREDUCE_{SMIN,SMAX,UMIN,UMAX} for odd-sized vectors (PR #82740)   Dhruv Chawla via llvm-commits
• [llvm] [AArch64][GlobalISel] Improve codegen for G_VECREDUCE_{SMIN,SMAX,UMIN,UMAX} for odd-sized vectors (PR #82740)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Rodolfo Wottrich via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Rodolfo Wottrich via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Rodolfo Wottrich via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_LOAD for v4s8 Vector (PR #82989)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_LOAD for v4s8 Vector (PR #82989)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_LOAD for v4s8 Vector (PR #82989)   David Green via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Jonathan Thackray via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Jonathan Thackray via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   Jay Foad via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Rodolfo Wottrich via llvm-commits
• [llvm] [SPIRV] Add vector reduction instructions (PR #82786)   Vyacheslav Levytskyy via llvm-commits
• [polly] [polly] Add polly-debug flag to print debug info from all parts of polly (PR #78549)   Karthika Devi C via llvm-commits
• [lld] Improve readability of "undefined reference" message (PR #82671)   via llvm-commits
• [llvm] [WebAssembly] Add RefTypeMem2Local pass (PR #81965)   via llvm-commits
• [llvm] [WebAssembly] Add RefTypeMem2Local pass (PR #81965)   via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [llvm] [AArch64] Use FMOVDr for clearing upper bits (PR #83107)   Sam Tebbs via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [llvm] ca0560d - [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (#83118)   via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_u32/u64 for ds_rsub_u32/u64 (PR #83118)   Jay Foad via llvm-commits
• [llvm] [AArch64] Use FMOVDr for clearing upper bits (PR #83107)   David Green via llvm-commits
• [llvm] [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (PR #83120)   Simon Pilgrim via llvm-commits
• [llvm] [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (PR #83120)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Shorten mnemonic alias tests (PR #83121)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [AMDGPU] Shorten mnemonic alias tests (PR #83121)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [AMDGPU] Shorten mnemonic alias tests (PR #83121)   Ivan Kosarev via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   Simon Pilgrim via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   Yingwei Zheng via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Pierre van Houtryve via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   Yingwei Zheng via llvm-commits
• [llvm] [LLVM][SelectionDAG] Reduce number of ComputeValueVTs variants. (PR #75614)   Paul Walker via llvm-commits
• [llvm] [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (PR #83120)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Fix SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] Shorten mnemonic alias tests (PR #83121)   Jay Foad via llvm-commits
• [llvm] d273a19 - [AMDGPU] Shorten mnemonic alias tests (#83121)   via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Prevent duplicate DPValues from being returned by findDbgIntrinsics (PR #82764)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [AMDGPU] Fix incorrect stepping in gdb for amdgcn.end.cf intrinsic. (PR #83010)   Jeremy Morse via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   via llvm-commits
• [llvm] [llvm-exegesis] Add loop-register snippet annotation (PR #82873)   Clement Courbet via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [RFC][LTO] Allow target-specific module splittting (PR #83128)   Pierre van Houtryve via llvm-commits
• [llvm] [RFC][LTO] Allow target-specific module splittting (PR #83128)   via llvm-commits
• [llvm] [RFC][LTO] Allow target-specific module splittting (PR #83128)   via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   David Green via llvm-commits
• [llvm] 56ad6d1 - [MachineLICM] Hoist COPY instruction only when user can be hoisted (#81735)   via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   David Green via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] [MachineLICM] Hoist COPY instruction only when user can be hoisted (PR #81735)   via llvm-commits
• [llvm] [RFC][LTO] Allow target-specific module splittting (PR #83128)   Pierre van Houtryve via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Paschalis Mpeis via llvm-commits
• [llvm] [AMDGPU] Regenerate mnemonic alias checks (PR #83130)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Regenerate mnemonic alias checks (PR #83130)   via llvm-commits
• [llvm] 2e4643a - AMDGPU: Regenerate baseline test checks   Matt Arsenault via llvm-commits
• [llvm] ca66f74 - AMDGPU: Merge tests for llvm.amdgcn.dispatch.id   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Regenerate mnemonic alias checks (PR #83130)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Regenerate mnemonic alias checks (PR #83130)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Regenerate mnemonic alias checks (PR #83130)   Ivan Kosarev via llvm-commits
• [llvm] AMDGPU: Move attributor into optimization pipeline (PR #83131)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] d6ff986 - [LLVM][tests/CodeGen/AArch64] Convert instances of ConstantExpr based splats to use splat().   Paul Walker via llvm-commits
• [llvm] dbb65dd - [LLVM][tests/CodeGen/RISCV] Convert instances of ConstantExpr based splats to use splat().   Paul Walker via llvm-commits
• [llvm] fd07b8f - [LLVM][tests/Transforms/InstCombine] Convert instances of ConstantExpr based splats to use splat().   Paul Walker via llvm-commits
• [llvm] 6a17929 - [LLVM][tests/Transforms/InstSimplify] Convert instances of ConstantExpr based splats to use splat().   Paul Walker via llvm-commits
• [llvm] 900bea9 - [LLVM][test] Convert remaining instances of ConstantExpr based splats to use splat().   Paul Walker via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Regenerate mnemonic alias checks (PR #83130)   Jay Foad via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Paul Walker via llvm-commits
• [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)   Thomas Preud'homme via llvm-commits
• [llvm] [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (PR #83120)   Simon Pilgrim via llvm-commits
• [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)   Thomas Preud'homme via llvm-commits
• [llvm] 5ec535b - [AMDGPU] Regenerate mnemonic alias checks (#83130)   via llvm-commits
• [llvm] [AMDGPU] Regenerate mnemonic alias checks (PR #83130)   Jay Foad via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Alexey Bataev via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   via llvm-commits
• [llvm] [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (PR #83120)   Simon Pilgrim via llvm-commits
• [llvm] [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (PR #83120)   Phoebe Wang via llvm-commits
• [llvm] [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (PR #83120)   Phoebe Wang via llvm-commits
• [llvm] [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (PR #83120)   Phoebe Wang via llvm-commits
• [llvm] [llvm-objcopy] Improve help messages (PR #82830)   Ed Maste via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [llvm] 2e39b57 - Reapply "[RemoveDIs] Print non-intrinsic debug info in textual IR output (#79281)"   Stephen Tozer via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] [CMake][LIT] Add option to run lit testsuites in parallel (PR #82899)   Patrick Dougherty via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [llvm] [mlir][bazel] Define MLIR_CUDA_CONVERSIONS_ENABLED in GPU targets. (PR #83004)   Oleksandr Alex Zinenko via llvm-commits
• [llvm] [TableGen][CodeGenTarget] Add support for v3i8 and v3i1 MVTs. [NFCI] (PR #83140)   Francesco Petrogalli via llvm-commits
• [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)   Abhina Sree via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)   Chris B via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Christudasan Devadasan via llvm-commits
• [llvm] Create a CharSetConverter class with both iconv and icu support (PR #74516)   Abhina Sree via llvm-commits
• [llvm] AMDGPU: Move attributor into optimization pipeline (PR #83131)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Move attributor into optimization pipeline (PR #83131)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Move attributor into optimization pipeline (PR #83131)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Jay Foad via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Phoebe Wang via llvm-commits
• [llvm] [BOLT][AArch64] Skip BBs only instead of functions (PR #81989)   Elvina Yakubova via llvm-commits
• [llvm] [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (PR #83120)   Simon Pilgrim via llvm-commits
• [llvm] 13c359a - [X86] ReplaceNodeResults - truncate sub-128-bit vectors as shuffles directly (#83120)   via llvm-commits
• [llvm] [BOLT][AArch64] Skip BBs only instead of functions (PR #81989)   via llvm-commits
• [llvm] [BOLT][AArch64] Skip BBs only instead of functions (PR #81989)   Elvina Yakubova via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] 04db60d - [AMDGPU] Prevent hang in SIFoldOperands by caching uses (#82099)   via llvm-commits
• [llvm] [AMDGPU] Prevent hang in SIFoldOperands (PR #82099)   via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [llvm-ar][Object] Use K_GNU instead of K_COFF for archives with no symtab. (PR #82898)   Jacek Caban via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [AArch64][TLI] Add TLI mappings for ArmPL modf, sincos, sincospi (PR #83143)   Paschalis Mpeis via llvm-commits
• [llvm] [AArch64][TLI] Add TLI mappings for ArmPL modf, sincos, sincospi (PR #83143)   Paschalis Mpeis via llvm-commits
• [llvm] [AArch64][TLI] Add TLI mappings for ArmPL modf, sincos, sincospi (PR #83143)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   Simon Pilgrim via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   Simon Pilgrim via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   William Moses via llvm-commits
• [llvm] 48bc902 - [MemProf] Fix the stack updating handling of pruned contexts (#81322)   via llvm-commits
• [llvm] [MemProf] Fix the stack updating handling of pruned contexts (PR #81322)   Teresa Johnson via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   zhijian lin via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   zhijian lin via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [BOLT][AArch64] Skip BBs only instead of functions (PR #81989)   Elvina Yakubova via llvm-commits
• [llvm] AMDGPU: Move attributor into optimization pipeline (PR #83131)   Matt Arsenault via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Rana Pratap Reddy via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   via llvm-commits
• [llvm] [mlir] [mlir][bazel] Define MLIR_CUDA_CONVERSIONS_ENABLED in GPU targets. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] [mlir] [mlir][bazel] Define MLIR_CUDA_CONVERSIONS_ENABLED in GPU targets. (PR #83004)   via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Christudasan Devadasan via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   Alina Sbirlea via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   Alina Sbirlea via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   Alina Sbirlea via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   Alina Sbirlea via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   Alina Sbirlea via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   Alina Sbirlea via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Christudasan Devadasan via llvm-commits
• [llvm] [RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (PR #83146)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (PR #83146)   via llvm-commits
• [llvm] [TableGen] Extend direct lookup to instruction values in generic tables. (PR #80486)   Jason Eckhardt via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [BOLT][AArch64] Skip BBs only instead of functions (PR #81989)   Elvina Yakubova via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] [RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (PR #83146)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (PR #83146)   Luke Lau via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (PR #83146)   Luke Lau via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [TableGen] Extend direct lookup to instruction values in generic tables. (PR #80486)   Piotr Sobczak via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Rana Pratap Reddy via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Matt Arsenault via llvm-commits
• [llvm] 8b56d9e - [llvm-objcopy] Improve help messages (#82830)   via llvm-commits
• [llvm] [llvm-objcopy] Improve help messages (PR #82830)   Fangrui Song via llvm-commits
• [llvm] LLVM_FAULTMAPS section can be put after the DWARF section. (PR #77107)   via llvm-commits
• [llvm] [BOLT][AArch64] Skip BBs only instead of functions (PR #81989)   Elvina Yakubova via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (PR #79810)   Stephen Tozer via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Paul Walker via llvm-commits
• [llvm] [LV] Add test for tail fold by masking with external IV users. (PR #82329)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [LV] Add test for tail fold by masking with external IV users. (PR #82329)   Florian Hahn via llvm-commits
• [llvm] [LV] Add test for tail fold by masking with external IV users. (PR #82329)   Florian Hahn via llvm-commits
• [llvm] ed35ad1 - [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (#79810)   via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Add DPValue checks to the verifier, prepare DPValue for parsing support (PR #79810)   Stephen Tozer via llvm-commits
• [clang] [llvm] [CMAKE] Enable FatLTO as a build option for LLVM (PR #80480)   Paul Kirth via llvm-commits
• [clang] [llvm] [CMAKE] Enable FatLTO as a build option for LLVM (PR #80480)   Stephen Tozer via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [clang] [llvm] [LV][LAA] Vectorize math lib calls with mem write-only attribute (PR #78432)   Paschalis Mpeis via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Jessica Clarke via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Jessica Clarke via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Jessica Clarke via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Paul Walker via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [llvm] Perform bitreverse using AVX512 GFNI for i32 and i64. (PR #81764)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Paul Walker via llvm-commits
• [llvm] Revert "[Hexagon] Optimize post-increment load and stores in loops. (… (PR #83151)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Optimize post-increment load and stores in loops. (PR #82418)   Sumanth Gundapaneni via llvm-commits
• [llvm] Revert "[Hexagon] Optimize post-increment load and stores in loops. (… (PR #83151)   Sumanth Gundapaneni via llvm-commits
• [llvm] Revert "[Hexagon] Optimize post-increment load and stores in loops. (… (PR #83151)   via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   David Chisnall via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   zhijian lin via llvm-commits
• [llvm] [llvm-mca] Account for AcquireAtCycles in llvm-mca (PR #80742)   Michael Maitland via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   zhijian lin via llvm-commits
• [llvm] [llvm-mca] Account for AcquireAtCycles in llvm-mca (PR #80742)   Michael Maitland via llvm-commits
• [llvm] [infra] Add git to Linux container (PR #82687)   Tom Stellard via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83015)   via llvm-commits
• [llvm] Perform bitreverse using AVX512 GFNI for i32 and i64. (PR #81764)   via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83015)   via llvm-commits
• [llvm] Perform bitreverse using AVX512 GFNI for i32 and i64. (PR #81764)   via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] [llvm][ARM][AArch64] Don't use module attr as function attr. (PR #83154)   via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   via llvm-commits
• [llvm] [llvm][ARM][AArch64] Don't use module attr as function attr. (PR #83154)   via llvm-commits
• [llvm] Perform bitreverse using AVX512 GFNI for i32 and i64. (PR #81764)   via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] Perform bitreverse using AVX512 GFNI for i32 and i64. (PR #81764)   via llvm-commits
• [llvm] [TableGen][CodeGenTarget] Add support for v3i8 and v3i1 MVTs. [NFCI] (PR #83140)   Visoiu Mistrih Francis via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Jeffrey Byrnes via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Thorsten Schütt via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Thorsten Schütt via llvm-commits
• [llvm] [workflows] Mention the correct user who makes a /cherry-pick comment (PR #82680)   Tom Stellard via llvm-commits
• [llvm] [workflows] Mention the correct user who makes a /cherry-pick comment (PR #82680)   Tom Stellard via llvm-commits
• [llvm] [LV] Removing option that is no longer needed after recent updates to loop interleaving algorithm (PR #82955)   Nilanjana Basu via llvm-commits
• [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)   Yingwei Zheng via llvm-commits
• [llvm] ae94354 - [LLVM][LangRef] Remove bogus ':' from vector constant text.   Paul Walker via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Fabian Schiebel via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   via llvm-commits
• [llvm] c95febc - [X86] LowerBITREVERSE - add handling for all legal 128/256/512-bit vector types, not just vXi8   Simon Pilgrim via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)   Joshua Batista via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)   Joshua Batista via llvm-commits
• [llvm] Perform bitreverse using AVX512 GFNI for i32 and i64. (PR #81764)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to Shader_FEATURE_INFO. (PR #82700)   Joshua Batista via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to SHADER_FEATURE_FLAG. (PR #82700)   Xiang Li via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to SHADER_FEATURE_FLAG. (PR #82700)   Xiang Li via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [llvm] [llvm-exegesis] Add loop-register snippet annotation (PR #82873)   Aiden Grossman via llvm-commits
• [llvm] f7cf1f6 - [CodeGen][MISched] dumpSched direction depends on field in DAG.   Michael Maitland via llvm-commits
• [llvm] 9106b58 - [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling   Michael Maitland via llvm-commits
• [llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)   Michael Maitland via llvm-commits
• [llvm] [CodeGen][MISched] Add misched post-regalloc bottom-up scheduling (PR #76186)   Michael Maitland via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   via llvm-commits
• [llvm] perf/goldsteinn/unified tracking cache final (PR #83161)   via llvm-commits
• [llvm] [Analysis] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [Analysis] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [lld] 335ac41 - Improve readability of "undefined reference" message (#82671)   via llvm-commits
• [lld] Improve readability of "undefined reference" message (PR #82671)   Walter Lee via llvm-commits
• [lld] Improve readability of "undefined reference" message (PR #82671)   via llvm-commits
• [llvm] [Analysis] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [CodeGen][MISched] Add misched post-regalloc bidirectional scheduling (PR #77138)   Michael Maitland via llvm-commits
• [llvm] [CodeGen][MISched] Add misched post-regalloc bidirectional scheduling (PR #77138)   Michael Maitland via llvm-commits
• [llvm] 12df1cf - [LLVM] Remove bogus whitespace from AArch64TargetParser.h   Paul Walker via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   via llvm-commits
• [llvm] [RISCV] Enable PostRAScheduler for SiFive7 (PR #83166)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Enable PostRAScheduler for SiFive7 (PR #83166)   via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Michael Jones via llvm-commits
• [llvm] [CodeGen][MISched] Add misched post-regalloc bidirectional scheduling (PR #77138)   Michael Maitland via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #79553)   via llvm-commits
• [llvm] [RISCV] Enable PostRAScheduler for SiFive7 (PR #83166)   Craig Topper via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   via llvm-commits
• [llvm] [llvm-objcopy] Add --set-symbol-visibility and --set-symbols-visibility options (PR #80872)   Ilia Kuklin via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [llvm-objcopy] Add --set-symbol-visibility and --set-symbols-visibility options (PR #80872)   Ilia Kuklin via llvm-commits
• [llvm] Revert "[Hexagon] Optimize post-increment load and stores in loops. (… (PR #83151)   Brian Cain via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Michael Jones via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Michael Jones via llvm-commits
• [llvm] [AArch64] Skip over shadow space for ARM64EC entry thunk variadic calls (PR #80994)   Eli Friedman via llvm-commits
• [llvm] abc693f - [AArch64] Skip over shadow space for ARM64EC entry thunk variadic calls (#80994)   via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Kai Nacke via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Sam Clegg via llvm-commits
• [llvm] [InstCombine] Don't require GEP in indexed compare fold (PR #81614)   Yingwei Zheng via llvm-commits
• [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)   Artem Belevich via llvm-commits
• [polly] [polly] Add polly-debug flag to print debug info from all parts of polly (PR #78549)   Eli Friedman via llvm-commits
• [llvm] [llvm-objcopy] Add --set-symbol-visibility and --set-symbols-visibility options (PR #80872)   Fangrui Song via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Kai Nacke via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   Jacek Caban via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Natalie Chouinard via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Natalie Chouinard via llvm-commits
• [llvm] Revert "[Hexagon] Optimize post-increment load and stores in loops. (… (PR #83151)   Sumanth Gundapaneni via llvm-commits
• [llvm] f44c3fa - Revert "[Hexagon] Optimize post-increment load and stores in loops. (… (#83151)   via llvm-commits
• [llvm] Revert "[Hexagon] Optimize post-increment load and stores in loops. (… (PR #83151)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] 13fd4bf - [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (#82888)   via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   Jacek Caban via llvm-commits
• [clang] [llvm] [llvm-ar][Archive] Use getDefaultTargetTriple instead of host triple for the fallback archive format. (PR #82888)   Jacek Caban via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Nikita Popov via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Nikita Popov via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc] Add fixed point support to printf (PR #82707)   Michael Jones via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Nikita Popov via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Thorsten Schütt via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Thomas Symalla via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Thorsten Schütt via llvm-commits
• [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)   Mingming Liu via llvm-commits
• [compiler-rt] 16e74fd - Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (#82711)   via llvm-commits
• [compiler-rt] [llvm] Reland "[TypeProf][InstrPGO] Introduce raw and instr profile format change for type profiling." (PR #82711)   Mingming Liu via llvm-commits
• [compiler-rt] [llvm] A copy of https://github.com/llvm/llvm-project/pull/66825. Actually this is a superset (a copy plus the thinlto-import change) (PR #80761)   Mingming Liu via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Paul Kirth via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Thomas Symalla via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Nikita Popov via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Thomas Symalla via llvm-commits
• [compiler-rt] 19181f2 - [compiler-rt] Add missing include to sanitizer_stackdepot_test.cpp   Alex Richardson via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)   Micah Weston via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   William Moses via llvm-commits
• [compiler-rt] [compiler-rt] Relax CHECK line in reaches_function.c (PR #83089)   Alexander Richardson via llvm-commits
• [llvm] 9ca8db3 - [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (#82292)   via llvm-commits
• [llvm] [SHT_LLVM_BB_ADDR_MAP] Adds pretty printing of BFI and BPI for PGO Analysis Map in tools. (PR #82292)   Micah Weston via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Alexandre Ganea via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Yingwei Zheng via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Thomas Symalla via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   Andreas Jonson via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   Andreas Jonson via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   Andreas Jonson via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --ignore-symbol (PR #80873)   Ilia Kuklin via llvm-commits
• [llvm] Perform bitreverse using AVX512 GFNI for i32 and i64. (PR #81764)   via llvm-commits
• [llvm] f42e321 - [AArch64] Use FMOVDr for clearing upper bits (#83107)   via llvm-commits
• [llvm] [AArch64] Use FMOVDr for clearing upper bits (PR #83107)   David Green via llvm-commits
• [llvm] AMDGPU: Move attributor into optimization pipeline (PR #83131)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] a76c524 - [gn build] Port f44c3faccaa4   LLVM GN Syncbot via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to SHADER_FEATURE_FLAG. (PR #82700)   Xiang Li via llvm-commits
• [llvm] Refactoring changes to enable emitting call graph section (PR #83176)   via llvm-commits
• [llvm] Refactoring changes to enable emitting call graph section (PR #83176)   via llvm-commits
• [llvm] Refactoring changes to enable emitting call graph section (PR #83176)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Fabian Schiebel via llvm-commits
• [llvm] [Transforms] Let amdgcn take advantage of sin(-x) --> -sin(x) (PR #79700)   via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Fabian Schiebel via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Mehdi Amini via llvm-commits
• [clang] [compiler-rt] [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   Mingming Liu via llvm-commits
• [llvm] [ItaniumDemangle] reject A-F in FP literals (PR #83061)   Ryan Prichard via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [ItaniumDemangle] reject A-F in FP literals (PR #83061)   Fangrui Song via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [LV] Fix for miscompile with disjoint or (PR #81922)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] 1d1186d - [llvm-exegesis] Add loop-register snippet annotation (#82873)   via llvm-commits
• [llvm] [llvm-exegesis] Add loop-register snippet annotation (PR #82873)   Aiden Grossman via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   Nico Weber via llvm-commits
• [lld] b0bae44 - [lld] Adds support for xros. (#83031)   via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   Nico Weber via llvm-commits
• [lld] [lld] Adds support for xros. (PR #83031)   via llvm-commits
• [compiler-rt] [compiler-rt] Use locally configured llvm-lit for standalone builds (PR #83178)   Alexander Richardson via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [compiler-rt] [compiler-rt] Use locally configured llvm-lit for standalone builds (PR #83178)   Fangrui Song via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [llvm] 3250330 - [asan] Disable instrumentation for available_externally global with COFF (#81109)   via llvm-commits
• [llvm] [asan] Disable instrumentation for available_externally global with COFF (PR #81109)   Fangrui Song via llvm-commits
• [llvm] [ThinLTO] Add metedata 'thinlto_src_module' and 'thinlto_src_file' (PR #83110)   Teresa Johnson via llvm-commits
• [compiler-rt] 5e31e82 - [compiler-rt] Use locally configured llvm-lit for standalone builds (#83178)   via llvm-commits
• [compiler-rt] [compiler-rt] Use locally configured llvm-lit for standalone builds (PR #83178)   Alexander Richardson via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   David Li via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   Alina Sbirlea via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Kai Nacke via llvm-commits
• [clang] [llvm] Modify BoundsSan to improve debuggability (PR #65972)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Enable PostRAScheduler for SiFive7 (PR #83166)   Michael Maitland via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [clang] [llvm] Modify BoundsSan to improve debuggability (PR #65972)   Oskar Wirga via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Kai Nacke via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Mehdi Amini via llvm-commits
• [llvm] Refactoring changes to support emitting call graph section (PR #83176)   via llvm-commits
• [compiler-rt] [compiler-rt] Allow running tests without installing first (PR #83088)   Alexander Richardson via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   Johannes Doerfert via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   Johannes Doerfert via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   Johannes Doerfert via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Kai Nacke via llvm-commits
• [libc] [llvm] [libc][NFC] rename `float.h` macro file to `types.h` (PR #83190)   Guillaume Chatelet via llvm-commits
• [libc] [llvm] [libc][NFC] rename `float.h` macro file to `types.h` (PR #83190)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [clang] [llvm] [openmp] [PGO][OpenMP] Instrumentation for GPU devices (PR #76587)   Ethan Luis McDonough via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [libc] [llvm] [libc][NFC] rename `float.h` macro file to `types.h` (PR #83190)   Guillaume Chatelet via llvm-commits
• [llvm] [Transforms] Let amdgcn take advantage of sin(-x) --> -sin(x) (PR #79700)   via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [llvm] d4cdb51 - [WebAssembly] Add RefTypeMem2Local pass (#81965)   via llvm-commits
• [llvm] [WebAssembly] Add RefTypeMem2Local pass (PR #81965)   Heejin Ahn via llvm-commits
• [compiler-rt] [nfc][compiler-rt]Remove round-up in __llvm_profile_get_num_data (PR #83194)   Mingming Liu via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [compiler-rt] [nfc][compiler-rt]Remove round-up in __llvm_profile_get_num_data (PR #83194)   Mingming Liu via llvm-commits
• [compiler-rt] [nfc][compiler-rt]Remove round-up in __llvm_profile_get_num_data (PR #83194)   via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   Xiang Li via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [llvm] 5964f4b - [gn build] Port d4cdb516eee4   LLVM GN Syncbot via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   via llvm-commits
• [llvm] [WebAssembly] Use RefTypeMem2Local instead of Mem2Reg (PR #83196)   Heejin Ahn via llvm-commits
• [compiler-rt] [nfc][compiler-rt]Remove round-up in __llvm_profile_get_num_data (PR #83194)   Snehasish Kumar via llvm-commits
• [llvm] [WebAssembly] Use RefTypeMem2Local instead of Mem2Reg (PR #83196)   via llvm-commits
• [libc] [llvm] [libc][NFC] rename `float.h` macro file to `types.h` (PR #83190)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc][NFC] rename `float.h` macro file to `types.h` (PR #83190)   Nick Desaulniers via llvm-commits
• [libc] [llvm] [libc][NFC] rename `float.h` macro file to `types.h` (PR #83190)   Nick Desaulniers via llvm-commits
• [llvm] [LV] Remove unused option (PR #82955)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Remove unused option interleave-small-loop-scalar-reduction (PR #82955)   Nilanjana Basu via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] Refactoring changes to support emitting call graph section (PR #83176)   Paul Kirth via llvm-commits
• [llvm] Refactoring changes to support emitting call graph section (PR #83176)   Paul Kirth via llvm-commits
• [llvm] Refactoring changes to support emitting call graph section (PR #83176)   Paul Kirth via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [clang] [compiler-rt] [llvm] [InstrProf] Single byte counters in coverage (PR #75425)   NAKAMURA Takumi via llvm-commits
• [llvm] [LV] Remove unused option (PR #82955)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Remove unused configuration option (PR #82955)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Remove unused configuration option (PR #82955)   Nilanjana Basu via llvm-commits
• [llvm] [LV] Remove unused configuration option (PR #82955)   Nilanjana Basu via llvm-commits
• [llvm] Refactoring changes to support emitting call graph section (PR #83176)   Paul Kirth via llvm-commits
• [llvm] Refactoring changes to support emitting call graph section (PR #83176)   Paul Kirth via llvm-commits
• [llvm] Refactoring changes to support emitting call graph section (PR #83176)   Paul Kirth via llvm-commits
• [llvm] [GlobalISel] Add a TargetLowering to IRTranslator. NFC (PR #83009)   Amara Emerson via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   Xiang Li via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   Andreas Jonson via llvm-commits
• [llvm] [CodeGen] Resolve FIXME: Find the same unit free in each cycle instead of one in each cycle (PR #82732)   via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [compiler-rt] 7864711 - [nfc][compiler-rt]Remove round-up in __llvm_profile_get_num_data (#83194)   via llvm-commits
• [compiler-rt] [nfc][compiler-rt]Remove round-up in __llvm_profile_get_num_data (PR #83194)   Mingming Liu via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (PR #83038)   Amara Emerson via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   Justin Bogner via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   Justin Bogner via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   Justin Bogner via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   Justin Bogner via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   Justin Bogner via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   Justin Bogner via llvm-commits
• [llvm] [LV] Remove unused configuration option (PR #82955)   Nilanjana Basu via llvm-commits
• [llvm] [InstCombine] Fix for folding `select` into floating point binary operators. (PR #83200)   via llvm-commits
• [llvm] [InstCombine] Fix for folding `select` into floating point binary operators. (PR #83200)   via llvm-commits
• [llvm] [LV] Remove unused configuration option (PR #82955)   Nilanjana Basu via llvm-commits
• [clang] [compiler-rt] [llvm] [InstrProf] Single byte counters in coverage (PR #75425)   via llvm-commits
• [compiler-rt] [builtins] Disable COMPILER_RT_CRT_USE_EH_FRAME_REGISTRY by default (PR #83201)   Fangrui Song via llvm-commits
• [compiler-rt] [builtins] Disable COMPILER_RT_CRT_USE_EH_FRAME_REGISTRY by default (PR #83201)   Fangrui Song via llvm-commits
• [compiler-rt] [scudo] Refactor allocator config to support optional flags (PR #81805)   via llvm-commits
• [clang] [compiler-rt] [llvm] [InstrProf] Single byte counters in coverage (PR #75425)   Petr Hosek via llvm-commits
• [llvm] 001e18c - [NFC] clang-format SROA.cpp   Arthur Eubanks via llvm-commits
• [compiler-rt] [builtins] Disable COMPILER_RT_CRT_USE_EH_FRAME_REGISTRY by default (PR #83201)   Petr Hosek via llvm-commits
• [llvm] [DirectX][NFC] Simplified DXIL Operation mapping to LLVM or DirectX intrinsics in DXIL.td. (PR #83193)   Justin Bogner via llvm-commits
• [llvm] Refactoring changes to support emitting call graph section (PR #83176)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (PR #80488)   Kiran Chandramohan via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (PR #80488)   Kiran Chandramohan via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (PR #80488)   Kiran Chandramohan via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (PR #80488)   Kiran Chandramohan via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (PR #80488)   Kiran Chandramohan via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   Alan Phipps via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [InstCombine] Fix for folding `select` into floating point binary operators. (PR #83200)   via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   Alan Phipps via llvm-commits
• [llvm] [BOLT] Move test under X86 target. NFCI (PR #83202)   Maksim Panchenko via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [RISCV] Add more intrinsics into canSplatOperand. (PR #83106)   Craig Topper via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_BRJT (PR #81811)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_BRJT (PR #81811)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_BRJT (PR #81811)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_BRJT (PR #81811)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_BRJT (PR #81811)   Evgenii Kudriashov via llvm-commits
• [clang] [llvm] [Clang] Correct __builtin_dynamic_object_size for subobject types (PR #83204)   Bill Wendling via llvm-commits
• [clang] [llvm] [Clang] Correct __builtin_dynamic_object_size for subobject types (PR #83204)   via llvm-commits
• [llvm] [InstCombine] Fix for folding `select` into floating point binary operators. (PR #83200)   via llvm-commits
• [clang] [llvm] [Clang] Correct __builtin_dynamic_object_size for subobject types (PR #83204)   Bill Wendling via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [clang] [compiler-rt] [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   Mingming Liu via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Harald van Dijk via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [llvm] [BOLT] Move test under X86 target. NFCI (PR #83202)   Davide Italiano via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Artem Belevich via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   William Moses via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   William Moses via llvm-commits
• [llvm] [AMDGPU] Do not attempt to fallback to default mutations (PR #83208)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Do not attempt to fallback to default mutations (PR #83208)   via llvm-commits
• [llvm] [BOLT] Move test under X86 target. NFCI (PR #83202)   Maksim Panchenko via llvm-commits
• [llvm] [RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (PR #83146)   Philip Reames via llvm-commits
• [compiler-rt] [builtins] Disable COMPILER_RT_CRT_USE_EH_FRAME_REGISTRY by default (PR #83201)   Sam James via llvm-commits
• [llvm] [BOLT] Refactor interface for instruction labels. NFCI (PR #83209)   Maksim Panchenko via llvm-commits
• [llvm] [SelectionDAG] Remove unused getIndexedStridedLoadVP/getIndexedStridedStoreVP functions. NFC (PR #82847)   Philip Reames via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [clang] [llvm] [Clang] Correct __builtin_dynamic_object_size for subobject types (PR #83204)   Bill Wendling via llvm-commits
• [lld] [LLD][COFF] Add support for IMPORT_NAME_EXPORTAS import library names. (PR #83211)   Jacek Caban via llvm-commits
• [lld] [LLD][COFF] Add support for IMPORT_NAME_EXPORTAS import library names. (PR #83211)   via llvm-commits
• [clang] [compiler-rt] [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   Mingming Liu via llvm-commits
• [llvm] Edit Semantics Description of `@llvm.is.constant.*` (PR #77519)   Joerg Sonnenberger via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)   via llvm-commits
• [llvm] [Support] Refactor getN1Bits so it does not work around any g++ bug (PR #78933)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] [CodeGen] Resolve TODO: Add DriverKit to mapToPlatformType (PR #78799)   via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   Lei Wang via llvm-commits
• [compiler-rt] [builtins] Disable COMPILER_RT_CRT_USE_EH_FRAME_REGISTRY by default (PR #83201)   Fangrui Song via llvm-commits
• [llvm] [BOLT] Refactor interface for instruction labels. NFCI (PR #83209)   Maksim Panchenko via llvm-commits
• [compiler-rt] [builtins] Disable COMPILER_RT_CRT_USE_EH_FRAME_REGISTRY by default (PR #83201)   Fangrui Song via llvm-commits
• [llvm] Edit Semantics Description of `@llvm.is.constant.*` (PR #77519)   via llvm-commits
• [llvm] [SEH] Ignore EH pad check for internal intrinsics (PR #79694)   Reid Kleckner via llvm-commits
• [compiler-rt] 062cfad - [builtins] Disable COMPILER_RT_CRT_USE_EH_FRAME_REGISTRY by default (#83201)   via llvm-commits
• [compiler-rt] [builtins] Disable COMPILER_RT_CRT_USE_EH_FRAME_REGISTRY by default (PR #83201)   Fangrui Song via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] 8506a63 - Revert "[WebAssembly] Disable multivalue emission temporarily (#82714)"   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Disable multivalue emission temporarily (PR #82714)   Heejin Ahn via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [llvm] [AMDGPU] Do not attempt to fallback to default mutations (PR #83208)   Austin Kerbow via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [NVPTX] Annotate CUDA kernel pointer arguments with .ptr .space .align attributes. (PR #79646)   via llvm-commits
• [llvm] [InstCombine] Fix for folding `select` into floating point binary operators. (PR #83200)   via llvm-commits
• [llvm] [workflows] Mention the correct user who makes a /cherry-pick comment (PR #82680)   Luke Lau via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   Lei Wang via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   Lei Wang via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   Lei Wang via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   Lei Wang via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   Farzon Lotfi via llvm-commits
• [llvm] [BOLT] Refactor interface for instruction labels. NFCI (PR #83209)   Davide Italiano via llvm-commits
• [llvm] [workflows] Mention the correct user who makes a /cherry-pick comment (PR #82680)   Tom Stellard via llvm-commits
• [llvm] [workflows] Mention the correct user who makes a /cherry-pick comment (PR #82680)   Tom Stellard via llvm-commits
• [llvm] [BOLT] Add reading support for Linux kernel exception table (PR #83100)   Davide Italiano via llvm-commits
• [llvm] [BOLT] Add reading support for Linux kernel exception table (PR #83100)   Davide Italiano via llvm-commits
• [llvm] [BOLT] Add reading support for Linux kernel exception table (PR #83100)   Davide Italiano via llvm-commits
• [llvm] [workflows] Mention the correct user who makes a /cherry-pick comment (PR #82680)   Luke Lau via llvm-commits
• [llvm] 50136ca - [DirectX][NFC] Rename ShaderFlag to SHADER_FEATURE_FLAG. (#82700)   via llvm-commits
• [llvm] [DirectX][NFC] Rename ShaderFlag to SHADER_FEATURE_FLAG. (PR #82700)   Xiang Li via llvm-commits
• [llvm] Allow .alt_entry symbols to pass the .cfi nesting check (PR #82268)   Jon Roelofs via llvm-commits
• [llvm] Allow .alt_entry symbols to pass the .cfi nesting check (PR #82268)   Jon Roelofs via llvm-commits
• [llvm] cf1c97b - [AMDGPU] Do not attempt to fallback to default mutations (#83208)   via llvm-commits
• [llvm] [AMDGPU] Do not attempt to fallback to default mutations (PR #83208)   Jeffrey Byrnes via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   Xiang Li via llvm-commits
• [llvm] Allow .alt_entry symbols to pass the .cfi nesting check (PR #82268)   Jon Roelofs via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] 91d2337 - [RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (#83146)   via llvm-commits
• [llvm] [RISCV] Use a tail agnostic vslideup if possible for scalable insert_subvector (PR #83146)   Luke Lau via llvm-commits
• [llvm] [SLP]Emit actual bitwidth for analyzed MinBitwidth nodes, NFCI. (PR #71536)   Valery Dmitriev via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Xiang Li via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   via llvm-commits
• [llvm] [ThinLTO] Add metedata 'thinlto_src_module' and 'thinlto_src_file' (PR #83110)   via llvm-commits
• [llvm] [BOLT] Refactor interface for instruction labels. NFCI (PR #83209)   Maksim Panchenko via llvm-commits
• [llvm] [llvm-mca] Account for AcquireAtCycles in llvm-mca (PR #80742)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Enable PostRAScheduler for SiFive7 (PR #83166)   Wang Pengcheng via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Fangrui Song via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Fangrui Song via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Fangrui Song via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Wang Pengcheng via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Craig Topper via llvm-commits
• [llvm] [BOLT] Add reading support for Linux kernel exception table (PR #83100)   Maksim Panchenko via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Lu Weining via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Lu Weining via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Lu Weining via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Lu Weining via llvm-commits
• [llvm] [CodeGen][MISched] Add misched post-regalloc bidirectional scheduling (PR #77138)   Wang Pengcheng via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Owen Anderson via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   Christopher Ferris via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   Christopher Ferris via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   Christopher Ferris via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   Christopher Ferris via llvm-commits
• [llvm] [ItaniumDemangle] reject A-F in FP literals (PR #83061)   Ryan Prichard via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Wang Pengcheng via llvm-commits
• [llvm] [PowerPC] Do not generate `isel` instruction if target doesn't have this instruction (PR #72845)   Kai Luo via llvm-commits
• [llvm] [PowerPC] Do not generate `isel` instruction if target doesn't have this instruction (PR #72845)   via llvm-commits
• [llvm] [RISCV] Recursively split concat_vector into smaller LMULs (PR #83035)   Wang Pengcheng via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [PseudoProbe] Extend to skip instrumenting probe into the dests of invoke (PR #79919)   Lei Wang via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   Usman Nadeem via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   Usman Nadeem via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-merge-objc-categories) (PR #82928)   via llvm-commits
• [compiler-rt] [libFuzzer] Fix incorrect coverage number in fork mode (PR #82335)   Scallop Ye via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   Usman Nadeem via llvm-commits
• [llvm] AMDGPU: Add scheduling test for gfx940 (PR #83220)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add scheduling test for gfx940 (PR #83220)   via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   Usman Nadeem via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   Usman Nadeem via llvm-commits
• [llvm] AMDGPU: Move attributor into optimization pipeline (PR #83131)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Move RISCVVType namespace to Support (PR #83222)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Move RISCVVType namespace to Support (PR #83222)   via llvm-commits
• [llvm] [RISCV] Move RISCVVType namespace to Support (PR #83222)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move RISCVVType namespace to Support (PR #83222)   Wang Pengcheng via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Xi Ruoyao via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Move RISCVVType namespace to Support (PR #83222)   Craig Topper via llvm-commits
• [llvm] [RISCV] Move RISCVVType namespace to Support (PR #83222)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Move RISCVVType namespace to TargetParser (PR #83222)   Wang Pengcheng via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Tony Tye via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Matt Arsenault via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Matt Arsenault via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   Mingming Liu via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Matt Arsenault via llvm-commits
• [clang] [llvm] [transforms] Inline simple variadic functions (PR #81058)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [llvm] [IRPGO][ValueProfile] Instrument virtual table address that could be used to do virtual table address comparision for indirect-call-promotion. (PR #66825)   Mingming Liu via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   Matt Arsenault via llvm-commits
• [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)   Matt Arsenault via llvm-commits
• [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   Matt Arsenault via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Matt Arsenault via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Matt Arsenault via llvm-commits
• [llvm] Imprecise switch case (PR #82795)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [llvm] [InstrFDO][TypeProf] Implement binary instrumentation and profile read/write (PR #66825)   Mingming Liu via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   via llvm-commits
• [compiler-rt] [scudo] Refactor allocator config to support optional flags (PR #81805)   via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] [AMDGPU][MC] Support src modifiers for v_mov_b32 and v_movrel* instructions (PR #76498)   Matt Arsenault via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] [AMDGPU][MC] Support src modifiers for v_mov_b32 and v_movrel* instructions (PR #76498)   Matt Arsenault via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Implement -fno-plt for SelectionDAG/GlobalISel (PR #78890)   Fangrui Song via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] [DAG] Improve known bits of Zext/Sext loads with range metadata (PR #80829)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improve known bits of Zext/Sext loads with range metadata (PR #80829)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Basic add_sat and sub_sat vector handling. (PR #80650)   Matt Arsenault via llvm-commits
• [llvm] [GISEL] Add IRTranslation for shufflevector on scalable vector types (PR #80378)   Matt Arsenault via llvm-commits
• [llvm] [ItaniumDemangle] reject A-F in FP literals (PR #83061)   Ryan Prichard via llvm-commits
• [llvm] 8eea478 - [ItaniumDemangle] reject A-F in FP literals (#83061)   via llvm-commits
• [llvm] [ItaniumDemangle] reject A-F in FP literals (PR #83061)   Ryan Prichard via llvm-commits
• [llvm] [AMDGPU]: Accept constant zero bytes in v_perm OrCombine (PR #66533)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement only for max, not min (PR #81505)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement only for max, not min (PR #81505)   Matt Arsenault via llvm-commits
• [llvm] 28c29fb - [RISCV] Add exact VLEN RUNs for insert_subvector and concat_vector tests. NFC   Luke Lau via llvm-commits
• [llvm] [InstCombine] ptrmask of gep for dynamic pointer aligment (PR #80002)   Matt Arsenault via llvm-commits
• [llvm] check if operand is div in fold FDivSqrtDivisor (PR #81970)   Matt Arsenault via llvm-commits
• [llvm] check if operand is div in fold FDivSqrtDivisor (PR #81970)   Matt Arsenault via llvm-commits
• [llvm] check if operand is div in fold FDivSqrtDivisor (PR #81970)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [llvm] [InstrFDO][TypeProf] Implement binary instrumentation and profile read/write (PR #66825)   Mingming Liu via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Nick Anderson via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] Reenable JumpTableToSwitch pass by default (PR #83229)   Alexander Shaposhnikov via llvm-commits
• [llvm] Reenable JumpTableToSwitch pass by default (PR #83229)   via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [llvm] [InstrFDO][TypeProf] Implement binary instrumentation and profile read/write (PR #66825)   Mingming Liu via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for admgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner][VP] add getNegative for VPMatchContext (PR #80635)   Jianjian Guan via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for amdgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   Wang Pengcheng via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Thorsten Schütt via llvm-commits
• [llvm] 9617da8 - [RISCV] Use a ta vslideup if inserting over end of InterSubVT (#83230)   via llvm-commits
• [llvm] [RISCV] Use a ta vslideup if inserting over end of InterSubVT (PR #83230)   Luke Lau via llvm-commits
• [llvm] [llvm-objcopy] Add --set-symbol-visibility and --set-symbols-visibility options (PR #80872)   James Henderson via llvm-commits
• [llvm] [AArch64] Disable FastISel/GlobalISel for ZT0 state (PR #82768)   Sander de Smalen via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Matt Arsenault via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Craig Topper via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   David Green via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)   via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Yingwei Zheng via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --ignore-symbol (PR #80873)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --ignore-symbol (PR #80873)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --ignore-symbol (PR #80873)   James Henderson via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --ignore-symbol (PR #80873)   James Henderson via llvm-commits
• [llvm] 2b54510 - [GlobalISel] Add a TargetLowering variable to IRTranslator. NFC (#83009)   via llvm-commits
• [llvm] [GlobalISel] Add a TargetLowering to IRTranslator. NFC (PR #83009)   David Green via llvm-commits
• [llvm] AMDGPU: Add scheduling test for gfx940 (PR #83220)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for amdgpu_cs (PR #82971)   Diana Picus via llvm-commits
• [llvm] [AArch64][GlobalISel] Basic add_sat and sub_sat vector handling. (PR #80650)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Basic add_sat and sub_sat vector handling. (PR #80650)   David Green via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Sander de Smalen via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [llvm][ARM][AArch64] Don't use module attr as function attr. (PR #83154)   Tomas Matheson via llvm-commits
• [llvm] 6e41d60 - [SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (#83017)   via llvm-commits
• [llvm] [SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (PR #83017)   David Green via llvm-commits
• [llvm] [InstrProf] Change step from 64-bit to pointer-sized int (PR #83239)   Jovan Dmitrović via llvm-commits
• [llvm] [InstrProf] Change step from 64-bit to pointer-sized int (PR #83239)   via llvm-commits
• [llvm] [InstrProf] Change step from 64-bit to pointer-sized int (PR #83239)   via llvm-commits
• [llvm] [llvm][vfs] Remove blank comment after \endverbatim doxygen command (PR #83240)   via llvm-commits
• [llvm] [llvm][vfs] Remove blank comment after \endverbatim doxygen command (PR #83240)   via llvm-commits
• [llvm] [llvm][vfs] Remove blank comment after \endverbatim doxygen command (PR #83240)   via llvm-commits
• [llvm] ba69230 - [AArch64][GlobalISel] Pre-Commit Test for G_STORE v4s8 (#82498)   Tuan Chuong Goh via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   Stephen Tozer via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   Simon Pilgrim via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)   via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   Florian Hahn via llvm-commits
• [clang] [llvm] [LLVM][TypeSize] Remove default constructor. (PR #82810)   Sander de Smalen via llvm-commits
• [llvm] Silence illegal address computation warning (PR #83244)   Martin Wehking via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   via llvm-commits
• [llvm] 686ec7c - [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (#82498)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_STORE for v4s8 vector (PR #82498)   via llvm-commits
• [llvm] [AArch64][SME] Remove unused ZA lazy-save (PR #81648)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64][SME] Remove unused ZA lazy-save (PR #81648)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Disable FastISel/GlobalISel for ZT0 state (PR #82768)   Kerry McLaughlin via llvm-commits
• [llvm] 41427b0 - [AArch64] Disable FastISel/GlobalISel for ZT0 state (#82768)   via llvm-commits
• [llvm] [AArch64] Disable FastISel/GlobalISel for ZT0 state (PR #82768)   Sander de Smalen via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] [LoopUnroll] Add NUW to IV increment introduced by runtime unrolling. (PR #83246)   Florian Hahn via llvm-commits
• [llvm] fd336c3 - [AArch64][GlobalISel] Pre-Commit Test for Legalize G_LOAD v4i8 (#82989)   Tuan Chuong Goh via llvm-commits
• [llvm] [LoopUnroll] Add NUW to IV increment introduced by runtime unrolling. (PR #83246)   via llvm-commits
• [llvm] [DAG] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Factor out common code from SIInsertWaitcnts (PR #83018)   Jay Foad via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] Reenable JumpTableToSwitch pass by default (PR #83229)   David Spickett via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [MC] Teach checkAsmTiedOperandConstraints about optional operands (PR #81381)   Sergei Barannikov via llvm-commits
• [llvm] 37daff0 - [X86] setcc-lowering.ll - regenerate with AVX2 test coverage   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Jay Foad via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Jay Foad via llvm-commits
• [llvm] [Propeller] CFG drift detect (PR #80431)   via llvm-commits
• [llvm] [RemoveDIs] Add bitcode format (PR #83251)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Add bitcode format (PR #83251)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Paul Walker via llvm-commits
• [llvm] [RemoveDIs] Add bitcode format (PR #83251)   via llvm-commits
• [llvm] [RemoveDIs] Add bitcode format (PR #83251)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] 3d454d2 - [LLVM][TypeSize] Remove default constructor. (#82810)   via llvm-commits
• [clang] [llvm] [LLVM][TypeSize] Remove default constructor. (PR #82810)   Paul Walker via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Paul Walker via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Paul Walker via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Paul Walker via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Jay Foad via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [AArch64] Support scalable offsets with isLegalAddressingMode (PR #83255)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Support scalable offsets with isLegalAddressingMode (PR #83255)   via llvm-commits
• [llvm] [AArch64] Support scalable offsets with isLegalAddressingMode (PR #83255)   via llvm-commits
• [llvm] [RemoveDIs] Read/write DbgRecords directly to/from bitcode (PR #83251)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Read/write DbgRecords directly from/to bitcode (PR #83251)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AMDGPU] Fix SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)   Valery Pykhtin via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [llvm] [NFC][RemoveDIs] Have CreateNeg only accept iterators, template for other patches (PR #82999)   Stephen Tozer via llvm-commits
• [llvm] [NFC][RemoveDIs] Have CreateNeg only accept iterators, template for other patches (PR #82999)   Stephen Tozer via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [llvm] 6287b7b - [X86] combineEXTRACT_SUBVECTOR - extract 256-bit comparisons if only one subvector is required   Simon Pilgrim via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] 0a54b36 - [X86] Resolve FIXME: Create cld only when needed (#82415)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Create cld only when needed (PR #82415)   Simon Pilgrim via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   Jeremy Morse via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   Jeremy Morse via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   Jeremy Morse via llvm-commits
• [llvm] 07d8a45 - [llvm-objcopy] Add --set-symbol-visibility and --set-symbols-visibility options (#80872)   via llvm-commits
• [llvm] [llvm-objcopy] Add --set-symbol-visibility and --set-symbols-visibility options (PR #80872)   Ilia Kuklin via llvm-commits
• [llvm] Silence illegal address computation warning (PR #83244)   Martin Wehking via llvm-commits
• [llvm] Silence illegal address computation warning (PR #83244)   via llvm-commits
• [llvm] [LV] Add test for tail fold by masking with external IV users. (PR #82329)   Niwin Anto via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Paul Walker via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   Stephen Tozer via llvm-commits
• [llvm] [SPIR-V] Do not rely on type metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [SPIR-V] Do not rely on type metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Do not rely on type metadata for ptr element type resolution (PR #82678)   via llvm-commits
• [llvm] [LV] Add test for tail fold by masking with external IV users. (PR #82329)   Niwin Anto via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   Stephen Tozer via llvm-commits
• [llvm] [SPIR-V] Do not rely on type metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [LV] Add test for tail fold by masking with external IV users. (PR #82329)   Niwin Anto via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   Florian Hahn via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Ivan Kosarev via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] 8a5d51b - [ConstraintElim] Use default depth for most calls of isNonNegative.   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Ivan Kosarev via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Jay Foad via llvm-commits
• [llvm] 15d9d0f - [VPlan] Also print final VPlan directly before codegen/execute. (#82269)   via llvm-commits
• [llvm] [VPlan] Also print final VPlan directly before codegen/execute. (PR #82269)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] Perform bitreverse using AVX512 GFNI for i32 and i64. (PR #81764)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Phoebe Wang via llvm-commits
• [llvm] Perform bitreverse using AVX512 GFNI for i32 and i64. (PR #81764)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Phoebe Wang via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [AMDGPU][MC] Support src modifiers for v_mov_b32 and v_movrel* instructions (PR #76498)   via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Vyacheslav Levytskyy via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Alexandre Ganea via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Alexandre Ganea via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Alexandre Ganea via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Alexandre Ganea via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   Jeremy Morse via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_LOAD for v4s8 Vector (PR #82989)   via llvm-commits
• [llvm] [LV] Add test for tail fold by masking with external IV users. (PR #82329)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Vyacheslav Levytskyy via llvm-commits
• [llvm] ce0687e - [LV] Add test for tail fold by masking with external IV users. (#82329)   via llvm-commits
• [llvm] [LV] Add test for tail fold by masking with external IV users. (PR #82329)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [LV] Add test for tail fold by masking with external IV users. (PR #82329)   via llvm-commits
• [llvm] [SLP]Emit actual bitwidth for analyzed MinBitwidth nodes, NFCI. (PR #71536)   Alexey Bataev via llvm-commits
• [clang] [llvm] [AArch64] [SVE] Created intrinsics for DUPQ instr. (PR #83260)   via llvm-commits
• [clang] [llvm] [AArch64] [SVE] Created intrinsics for DUPQ instr. (PR #83260)   via llvm-commits
• [llvm] a845ea3 - [AMDGPU] Fix SDWA 'preserve' transformation for instructions in different basic blocks. (#82406)   via llvm-commits
• [llvm] [AMDGPU] Fix SDWA 'preserve' transformation for instructions in different basic blocks. (PR #82406)   Valery Pykhtin via llvm-commits
• [llvm] [mlir] [mlir] Expose MLIR_CUDA_CONVERSIONS_ENABLED in mlir-config.h. (PR #83004)   Ingo Müller via llvm-commits
• [llvm] Reenable JumpTableToSwitch pass by default (PR #83229)   David Spickett via llvm-commits
• [llvm] [RemoveDIs] Read/write DbgRecords directly from/to bitcode (PR #83251)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RemoveDIs] Read/write DbgRecords directly from/to bitcode (PR #83251)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [llvm] 8e51b22 - [AArch64][GlobalISel] Legalize G_LOAD for v4s8 Vector (#82989)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_LOAD for v4s8 Vector (PR #82989)   via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Vyacheslav Levytskyy via llvm-commits
• [llvm] Reenable JumpTableToSwitch pass by default (PR #83229)   Florian Hahn via llvm-commits
• [llvm] [mlir] [openmp] [Flang][OpenMP] Add support for schedule clause for GPU (PR #81618)   Dominik Adamski via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [llvm] Reenable JumpTableToSwitch pass by default (PR #83229)   David Spickett via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Sander de Smalen via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Phoebe Wang via llvm-commits
• [llvm] Use object directly instead of accessing ArrayRef (PR #83263)   Martin Wehking via llvm-commits
• [llvm] Use object directly instead of accessing ArrayRef (PR #83263)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Georgios Pinitas via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Jay Foad via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Jay Foad via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Jay Foad via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (PR #80488)   Leandro Lupori via llvm-commits
• [llvm] Extend GCC workaround to GCC < 8.4 for llvm::iterator_range ctor (PR #82643)   Thomas Preud'homme via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (PR #80488)   Leandro Lupori via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (PR #80488)   Leandro Lupori via llvm-commits
• [llvm] [SLP] Collect candidate VFs in vector in vectorizeStores (NFC). (PR #82793)   Alexey Bataev via llvm-commits
• [llvm] c89d511 - [SLP]Use It->second.first for BWSz, NFC.   Alexey Bataev via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   via llvm-commits
• [llvm] 680c780 - [AMDGPU][AsmParser] Support structured HWREG operands. (#82805)   via llvm-commits
• [llvm] [AMDGPU][AsmParser] Support structured HWREG operands. (PR #82805)   Ivan Kosarev via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Brandon Wu via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)   Alexey Bataev via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   zhijian lin via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] [AArch64][GlobalISel] Expand abs.v4i8 to v4i16 and abs.v2s16 to v2s32 (PR #81231)   Dhruv Chawla via llvm-commits
• [llvm] Use object directly instead of accessing ArrayRef (PR #83263)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] Silence potential overflow warning (PR #83272)   Martin Wehking via llvm-commits
• [llvm] Silence potential overflow warning (PR #83272)   via llvm-commits
• [llvm] [LV][NFC]Preselect folding style before choosing maxing VF, NFC. (PR #81885)   Alexey Bataev via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [LV][NFC]Preselect folding style while chosing the max VF, NFC. (PR #81885)   Alexey Bataev via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Jay Foad via llvm-commits
• [llvm] fdd60c7 - [LV][NFC]Preselect folding style while chosing the max VF, NFC.   via llvm-commits
• [llvm] [LV][NFC]Preselect folding style while chosing the max VF, NFC. (PR #81885)   Alexey Bataev via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-merge-objc-categories) (PR #82928)   via llvm-commits
• [llvm] 3e35ba5 - AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (#82996)   via llvm-commits
• [llvm] AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (PR #82996)   Petar Avramovic via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-merge-objc-categories) (PR #82928)   via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM, disable FEAT_MEC for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Jason Eckhardt via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM, disable FEAT_MEC for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM, disable FEAT_MEC for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM, disable FEAT_MEC for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   Xiang Li via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Kai Nacke via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   Xiang Li via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Yingwei Zheng via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Andrei Safronov via llvm-commits
• [llvm] [llvm][AArch64] Autoupgrade function attributes from Module attributes. (PR #82763)   via llvm-commits
• [llvm] [RemoveDIs] Read/write DbgRecords directly from/to bitcode (PR #83251)   Teresa Johnson via llvm-commits
• [llvm] [ThinLTO] Add metedata 'thinlto_src_module' and 'thinlto_src_file' (PR #83110)   Teresa Johnson via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Thorsten Schütt via llvm-commits
• [llvm] 80cff27 - [LV][NFC]Fix a misprint, NFC.   Alexey Bataev via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Collect candidate VFs in vector in vectorizeStores (NFC). (PR #82793)   Florian Hahn via llvm-commits
• [llvm] [SLP] Collect candidate VFs in vector in vectorizeStores (NFC). (PR #82793)   Florian Hahn via llvm-commits
• [llvm] [TableGen] Use consistent field kind checking in getNumericKey. (PR #83284)   Jason Eckhardt via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Chris B via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Evgenii Kudriashov via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Chris B via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Chris B via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Chris B via llvm-commits
• [llvm] 3fac056 - [VPlan] Reset trip count when replacing ExpandSCEV recipe.   Florian Hahn via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Philip Reames via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   via llvm-commits
• [llvm] 64422cf - [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (#80488)   via llvm-commits
• [flang] [llvm] [mlir] [llvm][mlir][OMPIRBuilder] Translate omp.single's copyprivate (PR #80488)   Leandro Lupori via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   Paul Walker via llvm-commits
• [clang] [llvm] [MC/DC][Coverage] Loosen the limit of NumConds from 6 (PR #82448)   via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Alexey Bataev via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Thorsten Schütt via llvm-commits
• [llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)   Luke Lau via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Shilei Tian via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)   Luke Lau via llvm-commits
• [llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)   Luke Lau via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Matt Arsenault via llvm-commits
• [llvm] 2640277 - [AArch64] Optimized generated assembly for bool to svbool_t conversions (#83001)   via llvm-commits
• [llvm] [AArch64] Optimized generated assembly for bool to svbool_t conversions (PR #83001)   via llvm-commits
• [llvm] [TableGen] Extend direct lookup to instruction values in generic tables. (PR #80486)   Jason Eckhardt via llvm-commits
• [llvm] [TableGen] Use consistent field kind checking in getNumericKey. (PR #83284)   Jason Eckhardt via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Craig Topper via llvm-commits
• [llvm] Reenable JumpTableToSwitch pass by default (PR #83229)   David Spickett via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Shilei Tian via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Evgenii Kudriashov via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] 634b024 - [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (#83116)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [AArch64] Lowering of fpmode intrinsics in DAG (PR #80611)   Serge Pavlov via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Tomas Matheson via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Xiang Li via llvm-commits
• [compiler-rt] [scudo] Allow to resize allocation ring buffer (PR #82683)   Florian Mayer via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Xiang Li via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Xiang Li via llvm-commits
• [llvm] [SimplifyCFG] Fix hoisting problem in SimplifyCFG (PR #78615)   via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   Eli Friedman via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Paschalis Mpeis via llvm-commits
• [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)   Ben Langmuir via llvm-commits
• [clang] [llvm] [HIP] Support compressing bundle by LZMA (PR #83297)   Yaxun Liu via llvm-commits
• [clang] [llvm] [HIP] Support compressing bundle by LZMA (PR #83297)   via llvm-commits
• [clang] [llvm] [HIP] Support compressing bundle by LZMA (PR #83297)   Joseph Huber via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Alexey Bataev via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Paschalis Mpeis via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Alexey Bataev via llvm-commits
• [llvm] [AArch64][SME] Save VG for unwind info when changing streaming-mode (PR #83301)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64][SME] Save VG for unwind info when changing streaming-mode (PR #83301)   via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Paul Walker via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [llvm] [HIP] Support compressing bundle by LZMA (PR #83297)   Yaxun Liu via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   via llvm-commits
• [llvm] add LZMA for compression/decompression (PR #83297)   Yaxun Liu via llvm-commits
• [llvm] add LZMA for compression/decompression (PR #83297)   Yaxun Liu via llvm-commits
• [llvm] add LZMA for compression/decompression (PR #83297)   Yaxun Liu via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Joseph Huber via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Joseph Huber via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Alexey Bataev via llvm-commits
• [clang] [llvm] [HIP] Support compressing bundle by LZMA (PR #83306)   Yaxun Liu via llvm-commits
• [clang] [llvm] [HIP] Support compressing bundle by LZMA (PR #83306)   via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   Diana Picus via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [clang] [llvm] [HIP] Support compressing bundle by LZMA (PR #83306)   Yaxun Liu via llvm-commits
• [llvm] ad43ea3 - [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (#83029)   via llvm-commits
• [llvm] [TableGen] Add support for DefaultMode in per-HwMode encode/decode. (PR #83029)   Wang Pengcheng via llvm-commits
• [clang] [llvm] [HIP] Support compressing bundle by LZMA (PR #83306)   Joseph Huber via llvm-commits
• [llvm] AMDGPU: Add scheduling test for gfx940 (PR #83220)   Diana Picus via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Paul Walker via llvm-commits
• [llvm] [llvm-objcopy] Add llvm-objcopy option --ignore-symbol (PR #80873)   Ilia Kuklin via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [llvm] [llvm-objcopy] Add --skip-symbol and --skip-symbols options (PR #80873)   Ilia Kuklin via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [llvm] [llvm-objcopy] Add --skip-symbol and --skip-symbols options (PR #80873)   Ilia Kuklin via llvm-commits
• [llvm] [NFC][AMDGPU] Move the rem tests in `div_i128.ll` into `rem_i128.ll` (PR #83307)   Shilei Tian via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   via llvm-commits
• [llvm] [NFC][AMDGPU] Move the rem tests in `div_i128.ll` into `rem_i128.ll` (PR #83307)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] f9b0799 - [gn build] Port c6cbf81c84b0   LLVM GN Syncbot via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Fabian Schiebel via llvm-commits
• [llvm] [SLP]Add runtime stride support for strided loads. (PR #81517)   Alexey Bataev via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Paul Walker via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Paul Walker via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Paul Walker via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   Mingming Liu via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)   Luke Lau via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   via llvm-commits
• [llvm] 1c211bc - [LV] Remove unused configuration option (#82955)   via llvm-commits
• [llvm] [LV] Remove unused configuration option (PR #82955)   Nilanjana Basu via llvm-commits
• [llvm] [AArch64][LV][SLP] Vectorizers use getFRemInstrCost for frem costs (PR #82488)   Paul Walker via llvm-commits
• [llvm] AMDGPU: Move attributor into optimization pipeline (PR #83131)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Mike Rice via llvm-commits
• [llvm] AMDGPU: Add scheduling test for gfx940 (PR #83220)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)   Alexey Bataev via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Alexandre Ganea via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Alexandre Ganea via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   Stephen Tozer via llvm-commits
• [llvm] [RemoveDIs][DebugInfo] Verifier and printing fixes for DPLabel (PR #83242)   Stephen Tozer via llvm-commits
• [llvm] [vim] Fix command already exists on opening multiple mir buffers (PR #82410)   Joe Nash via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)   Simon Pilgrim via llvm-commits
• [llvm] [AIX] Support per global code model. (PR #79202)   Sean Fertile via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Artem Belevich via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [llvm] 6244dfe - llvm-dwarfdump --verify aggregated output to JSON file (#81762)   via llvm-commits
• [llvm] llvm-dwarfdump --verify aggregated output to JSON file (PR #81762)   Greg Clayton via llvm-commits
• [lld] [LLD][COFF] Add support for IMPORT_NAME_EXPORTAS import library names. (PR #83211)   Daniel Paoliello via llvm-commits
• [lld] [LLD][COFF] Add support for IMPORT_NAME_EXPORTAS import library names. (PR #83211)   Daniel Paoliello via llvm-commits
• [lld] [LLD][COFF] Add support for IMPORT_NAME_EXPORTAS import library names. (PR #83211)   Daniel Paoliello via llvm-commits
• [llvm] [VPlan] Delay adding canonical IV increment and exit branches. (PR #82270)   Kolya Panchenko via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [llvm] [SLP]Improve minbitwidth analysis. (PR #78976)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Improve minbitwidth analysis. (PR #78976)   Alexey Bataev via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)   Alexey Bataev via llvm-commits
• [llvm] b4bc19e - [X86] Add tests showing failure to demand only the sign bit of a sitofp/uitofp node   Simon Pilgrim via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Farzon Lotfi via llvm-commits
• [llvm] 782147e - [CMake][LIT] Add option to run lit testsuites in parallel (#82899)   via llvm-commits
• [llvm] [CMake][LIT] Add option to run lit testsuites in parallel (PR #82899)   Joe Loser via llvm-commits
• [llvm] [CMake][LIT] Add option to run lit testsuites in parallel (PR #82899)   via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] [vim] Fix command already exists on opening multiple mir buffers (PR #82410)   Fraser Cormack via llvm-commits
• [llvm] 2eb6398 - [SROA] Unfold gep of index phi (#83087)   via llvm-commits
• [llvm] [AIX] Support per global code model. (PR #79202)   Sean Fertile via llvm-commits
• [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)   Craig Topper via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   via llvm-commits
• [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)   Craig Topper via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [llvm] [llvm] Remove pipeline checks for optsize for DFAJumpThreadingPass (PR #83318)   Paul Kirth via llvm-commits
• [llvm] [llvm] Remove pipeline checks for optsize for DFAJumpThreadingPass (PR #83318)   Arthur Eubanks via llvm-commits
• [llvm] [llvm] Remove pipeline checks for optsize for DFAJumpThreadingPass (PR #83318)   Paul Kirth via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Farzon Lotfi via llvm-commits
• [llvm] 777ac46 - [llvm] Remove pipeline checks for optsize for DFAJumpThreadingPass   via llvm-commits
• [llvm] [llvm] Remove pipeline checks for optsize for DFAJumpThreadingPass (PR #83318)   Paul Kirth via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Farzon Lotfi via llvm-commits
• [llvm] [RISCV] Add a command line option to disable cost per use for compressed registers. (PR #83320)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a command line option to disable cost per use for compressed registers. (PR #83320)   via llvm-commits
• [llvm] [NFC][AMDGPU] Move the rem tests in `div_i128.ll` into `rem_i128.ll` (PR #83307)   Stanislav Mekhanoshin via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-merge-objc-categories) (PR #82928)   via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Sergei Barannikov via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Xiang Li via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [vim] Fix command already exists on opening multiple mir buffers (PR #82410)   Joe Nash via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   Xiang Li via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   Panagiotis K via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   Pavel Iliin via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Justin Bogner via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [llvm] [Release] Install compiler-rt builtins during Phase 1 on AIX (PR #81485)   Tom Stellard via llvm-commits
• [llvm] [Release] Install compiler-rt builtins during Phase 1 on AIX (PR #81485)   Tom Stellard via llvm-commits
• [llvm] [Release] Install compiler-rt builtins during Phase 1 on AIX (PR #81485)   via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Michael Maitland via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Justin Bogner via llvm-commits
• [clang] [flang] [libcxx] [llvm] [mlir] [NFC][AMDGPU] Move the rem tests in `div_i128.ll` into `rem_i128.ll` (PR #83307)   Zequan Wu via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   David Li via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   David Li via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   David Li via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   David Li via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   David Li via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   David Li via llvm-commits
• [lld] [LLD][COFF] Add support for IMPORT_NAME_EXPORTAS import library names. (PR #83211)   Jacek Caban via llvm-commits
• [compiler-rt] 1a7776a - Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (#83081)   via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Timothy Herchen via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Owen Anderson via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Owen Anderson via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Owen Anderson via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Owen Anderson via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Owen Anderson via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   Mingming Liu via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   Mingming Liu via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   Mingming Liu via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   Mingming Liu via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   Mingming Liu via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   Mingming Liu via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Owen Anderson via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   Owen Anderson via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83328)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83328)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83328)   Sumanth Gundapaneni via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83328)   via llvm-commits
• [llvm] b339c88 - [AArch64] Add some base aes intrinsic tests. NFC   David Green via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   Mingming Liu via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83328)   Sergei Barannikov via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83328)   Sumanth Gundapaneni via llvm-commits
• [llvm] [vim] Fix command already exists on opening multiple mir buffers (PR #82410)   Joe Nash via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-merge-objc-categories) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [vim] Fix command already exists on opening multiple mir buffers (PR #82410)   Fraser Cormack via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   Andreas Jonson via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] 5b91647 - Allow .alt_entry symbols to pass the .cfi nesting check (#82268)   via llvm-commits
• [llvm] Allow .alt_entry symbols to pass the .cfi nesting check (PR #82268)   Jon Roelofs via llvm-commits
• [llvm] Allow .alt_entry symbols to pass the .cfi nesting check (PR #82268)   Jon Roelofs via llvm-commits
• [llvm] [IR] Add new Range attribute using new ConstantRange Attribute type (PR #83171)   Andreas Jonson via llvm-commits
• [llvm] [LV] Fix a crash on SELECT masks with a one element vector. (PR #83332)   Cameron McInally via llvm-commits
• [llvm] [LV] Fix a crash on SELECT masks with a one element vector. (PR #83332)   via llvm-commits
• [llvm] [BOLT] Sort TakenBranches immediately before use. NFCI (PR #83333)   Maksim Panchenko via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [llvm] Allow .alt_entry symbols to pass the .cfi nesting check (PR #82268)   via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [llvm] Allow .alt_entry symbols to pass the .cfi nesting check (PR #82268)   Jon Roelofs via llvm-commits
• [llvm] Allow .alt_entry symbols to pass the .cfi nesting check (PR #82268)   Jon Roelofs via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [llvm] [BOLT] Add BinaryFunction::registerBranch(). NFC (PR #83337)   Maksim Panchenko via llvm-commits
• [llvm] Allow .alt_entry symbols to pass the .cfi nesting check (PR #82268)   via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Daniil Kovalev via llvm-commits
• [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)   Michael Spencer via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize constant GEPs to i8 source element type (PR #68882)   via llvm-commits
• [llvm] caca8d3 - [vim] Fix command already exists on opening multiple mir buffers (#82410)   via llvm-commits
• [llvm] [vim] Fix command already exists on opening multiple mir buffers (PR #82410)   Joe Nash via llvm-commits
• [llvm] [GISEL][RISCV] IRTranslator for scalable vector load (PR #80006)   Jiahan Xie via llvm-commits
• [llvm] [LV] Fix a crash on SELECT masks with a one element vector. (PR #83332)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Farzon Lotfi via llvm-commits
• [compiler-rt] [llvm] A copy of https://github.com/llvm/llvm-project/pull/66825. Actually this is a superset (a copy plus the thinlto-import change) (PR #80761)   Mingming Liu via llvm-commits
• [compiler-rt] [llvm] A copy of https://github.com/llvm/llvm-project/pull/66825. Actually this is a superset (a copy plus the thinlto-import change) (PR #80761)   Mingming Liu via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Store RVC and TSO ELF flags explicitly in RISCVTargetStreamer. NFCI (PR #83344)   Craig Topper via llvm-commits
• [llvm] [RISCV] Store RVC and TSO ELF flags explicitly in RISCVTargetStreamer. NFCI (PR #83344)   via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   zhijian lin via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Florian Hahn via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   zhijian lin via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [llvm] [PowerPC] Inline callee if its target-features are a subset of the caller (PR #67710)   Shimin Cui via llvm-commits
• [llvm] Reenable JumpTableToSwitch pass by default (PR #83229)   Florian Hahn via llvm-commits
• [llvm] Missing AArch64ISD::BICi handling (PR #76644)   Sizov Nikita via llvm-commits
• [llvm] [NFC] Move DIExpressionCursor to DebugInfoMetadata.h (PR #69768)   Fangrui Song via llvm-commits
• [llvm] [NFC] Move DIExpressionCursor to DebugInfoMetadata.h (PR #69768)   Fangrui Song via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)   Alexandros Lamprineas via llvm-commits
• [llvm] Export `LLVM_VERSION_*` CMake variables to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [llvm] Export `LLVM_VERSION_*` CMake variables to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)   Daniil Kovalev via llvm-commits
• [clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)   Martin Storsjö via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)   Daniil Kovalev via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)   Daniil Kovalev via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)   Daniil Kovalev via llvm-commits
• [clang] [llvm] [clang][ScanDeps] Allow PCHs to have different VFS overlays (PR #82294)   Ben Langmuir via llvm-commits
• [llvm] 14faf0d - [TextAPI][InstallAPI] Fix documentation typos, NFC   Cyndy Ishida via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   via llvm-commits
• [llvm] dc456ce - [gn] port 249cf356ef21   Nico Weber via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] Spill/restore FP/BP around instructions in which they are clobbered (PR #81048)   Reid Kleckner via llvm-commits
• [llvm] [SelectionDAG] Remove unused getIndexedStridedLoadVP/getIndexedStridedStoreVP functions. NFC (PR #82847)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add a command line option to disable cost per use for compressed registers. (PR #83320)   Philip Reames via llvm-commits
• [llvm] [DAG] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)   via llvm-commits
• [llvm] e7a303e - [SelectionDAG] Remove unused getIndexedStridedLoadVP/getIndexedStridedStoreVP functions. NFC (#82847)   via llvm-commits
• [llvm] [SelectionDAG] Remove unused getIndexedStridedLoadVP/getIndexedStridedStoreVP functions. NFC (PR #82847)   Craig Topper via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Jose Manuel Monsalve Diaz via llvm-commits
• [llvm] c345198 - [RISCV] Add a command line option to disable cost per use for compressed registers. (#83320)   via llvm-commits
• [llvm] [RISCV] Add a command line option to disable cost per use for compressed registers. (PR #83320)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Copy WaveSizePredicate into VOP3_Real. NFCI. (PR #83352)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Copy WaveSizePredicate into VOP3_Real. NFCI. (PR #83352)   via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Craig Topper via llvm-commits
• [llvm] [mlir] [Dwarf] Support `__ptrauth` qualifier in metadata nodes (PR #82363)   Daniil Kovalev via llvm-commits
• [llvm] [mlir] [Dwarf] Support `__ptrauth` qualifier in metadata nodes (PR #82363)   Daniil Kovalev via llvm-commits
• [llvm] [AMDGPU] Copy WaveSizePredicate into VOP3_Real. NFCI. (PR #83352)   Changpeng Fang via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [compiler-rt] [scudo] Refactor allocator config to support optional flags (PR #81805)   via llvm-commits
• [compiler-rt] [scudo] Refactor allocator config to support optional flags (PR #81805)   via llvm-commits
• [llvm] [NFC] Move DIExpressionCursor to DebugInfoMetadata.h (PR #69768)   Shubham Sandeep Rastogi via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   via llvm-commits
• [compiler-rt] Reland "[scudo] Store more blocks in each TransferBatch" (#83078) (PR #83081)   via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   Thurston Dang via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   Thurston Dang via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   David Li via llvm-commits
• [llvm] d7b73c8 - [AMDGPU] Copy WaveSizePredicate into VOP3_Real. NFCI. (#83352)   via llvm-commits
• [llvm] [AMDGPU] Copy WaveSizePredicate into VOP3_Real. NFCI. (PR #83352)   Stanislav Mekhanoshin via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   Thurston Dang via llvm-commits
• [llvm] 191fd2d - [NFC][AMDGPU] Move the rem tests in `div_i128.ll` into `rem_i128.ll` (#83307)   via llvm-commits
• [llvm] [NFC][AMDGPU] Move the rem tests in `div_i128.ll` into `rem_i128.ll` (PR #83307)   Shilei Tian via llvm-commits
• [llvm] 43b7dfc - Revert "[SROA] Unfold gep of index phi (#83087)"   Fangrui Song via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Jez Ng via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Jez Ng via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Jez Ng via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   Panagiotis K via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [lld] [ELF] Don't resolve relocations referencing SHN_ABS to tombstone in non-SHF_ALLOC sections (PR #79238)   Alexander Yermolovich via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   Panagiotis K via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [llvm] [NFC] Move DIExpressionCursor to DebugInfoMetadata.h (PR #69768)   Shubham Sandeep Rastogi via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   Panagiotis K via llvm-commits
• [llvm] [ORC][JITLink] Add Intel VTune support to JITLink (PR #81826)   Lang Hames via llvm-commits
• [llvm] [ORC][JITLink] Add Intel VTune support to JITLink (PR #81826)   Lang Hames via llvm-commits
• [compiler-rt] f83f712 - [scudo][NFC] Explicit type casting to avoid compiler warning (#83355)   via llvm-commits
• [compiler-rt] [scudo][NFC] Explicit type casting to avoid compiler warning (PR #83355)   via llvm-commits
• [lld] [ELF] Don't resolve relocations referencing SHN_ABS to tombstone in non-SHF_ALLOC sections (PR #79238)   Fangrui Song via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Justin Bogner via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   Michael Berg via llvm-commits
• [lld] [ELF] Don't resolve relocations referencing SHN_ABS to tombstone in non-SHF_ALLOC sections (PR #79238)   Alexander Yermolovich via llvm-commits
• [compiler-rt] [HWASan] add check for hwasan_handle_longjmp ignore logic (PR #83359)   Florian Mayer via llvm-commits
• [compiler-rt] [HWASan] add test for hwasan_handle_longjmp ignore logic (PR #83359)   Florian Mayer via llvm-commits
• [compiler-rt] [HWASan] add test for hwasan_handle_longjmp ignore logic (PR #83359)   via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   Justin Bogner via llvm-commits
• [compiler-rt] [HWASan] add test for hwasan_handle_longjmp ignore logic (PR #83359)   via llvm-commits
• [lld] [ELF] Don't resolve relocations referencing SHN_ABS to tombstone in non-SHF_ALLOC sections (PR #79238)   Fangrui Song via llvm-commits
• [llvm] [Support] Use all_read | all_write for createTemporaryFile (PR #83360)   Jonas Devlieghere via llvm-commits
• [llvm] [Support] Use all_read | all_write for createTemporaryFile (PR #83360)   via llvm-commits
• [compiler-rt] [HWASan] add test for hwasan_handle_longjmp ignore logic (PR #83359)   Florian Mayer via llvm-commits
• [clang-tools-extra] [llvm] Add bazel support for clangd as a library. (PR #81556)   via llvm-commits
• [lld] [ELF] Don't resolve relocations referencing SHN_ABS to tombstone in non-SHF_ALLOC sections (PR #79238)   Alexander Yermolovich via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   Craig Topper via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   Craig Topper via llvm-commits
• [llvm] [RISCV] Store RVC and TSO ELF flags explicitly in RISCVTargetStreamer. NFCI (PR #83344)   Paul Kirth via llvm-commits
• [llvm] AMDGPU: Copy s few Predicates from pseudo to real (PR #83363)   Changpeng Fang via llvm-commits
• [llvm] AMDGPU: Copy s few Predicates from pseudo to real (PR #83363)   via llvm-commits
• [llvm] [RISCV] Store RVC and TSO ELF flags explicitly in RISCVTargetStreamer. NFCI (PR #83344)   Fangrui Song via llvm-commits
• [llvm] [UTC] Don't leave dangling CHECK-SAME when removing CHECK lines (PR #82569)   Henrik G. Olsson via llvm-commits
• [llvm] 6a65b44 - [UTC] Don't leave dangling CHECK-SAME when removing CHECK lines (#82569)   via llvm-commits
• [llvm] [UTC] Don't leave dangling CHECK-SAME when removing CHECK lines (PR #82569)   Henrik G. Olsson via llvm-commits
• [llvm] AMDGPU: Copy s few Predicates from pseudo to real (PR #83363)   Changpeng Fang via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Fangrui Song via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseBBInfo` (PR #83364)   Mircea Trofin via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Fangrui Song via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseBBInfo` (PR #83364)   Mircea Trofin via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseBBInfo` (PR #83364)   via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Evgenii Kudriashov via llvm-commits
• [llvm] AMDGPU: Copy a few Predicates from Pseudo to Real (PR #83365)   Changpeng Fang via llvm-commits
• [llvm] AMDGPU: Copy a few Predicates from Pseudo to Real (PR #83365)   via llvm-commits
• [llvm] AMDGPU: Copy a few Predicates from Pseudo to Real (PR #83365)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] 0fe4b9d - AMDGPU: Copy a few Predicates from Pseudo to Real (#83365)   via llvm-commits
• [llvm] AMDGPU: Copy a few Predicates from Pseudo to Real (PR #83365)   Changpeng Fang via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Fangrui Song via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [llvm][vfs] Remove blank comment after \endverbatim doxygen command (PR #83240)   via llvm-commits
• [llvm] [llvm][vfs] Remove blank comment after \endverbatim doxygen command (PR #83240)   via llvm-commits
• [compiler-rt] [scudo] Avoid splitting aligned allocations on Trusty (PR #69281)   Andrei Homescu via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Brandon Wu via llvm-commits
• [llvm] [PowerPC] Do not generate `isel` instruction if target doesn't have this instruction (PR #72845)   Kai Luo via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Brandon Wu via llvm-commits
• [llvm] 273cfd3 - [X86][NFC] Avoid duplicated code in X86ExpandPseudo.cpp by using macro GET_EGPR_IF_ENABLED   Shengchen Kan via llvm-commits
• [llvm] Reland "[llvm][Support] Add support for executing a detached process (#81708)" (PR #83367)   Connor Sughrue via llvm-commits
• [llvm] 265e49d - [X86][NFC] Lowercase first letter of function names in X86ExpandPseudo.cpp   Shengchen Kan via llvm-commits
• [llvm] daf3079 - [ThinLTO] Add metedata 'thinlto_src_module' and 'thinlto_src_file' (#83110)   via llvm-commits
• [llvm] [ThinLTO] Add metedata 'thinlto_src_module' and 'thinlto_src_file' (PR #83110)   via llvm-commits
• [llvm] [InstCombine] limit icmp sgt (shl nsw X, C1), C0 --> icmp sgt X, C0 >> C1 to hasOneUse (PR #74318)   Liao Chunyu via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   Justin Bogner via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)   Jun Wang via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Add the CSR names from Smrnmi. (PR #83370)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add the CSR names from Smrnmi. (PR #83370)   via llvm-commits
• [llvm] [RISCV] Add the CSR names from Smrnmi. (PR #83370)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Craig Topper via llvm-commits
• [llvm] [mlir] [Dwarf] Support `__ptrauth` qualifier in metadata nodes (PR #82363)   Jonas Devlieghere via llvm-commits
• [llvm] [BOLT] Sort TakenBranches immediately before use. NFCI (PR #83333)   Davide Italiano via llvm-commits
• [llvm] [BOLT] Add BinaryFunction::registerBranch(). NFC (PR #83337)   Davide Italiano via llvm-commits
• [llvm] [InstrProf] Change step from 64-bit to pointer-sized int (PR #83239)   Brian Smith via llvm-commits
• [llvm] AMDGPU: Add scheduling test for gfx940 (PR #83220)   Matt Arsenault via llvm-commits
• [llvm] f0484e0 - AMDGPU: Add scheduling test for gfx940 (#83220)   via llvm-commits
• [llvm] AMDGPU: Add scheduling test for gfx940 (PR #83220)   Matt Arsenault via llvm-commits
• [llvm] [DFAJumpThreading] Enable the pass by default (PR #83033)   via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Xiang Li via llvm-commits
• [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)   via llvm-commits
• [llvm] [Hexagon] Update the debug instruction call. (PR #83372)   Sumanth Gundapaneni via llvm-commits
• [llvm] ffa48f0 - [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (#82747)   via llvm-commits
• [llvm] [X86][MC] Teach disassembler to recognize apx instructions which ignores W bit (PR #82747)   via llvm-commits
• [llvm] [Hexagon] Update the debug instruction call. (PR #83372)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Update the debug instruction call. (PR #83372)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Update the debug instruction call. (PR #83372)   via llvm-commits
• [llvm] [BOLT] Add BinaryFunction::registerBranch(). NFC (PR #83337)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Sort TakenBranches immediately before use. NFCI (PR #83333)   Maksim Panchenko via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83328)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Update the debug instruction call. (PR #83372)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Update the debug instruction call. (PR #83372)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Use the correct call to detect debug instructions (PR #83373)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Use the correct call to detect debug instructions (PR #83373)   Sumanth Gundapaneni via llvm-commits
• [llvm] [BOLT] Add BinaryFunction::registerBranch(). NFC (PR #83337)   Maksim Panchenko via llvm-commits
• [llvm] [ORC][JITLink] Add Intel VTune support to JITLink (PR #81826)   Hongyu Chen via llvm-commits
• [llvm] [ORC][JITLink] Add Intel VTune support to JITLink (PR #81826)   Hongyu Chen via llvm-commits
• [llvm] [ORC][JITLink] Add Intel VTune support to JITLink (PR #81826)   Hongyu Chen via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   Amy Kwan via llvm-commits
• [llvm] [RISCV] Implement Intrinsics for XCVmac Extension in CV32E40P (PR #83112)   via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zbc. (PR #83375)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zbc. (PR #83375)   via llvm-commits
• [clang] [llvm] [HIP] Support compressing bundle by LZMA (PR #83306)   Fangrui Song via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Amy Kwan via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   via llvm-commits
• [llvm] [llvm-objcopy] Add --skip-symbol and --skip-symbols options (PR #80873)   Fangrui Song via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   Matt Arsenault via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Brandon Wu via llvm-commits
• [llvm] 14d8c45 - [RISCV] Add more intrinsics into canSplatOperand. (#83106)   via llvm-commits
• [llvm] [RISCV] Add more intrinsics into canSplatOperand. (PR #83106)   Yeting Kuo via llvm-commits
• [llvm] c36cbba - Update IEEE-754 2018 draft references to IEEE-754 2019   Matt Arsenault via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [llvm] Silence potential overflow warning (PR #83272)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zbc. (PR #83375)   Craig Topper via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zbc. (PR #83375)   Craig Topper via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83328)   Sumanth Gundapaneni via llvm-commits
• [clang] [llvm] [PseudoProbe] Mix and reorder block and call probe ID in lexical order (PR #75092)   Lei Wang via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Matt Arsenault via llvm-commits
• [llvm] 71c06bb - [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (#71949)   via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Matt Arsenault via llvm-commits
• [clang] [llvm] [PseudoProbe] Mix and reorder block and call probe ID in lexical order (PR #75092)   Lei Wang via llvm-commits
• [llvm] Silence illegal address computation warning (PR #83244)   Matt Arsenault via llvm-commits
• [clang] [llvm] [transforms] Inline simple variadic functions (PR #81058)   Matt Arsenault via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83379)   Sumanth Gundapaneni via llvm-commits
• [llvm] [Hexagon] Add Loop Alignment pass. (PR #83379)   Sumanth Gundapaneni via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Craig Topper via llvm-commits
• [llvm] 95aab69 - [RISCV] Remove experimental from Zacas. (#83195)   via llvm-commits
• [clang] [llvm] [RISCV] Remove experimental from Zacas. (PR #83195)   Craig Topper via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   Matt Arsenault via llvm-commits
• [llvm] Reland "[llvm][Support] Add support for executing a detached process (#81708)" (PR #83367)   Connor Sughrue via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MC] Support src modifiers for v_mov_b32 and v_movrel* instructions (PR #76498)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Matt Arsenault via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Matt Arsenault via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (PR #83087)   Arthur Eubanks via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] [AArch64] Support scalable offsets with isLegalAddressingMode (PR #83255)   Matt Arsenault via llvm-commits
• [llvm] check if operand is div in fold FDivSqrtDivisor (PR #81970)   Matt Arsenault via llvm-commits
• [llvm] check if operand is div in fold FDivSqrtDivisor (PR #81970)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Every convergent operation needs post-isel processing (PR #80102)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][MachineScheduler] Alternative way to control excess RP. (PR #68004)   Matt Arsenault via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack (PR #78553)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentation] Support MachineFunction in ChangeReporter (PR #80946)   Matt Arsenault via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [PowerPC] Do not generate `isel` instruction if target doesn't have this instruction (PR #72845)   Chen Zheng via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Matt Arsenault via llvm-commits
• [clang] [llvm] [PseudoProbe] Mix and reorder block and call probe ID in lexical order (PR #75092)   via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [llvm] [LegalizeDAG] Optimize CodeGen for `ISD::CTLZ_ZERO_UNDEF` (PR #83039)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] SCC live interval must be recomputed after CF lowering (PR #81817)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] SCC live interval must be recomputed after CF lowering (PR #81817)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] SCC live interval must be recomputed after CF lowering (PR #81817)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Yashwant Singh via llvm-commits
• [llvm] AMDGPU/GlobalISel: Uniformity info based regbankselect (PR #73684)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Uniformity info based regbankselect (PR #73684)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Uniformity info based regbankselect (PR #73684)   Matt Arsenault via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] goldsteinn/knownbits add sub (PR #83382)   via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Yashwant Singh via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [InstCombine] Fix the correctness of missing check reassoc attribute (PR #71277)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [Knowbits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseBBInfo` (PR #83364)   Christian Ulmann via llvm-commits
• [llvm] [LLVM] Adjust argument passing for `APInt`. NFC. (PR #81814)   Matt Arsenault via llvm-commits
• [llvm] [Support] Use all_read | all_write for createTemporaryFile (PR #83360)   Martin Storsjö via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Jinyang He via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Jinyang He via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Fangrui Song via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Matt Arsenault via llvm-commits
• [llvm] 6ee9c8a - [RISCV][CostModel] Updates reduction and shuffle cost (#77342)   via llvm-commits
• [llvm] [RISCV][CostModel] Updates reduction and shuffle cost (PR #77342)   Shih-Po Hung via llvm-commits
• [clang] [llvm] Computing, storing, and restoring conservative call graphs with LLVM (PR #80104)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zbc. (PR #83375)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zbc. (PR #83375)   Yeting Kuo via llvm-commits
• [llvm] [RISCV] Teach RISCVMakeCompressible handle byte/half load/store for Zbc. (PR #83375)   Yeting Kuo via llvm-commits
• [llvm] GlobalISel lane masks merging (PR #73337)   Matt Arsenault via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Phoebe Wang via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   David Green via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Jinyang He via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   David Green via llvm-commits
• [llvm] [AArch64] Implement -fno-plt for SelectionDAG/GlobalISel (PR #78890)   Matt Arsenault via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Yingwei Zheng via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Matt Arsenault via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Matt Arsenault via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for amdgpu_cs (PR #82971)   Nick Anderson via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Wang Pengcheng via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #71949)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for amdgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for amdgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for amdgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Combine (X == 0) & (Y == 0) -> (X | Y) == 0 (PR #69017)   Dávid Ferenc Szabó via llvm-commits
• [llvm] AMDGPU: Add scheduling test for gfx940 (PR #83220)   Mikhail Goncharov via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify MC layer kernel descriptor (PR #80855)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify MC layer kernel descriptor (PR #80855)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify MC layer kernel descriptor (PR #80855)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify MC layer kernel descriptor (PR #80855)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Wang Pengcheng via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   Alexandros Lamprineas via llvm-commits
• [llvm] AMDGPU: Add scheduling test for gfx940 (PR #83220)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][NFC] rename `float.h` macro file to `types.h` (PR #83190)   Guillaume Chatelet via llvm-commits
• [llvm] [RISCV] Add a command line option to disable cost per use for compressed registers. (PR #83320)   Yingwei Zheng via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] c757ca7 - AMDGPU: Remove dead declaration   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fix Failure to convert vector fp comparisons that can be represented as integers #82241 (PR #83274)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Wang Pengcheng via llvm-commits
• [llvm] [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (PR #83098)   Chen Zheng via llvm-commits
• [llvm] [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (PR #83098)   Chen Zheng via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Ádám Kallai via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   via llvm-commits
• [llvm] [LV][NFC] Print VPlan's transformation pipline (PR #72665)   Florian Hahn via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Thorsten Schütt via llvm-commits
• [llvm] Reenable JumpTableToSwitch pass by default (PR #83229)   David Spickett via llvm-commits
• [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][NFC] rename `float.h` macro file to `types.h` (PR #83190)   Guillaume Chatelet via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Graham Hunter via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Thorsten Schütt via llvm-commits
• [llvm] [RISCV] Add the CSR names from Smrnmi. (PR #83370)   Garvit Gupta via llvm-commits
• [libc] [llvm] [libc][NFC] rename `float.h` macro file to `types.h` (PR #83190)   Guillaume Chatelet via llvm-commits
• [llvm] [AMDGPU] Every convergent operation needs post-isel processing (PR #80102)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   David Green via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Thorsten Schütt via llvm-commits
• [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   David Green via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Matt Arsenault via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   Jay Foad via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Matt Arsenault via llvm-commits
• [llvm] 03420f5 - Revert "[llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (#83116)"   Tomas Matheson via llvm-commits
• [llvm] 3196005 - [NFC][PowerPC] use script to regenerate the CHECK lines   Chen Zheng via llvm-commits
• [llvm] [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (PR #83098)   Chen Zheng via llvm-commits
• [llvm] [ADT] Add std::string_view conversion to SmallString (PR #83397)   Aiden Grossman via llvm-commits
• [llvm] WIP: AMDGPU: Document more backend recognized attributes (PR #80239)   Matt Arsenault via llvm-commits
• [llvm] [ADT] Add std::string_view conversion to SmallString (PR #83397)   via llvm-commits
• [llvm] WIP: AMDGPU: Document more backend recognized attributes (PR #80239)   Matt Arsenault via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   Matt Arsenault via llvm-commits
• [llvm] [BOLT][AArch64] Fixes assertion errors occurred when perf2bolt was executed (PR #83394)   Ádám Kallai via llvm-commits
• [llvm] WIP: AMDGPU: Document more backend recognized attributes (PR #80239)   Matt Arsenault via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (PR #81394)   via llvm-commits
• [llvm] [GlobalISel] Dump the machine function after each legalization iteration. NFC (PR #83401)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Fraser Cormack via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Fraser Cormack via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Fraser Cormack via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Fraser Cormack via llvm-commits
• [llvm] [InstCombine] Fix for folding `select` into floating point binary operators. (PR #83200)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Fraser Cormack via llvm-commits
• [llvm] [TableGen] Extend direct lookup to instruction values in generic tables. (PR #80486)   Piotr Sobczak via llvm-commits
• [llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)   Matt Arsenault via llvm-commits
• [llvm] 30b63de - [X86] Regenerate tests to add missing avx512 constant comments   Simon Pilgrim via llvm-commits
• [llvm] 7ff3f97 - [X86] getFauxShuffleMask - handle insert_vector_elt(bitcast(extract_vector_elt(x))) shuffle patterns   Simon Pilgrim via llvm-commits
• [llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Use consistent field kind checking in getNumericKey. (PR #83284)   Piotr Sobczak via llvm-commits
• [llvm] [TableGen] Use consistent field kind checking in getNumericKey. (PR #83284)   Piotr Sobczak via llvm-commits
• [llvm] [TableGen] Use consistent field kind checking in getNumericKey. (PR #83284)   Piotr Sobczak via llvm-commits
• [llvm] [TableGen] Use consistent field kind checking in getNumericKey. (PR #83284)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Matt Arsenault via llvm-commits
• [llvm] [LoopIdiomRecognizer] Implement CRC recognition (PR #79295)   Joe Faulls via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   Matt Arsenault via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   Jay Foad via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   Jay Foad via llvm-commits
• [llvm] WIP: AMDGPU: Document more backend recognized attributes (PR #80239)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Dump the machine function after each legalization iteration. NFC (PR #83401)   David Green via llvm-commits
• [llvm] [GlobalISel] Dump the machine function after each legalization iteration. NFC (PR #83401)   via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   via llvm-commits
• [llvm] WIP: AMDGPU: Document more backend recognized attributes (PR #80239)   Matt Arsenault via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)   Thomas Preud'homme via llvm-commits
• [llvm] ValueTracking: Merge fcmpImpliesClass and fcmpToClassTest (PR #66522)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Document more backend recognized attributes (PR #80239)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Merge fcmpImpliesClass and fcmpToClassTest (PR #66522)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (PR #83408)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Document more backend recognized attributes (PR #80239)   Matt Arsenault via llvm-commits
• [llvm] APFloat: Fix signed zero handling in minnum/maxnum (PR #83376)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (PR #83408)   via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   via llvm-commits
• [llvm] 6cfd343 - APFloat: Fix signed zero handling in minnum/maxnum (#83376)   via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   Matt Arsenault via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   Matt Arsenault via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (PR #83408)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)   Matt Arsenault via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] Dump the machine function after each legalization iteration. NFC (PR #83401)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add an option to disable unsafe uses of atomic xor (PR #69229)   Matt Arsenault via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (PR #82613)   Victor Campos via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] 02bad7a - [AMDGPU] Simplify !if condition. NFC.   Jay Foad via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   via llvm-commits
• [llvm] 72a60e7 - [AArch64][NFC] Use regexes in register class tests   Samuel Tebbs via llvm-commits
• [clang] [llvm] [AMDGPU] Add code model (#70760) test for amdgpu target. (PR #71019)   Matt Arsenault via llvm-commits
• [llvm] 31295bb - Revert "AMDGPU: Add scheduling test for gfx940 (#83220)"   Mitch Phillips via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (PR #83408)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (PR #83408)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (PR #83408)   Jay Foad via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   Sam Parker via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   David Green via llvm-commits
• [llvm] Apply the `AdjustICmpImmAndPred` optimization when it results in a one-instruction immediate materialization over a two-instruction materialization. (PR #83218)   David Green via llvm-commits
• [llvm] [SjLjEHPrepare] Fix callsite problem (PR #67264)   Matt Arsenault via llvm-commits
• [llvm] [SjLjEHPrepare] Fix callsite problem (PR #67264)   Matt Arsenault via llvm-commits
• [llvm] [SjLjEHPrepare] Fix callsite problem (PR #67264)   Matt Arsenault via llvm-commits
• [llvm] [SjLjEHPrepare] Fix callsite problem (PR #67264)   Matt Arsenault via llvm-commits
• [llvm] [BOLT][NFC] Simplify YAMLProfileWriter::convert (PR #82129)   Amir Ayupov via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (PR #83408)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   via llvm-commits
• [llvm] [AArch64] Support scalable offsets with isLegalAddressingMode (PR #83255)   David Green via llvm-commits
• [llvm] AMDGPU: Document more backend recognized attributes (PR #80239)   Ivan Kosarev via llvm-commits
• [llvm] 20fe83b - [AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (#83408)   via llvm-commits
• [llvm] [AMDGPU] Add new aliases ds_subrev_rtn_u32/u64 for ds_rsub_rtn_u32/u64 (PR #83408)   Jay Foad via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Luke Lau via llvm-commits
• [llvm] [Transform][ObjCARC] Change the 'for(; ; )' to a do-while (PR #83416)   Zhang Yi via llvm-commits
• [llvm] [Transform][ObjCARC] Change the 'for(; ; )' to a do-while (PR #83416)   via llvm-commits
• [llvm] [Transform][ObjCARC] Change the 'for(; ; )' to a do-while (PR #83416)   via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Matt Arsenault via llvm-commits
• [llvm] Verifier: More helpful error message for cross-function references (PR #82906)   Nicolai Hähnle via llvm-commits
• [llvm] c57002d - Verifier: More helpful error message for cross-function references (#82906)   via llvm-commits
• [llvm] Verifier: More helpful error message for cross-function references (PR #82906)   Nicolai Hähnle via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (PR #81394)   Matt Arsenault via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (PR #81394)   Matt Arsenault via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack (PR #78553)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel lane masks merging (PR #73337)   Petar Avramovic via llvm-commits
• [llvm] Enable exp10 libcall on linux (PR #68736)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel lane masks merging (PR #73337)   Petar Avramovic via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (PR #81394)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: lane masks merging (PR #73337)   Petar Avramovic via llvm-commits
• [llvm] Missing AArch64ISD::BICi handling (PR #76644)   David Green via llvm-commits
• [llvm] AMDGPU/GlobalISel: lane masks merging (PR #73337)   Petar Avramovic via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Nikita Popov via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (PR #81394)   via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   Nikita Popov via llvm-commits
• [llvm] AMDGPU/GlobalISel: lane masks merging (PR #73337)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: lane masks merging (PR #73337)   Matt Arsenault via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #79553)   Matt Arsenault via llvm-commits
• [llvm] b50b50b - [X86] cmov-fp.ll - regenerate with common 'NOSSE' prefix to reduce duplication   Simon Pilgrim via llvm-commits
• [llvm] 139bcda - [X86] SimplifyDemandedVectorEltsForTargetNode - add basic CVTPH2PS/CVTPS2PH handling   Simon Pilgrim via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #79553)   Matt Arsenault via llvm-commits
• [llvm] 4d525f2 - [VPlan] Remove unneeded InsertPointGuard (NFCI).   Florian Hahn via llvm-commits
• [llvm] Add support for SPV_KHR_float_controls (PR #83418)   Vyacheslav Levytskyy via llvm-commits
• [llvm] Add support for SPV_KHR_float_controls (PR #83418)   via llvm-commits
• [llvm] [LLVM] Adjust argument passing for `APInt`. NFC. (PR #81814)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Adjust argument passing for `APInt`. NFC. (PR #81814)   Nikita Popov via llvm-commits
• [llvm] Add support for SPV_KHR_float_controls (PR #83418)   via llvm-commits
• [llvm] [LLVM] Adjust argument passing for `APInt`. NFC. (PR #81814)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][RemoveDIs] Have CreateNeg only accept iterators, template for other patches (PR #82999)   Jeremy Morse via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #79553)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix negative immediate offset for unbuffered smem loads (PR #79553)   Matt Arsenault via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Aaron Ballman via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack (PR #78553)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [LV] Disable fold tail by masking - when induction vars used outside (PR #81609)   Niwin Anto via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack (PR #78553)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Expand abs.v4i8 to v4i16 and abs.v2s16 to v2s32 (PR #81231)   David Green via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (PR #81394)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improve known bits of Zext/Sext loads with range metadata (PR #80829)   David Green via llvm-commits
• [llvm] dbca8a4 - [DAG] Improve known bits of Zext/Sext loads with range metadata (#80829)   via llvm-commits
• [llvm] [DAG] Improve known bits of Zext/Sext loads with range metadata (PR #80829)   David Green via llvm-commits
• [llvm] AMDGPU/GlobalISel: lane masks merging (PR #73337)   Petar Avramovic via llvm-commits
• [llvm] 6c2eec5 - AMDGPU/GlobalISel: lane masks merging (#73337)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: lane masks merging (PR #73337)   Petar Avramovic via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] 7e88d51 - [NFC][RemoveDIs] Have CreateNeg only accept iterators (#82999)   via llvm-commits
• [llvm] [NFC][RemoveDIs] Have CreateNeg only accept iterators, template for other patches (PR #82999)   Jeremy Morse via llvm-commits
• [clang] [llvm] [AMDGPU] Add an option to disable unsafe uses of atomic xor (PR #69229)   Pierre-Andre Saulais via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Lu Weining via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Yingwei Zheng via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Yingwei Zheng via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Yingwei Zheng via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Yingwei Zheng via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Lu Weining via llvm-commits
• [llvm] [DiagnosticInfo] Output full file path instead of relative path (PR #68027)   Matt Arsenault via llvm-commits
• [llvm] Add support for SPV_KHR_float_controls (PR #83418)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Sander de Smalen via llvm-commits
• [llvm] [WIP][AMDGPU][ASAN] Add amdgpu-asan-instrument-lds pass to instrument LDS (PR #83287)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Update LiveInterval def index for early-clobber (PR #79285)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Enable -riscv-enable-sink-fold by default. (PR #82026)   Yingwei Zheng via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Sander de Smalen via llvm-commits
• [llvm] AMDGPU\GlobalISel: remove amdgpu-global-isel-risky-select flag (PR #83426)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU\GlobalISel: remove amdgpu-global-isel-risky-select flag (PR #83426)   via llvm-commits
• [llvm] [ADT] Add std::string_view conversion to SmallString (PR #83397)   Jakub Kuderski via llvm-commits
• [llvm] AMDGPU\GlobalISel: remove amdgpu-global-isel-risky-select flag (PR #83426)   Matt Arsenault via llvm-commits
• [llvm] [LV] Disable fold tail by masking - when induction vars used outside (PR #81609)   Niwin Anto via llvm-commits
• [clang] [llvm] [AMDGPU] Add an option to disable unsafe uses of atomic xor (PR #69229)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   David Sherwood via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   David Sherwood via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   David Sherwood via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   David Sherwood via llvm-commits
• [llvm] [JITLink][AArch64] Implement R_AARCH64_LDR_PREL_LO19 (PR #82172)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch64] Implement R_AARCH64_LDR_PREL_LO19 (PR #82172)   Eymen Ünay via llvm-commits
• [llvm] [JITLink][AArch64] Implement R_AARCH64_LDR_PREL_LO19 (PR #82172)   Eymen Ünay via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] [LV] Disable fold tail by masking - when induction vars used outside (PR #81609)   Niwin Anto via llvm-commits
• [llvm] [SLP]Improve findReusedOrderedScalars and graph rotation. (PR #77529)   via llvm-commits
• [llvm] [RISCV] Support scheduling VCIX instructions (PR #83427)   Wang Pengcheng via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] [RISCV] Enable -riscv-enable-sink-fold by default. (PR #82026)   Wang Pengcheng via llvm-commits
• [llvm] [ValueTracking] Allow tracking values through Integral AddrSpaceCasts (PR #70483)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Support scheduling VCIX instructions (PR #83427)   Wang Pengcheng via llvm-commits
• [llvm] [RISCV] Support scheduling VCIX instructions (PR #83427)   Wang Pengcheng via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Matt Arsenault via llvm-commits
• [llvm] [SCEV] Improve applyLoopGuards to support Mul (PR #83428)   via llvm-commits
• [llvm] [SCEV] Improve applyLoopGuards to support Mul (PR #83428)   via llvm-commits
• [clang] [llvm] [AMDGPU]: Add and codegen sched_group_barrier_inst (PR #78775)   Matt Arsenault via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] [SCEV] Improve applyLoopGuards to support Mul (PR #83428)   via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] [SelectionDAG] Avoid double rounding by using a libcall for int (>i32) to bf16 conversions (PR #71658)   Matt Arsenault via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)   Matt Arsenault via llvm-commits
• [llvm] [GlobalIsel] Combine ADDO (PR #82927)   Thorsten Schütt via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   Matt Arsenault via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (PR #82613)   Victor Campos via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   WÁNG Xuěruì via llvm-commits
• [llvm] [SCEV] Improve applyLoopGuards to support Mul (PR #83428)   Florian Hahn via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (PR #82613)   Rodolfo Wottrich via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Alexey Bataev via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Xiang Li via llvm-commits
• [llvm] [Hexagon] Use the correct call to detect debug instructions (PR #83373)   Brian Cain via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] b1c8b9f - [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (#83193)   via llvm-commits
• [llvm] [DirectX][NFC] Leverage LLVM and DirectX intrinsic description in DXIL Op records (PR #83193)   Xiang Li via llvm-commits
• [llvm] [SLP]Improve findReusedOrderedScalars and graph rotation. (PR #77529)   Alexey Bataev via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] aadd765 - [DebugInfo][RemoveDIs] Prevent duplicate DPValues from being returned by findDbgIntrinsics (#82764)   via llvm-commits
• [llvm] [DebugInfo][RemoveDIs] Prevent duplicate DPValues from being returned by findDbgIntrinsics (PR #82764)   Stephen Tozer via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   via llvm-commits
• [llvm] 0d572c4 - AMDGPU\GlobalISel: remove amdgpu-global-isel-risky-select flag (#83426)   via llvm-commits
• [llvm] AMDGPU\GlobalISel: remove amdgpu-global-isel-risky-select flag (PR #83426)   Petar Avramovic via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] 85dc3df - [DebugInfo][RemoveDIs] Fix incorrect test expect   Stephen Tozer via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] a872a35 - [NFC][RemoveDIs] Add bodies for inst-constructors taking iterators   Jeremy Morse via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   Simon Pilgrim via llvm-commits
• [llvm] 1e6627e - [X86] matchAddressRecursively - ensure dead nodes are replaced before matching the index register (#82881)   via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   Simon Pilgrim via llvm-commits
• [llvm] [Fix] A replaced SDValue is used to call getNode function (PR #82881)   via llvm-commits
• [llvm] [InstCombine] Avoid breaking SPF by `foldICmpUsingKnownBits` (PR #82472)   Yingwei Zheng via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Alexey Bataev via llvm-commits
• [llvm] 4f132dc - [RISCV] Enable PostRAScheduler for SiFive7 (#83166)   via llvm-commits
• [llvm] [RISCV] Enable PostRAScheduler for SiFive7 (PR #83166)   Michael Maitland via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (PR #81394)   via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Xiang Li via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Xiang Li via llvm-commits
• [llvm] e60ebbd - [HLSL] implementation of lerp intrinsic (#83077)   via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Alexandre Ganea via llvm-commits
• [llvm] Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226 (PR #81394)   via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [llvm] [AMDGPU] Fix conformance issue for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Paul Walker via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [SCEV] Improve applyLoopGuards to support Mul (PR #83428)   via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Yaxun Liu via llvm-commits
• [llvm] [SCEV] Improve applyLoopGuards to support Mul (PR #83428)   via llvm-commits
• [llvm] 92e5f13 - [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (#83038)   Tuan Chuong Goh via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasInlineSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasInlineSOffset in BUF definitions. NFC. (PR #83434)   via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [llvm] 80a328b - [X86] SimplifyDemandedVectorEltsForTargetNode - add basic PCMPEQ/PCMPGT handling   Simon Pilgrim via llvm-commits
• [llvm] [SCEV] Improve applyLoopGuards to support Mul (PR #83428)   via llvm-commits
• [clang] [llvm] Implement a subset of builtin_cpu_supports() features (PR #82809)   zhijian lin via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] [CodeGen][MISched] Add misched post-regalloc bidirectional scheduling (PR #77138)   Michael Maitland via llvm-commits
• [llvm] [llvm-mca] Account for AcquireAtCycles in llvm-mca (PR #80742)   Andrea Di Biagio via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] [llvm-mca] Account for AcquireAtCycles in llvm-mca (PR #80742)   Michael Maitland via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (PR #83038)   via llvm-commits
• [llvm] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Yaxun Liu via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   via llvm-commits
• [llvm] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   via llvm-commits
• [llvm] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] 5bd01ac - [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (#83235)   via llvm-commits
• [llvm] [AArch64] Re-enable rematerialization for streaming-mode-changing functions. (PR #83235)   Sander de Smalen via llvm-commits
• [llvm] [LLVM][AArch64][CodeGen] Mark FFR as a reserved register. (PR #83437)   Paul Walker via llvm-commits
• [llvm] [LLVM][AArch64][CodeGen] Mark FFR as a reserved register. (PR #83437)   via llvm-commits
• [llvm] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [LLVM][AArch64][CodeGen] Mark FFR as a reserved register. (PR #83437)   Paul Walker via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Farzon Lotfi via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [ARM][AArch64] Reformat target parser. NFC (PR #82601)   Jonathan Thackray via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Sergei Barannikov via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Sergei Barannikov via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [TTI][RISCV]Improve costs for whole vector reg extract/insert. (PR #80164)   Alexey Bataev via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [llvm] 962f3e4 - [Hexagon] Use the correct call to detect debug instructions (#83373)   via llvm-commits
• [llvm] [Hexagon] Use the correct call to detect debug instructions (PR #83373)   Sumanth Gundapaneni via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [llvm-mca] Account for AcquireAtCycles in llvm-mca (PR #80742)   Andrea Di Biagio via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   via llvm-commits
• [llvm] 147dc81 - [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (#82613)   via llvm-commits
• [llvm] [ARM][AArch64] Enable FEAT_FHM for Arm Neoverse N2 (PR #82613)   Jonathan Thackray via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   Alexandros Lamprineas via llvm-commits
• [llvm] [RISCV] Add a command line option to disable cost per use for compressed registers. (PR #83320)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasInlineSOffset in BUF definitions. NFC. (PR #83434)   Piotr Sobczak via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Farzon Lotfi via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasInlineSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [llvm] [Support] Use all_read | all_write for createTemporaryFile (PR #83360)   Jonas Devlieghere via llvm-commits
• [llvm] 310ed33 - [Support] Use all_read | all_write for createTemporaryFile (#83360)   via llvm-commits
• [libc] [llvm] [libc] Provide an implementation of the 'stdint.h' header (PR #83353)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc] Provide an implementation of the 'stdint.h' header (PR #83353)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc] Provide an implementation of the 'stdint.h' header (PR #83353)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc] Provide an implementation of the 'stdint.h' header (PR #83353)   Joseph Huber via llvm-commits
• [llvm] [SLP]Fix the cost model for extracts combined with later shuffle. (PR #83442)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Fix the cost model for extracts combined with later shuffle. (PR #83442)   via llvm-commits
• [libc] [llvm] [libc] Provide an implementation of the 'stdint.h' header (PR #83353)   Guillaume Chatelet via llvm-commits
• [llvm] [SLP]Improve findReusedOrderedScalars and graph rotation. (PR #77529)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Uniformity info based regbankselect (PR #73684)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasInlineSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_KHR_float_controls (PR #83418)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasInlineSOffset in BUF definitions. NFC. (PR #83434)   Piotr Sobczak via llvm-commits
• [llvm] [ADT] Add std::string_view conversion to SmallString (PR #83397)   Jonas Devlieghere via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasInlineSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [llvm] [SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (PR #83443)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SLP]Improve findReusedOrderedScalars and graph rotation. (PR #77529)   via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Shih-Po Hung via llvm-commits
• [llvm] a344db7 - [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (#83038)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (PR #83038)   via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Shih-Po Hung via llvm-commits
• [llvm] 9491aec - [TableGen][CodeGenTarget] Add support for v3i8 and v3i1 MVTs. [NFCI] (#83140)   via llvm-commits
• [llvm] [TableGen][CodeGenTarget] Add support for v3i8 and v3i1 MVTs. [NFCI] (PR #83140)   Francesco Petrogalli via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [MC] Teach checkAsmTiedOperandConstraints about optional operands (PR #81381)   Alfie Richards via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Shih-Po Hung via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [MC] Teach checkAsmTiedOperandConstraints about optional operands (PR #81381)   Alfie Richards via llvm-commits
• [llvm] 3fda50d - [NFC][RemoveDIs] Bulk update utilities to insert with iterators   Jeremy Morse via llvm-commits
• [llvm] [MC] Teach checkAsmTiedOperandConstraints about optional operands (PR #81381)   Alfie Richards via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [libc] [llvm] [libc] Provide an implementation of the 'stdint.h' header (PR #83353)   Nick Desaulniers via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [MC] Teach checkAsmTiedOperandConstraints about optional operands (PR #81381)   Sergei Barannikov via llvm-commits
• [llvm] 6c7805d - Revert "[NFC][RemoveDIs] Bulk update utilities to insert with iterators"   Jeremy Morse via llvm-commits
• [clang] [llvm] Computing, storing, and restoring conservative call graphs with LLVM (PR #80104)   via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Chris B via llvm-commits
• [libc] [llvm] [libc] Provide an implementation of the 'stdint.h' header (PR #83353)   Joseph Huber via llvm-commits
• [llvm] [SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (PR #83443)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (PR #83443)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] 6afda56 - [RISCV] Store RVC and TSO ELF flags explicitly in RISCVTargetStreamer. NFCI (#83344)   via llvm-commits
• [llvm] [SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (PR #83443)   via llvm-commits
• [llvm] [RISCV] Store RVC and TSO ELF flags explicitly in RISCVTargetStreamer. NFCI (PR #83344)   Craig Topper via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Dinar Temirbulatov via llvm-commits
• [llvm] [TableGen] Use consistent field kind checking in getNumericKey. (PR #83284)   Jason Eckhardt via llvm-commits
• [llvm] [TableGen] Use consistent field kind checking in getNumericKey. (PR #83284)   Jason Eckhardt via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)   via llvm-commits
• [llvm] [RISCV] Place mergeable small read only data into srodata section (PR #82214)   Craig Topper via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [GlobalISel] Move G_FREEZE above G_ICMP to enable further possible co… (PR #83448)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [GlobalISel] Move G_FREEZE above G_ICMP to enable further possible co… (PR #83448)   via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Evgenii Kudriashov via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Luke Lau via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Farzon Lotfi via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Fraser Cormack via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Fraser Cormack via llvm-commits
• [llvm] 3e0425c - [SLP][NFC]Add a test showing incorrect transformation, NFC.   Alexey Bataev via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Farzon Lotfi via llvm-commits
• [llvm] [docs][TypeProf]Update instrumentation file format document (PR #83309)   Mingming Liu via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Yingwei Zheng via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [MC] Teach checkAsmTiedOperandConstraints about optional operands (PR #81381)   Sergei Barannikov via llvm-commits
• [llvm] Verifier: More helpful error message for cross-function references (PR #82906)   Peter Rong via llvm-commits
• [llvm] [MC] Teach checkAsmTiedOperandConstraints about optional operands (PR #81381)   Sergei Barannikov via llvm-commits
• [llvm] [GlobalISel] Dump the machine function after each legalization iteration. NFC (PR #83401)   Amara Emerson via llvm-commits
• [llvm] [RISCV] Place mergeable small read only data into srodata section (PR #82214)   Paul Kirth via llvm-commits
• [llvm] [InstCombine] Improve folding of `icmp pred (and X, Mask/~Mask), Y)` (PR #81562)   via llvm-commits
• [llvm] [InstCombine] Improve folding of `icmp pred (and X, Mask/~Mask), Y)` (PR #81562)   via llvm-commits
• [llvm] be8f987 - [TableGen] Use consistent field kind checking in getNumericKey. (#83284)   via llvm-commits
• [llvm] [TableGen] Use consistent field kind checking in getNumericKey. (PR #83284)   Wang Pengcheng via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Chris B via llvm-commits
• [llvm] [AArch64] Combine getActiveLaneMask with vector_extract (PR #81139)   Momchil Velikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [AArch64] Combine getActiveLaneMask with vector_extract (PR #81139)   Momchil Velikov via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   David Li via llvm-commits
• [llvm] [InstCombine] Add folds for `(fp_binop ({s|u}itofp x), ({s|u}itofp y))` (PR #82555)   via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Kolya Panchenko via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   via llvm-commits
• [llvm] [InstCombine] limit icmp sgt (shl nsw X, C1), C0 --> icmp sgt X, C0 >> C1 to hasOneUse (PR #74318)   via llvm-commits
• [llvm] [GlobalISel] Dump the machine function after each legalization iteration. NFC (PR #83401)   David Green via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] Add non-null check before accessing pointer (PR #83459)   Martin Wehking via llvm-commits
• [llvm] Add non-null check before accessing pointer (PR #83459)   via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Wang Pengcheng via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Chris B via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Chris B via llvm-commits
• [llvm] 489eadd - [HLSL] Implementation of the frac intrinsic (#83315)   via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [clang] [llvm] [HLSL] Implementation of the frac intrinsic (PR #83315)   Xiang Li via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Yaxun Liu via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   via llvm-commits
• [llvm] [llvm-objcopy] Add --skip-symbol and --skip-symbols options (PR #80873)   Ilia Kuklin via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   Craig Topper via llvm-commits
• [llvm] de8e2b7 - [test][SROA] Regenerate vector-promotion.ll   Arthur Eubanks via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Alina Sbirlea via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Kolya Panchenko via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Kolya Panchenko via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasInlineSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasRestrictedSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasRestrictedSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   Farzon Lotfi via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasRestrictedSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Kolya Panchenko via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   Xiang Li via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83015)   Michal Paszkowski via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   Nick Desaulniers via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   Nick Desaulniers via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Janek van Oirschot via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   Farzon Lotfi via llvm-commits
• [llvm] [SPIR-V]: Memory leak fix in SPIRVEmitIntrinsics (PR #83015)   Michal Paszkowski via llvm-commits
• [llvm] [llvm][ARM][AArch64] Don't use module attr as function attr. (PR #83154)   Nick Desaulniers via llvm-commits
• [llvm] [llvm][ARM][AArch64] Don't use module attr as function attr. (PR #83154)   Nick Desaulniers via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Craig Topper via llvm-commits
• [clang] [llvm] [HLSL][SPIR-V] Add SV_DispatchThreadID semantic support (PR #82536)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (PR #83443)   Michal Paszkowski via llvm-commits
• [llvm] 45d82f3 - [SLP]Fix miscompilation, cause by incorrect final node reordering.   Alexey Bataev via llvm-commits
• [llvm] [SLP]Improve findReusedOrderedScalars and graph rotation. (PR #77529)   Alexey Bataev via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (PR #83038)   Caslyn Tonelli via llvm-commits
• [llvm] [CodeGen] Allow mixed scalar type constraints for inline asm (PR #65465)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   Kolya Panchenko via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Craig Topper via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Artem Belevich via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Craig Topper via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in (PR #83468)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in (PR #83468)   via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Alina Sbirlea via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   Craig Topper via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [LV] Decompose WidenIntOrFPInduction into phi and update recipes (PR #82021)   Kolya Panchenko via llvm-commits
• [llvm] [SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (PR #83443)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (PR #83443)   Vyacheslav Levytskyy via llvm-commits
• [llvm] [LV] Decompose WidenIntOrFPInduction into phi and update recipes (PR #82021)   Kolya Panchenko via llvm-commits
• [llvm] [LV] Decompose WidenIntOrFPInduction into phi and update recipes (PR #82021)   Kolya Panchenko via llvm-commits
• [clang] [llvm] Modify BoundsSan to improve debuggability (PR #65972)   Vitaly Buka via llvm-commits
• [llvm] 920094e - [gn build] Port 525fe4492bbe   LLVM GN Syncbot via llvm-commits
• [llvm] [ubsan][pgo] Pass to remove ubsan checks based on profile data (PR #83471)   Vitaly Buka via llvm-commits
• [llvm] [ubsan][pgo] Pass to remove ubsan checks based on profile data (PR #83471)   via llvm-commits
• [llvm] [ubsan][pgo] Pass to remove ubsan checks based on profile data (PR #83471)   Vitaly Buka via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   Alexey Bataev via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   Alexey Bataev via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   Alexey Bataev via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   Alexey Bataev via llvm-commits
• [llvm] [GlobalISel] Move G_FREEZE above G_ICMP to enable further possible co… (PR #83448)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [GlobalISel] Move G_FREEZE above G_ICMP to enable further possible co… (PR #83448)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [GlobalISel] Move G_FREEZE above G_ICMP to enable further possible co… (PR #83448)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [RISCV] Support scheduling VCIX instructions (PR #83427)   Craig Topper via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   Farzon Lotfi via llvm-commits
• [llvm] [RISCV] Support scheduling VCIX instructions (PR #83427)   Michael Maitland via llvm-commits
• [llvm] [ADT] Add std::string_view conversion to SmallString (PR #83397)   Aiden Grossman via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   Kolya Panchenko via llvm-commits
• [llvm] cff36bb - [ADT] Add std::string_view conversion to SmallString (#83397)   via llvm-commits
• [llvm] [ADT] Add std::string_view conversion to SmallString (PR #83397)   Aiden Grossman via llvm-commits
• [llvm] [RISCV] Place mergeable small read only data into srodata section (PR #82214)   Petr Hosek via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [mlir] [DO NOT SUBMIT] Implement LowerVectorToArmNeon Pattern (PR #81895)   Kojo Acquah via llvm-commits
• [llvm] [AMDGPU] Fix OpenCL conformance test failures for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [llvm] [mlir] [DO NOT SUBMIT] Implement LowerVectorToArmNeon Pattern (PR #81895)   Kojo Acquah via llvm-commits
• [llvm] [LV] Vectorization of compress idiom (PR #83467)   Kolya Panchenko via llvm-commits
• [clang] [compiler-rt] [asan][windows] Eliminate the static asan runtime on windows (PR #81677)   Charlie Barto via llvm-commits
• [llvm] [mlir] [mlir][ArmNeon] Implements LowerVectorToArmNeon Pattern for SMMLA (PR #81895)   Kojo Acquah via llvm-commits
• [llvm] [GlobalISel] Move G_FREEZE above G_ICMP to enable further possible co… (PR #83448)   Dávid Ferenc Szabó via llvm-commits
• [clang] [llvm] [Hexagon] Add Loop Alignment pass. (PR #83379)   Sumanth Gundapaneni via llvm-commits
• [clang] [llvm] [Hexagon] Add Loop Alignment pass. (PR #83379)   via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasRestrictedSOffset in BUF definitions. NFC. (PR #83434)   Joe Nash via llvm-commits
• [llvm] [AMDGPU] Fix OpenCL conformance test failures for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [llvm] [AMDGPU] Fix OpenCL conformance test failures for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [clang] [llvm] [CMAKE] Enable FatLTO as a build option for LLVM (PR #80480)   Paul Kirth via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert (PR #83481)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert (PR #83481)   via llvm-commits
• [llvm] 5abbe8e - Revert "[ADT] Add std::string_view conversion to SmallString (#83397)"   Aiden Grossman via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert (PR #83481)   via llvm-commits
• [llvm] ac26708 - [MemProf][NFC] Make new test actually check cold attributes   Teresa Johnson via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert (PR #83481)   Alexey Bataev via llvm-commits
• [llvm] Add guidance on bans to the CoC section and link to the developer policy (PR #82551)   Reid Kleckner via llvm-commits
• [llvm] [GlobalISel] Disallow the creation of illegal UNMERGEs in tryCombineM… (PR #83483)   Dávid Ferenc Szabó via llvm-commits
• [llvm] [GlobalISel] Disallow the creation of illegal UNMERGEs in tryCombineM… (PR #83483)   via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Kolya Panchenko via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   Philip Reames via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   Philip Reames via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   Philip Reames via llvm-commits
• [llvm] [llvm][CodeGen] Added a check in CodeGenPrepare::optimizeSwitchType (PR #83322)   Philip Reames via llvm-commits
• [compiler-rt] [compiler-rt] Adds builtins support for xros. (PR #83484)   via llvm-commits
• [compiler-rt] [compiler-rt] Disable building sanitizers on platforms without fork(). (PR #83485)   via llvm-commits
• [compiler-rt] [scudo] Allow to resize allocation ring buffer (PR #82683)   via llvm-commits
• [compiler-rt] [compiler-rt] Disable building sanitizers on platforms without fork(). (PR #83485)   via llvm-commits
• [llvm] [pr-subscribers] added `third-party:benchmark` to `new-prs-labeler` (PR #83486)   Mircea Trofin via llvm-commits
• [compiler-rt] [compiler-rt] Adds builtins support for xros. (PR #83484)   via llvm-commits
• [llvm] [pr-subscribers] added `third-party:benchmark` to `new-prs-labeler` (PR #83486)   Tom Stellard via llvm-commits
• [llvm] [LoopUnroll] Add NUW to IV increment introduced by runtime unrolling. (PR #83246)   Philip Reames via llvm-commits
• [clang] [llvm] [Hexagon] Add Loop Alignment pass. (PR #83379)   Ikhlas Ajbar via llvm-commits
• [llvm] 4d12f70 - Add guidance on bans to the CoC section and link to the developer policy (#82551)   via llvm-commits
• [llvm] Add guidance on bans to the CoC section and link to the developer policy (PR #82551)   Reid Kleckner via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Philip Reames via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Philip Reames via llvm-commits
• [llvm] Update Benchmark (PR #83488)   Mircea Trofin via llvm-commits
• [llvm] [pr-subscribers] added `third-party:benchmark` to `new-prs-labeler` (PR #83486)   Mircea Trofin via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Philip Reames via llvm-commits
• [llvm] Update Benchmark (PR #83488)   via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Philip Reames via llvm-commits
• [llvm] 2fef685 - [llvm][loop-rotate] Allow forcing loop-rotation (#82828)   via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Paul Kirth via llvm-commits
• [llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)   Philip Reames via llvm-commits
• [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)   via llvm-commits
• [llvm] [AArch64AsmParser] Allow branch target symbol to have a shift/extend modifier name (PR #80571)   Jon Roelofs via llvm-commits
• [llvm] [AArch64AsmParser] Allow branch target symbol to have a shift/extend modifier name (PR #80571)   Jon Roelofs via llvm-commits
• [llvm] [AArch64AsmParser] Allow branch target symbol to have a shift/extend modifier name (PR #80571)   Jon Roelofs via llvm-commits
• [llvm] llvm-profgen: Fix race condition (PR #83489)   Matthias Braun via llvm-commits
• [llvm] llvm-profgen: Fix race condition (PR #83489)   Matthias Braun via llvm-commits
• [llvm] llvm-profgen: Fix race condition (PR #83489)   via llvm-commits
• [llvm] [SLP] Use ScopeExit to update Operands/PrevDist on all paths. (NFC) (PR #83490)   Florian Hahn via llvm-commits
• [llvm] [SLP] Use ScopeExit to update Operands/PrevDist on all paths. (NFC) (PR #83490)   via llvm-commits
• [llvm] [Py Reformat] Exclude `third-party` from reformat (PR #83491)   Mircea Trofin via llvm-commits
• [llvm] Export `LLVM_VERSION_*` CMake variables to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseBBInfo` (PR #83364)   Mircea Trofin via llvm-commits
• [llvm] llvm-profgen: Fix race condition (PR #83489)   Matthias Braun via llvm-commits
• [llvm] Update Benchmark (PR #83488)   Mircea Trofin via llvm-commits
• [llvm] llvm-profgen: Fix race condition (PR #83489)   Lei Wang via llvm-commits
• [llvm] 5b07fd4 - [AMDGPU] Fix OpenCL conformance test failures for ctlz. (#83170)   via llvm-commits
• [llvm] [AMDGPU] Fix OpenCL conformance test failures for ctlz. (PR #83170)   Leon Clark via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [compiler-rt] [scudo] Split the code paths in quarantineOrDeallocateChunk() (PR #83493)   via llvm-commits
• [compiler-rt] [scudo] Split the code paths in quarantineOrDeallocateChunk() (PR #83493)   via llvm-commits
• [compiler-rt] [scudo] Split the code paths in quarantineOrDeallocateChunk() (PR #83493)   via llvm-commits
• [compiler-rt] [scudo] Split the code paths in quarantineOrDeallocateChunk() (PR #83493)   via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   Eli Friedman via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   Eli Friedman via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   Eli Friedman via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   Eli Friedman via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   Eli Friedman via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   Eli Friedman via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (round 2) (PR #83494)   Arthur Eubanks via llvm-commits
• [llvm] Avoid calling `GetFileAttributesW` in Windows' `fs::access` when checking for existence (PR #83495)   Jeremy Day via llvm-commits
• [llvm] Avoid calling `GetFileAttributesW` in Windows' `fs::access` when checking for existence (PR #83495)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (round 2) (PR #83494)   via llvm-commits
• [llvm] Avoid calling `GetFileAttributesW` in Windows' `fs::access` when checking for existence (PR #83495)   via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Nemanja Ivanovic via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Nemanja Ivanovic via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Nemanja Ivanovic via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Nemanja Ivanovic via llvm-commits
• [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)   Jun Wang via llvm-commits
• [llvm] llvm-profgen: Fix race condition (PR #83489)   Matthias Braun via llvm-commits
• [llvm] 8466ab9 - llvm-profgen: Fix race condition (#83489)   via llvm-commits
• [llvm] llvm-profgen: Fix race condition (PR #83489)   Matthias Braun via llvm-commits
• [llvm] [X86][GlobalISel] Use GIntrinsic during custom intrinsic selection (PR #83498)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Use GIntrinsic during custom intrinsic selection (PR #83498)   via llvm-commits
• [compiler-rt] [scudo] Split the code paths in quarantineOrDeallocateChunk() (PR #83493)   via llvm-commits
• [llvm] ca9d2e9 - [Hexagon] Add Loop Alignment pass. (#83379)   via llvm-commits
• [clang] [llvm] [Hexagon] Add Loop Alignment pass. (PR #83379)   Sumanth Gundapaneni via llvm-commits
• [compiler-rt] [scudo] Split the code path of memory tagging out from allocate() (PR #83493)   via llvm-commits
• [llvm] 6137f48 - [gn build] Port ca9d2e923b28   LLVM GN Syncbot via llvm-commits
• [compiler-rt] [HWASan] add test for hwasan_handle_longjmp ignore logic (PR #83359)   Vitaly Buka via llvm-commits
• [compiler-rt] bf0f874 - [scudo] Avoid splitting aligned allocations on Trusty (#69281)   via llvm-commits
• [compiler-rt] [scudo] Avoid splitting aligned allocations on Trusty (PR #69281)   Thurston Dang via llvm-commits
• [compiler-rt] b9b8333 - [HWASan] add test for hwasan_handle_longjmp ignore logic (#83359)   via llvm-commits
• [compiler-rt] [HWASan] add test for hwasan_handle_longjmp ignore logic (PR #83359)   Florian Mayer via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Andy Kaylor via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Andy Kaylor via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Krzysztof Drewniak via llvm-commits
• [llvm] [SelectionDAG] Avoid double rounding by using a libcall for int (>i32) to bf16 conversions (PR #71658)   Eli Friedman via llvm-commits
• [llvm] 1a2960b - [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseBBInfo` (#83364)   via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseBBInfo` (PR #83364)   Mircea Trofin via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (round 2) (PR #83494)   Artem Belevich via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (round 2) (PR #83494)   Artem Belevich via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Jun Wang via llvm-commits
• [compiler-rt] [compiler-rt] Relax CHECK line in reaches_function.c (PR #83089)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt] Relax CHECK line in reaches_function.c (PR #83089)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt] Relax CHECK line in reaches_function.c (PR #83089)   Vitaly Buka via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Kirill Stoimenov via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Krzysztof Drewniak via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Jun Wang via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Kirill Stoimenov via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   via llvm-commits
• [compiler-rt] [compiler-rt] fix BSD procmaps stack size limit on build due to the k… (PR #82887)   Vitaly Buka via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [lld] [LLD][COFF] Add support for IMPORT_NAME_EXPORTAS import library names. (PR #83211)   Eli Friedman via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [SLP] Use ScopeExit to update Operands/PrevDist on all paths. (NFC) (PR #83490)   Alexey Bataev via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Vitaly Buka via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Vitaly Buka via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Vitaly Buka via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Vitaly Buka via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Vitaly Buka via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Vitaly Buka via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Vitaly Buka via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseEdge` (PR #83505)   Mircea Trofin via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseEdge` (PR #83505)   via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (round 2) (PR #83494)   Arthur Eubanks via llvm-commits
• [llvm] d1924f0 - [PowerPC] Do not generate `isel` instruction if target doesn't have this instruction (#72845)   via llvm-commits
• [llvm] [PowerPC] Do not generate `isel` instruction if target doesn't have this instruction (PR #72845)   Kai Luo via llvm-commits
• [llvm] [nfc][docs]Generalize header and ascii art for indexed profiles (PR #83507)   Mingming Liu via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   Alexey Bataev via llvm-commits
• [llvm] [nfc][docs]Generalize header and ascii art for indexed profiles (PR #83507)   Mingming Liu via llvm-commits
• [llvm] 5b05870 - [PowerPC] Support local-dynamic TLS relocation on AIX (#66316)   via llvm-commits
• [clang] [llvm] [PowerPC] Support local-dynamic TLS relocation on AIX (PR #66316)   Felix via llvm-commits
• [compiler-rt] [compiler-rt] Disable building sanitizers on platforms without fork(). (PR #83485)   Nico Weber via llvm-commits
• [compiler-rt] [compiler-rt] Disable building sanitizers on platforms without fork(). (PR #83485)   Nico Weber via llvm-commits
• [compiler-rt] [compiler-rt] Disable building sanitizers on platforms without fork(). (PR #83485)   Nico Weber via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (round 2) (PR #83494)   Artem Belevich via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Kirill Stoimenov via llvm-commits
• [llvm] [WebAssembly] Use RefTypeMem2Local instead of Mem2Reg (PR #83196)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Use RefTypeMem2Local instead of Mem2Reg (PR #83196)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Use RefTypeMem2Local instead of Mem2Reg (PR #83196)   Derek Schuff via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert (PR #83481)   Alexey Bataev via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Lu Weining via llvm-commits
• [llvm] [nfc][docs]Generalize header and ascii art for indexed profiles (PR #83507)   David Li via llvm-commits
• [llvm] [nfc][docs]Generalize header and ascii art for indexed profiles (PR #83507)   David Li via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Kirill Stoimenov via llvm-commits
• [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)   Andy Kaylor via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [compiler-rt] [compiler-rt] Disable building sanitizers on platforms without fork(). (PR #83485)   Vitaly Buka via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Nemanja Ivanovic via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Nemanja Ivanovic via llvm-commits
• [llvm] [Asan] Pre-commit test for asan support of funclet token (PR #82631)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Harald van Dijk via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Harald van Dijk via llvm-commits
• [llvm] [AArch64][SME] Save VG for unwind info when changing streaming-mode (PR #83301)   Eli Friedman via llvm-commits
• [clang] [llvm] [Clang] Correct __builtin_dynamic_object_size for subobject types (PR #83204)   Bill Wendling via llvm-commits
• [compiler-rt] [compiler-rt] fix BSD procmaps stack size limit on build due to the k… (PR #82887)   David CARLIER via llvm-commits
• [libc] [llvm] [libc] Provide an implementation of the 'stdint.h' header (PR #83353)   Joseph Huber via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Nemanja Ivanovic via llvm-commits
• [compiler-rt] [compiler-rt] fix BSD procmaps stack size limit on build due to the k… (PR #82887)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt] fix BSD procmaps stack size limit on build due to the k… (PR #82887)   Vitaly Buka via llvm-commits
• [llvm] [mfc] Fix RTTI for `InstrProf` intrinsics (PR #83511)   Mircea Trofin via llvm-commits
• [llvm] [mfc] Fix RTTI for `InstrProf` intrinsics (PR #83511)   via llvm-commits
• [llvm] [mfc] Fix RTTI for `InstrProf` intrinsics (PR #83511)   via llvm-commits
• [llvm] [nfc] Fix RTTI for `InstrProf` intrinsics (PR #83511)   Mircea Trofin via llvm-commits
• [compiler-rt] [compiler-rt] fix BSD procmaps stack size limit on build due to the k… (PR #82887)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt] fix BSD procmaps stack size limit on build due to the k… (PR #82887)   David CARLIER via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Craig Topper via llvm-commits
• [compiler-rt] 7ceb74f - [compiler-rt] fix BSD procmaps stack frame size limit warning. (#82887)   via llvm-commits
• [compiler-rt] [compiler-rt] fix BSD procmaps stack size limit on build due to the k… (PR #82887)   David CARLIER via llvm-commits
• [llvm] Avoid calling `GetFileAttributesW` in Windows' `fs::access` when checking for existence (PR #83495)   Saleem Abdulrasool via llvm-commits
• [llvm] [AArch64][SVE2] Generate SVE2 BSL instruction in LLVM for bit-twiddling. (PR #83514)   Dinar Temirbulatov via llvm-commits
• [llvm] [AArch64][SVE2] Generate SVE2 BSL instruction in LLVM for bit-twiddling. (PR #83514)   via llvm-commits
• [llvm] e7c3cd2 - [HWASAN] Implement selective instrumentation based on profiling information (#83503)   via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Kirill Stoimenov via llvm-commits
• [compiler-rt] [compiler-rt] fix __sanitizer_siginfo type on freebsd. (PR #77379)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (PR #76761)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (PR #76761)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (PR #76761)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (PR #76761)   Vitaly Buka via llvm-commits
• [compiler-rt] 2cdf611 - [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (#76761)   via llvm-commits
• [compiler-rt] [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (PR #76761)   Vitaly Buka via llvm-commits
• [llvm] [nfc][docs]Generalize header and ascii art for indexed profiles (PR #83507)   Mingming Liu via llvm-commits
• [llvm] [nfc][docs]Generalize header and ascii art for indexed profiles (PR #83507)   Mingming Liu via llvm-commits
• [llvm] [nfc][docs]Generalize header and ascii art for indexed profiles (PR #83507)   Mingming Liu via llvm-commits
• [llvm] [nfc][docs]Generalize header description and ascii art for indexed profiles (PR #83507)   Mingming Liu via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   Pavel Iliin via llvm-commits
• [llvm] Export `LLVM_VERSION_*` CMake variables to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] [TTI] Add alignment argument to TTI for compress/expand support (PR #83516)   Kolya Panchenko via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Kolya Panchenko via llvm-commits
• [llvm] [TTI] Add alignment argument to TTI for compress/expand support (PR #83516)   via llvm-commits
• [llvm] [TTI] Add alignment argument to TTI for compress/expand support (PR #83516)   Craig Topper via llvm-commits
• [llvm] [TTI] Add alignment argument to TTI for compress/expand support (PR #83516)   Craig Topper via llvm-commits
• [llvm] [Sparc] Use generated MatchRegisterName (NFCI) (PR #82165)   via llvm-commits
• [llvm] [Sparc] Use generated MatchRegisterName (NFCI) (PR #82165)   via llvm-commits
• [compiler-rt] [compiler-rt] Disable building sanitizers on platforms without fork(). (PR #83485)   via llvm-commits
• [compiler-rt] [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (PR #76761)   Mike Hommey via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Spaceship intrinsic for GSoC 2024 (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   Farzon Lotfi via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Yeting Kuo via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   via llvm-commits
• [clang] [llvm] [PseudoProbe] Mix and reorder block and call probe ID in lexical order (PR #75092)   Lei Wang via llvm-commits
• [compiler-rt] [scudo] limit VMA size for riscv64 for DefaultConfig (PR #76013)   Icenowy Zheng via llvm-commits
• [clang] [llvm] [PseudoProbe] Mix and reorder block and call probe ID in lexical order (PR #75092)   Lei Wang via llvm-commits
• [compiler-rt] [scudo] limit VMA size for riscv64 for DefaultConfig (PR #76013)   via llvm-commits
• [llvm] Avoid calling `GetFileAttributesW` in Windows' `fs::access` when checking for existence (PR #83495)   Alexandre Ganea via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Wang Pengcheng via llvm-commits
• [clang] [llvm] [PseudoProbe] Mix and reorder block and call probe ID in lexical order (PR #75092)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83520)   Farzon Lotfi via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Yeting Kuo via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83520)   via llvm-commits
• [clang] [llvm] [PseudoProbe] Mix and reorder block and call probe ID in lexical order (PR #75092)   Lei Wang via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83520)   Farzon Lotfi via llvm-commits
• [llvm] Add 3 way compare <=> integer intrinsics to Langref (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [clang] [llvm] [PseudoProbe] Mix and reorder block and call probe ID in lexical order (PR #75092)   Lei Wang via llvm-commits
• [clang] [llvm] [PseudoProbe] Mix and reorder block and call probe ID in lexical order (PR #75092)   via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Wang Pengcheng via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Wang Pengcheng via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Wang Pengcheng via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Wang Pengcheng via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Yaxun Liu via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Craig Topper via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   via llvm-commits
• [llvm] 2023a23 - [RISCV] Move V0 to the end of register allocation order (#82967)   via llvm-commits
• [llvm] [RISCV] Move V0 to the end of register allocation order (PR #82967)   Wang Pengcheng via llvm-commits
• [llvm] [ARM] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" (PR #82120)   via llvm-commits
• [llvm] [RISCV] Support scheduling VCIX instructions (PR #83427)   Wang Pengcheng via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [JITLink][AArch64] Implement R_AARCH64_LDR_PREL_LO19 (PR #82172)   Pavel Samolysov via llvm-commits
• [llvm] [Thumb1] Resolve FIXME: Use 'mov hi, $src; mov $dst, hi' (PR #81908)   via llvm-commits
• [llvm] [Transforms] Resolve FIXME: Pick the smallest legal type that fits (PR #79158)   via llvm-commits
• [llvm] [JITLink][AArch64] Implement R_AARCH64_LDR_PREL_LO19 (PR #82172)   Pavel Samolysov via llvm-commits
• [llvm] [JITLink][AArch64] Implement R_AARCH64_LDR_PREL_LO19 (PR #82172)   Pavel Samolysov via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Yashwant Singh via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Craig Topper via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Craig Topper via llvm-commits
• [clang] [llvm] [AMDGPU] Add code model (#70760) test for amdgpu target. (PR #71019)   Pravin Jagtap via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Craig Topper via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Craig Topper via llvm-commits
• [llvm] Add llvm_v6i32_ty. NFC. (PR #83522)   Pravin Jagtap via llvm-commits
• [llvm] Add llvm_v6i32_ty. NFC. (PR #83522)   via llvm-commits
• [llvm] 8fd011e - [RISCV] Add getFeaturesForCPU function support (#83269)   via llvm-commits
• [llvm] [RISCV] Add getFeaturesForCPU function support (PR #83269)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] RISCV vector calling convention (1/2) (PR #77560)   Brandon Wu via llvm-commits
• [llvm] [RISCV] RISCV vector calling convention (2/2) (PR #79096)   Brandon Wu via llvm-commits
• [compiler-rt] [sanitizer] Reject unsupported -static at link time (PR #83524)   Fangrui Song via llvm-commits
• [compiler-rt] [sanitizer] Reject unsupported -static at link time (PR #83524)   via llvm-commits
• [llvm] [TextAPI] Fixup symbol names of ivars from extensions (PR #83525)   Cyndy Ishida via llvm-commits
• [compiler-rt] [sanitizer] Reject unsupported -static at link time (PR #83524)   Thurston Dang via llvm-commits
• [llvm] Make default size MBB.size() (PR #83526)   via llvm-commits
• [llvm] Make default size MBB.size() (PR #83526)   via llvm-commits
• [llvm] Make default size MBB.size() (PR #83526)   via llvm-commits
• [llvm] Make default size MBB.size() (PR #83526)   via llvm-commits
• [llvm] Make default size MBB.size() (PR #83526)   via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Xiang Li via llvm-commits
• [llvm] [AArch64][GlobalISel] Expand abs.v4i8 to v4i16 and abs.v2s16 to v2s32 (PR #81231)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Implement -fno-plt for SelectionDAG/GlobalISel (PR #78890)   Fangrui Song via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Xiang Li via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] [GlobalISel] Move G_FREEZE above G_ICMP to enable further possible co… (PR #83448)   Owen Anderson via llvm-commits
• [llvm] 346766e - [TextAPI] Fixup symbol names of ivars from extensions (#83525)   via llvm-commits
• [llvm] [TextAPI] Fixup symbol names of ivars from extensions (PR #83525)   Cyndy Ishida via llvm-commits
• [llvm] edd0ef4 - Add "REQUIRES: asserts" to 2 tests added in #83379 using "-debug-only" run arguments.   Douglas Yung via llvm-commits
• [llvm] [InstCombine] Fix for folding `select` into floating point binary operators. (PR #83200)   via llvm-commits
• [llvm] [X86][GlobalISel] Use GIntrinsic during custom intrinsic selection (PR #83498)   Thorsten Schütt via llvm-commits
• [llvm] [InstCombine] Fix for folding `select` into floating point binary operators. (PR #83200)   via llvm-commits
• [clang] [compiler-rt] [AArch64] Implement __builtin_cpu_supports, compiler-rt tests. (PR #82378)   via llvm-commits
• [llvm] [BOLT] support AArch64 JUMP26 createRelocation (PR #83531)   via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Shih-Po Hung via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (PR #83038)   via llvm-commits
• [clang] [llvm] [RISCV] RISCV vector calling convention (1/2) (PR #77560)   Shao-Ce SUN via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseEdge` (PR #83505)   Christian Ulmann via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseEdge` (PR #83505)   Christian Ulmann via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Yingwei Zheng via llvm-commits
• [llvm] Add llvm_v6i32_ty. NFC. (PR #83522)   Matt Arsenault via llvm-commits
• [llvm] Make default size MBB.size() (PR #83526)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Use GIntrinsic during custom intrinsic selection (PR #83498)   Matt Arsenault via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Yeting Kuo via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Yeting Kuo via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Yeting Kuo via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Yeting Kuo via llvm-commits
• [llvm] Add non-null check before accessing pointer (PR #83459)   Matt Arsenault via llvm-commits
• [compiler-rt] 43bcedd - [compiler-rt] fix __sanitizer_siginfo type on freebsd. (#77379)   via llvm-commits
• [compiler-rt] [compiler-rt] fix __sanitizer_siginfo type on freebsd. (PR #77379)   David CARLIER via llvm-commits
• [llvm] 6c39fa9 - [AArch64][GlobalISel] Expand abs.v4i8 to v4i16 and abs.v2s16 to v2s32 (#81231)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Expand abs.v4i8 to v4i16 and abs.v2s16 to v2s32 (PR #81231)   Dhruv Chawla via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Expand abs.v4i8 to v4i16 and abs.v2s16 to v2s32 (PR #81231)   via llvm-commits
• [llvm] [nfc] Fix RTTI for `InstrProf` intrinsics (PR #83511)   Mircea Trofin via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasRestrictedSOffset in BUF definitions. NFC. (PR #83434)   Piotr Sobczak via llvm-commits
• [llvm] [AArch64][GlobalISel] Expand abs.v4i8 to v4i16 and abs.v2s16 to v2s32 (PR #81231)   Dhruv Chawla via llvm-commits
• [compiler-rt] [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (PR #76761)   David CARLIER via llvm-commits
• [llvm] Avoid calling `GetFileAttributesW` in Windows' `fs::access` when checking for existence (PR #83495)   Martin Storsjö via llvm-commits
• [llvm] [GlobalISel] Disallow the creation of illegal UNMERGEs in tryCombineM… (PR #83483)   Matt Arsenault via llvm-commits
• [llvm] [llvm][ARM][AArch64] Don't use module attr as function attr. (PR #83154)   Matt Arsenault via llvm-commits
• [lld] [LLD][COFF] Add support for IMPORT_NAME_EXPORTAS import library names. (PR #83211)   Martin Storsjö via llvm-commits
• [compiler-rt] [compiler-rt][fuzzer] windows build unbreak proposal. (PR #83538)   David CARLIER via llvm-commits
• [compiler-rt] [compiler-rt][fuzzer] windows build unbreak proposal. (PR #83538)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Matt Arsenault via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Matt Arsenault via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Matt Arsenault via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt][fuzzer] windows build unbreak proposal. (PR #83538)   David CARLIER via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Jinyang He via llvm-commits
• [lld] [lld][LoongArch] Support the R_LARCH_{ADD,SUB}_ULEB128 relocation types (PR #81133)   Jinyang He via llvm-commits
• [llvm] [AArch64] Implement -fno-plt for SelectionDAG/GlobalISel (PR #78890)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Implement -fno-plt for SelectionDAG/GlobalISel (PR #78890)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for amdgpu_cs (PR #82971)   Nick Anderson via llvm-commits
• [llvm] 420928b - [X86][CodeGen] Fix compile crash in EVEX compression for corner case   Shengchen Kan via llvm-commits
• [llvm] [X86][GlobalISel] Enable G_SDIV/G_UDIV/G_SREM/G_UREM (PR #81615)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV] Support RISC-V Profiles in -march option (PR #76357)   Wang Pengcheng via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Pierre van Houtryve via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [GlobalISel] Dump the machine function after each legalization iteration. NFC (PR #83401)   Pierre van Houtryve via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Nikita Popov via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Nikita Popov via llvm-commits
• [clang] [llvm] [RISCV] Support RISC-V Profiles in -march option (PR #76357)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Yashwant Singh via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify MC layer kernel descriptor (PR #80855)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify MC layer kernel descriptor (PR #80855)   Pierre van Houtryve via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   Nikita Popov via llvm-commits
• [llvm] Revert "[AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors" (PR #83544)   via llvm-commits
• [llvm] Revert "[AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors" (PR #83544)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Thorsten Schütt via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] MCExpr-ify MC layer kernel descriptor (PR #80855)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt][fuzzer] windows build unbreak proposal. (PR #83538)   Vitaly Buka via llvm-commits
• [compiler-rt] [compiler-rt][fuzzer] windows build unbreak proposal. (PR #83538)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for amdgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] ba8e9ac - [AMDGPU] promote i1 arg type for amdgpu_cs (#82971)   via llvm-commits
• [llvm] [AMDGPU] promote i1 arg type for amdgpu_cs (PR #82971)   Matt Arsenault via llvm-commits
• [llvm] 4a5ec3c - Revert "[AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors" (#83544)   via llvm-commits
• [llvm] Revert "[AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors" (PR #83544)   via llvm-commits
• [llvm] [GlobalISel] Move G_FREEZE above G_ICMP to enable further possible co… (PR #83448)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt][fuzzer] windows build unbreak proposal. (PR #83538)   David CARLIER via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] Legalize G_SHUFFLE_VECTOR for Odd-Sized Vectors (PR #83038)   via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Yingwei Zheng via llvm-commits
• [llvm] b051277 - Add llvm_v6i32_ty. NFC. (#83522)   via llvm-commits
• [llvm] Add llvm_v6i32_ty. NFC. (PR #83522)   Pravin Jagtap via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Matt Arsenault via llvm-commits
• [llvm] Add 3 way compare <=> integer intrinsics to Langref (PR #83227)   Nikita Popov via llvm-commits
• [llvm] Add 3 way compare <=> integer intrinsics to Langref (PR #83227)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [compiler-rt] 062d78e - [compiler-rt][fuzzer] windows build unbreak proposal. (#83538)   via llvm-commits
• [compiler-rt] [compiler-rt][fuzzer] windows build unbreak proposal. (PR #83538)   David CARLIER via llvm-commits
• [llvm] [GlobalISel][TableGen] Take first result for multi-output instructions (PR #81130)   Björn Pettersson via llvm-commits
• [llvm] 2a67c28 - [IR] Update getOrInsertFunction() docs for opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   James Henderson via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Matt Arsenault via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   Simon Pilgrim via llvm-commits
• [llvm] [SystemZ] Enable MachineCombiner for FP reassociation (PR #83546)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Enable MachineCombiner for FP reassociation (PR #83546)   via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Enable MachineCombiner for FP reassociation (PR #83546)   via llvm-commits
• [llvm] [AMDGPU] Move renamedInGFX9 from TableGen to SIInstrInfo helper function/macro to free up a bit slot (PR #82787)   Corbin Robeck via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Pierre van Houtryve via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] [MC] Teach checkAsmTiedOperandConstraints about optional operands (PR #81381)   Alfie Richards via llvm-commits
• [llvm] [MachineFrameInfo] Refactoring with computeMaxcallFrameSize() (NFC) (PR #78001)   Jonas Paulsson via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)   Alexandros Lamprineas via llvm-commits
• [llvm] [TableGen] Fix minor index bugs in PseudoLoweringEmitter (PR #81605)   Alfie Richards via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Yashwant Singh via llvm-commits
• [llvm] [AArch64][SVE2] Generate SVE2 BSL instruction in LLVM for bit-twiddling. (PR #83514)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE2] Generate SVE2 BSL instruction in LLVM for bit-twiddling. (PR #83514)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SVE2] Generate SVE2 BSL instruction in LLVM for bit-twiddling. (PR #83514)   Sander de Smalen via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Yashwant Singh via llvm-commits
• [llvm] [AArch64] Combine getActiveLaneMask with vector_extract (PR #81139)   Momchil Velikov via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Yashwant Singh via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel][TableGen] Take first result for multi-output instructions (PR #81130)   Pierre van Houtryve via llvm-commits
• [llvm] [Transform][ObjCARC] Change the 'for(; ; )' to a do-while (PR #83416)   Zhang Yi via llvm-commits
• [llvm] 199bbe2 - [MC] Teach checkAsmTiedOperandConstraints about optional operands (#81381)   via llvm-commits
• [llvm] [MC] Teach checkAsmTiedOperandConstraints about optional operands (PR #81381)   Sergei Barannikov via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   via llvm-commits
• [compiler-rt] [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (PR #76761)   Mike Hommey via llvm-commits
• [llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)   Jonas Paulsson via llvm-commits
• [compiler-rt] [compiler-rt][Fuzzer] SetThreadName windows implementation new try. (PR #76761)   David CARLIER via llvm-commits
• [llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)   Jonas Paulsson via llvm-commits
• [llvm] [SLP]Fix the cost model for extracts combined with later shuffle. (PR #83442)   Simon Pilgrim via llvm-commits
• [llvm] 4c8c335 - [AMDGPU] Rename hasGFX12Enc to hasRestrictedSOffset in BUF definitions. NFC. (#83434)   via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasRestrictedSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [compiler-rt] Revert fuzzer windows changes (PR #83551)   David CARLIER via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Simon Pilgrim via llvm-commits
• [compiler-rt] Revert fuzzer windows changes (PR #83551)   via llvm-commits
• [llvm] 4c642b6 - [llvm-jitlink] [test] Add an XFAIL for a JITLink test on MinGW   Martin Storsjö via llvm-commits
• [llvm] d458a19 - [AArch64] Mark AESD and AESE instructions as commutative. (#83390)   via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   David Green via llvm-commits
• [llvm] [AArch64] Mark AESD and AESE instructions as commutative. (PR #83390)   David Green via llvm-commits
• [llvm] [GlobalISel][TableGen] Take first result for multi-output instructions (PR #81130)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][TableGen] Take first result for multi-output instructions (PR #81130)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][TableGen] Take first result for multi-output instructions (PR #81130)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel][TableGen] Take first result for multi-output instructions (PR #81130)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Don't lower float/double ATOMIC_[LOAD|STORE] to [LOAD|STORE] (PR #75879)   Jonas Paulsson via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Pierre van Houtryve via llvm-commits
• [compiler-rt] d1538c1 - Revert fuzzer windows changes (#83551)   via llvm-commits
• [compiler-rt] Revert fuzzer windows changes (PR #83551)   David CARLIER via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Simon Pilgrim via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Rename hasGFX12Enc to hasRestrictedSOffset in BUF definitions. NFC. (PR #83434)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [NFC][AMDGPU] Construct MMO inside getTgtMemIntrinsic. (PR #83554)   via llvm-commits
• [llvm] [NFC][AMDGPU] Construct MMO inside getTgtMemIntrinsic. (PR #83554)   via llvm-commits
• [llvm] [Xtensa] Implement base CallConvention. (PR #83280)   Alexey Gerenkov via llvm-commits
• [llvm] [RISCV][NFC] Allow SchedVar to be a def inside our scheduler model files. (PR #82634)   Wang Pengcheng via llvm-commits
• [llvm] [RFC][LTO] Allow target-specific module splittting (PR #83128)   Pierre van Houtryve via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [clang] [llvm] [RISCV] Support RISC-V Profiles in -march option (PR #76357)   Wang Pengcheng via llvm-commits
• [llvm] [NFC][AMDGPU] Construct MMO inside getTgtMemIntrinsic. (PR #83554)   Matt Arsenault via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Pierre van Houtryve via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Pierre van Houtryve via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Pierre van Houtryve via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Pierre van Houtryve via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Pierre van Houtryve via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Pierre van Houtryve via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Pierre van Houtryve via llvm-commits
• [llvm] [WIP] Extend data layout to add non zero null value for address space. (PR #83109)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Fix canonicalization of truncated values. (PR #83054)   Jay Foad via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [clang] [llvm] [AMDGPU] Emit a waitcnt instruction after each memory instruction (PR #79236)   Pierre van Houtryve via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [SLP] Use ScopeExit to update Operands/PrevDist on all paths. (NFC) (PR #83490)   Florian Hahn via llvm-commits
• [llvm] [SLP] Use ScopeExit to update Operands/PrevDist on all paths. (NFC) (PR #83490)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Matt Arsenault via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [BOLT] support AArch64 JUMP26 createRelocation (PR #83531)   Vladislav Khmelevsky via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Invalidate changes to `DoesConsume` if the first try fails (PR #82973)   Yingwei Zheng via llvm-commits
• [llvm] [NFC][AMDGPU] Construct MMO inside getTgtMemIntrinsic. (PR #83554)   via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Allow memory operations lowering to custom SME functions. (PR #79263)   Sander de Smalen via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   Florian Hahn via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (round 2) (PR #83494)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Jay Foad via llvm-commits
• [llvm] 0e9a102 - [AArch64] Remove unused AArch64ISD::BIT. NFC   David Green via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [llvm] [InstCombine] Fold its select user into select (PR #83405)   via llvm-commits
• [llvm] [NFC][AMDGPU] Construct MMO inside getTgtMemIntrinsic. (PR #83554)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Construct MMO inside getTgtMemIntrinsic. (PR #83554)   via llvm-commits
• [llvm] [AArch64] Combine getActiveLaneMask with vector_extract (PR #81139)   Momchil Velikov via llvm-commits
• [llvm] [LoopVectorize][AArch64][SVE] Generate wide active lane masks (PR #81140)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Optimise test of the LSB of a paired whileCC instruction (PR #81141)   Momchil Velikov via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [llvm] [AArch64] Combine getActiveLaneMask with vector_extract (PR #81139)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Combine getActiveLaneMask with vector_extract (PR #81139)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Combine getActiveLaneMask with vector_extract (PR #81139)   Momchil Velikov via llvm-commits
• [llvm] [NewGVN] Prevent cyclic dependencies by ensuring Leader has min RPO number (PR #82110)   via llvm-commits
• [llvm] [SROA] Unfold gep of index phi (round 2) (PR #83494)   Yingwei Zheng via llvm-commits
• [llvm] [NFC][AMDGPU] Construct MMO inside getTgtMemIntrinsic. (PR #83554)   Matt Arsenault via llvm-commits
• [llvm] [X86] Pre-SSE42 v2i64 sgt lowering - check if representable as v2i32 (PR #83560)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Pre-SSE42 v2i64 sgt lowering - check if representable as v2i32 (PR #83560)   via llvm-commits
• [llvm] [AArch64] Generate DOT instructions from matching IR (PR #69583)   Graham Hunter via llvm-commits
• [llvm] [LV][SVE] Recognize potential DOT sequences and use a wider VF (PR #69587)   Graham Hunter via llvm-commits
• [llvm] 2d98d76 - [SLP]Fix the cost model for extracts combined with later shuffle.   via llvm-commits
• [llvm] [SLP]Fix the cost model for extracts combined with later shuffle. (PR #83442)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in (PR #83468)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in (PR #83468)   Alexey Bataev via llvm-commits
• [llvm] AMDGPU: Move attributor into optimization pipeline (PR #83131)   Matt Arsenault via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83468)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83468)   Simon Pilgrim via llvm-commits
• [compiler-rt] [compiler-rt][fuzzer] Reland "SetThreadName windows implementation" (PR #83562)   David CARLIER via llvm-commits
• [llvm] [SLP] Use ScopeExit to update Operands/PrevDist on all paths. (NFC) (PR #83490)   Alexey Bataev via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   via llvm-commits
• [compiler-rt] [compiler-rt][fuzzer] Reland "SetThreadName windows implementation" (PR #83562)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   via llvm-commits
• [llvm] fix symbol name offset in parsing chained-fixup entry function (PR #83564)   via llvm-commits
• [llvm] fix symbol name offset in parsing chained-fixup entry function (PR #83564)   via llvm-commits
• [llvm] fix symbol name offset in parsing chained-fixup entry function (PR #83564)   via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   Yingwei Zheng via llvm-commits
• [llvm] [llvm][Object][MachO]fix symbol name offset in parsing chained-fixup entry function (PR #83564)   via llvm-commits
• [llvm] [llvm][Object][MachO] Fix symbol name offset in parsing chained-fixup entry function (PR #83564)   via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   Alexey Bataev via llvm-commits
• [llvm] f28c4b4 - [SLP]Fix/improve potential masked gather loads analysis.   via llvm-commits
• [llvm] [SLP]Fix/improve potential masked gather loads analysis. (PR #83472)   Alexey Bataev via llvm-commits
• [llvm] [llvm] Fix symbol name offset in parsing chained-fixup entry function (PR #83564)   via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert (PR #83481)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Port selection dag isel to new pass manager (PR #83567)   via llvm-commits
• [llvm] [CodeGen] Port selection dag isel to new pass manager (PR #83567)   via llvm-commits
• [llvm] [CodeGen] Port selection dag isel to new pass manager (PR #83567)   via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] [CodeGen] Port selection dag isel to new pass manager (PR #83567)   via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] [CodeGen] Port selection dag isel to new pass manager (PR #83567)   via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Ivan Kosarev via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Ivan Kosarev via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Ivan Kosarev via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Ivan Kosarev via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Ivan Kosarev via llvm-commits
• [llvm] [CodeGen] Port selection dag isel to new pass manager (PR #83567)   Matt Arsenault via llvm-commits
• [clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)   Alexandros Lamprineas via llvm-commits
• [clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)   Alexandros Lamprineas via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Pierre van Houtryve via llvm-commits
• [llvm] 756166e - [AMDGPU] Improve detection of non-null addrspacecast operands (#82311)   via llvm-commits
• [llvm] [AMDGPU] Improve detection of non-null addrspacecast operands (PR #82311)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Let LowerModuleLDS run twice on the same module (PR #81729)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Vikram Hegde via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Vikram Hegde via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Vikram Hegde via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] b8e0f3e - [ARM] Change the type of CC and VCC code in `splitMnemonic`. (#83413)   via llvm-commits
• [llvm] [ARM] Change the type of CC and VCC code in `splitMnemonic`. (PR #83413)   Alfie Richards via llvm-commits
• [llvm] AMDGPU/GlobalISel: Uniformity info based regbankselect (PR #73684)   Petar Avramovic via llvm-commits
• [llvm] 924ad19 - [X86][CodeGen] Add missing patterns for APX NDD instructions about encoding trick   Shengchen Kan via llvm-commits
• [llvm] [nfc] Fix RTTI for `InstrProf` intrinsics (PR #83511)   Ellis Hoag via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [llvm] Add non-null check before accessing pointer (PR #83459)   Martin Wehking via llvm-commits
• [llvm] Use object directly instead of accessing ArrayRef (PR #83263)   Martin Wehking via llvm-commits
• [clang] [lld] [llvm] [RISCV] Support .note.gnu.property for enable Zicfiss and Zicfilp extension (PR #77414)   Kito Cheng via llvm-commits
• [clang] [lld] [llvm] [RISCV] Support .note.gnu.property for enable Zicfiss and Zicfilp extension (PR #77414)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Farzon Lotfi via llvm-commits
• [llvm] [X86] Pre-SSE42 v2i64 sgt lowering - check if representable as v2i32 (PR #83560)   Phoebe Wang via llvm-commits
• [llvm] Add non-null check before accessing pointer (PR #83459)   Matt Arsenault via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] dfec4ef - Use object directly instead of accessing ArrayRef (#83263)   via llvm-commits
• [llvm] Use object directly instead of accessing ArrayRef (PR #83263)   Matt Arsenault via llvm-commits
• [llvm] [SLPVectorizer] Make the insert/extractvector PHICompare a strict-weak ordering (PR #83571)   Benjamin Kramer via llvm-commits
• [llvm] [SLPVectorizer] Make the insert/extractvector PHICompare a strict-weak ordering (PR #83571)   via llvm-commits
• [llvm] [TTI] Add alignment argument to TTI for compress/expand support (PR #83516)   Kolya Panchenko via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sander de Smalen via llvm-commits
• [llvm] Add non-null check before accessing pointer (PR #83459)   Martin Wehking via llvm-commits
• [llvm] Add non-null check before accessing pointer (PR #83459)   Martin Wehking via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Nikita Popov via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [llvm] [VPlan] Explicitly handle scalar pointer inductions. (PR #83068)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Fix OpenCL conformance test failures for ctlz. (PR #83170)   Jay Foad via llvm-commits
• [llvm] [TTI] Add alignment argument to TTI for compress/expand support (PR #83516)   Kolya Panchenko via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [llvm-readobj] enable demangle option for the xcoff object file (PR #78455)   zhijian lin via llvm-commits
• [llvm] 3034632 - [llvm-readobj] enable demangle option for the xcoff object file (#78455)   via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)   Sam Tebbs via llvm-commits
• [llvm] [X86] Pre-SSE42 v2i64 sgt lowering - check if representable as v2i32 (PR #83560)   Simon Pilgrim via llvm-commits
• [llvm] [SLP] Use ScopeExit to update Operands/PrevDist on all paths. (NFC) (PR #83490)   Florian Hahn via llvm-commits
• [llvm] 765a5d6 - [X86] Pre-SSE42 v2i64 sgt lowering - check if representable as v2i32 (#83560)   via llvm-commits
• [llvm] 6ecd261 - [SLP] Use ScopeExit to update Operands/PrevDist on all paths. (NFC) (#83490)   via llvm-commits
• [llvm] Make default size MBB.size() (PR #83526)   via llvm-commits
• [llvm] [Thumb1] Resolve FIXME: Use 'mov hi, $src; mov $dst, hi' (PR #81908)   via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for liveliness (PR #83526)   via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for liveliness (PR #83526)   Simon Pilgrim via llvm-commits
• [llvm] [SLPVectorizer] Make the insert/extractvector PHICompare a strict-weak ordering (PR #83571)   Alexey Bataev via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] 5bafb8d - [SLP][NFC]Add/use single UsesLimit constant, NFC.   Alexey Bataev via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for liveliness (PR #83526)   via llvm-commits
• [llvm] [SLPVectorizer] Make the insert/extractvector PHICompare a strict-weak ordering (PR #83571)   Benjamin Kramer via llvm-commits
• [llvm] [SLPVectorizer] Make the insert/extractvector PHICompare a strict-weak ordering (PR #83571)   Benjamin Kramer via llvm-commits
• [llvm] 3fc277f - [SLPVectorizer] Make the insert/extractvector PHICompare a strict-weak ordering (#83571)   via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Janek van Oirschot via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Xiang Li via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Janek van Oirschot via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [AArch64] Improve cost model for legal subvec insert/extract (PR #81135)   Graham Hunter via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Xiang Li via llvm-commits
• [llvm] [AMDGPU] Add AMDGPU specific variadic operation MCExprs (PR #82022)   Janek van Oirschot via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   Terry Wilmarth via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83468)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert (PR #83481)   Alexey Bataev via llvm-commits
• [llvm] [llvm][Intrinsics] Add llvm_v3i8_ty. [NFCI] (PR #83576)   Francesco Petrogalli via llvm-commits
• [llvm] [llvm][Intrinsics] Add llvm_v3i8_ty. [NFCI] (PR #83576)   via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [clang] [clang-tools-extra] [flang] [lld] [llvm] [flang][clang] Add Visibility specific help text for options (PR #81869)   David Spickett via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   via llvm-commits
• [compiler-rt] [compiler-rt/darwin] Disable building sanitizers on platforms without fork(). (PR #83485)   Nico Weber via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83468)   Alexey Bataev via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83581)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83581)   via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Timm Baeder via llvm-commits
• [llvm] [RISCV] Support `llvm.masked.compressstore` intrinsic (PR #83457)   Timm Baeder via llvm-commits
• [llvm] Silence illegal address computation warning (PR #83244)   Timm Baeder via llvm-commits
• [llvm] Enable exp10 libcall on linux (PR #68736)   Krishna Narayanan via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83581)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [openmp] [OpenMP] Introduce support for OMPX extensions and taskgraph frontend (PR #66919)   via llvm-commits
• [llvm] Enable exp10 libcall on linux (PR #68736)   Mats Petersson via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83581)   Alexey Bataev via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert subvector. (PR #83481)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert subvector. (PR #83481)   Aaron Ballman via llvm-commits
• [llvm] Enable exp10 libcall on linux (PR #68736)   via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Chris B via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   via llvm-commits
• [llvm] [InstrProf] Change step from 64-bit to pointer-sized int (PR #83239)   Jovan Dmitrović via llvm-commits
• [llvm] Export `LLVM_VERSION_*` CMake variables to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Krzysztof Drewniak via llvm-commits
• [llvm] [InstrProf] Change step from 64-bit to pointer-sized int (PR #83239)   via llvm-commits
• [llvm] [TabeGen] Add `PreferSmallerInstructions` for Targets. (PR #83587)   Alfie Richards via llvm-commits
• [llvm] [TabeGen] Add `PreferSmallerInstructions` for Targets. (PR #83587)   Alfie Richards via llvm-commits
• [llvm] [InstrProf] Change step from 64-bit to pointer-sized int (PR #83239)   Jovan Dmitrović via llvm-commits
• [llvm] [TabeGen] Add `PreferSmallerInstructions` for Targets. (PR #83587)   via llvm-commits
• [llvm] [TableGen] Bug fix for tied optional operands resolution (PR #83588)   Alfie Richards via llvm-commits
• [llvm] [TableGen] Bug fix for tied optional operands resolution (PR #83588)   Alfie Richards via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] Enable exp10 libcall on linux (PR #68736)   Krishna Narayanan via llvm-commits
• [llvm] Add non-null check before accessing pointer (PR #83459)   Matt Arsenault via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] Silence illegal address computation warning (PR #83244)   Matt Arsenault via llvm-commits
• [llvm] 92fe6c6 - Silence illegal address computation warning (#83244)   via llvm-commits
• [llvm] Silence illegal address computation warning (PR #83244)   Matt Arsenault via llvm-commits
• [llvm] [TabeGen] Add `PreferSmallerInstructions` for Targets. (PR #83587)   Alfie Richards via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   James Westwood via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   S. Bharadwaj Yadavalli via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   S. Bharadwaj Yadavalli via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   S. Bharadwaj Yadavalli via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   S. Bharadwaj Yadavalli via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   S. Bharadwaj Yadavalli via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   S. Bharadwaj Yadavalli via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [llvm][Intrinsics] Add llvm_v3i8_ty. [NFCI] (PR #83576)   Visoiu Mistrih Francis via llvm-commits
• [llvm] [DirectX] Add DXIL_MODULE_FLAG for ShaderFlags. (PR #83217)   Xiang Li via llvm-commits
• [llvm] Upstreaming warning suppression to LLVM (PR #83590)   via llvm-commits
• [llvm] Upstreaming warning suppression to LLVM (PR #83590)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Alina Sbirlea via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Alina Sbirlea via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Alina Sbirlea via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83591)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83591)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83591)   via llvm-commits
• [clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)   Jon Roelofs via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Farzon Lotfi via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Farzon Lotfi via llvm-commits
• [llvm] Export `LLVM_VERSION_*` CMake variables to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Farzon Lotfi via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [AMDGPU] Add IR-level pass to rewrite away address space 7 (PR #77952)   Krzysztof Drewniak via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [compiler-rt] [compiler-rt/darwin] Disable building sanitizers on platforms without fork(). (PR #83485)   Nico Weber via llvm-commits
• [compiler-rt] [compiler-rt] Adds builtins support for xros. (PR #83484)   Nico Weber via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   Jay Foad via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   Farzon Lotfi via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   via llvm-commits
• [llvm] 8f65e7b - [Dwarf] Support `__ptrauth` qualifier in metadata nodes (#82363)   via llvm-commits
• [llvm] [mlir] [Dwarf] Support `__ptrauth` qualifier in metadata nodes (PR #82363)   Daniil Kovalev via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   Matt Arsenault via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Philip Reames via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   Jay Foad via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Alfie Richards via llvm-commits
• [llvm] [TTI] Add alignment argument to TTI for compress/expand support (PR #83516)   Philip Reames via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   S. Bharadwaj Yadavalli via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83581)   Simon Pilgrim via llvm-commits
• [llvm] [SystemZ] Enable MachineCombiner for FP reassociation (PR #83546)   Ulrich Weigand via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   Jay Foad via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Damyan Pepper via llvm-commits
• [llvm] [CMake][ASAN] Add support for ADDRESS_SANITIZER_BUILD compile option (PR #83595)   Christian Ulmann via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83591)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83591)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Damyan Pepper via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Farzon Lotfi via llvm-commits
• [llvm] [CMake][ASAN] Add support for ADDRESS_SANITIZER_BUILD compile option (PR #83595)   via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [X86] Convert lshr(x, BW-1) -> and(x, 1) iff x is allsignbits (PR #83596)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Convert lshr(x, BW-1) -> and(x, 1) iff x is allsignbits (PR #83596)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Nemanja Ivanovic via llvm-commits
• [llvm] 0813b90 - [TypePromotion] Support positive addition amounts in isSafeWrap. (#81690)   via llvm-commits
• [llvm] [TypePromotion] Support positive addition amounts in isSafeWrap. (PR #81690)   Craig Topper via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   via llvm-commits
• [llvm] f6f79d4 - Revert "[HWASAN] Implement selective instrumentation based on profiling information (#83503)"   Kirill Stoimenov via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Craig Topper via llvm-commits
• [llvm] 53f89a0 - [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (#83593)   via llvm-commits
• [llvm] [AMDGPU] Remove AtomicNoRet class and getAtomicNoRetOp table (PR #83593)   Jay Foad via llvm-commits
• [llvm] [HWASAN] Implement selective instrumentation based on profiling information (PR #83503)   Kirill Stoimenov via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [AMDGPU][PromoteAlloca] Correctly handle a variable vector index (PR #83597)   via llvm-commits
• [llvm] [AMDGPU][PromoteAlloca] Correctly handle a variable vector index (PR #83597)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] [AMDGPU][PromoteAlloca] Correctly handle a variable vector index (PR #83597)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] Implementation of round intrinsic (PR #83570)   Farzon Lotfi via llvm-commits
• [llvm] b542501 - [HLSL][DXIL] Implementation of round intrinsic (#83570)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Nikita Popov via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   Farzon Lotfi via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [llvm] [X86] Convert lshr(x, BW-1) -> and(x, 1) iff x is allsignbits (PR #83596)   via llvm-commits
• [llvm] [X86] Convert lshr(x, BW-1) -> and(x, 1) iff x is allsignbits (PR #83596)   via llvm-commits
• [llvm] [RISC-V] Fix crash with late stack realignment requirement (PR #83496)   Craig Topper via llvm-commits
• [llvm] [SLP]Improve minbitwidth analysis. (PR #78976)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Alexey Bataev via llvm-commits
• [llvm] 3337d69 - [llvm][Intrinsics] Add llvm_v3i8_ty. [NFCI] (#83576)   via llvm-commits
• [llvm] [llvm][Intrinsics] Add llvm_v3i8_ty. [NFCI] (PR #83576)   Francesco Petrogalli via llvm-commits
• [llvm] [nfc] Fix RTTI for `InstrProf` intrinsics (PR #83511)   Mircea Trofin via llvm-commits
• [llvm] ce95a56 - [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseEdge` (#83505)   via llvm-commits
• [llvm] [pgo][nfc] Model `Count` as a `std::optional` in `PGOUseEdge` (PR #83505)   Mircea Trofin via llvm-commits
• [llvm] [nfc] Fix RTTI for `InstrProf` intrinsics (PR #83511)   Mircea Trofin via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83581)   Alexey Bataev via llvm-commits
• [llvm] df0fd3a - [SLP]Try to vectorize small graph with extractelements, used in buildvector.   via llvm-commits
• [llvm] [SLP]Try to vectorize small graph with extractelements, used in buildvector. (PR #83581)   Alexey Bataev via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [X86] Convert lshr(x, BW-1) -> and(x, 1) iff x is allsignbits (PR #83596)   Simon Pilgrim via llvm-commits
• [llvm] e741d88 - [DXIL] Add frac unary lowering (#83465)   via llvm-commits
• [llvm] [DXIL] Add frac unary lowering (PR #83465)   Farzon Lotfi via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] AMDGPU: Simplify instruction definitions for global_load_tr_b64(b128) (PR #83601)   Changpeng Fang via llvm-commits
• [llvm] AMDGPU: Simplify instruction definitions for global_load_tr_b64(b128) (PR #83601)   via llvm-commits
• [llvm] [AMDGPU][PromoteAlloca] Correctly handle a variable vector index (PR #83597)   via llvm-commits
• [llvm] [X86] Convert lshr(x, BW-1) -> and(x, 1) iff x is allsignbits (PR #83596)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)   Alexandros Lamprineas via llvm-commits
• [llvm] AMDGPU: Simplify instruction definitions for global_load_tr_b64(b128) (PR #83601)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] AMDGPU: Simplify instruction definitions for global_load_tr_b64(b128) (PR #83601)   Changpeng Fang via llvm-commits
• [llvm] 84927a6 - AMDGPU: Simplify instruction definitions for global_load_tr_b64(b128) (#83601)   via llvm-commits
• [clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)   Alexandros Lamprineas via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [lld] [ELF] Internalize enum (PR #83604)   Fangrui Song via llvm-commits
• [lld] [ELF] Internalize enum (PR #83604)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [Asan] Pre-commit test for asan support of funclet token (PR #82631)   via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Yaxun Liu via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Yaxun Liu via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert subvector. (PR #83481)   Simon Pilgrim via llvm-commits
• [llvm] dd426fa - [Asan] Pre-commit test for asan support of funclet token (#82631)   via llvm-commits
• [llvm] [Asan] Pre-commit test for asan support of funclet token (PR #82631)   via llvm-commits
• [llvm] [X86] Convert lshr(x, BW-1) -> and(x, 1) iff x is allsignbits (PR #83596)   via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] R11 not pushed adjacent to link register with PAC-M and AAPCS frame chain fix (PR #82801)   Eli Friedman via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert subvector. (PR #83481)   Alexey Bataev via llvm-commits
• [llvm] 3a30d8e - [SLP]Check if masked gather can be emitted as a serie of loads/insert subvector.   via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert subvector. (PR #83481)   Alexey Bataev via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Florian Hahn via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Florian Hahn via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Florian Hahn via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Florian Hahn via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Florian Hahn via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Florian Hahn via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Florian Hahn via llvm-commits
• [llvm] 2ab6d1e - [SLP][NFC]Move some check to the outer if to simplify inner checks.   Alexey Bataev via llvm-commits
• [llvm] [mlir] [openmp] [Flang][OpenMP] Add support for schedule clause for GPU (PR #81618)   Dominik Adamski via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   Simon Pilgrim via llvm-commits
• [llvm] [mlir] [openmp] [Flang][OpenMP] Add support for schedule clause for GPU (PR #81618)   Dominik Adamski via llvm-commits
• [lld] [ELF] Internalize enum (PR #83604)   Sam James via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Alexey Bataev via llvm-commits
• [llvm] [ValueTracking] Change recursive eval order for `isKnownNonZero(umin)`; NFC (PR #83607)   via llvm-commits
• [llvm] [ValueTracking] Change recursive eval order for `isKnownNonZero(umin)`; NFC (PR #83607)   via llvm-commits
• [llvm] [ValueTracking] Change recursive eval order for `isKnownNonZero(umin)`; NFC (PR #83607)   via llvm-commits
• [llvm] [ValueTracking] Change recursive eval order for `isKnownNonZero(umin)`; NFC (PR #83607)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [lld] 4a3f7e7 - [ELF] Internalize enum   via llvm-commits
• [lld] [ELF] Internalize enum (PR #83604)   Fangrui Song via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] 582718f - [X86] cmp-shiftX-maskX.ll - add AVX1 test coverage   Simon Pilgrim via llvm-commits
• [llvm] 1e8d3c3 - [X86] cmp-shiftX-maskX.ll - add additional tests for #83596   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   David Blaikie via llvm-commits
• [compiler-rt] [llvm] [Asan] Add "funclet" OpBundle to generated runtime calls if required by EH personality (PR #82533)   via llvm-commits
• [llvm] [X86] Convert lshr(x, BW-1) -> and(x, 1) iff x is allsignbits (PR #83596)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Convert logicalshift(x, C) -> and(x, M) iff x is allsignbits (PR #83596)   Simon Pilgrim via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [X86] Convert logicalshift(x, C) -> and(x, M) iff x is allsignbits (PR #83596)   Simon Pilgrim via llvm-commits
• [compiler-rt] [llvm] [Asan] Add "funclet" OpBundle to generated runtime calls if required by EH personality (PR #82533)   via llvm-commits
• [llvm] fcdf818 - [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (#82354)   via llvm-commits
• [llvm] [KnownBits] Add KnownBits::absdiff to compute the absolute difference of 2 unsigned values (PR #82354)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [HLSL] implementation of lerp intrinsic (PR #83077)   Farzon Lotfi via llvm-commits
• [llvm] [llvm][vfs] Remove blank comment after \endverbatim doxygen command (PR #83240)   David Blaikie via llvm-commits
• [llvm] [X86] Convert logicalshift(x, C) -> and(x, M) iff x is allsignbits (PR #83596)   via llvm-commits
• [llvm] 09ffd33 - [llvm][vfs] Remove blank comment after \endverbatim doxygen command (#83240)   via llvm-commits
• [llvm] [llvm][vfs] Remove blank comment after \endverbatim doxygen command (PR #83240)   David Blaikie via llvm-commits
• [llvm] [llvm][vfs] Remove blank comment after \endverbatim doxygen command (PR #83240)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   via llvm-commits
• [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)   Alexey Bataev via llvm-commits
• [llvm] 6fe60bd - [SLP] Exit early if MaxVF < MinVF (NFCI). (#83283)   via llvm-commits
• [llvm] [SLP] Exit early if MaxVF < MinVF (NFCI). (PR #83283)   Florian Hahn via llvm-commits
• [llvm] [SLP] Collect candidate VFs in vector in vectorizeStores (NFC). (PR #82793)   Florian Hahn via llvm-commits
• [lld] [ELF] Internalize enum (PR #83604)   Fangrui Song via llvm-commits
• [lld] [ELF] Internalize enum (PR #83604)   Fangrui Song via llvm-commits
• [llvm] a490bbf - [M68k] Fix compilation pipeline check   Michael Liao via llvm-commits
• [llvm] [SLP] Collect candidate VFs in vector in vectorizeStores (NFC). (PR #82793)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Andy Kaylor via llvm-commits
• [llvm] [X86] Try Folding icmp of v8i32 -> fcmp of v8f32 on AVX (PR #82290)   via llvm-commits
• [llvm] 1685e7f - [Support] Fix crash in install_bad_alloc_error_handler (#83160)   via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   Alexandre Ganea via llvm-commits
• [llvm] Fix crash in install_bad_alloc_error_handler (PR #83160)   via llvm-commits
• [lld] [ELF] Internalize enum (PR #83604)   via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   Fangrui Song via llvm-commits
• [llvm] [llvm] Fix symbol name offset in parsing chained-fixup entry function (PR #83564)   David Blaikie via llvm-commits
• [llvm] 7b0b64a - [DWARF] Use std::tie after #83047. NFC   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Andy Kaylor via llvm-commits
• [llvm] [LLVM][DWARF] Make dwarf::getDebugNamesBucketCount return a pair. (PR #83047)   David Blaikie via llvm-commits
• [llvm] 214f897 - [unittest] Fix -Wsign-compare warnings in KnownBits.cpp after #82354   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)   Andy Kaylor via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   via llvm-commits
• [llvm] change contents of ScalarEvolution from private to protected (PR #83052)   Joshua Ferguson via llvm-commits
• [llvm] [X86] Treat returns as SpecialFP values (PR #83615)   via llvm-commits
• [llvm] [X86] Treat returns as SpecialFP values (PR #83615)   via llvm-commits
• [llvm] [X86] Treat returns as SpecialFP values (PR #83615)   via llvm-commits
• [llvm] 617398e - [SLP] Collect candidate VFs in vector in vectorizeStores (NFC). (#82793)   via llvm-commits
• [llvm] [SLP] Collect candidate VFs in vector in vectorizeStores (NFC). (PR #82793)   Florian Hahn via llvm-commits
• [llvm] [SLP] Initial vectorization of non-power-of-2 ops. (PR #77790)   Florian Hahn via llvm-commits
• [llvm] [SLP] Initial vectorization of non-power-of-2 ops. (PR #77790)   Florian Hahn via llvm-commits
• [llvm] [SLP] Initial vectorization of non-power-of-2 ops. (PR #77790)   Florian Hahn via llvm-commits
• [llvm] [SLP] Initial vectorization of non-power-of-2 ops. (PR #77790)   Florian Hahn via llvm-commits
• [llvm] [SLP] Initial vectorization of non-power-of-2 ops. (PR #77790)   Florian Hahn via llvm-commits
• [llvm] [SLP] Initial vectorization of non-power-of-2 ops. (PR #77790)   Florian Hahn via llvm-commits
• [lld] [lld][macho][NFC] Add specific namespace scope for objc symbol names (PR #83618)   via llvm-commits
• [lld] [lld][macho][NFC] Add specific namespace scope for objc symbol names (PR #83618)   via llvm-commits
• [llvm] [llvm] Fix symbol name offset in parsing chained-fixup entry function (PR #83564)   Fangrui Song via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   David Li via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [llvm] Avoid dbg.value between phi nodes when converting from DbgRecords (PR #83620)   Daniel Sanders via llvm-commits
• [llvm] Avoid dbg.value between phi nodes when converting from DbgRecords (PR #83620)   via llvm-commits
• [llvm] [SLP]Check if masked gather can be emitted as a serie of loads/insert subvector. (PR #83481)   Valery Dmitriev via llvm-commits
• [llvm] Avoid dbg.value between phi nodes when converting from DbgRecords (PR #83620)   via llvm-commits
• [lld] [lld][macho][NFC] Add specific namespace scope for objc symbol names (PR #83618)   Ellis Hoag via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [llvm] [X86] Treat returns as SpecialFP values (PR #83615)   Craig Topper via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [llvm] [DSE] Fixes bug caused by skipped read clobbers (PR #83181)   via llvm-commits
• [llvm] [PowerPC] adjust cost for extract i64 from vector on P9 and above (PR #82963)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Artem Belevich via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Atousa Duprat via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] Fix a use-after-move bug in DWARFVerifier constructor (PR #83621)   via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Atousa Duprat via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] Fix a use-after-move bug in DWARFVerifier constructor (PR #83621)   via llvm-commits
• [llvm] d01576b - [TargetParser][AArch64] Add alias for FEAT_RDM. (#80540)   via llvm-commits
• [clang] [llvm] [TargetParser][AArch64] Add alias for FEAT_RDM. (PR #80540)   Alexandros Lamprineas via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [X86] Treat returns as SpecialFP values (PR #83615)   Craig Topper via llvm-commits
• [llvm] Fix a use-after-move bug in DWARFVerifier constructor (PR #83621)   via llvm-commits
• [llvm] Fix a use-after-move bug in DWARFVerifier constructor (PR #83621)   via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   Usman Nadeem via llvm-commits
• [lld] [lld][macho][NFC] Add specific namespace scope for objc symbol names (PR #83618)   Kyungwoo Lee via llvm-commits
• [llvm] [AArch64] Improve lowering of truncating uzp1 (PR #82457)   Usman Nadeem via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Artem Belevich via llvm-commits
• [llvm] [X86] Treat returns as SpecialFP values (PR #83615)   Craig Topper via llvm-commits
• [llvm] [X86][GlobalISel] Use GIntrinsic during custom intrinsic selection (PR #83498)   Evgenii Kudriashov via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] ec415af - [X86] Regenerate X86/lsr-addrecloops.ll test; NFC   Noah Goldstein via llvm-commits
• [llvm] ae76dfb - [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches   Noah Goldstein via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] Avoid dbg.value between phi nodes when converting from DbgRecords (PR #83620)   Daniel Sanders via llvm-commits
• [lld] 7a2d934 - [lld][macho][NFC] Add specific namespace scope for objc symbol names (#83618)   via llvm-commits
• [lld] [lld][macho][NFC] Add specific namespace scope for objc symbol names (PR #83618)   Kyungwoo Lee via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   Kyungwoo Lee via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   via llvm-commits
• [llvm] [AMDGPU][NFC] Split smrd prefetch isel (PR #83627)   via llvm-commits
• [llvm] [AMDGPU][NFC] Split smrd prefetch isel (PR #83627)   via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   via llvm-commits
• [llvm] Find dead register to use to prevent save-reload (PR #83628)   via llvm-commits
• [llvm] Find dead register to use to prevent save-reload (PR #83628)   via llvm-commits
• [llvm] Find dead register to use to prevent save-reload (PR #83628)   via llvm-commits
• [llvm] Use generic CPU tuning when in doubt (PR #83631)   via llvm-commits
• [llvm] Use generic CPU tuning when in doubt (PR #83631)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] Use generic CPU tuning when in doubt (PR #83631)   via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Valentin Clement バレンタイン クレメン via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [AArch64] add intrinsic to generate a bfi instruction (PR #79672)   Rama Malladi via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [AArch64] add intrinsic to generate a bfi instruction (PR #79672)   Rama Malladi via llvm-commits
• [llvm] [llvm][AArch64] intrinsic to generate a ubfx instruction (PR #80103)   Rama Malladi via llvm-commits
• [llvm] [llvm][AArch64] intrinsic to generate a ubfx instruction (PR #80103)   Rama Malladi via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lldb] [llvm] LLDB Debuginfod usage tests (with fixes) (PR #79181)   Kevin Frei via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Erich Keane via llvm-commits
• [clang] [llvm] [InstallAPI] Collect symbols from ObjC Ivars (PR #83632)   Cyndy Ishida via llvm-commits
• [clang] [llvm] [InstallAPI] Collect symbols from ObjC Ivars (PR #83632)   via llvm-commits
• [llvm] Use generic CPU tuning when in doubt (PR #83631)   via llvm-commits
• [clang] [llvm] [InstallAPI] Collect symbols from ObjC Ivars (PR #83632)   Juergen Ributzka via llvm-commits
• [clang] [llvm] [InstallAPI] Collect symbols from ObjC Ivars (PR #83632)   Cyndy Ishida via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] Use generic CPU tuning when in doubt (PR #83631)   Craig Topper via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] Avoid calling `GetFileAttributesW` in Windows' `fs::access` when checking for existence (PR #83495)   Jeremy Day via llvm-commits
• [llvm] [opt] Use static arrays instead of std::vector to store legacy pass names. NFC (PR #83634)   Craig Topper via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add conflicting module flag check to the verifier. (PR #83635)   via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add conflicting module flag check to the verifier. (PR #83635)   via llvm-commits
• [llvm] [llvm][ARM][AArch64] Add attributes to synthetic functions. (PR #83153)   via llvm-commits
• [llvm] [llvm][ARM][AArch64] Don't use module attr as function attr. (PR #83154)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [llvm][ARM][AArch64] Don't use module attr as function attr. (PR #83154)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [clang] [llvm] [CodeGen][arm64e] Add methods and data members to Address, which are needed to authenticate signed pointers (PR #67454)   Akira Hatanaka via llvm-commits
• [llvm] 21c83fe - [ARM] Simplify shouldAssumeDSOLocal for ELF. NFC   Fangrui Song via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Atousa Duprat via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [Analysis][ValueTracking] Unify most of the tracking between AssumptionCache and DomConditionCache (PR #83161)   via llvm-commits
• [llvm] [ValueTracking] Add fast path to avoid second recursive call in `isKnownPositive`; NFC (PR #83638)   via llvm-commits
• [llvm] [ValueTracking] Add fast path to avoid second recursive call in `isKnownPositive`; NFC (PR #83638)   via llvm-commits
• [compiler-rt] compiler-rt: Fix cmake check for _Float16 and __bf16 (PR #83639)   Khem Raj via llvm-commits
• [compiler-rt] compiler-rt: Fix cmake check for _Float16 and __bf16 (PR #83639)   Khem Raj via llvm-commits
• [compiler-rt] compiler-rt: Fix cmake check for _Float16 and __bf16 (PR #83639)   Khem Raj via llvm-commits
• [llvm] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   via llvm-commits
• [llvm] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   via llvm-commits
• [llvm] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [llvm] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   Craig Topper via llvm-commits
• [llvm] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [clang] [llvm] [AMDGPU] Adding the amdgpu-num-work-groups function attribute (PR #79035)   Jun Wang via llvm-commits
• [llvm] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   via llvm-commits
• [llvm] [ValueTracking] Add fast path to avoid second recursive call in `isKnownPositive`; NFC (PR #83638)   Yingwei Zheng via llvm-commits
• [llvm] [TableGen] Bug fix for tied optional operands resolution (PR #83588)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Bug fix for tied optional operands resolution (PR #83588)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Bug fix for tied optional operands resolution (PR #83588)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Bug fix for tied optional operands resolution (PR #83588)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [lld] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [clang] [llvm] [clang] Use separator for large numeric values in overflow diagnostic (PR #80939)   Atousa Duprat via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] Use generic CPU tuning when in doubt (PR #83631)   via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Sergei Barannikov via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   via llvm-commits
• [llvm] 057e725 - [Sparc] Use generated MatchRegisterName (NFCI) (#82165)   via llvm-commits
• [llvm] [Sparc] Use generated MatchRegisterName (NFCI) (PR #82165)   Sergei Barannikov via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Hoist immediate addresses from loads/stores (PR #83644)   Visoiu Mistrih Francis via llvm-commits
• [llvm] Use generic CPU tuning when in doubt (PR #83631)   via llvm-commits
• [llvm] [RISCV] Hoist immediate addresses from loads/stores (PR #83644)   via llvm-commits
• [llvm] Use generic CPU tuning when tune-cpu is empty (PR #83631)   via llvm-commits
• [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   via llvm-commits
• [llvm] [Transforms] Base default constructor of LoopVectorizeOptions off command line parameters (PR #83645)   via llvm-commits
• [llvm] [Transforms] Base default constructor of LoopVectorizeOptions off command line parameters (PR #83645)   via llvm-commits
• [llvm] [Transforms] Base default constructor of LoopVectorizeOptions off command line parameters (PR #83645)   via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   via llvm-commits
• [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)   Amy Kwan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [clang] [llvm] [CodeGen][arm64e] Add methods and data members to Address, which are needed to authenticate signed pointers (PR #67454)   Anton Korobeynikov via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   Phoebe Wang via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   Phoebe Wang via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [ValueTracking] Add fast path to avoid second recursive call in `isKnownPositive`; NFC (PR #83638)   via llvm-commits
• [compiler-rt] [compiler-rt] Relax CHECK line in reaches_function.c (PR #83089)   Alexander Richardson via llvm-commits
• [libcxx] [llvm] Add more debug output to the builders for a moment. (PR #83508)   via llvm-commits
• [compiler-rt] [compiler-rt] Allow running tests without installing first (PR #83088)   Alexander Richardson via llvm-commits
• [compiler-rt] a2e7827 - [compiler-rt] Relax CHECK line in reaches_function.c   via llvm-commits
• [compiler-rt] [compiler-rt] Relax CHECK line in reaches_function.c (PR #83089)   Alexander Richardson via llvm-commits
• [llvm] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   Craig Topper via llvm-commits
• [compiler-rt] [compiler-rt] Allow running tests without installing first (PR #83088)   via llvm-commits
• [compiler-rt] 07317bb - [compiler-rt] Build libfuzzer sources with the chosen C++ compiler   Alex Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Allow running tests without installing first (PR #83088)   Alexander Richardson via llvm-commits
• [llvm] Export `LLVM_VERSION_*` CMake variables to `PARENT_SCOPE` (PR #83346)   Mehdi Amini via llvm-commits
• [llvm] Export `LLVM_VERSION_*` CMake variables to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)   Jun Wang via llvm-commits
• [llvm] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   via llvm-commits
• [llvm] [llvm][Support] Call clear_error in LockFileManager to avoid report_fatal_error (PR #83655)   Michael Spencer via llvm-commits
• [llvm] [llvm][Support] Call clear_error in LockFileManager to avoid report_fatal_error (PR #83655)   via llvm-commits
• [llvm] aab3d13 - [FileCheck] Fix parsing empty global and pseudo variable names (#82595)   via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #82595)   Daniil Kovalev via llvm-commits
• [llvm] [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (PR #83656)   Lu Weining via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Yaxun Liu via llvm-commits
• [llvm] [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (PR #83656)   via llvm-commits
• [llvm] [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (PR #83656)   Lu Weining via llvm-commits
• [llvm] Revert "[FileCheck] Fix parsing empty global and pseudo variable names" (PR #83657)   Daniil Kovalev via llvm-commits
• [llvm] Revert "[FileCheck] Fix parsing empty global and pseudo variable names" (PR #83657)   via llvm-commits
• [llvm] fb67dce - [RISCV] Fix crash when unrolling loop containing vector instructions (#83384)   via llvm-commits
• [llvm] [RISCV] Fix crash when unrolling loop containing vector instructions (PR #83384)   Shih-Po Hung via llvm-commits
• [llvm] [llvm][loop-rotate] Allow forcing loop-rotation (PR #82828)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] 28b354a - Revert "[FileCheck] Fix parsing empty global and pseudo variable names" (#83657)   via llvm-commits
• [llvm] Revert "[FileCheck] Fix parsing empty global and pseudo variable names" (PR #83657)   Daniil Kovalev via llvm-commits
• [llvm] Add 3 way compare <=> integer intrinsics to Langref (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Add 3 way compare <=> integer intrinsics to Langref (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] Add 3 way compare <=> integer intrinsics to Langref (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Phoebe Wang via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Phoebe Wang via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   via llvm-commits
• [llvm] Changed Regex to accept /branch: and /cherry-pick: commands (PR #81002)   Shourya Goel via llvm-commits
• [llvm] Changed Regex to accept /branch: and /cherry-pick: commands (PR #81002)   Shourya Goel via llvm-commits
• [llvm] Changed Regex to accept /branch: and /cherry-pick: commands (PR #81002)   Shourya Goel via llvm-commits
• [compiler-rt] 597f976 - [scudo] Add support for LoongArch hardware CRC32 checksumming (#83113)   via llvm-commits
• [compiler-rt] [scudo] Add support for LoongArch hardware CRC32 checksumming (PR #83113)   Lu Weining via llvm-commits
• [llvm] [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (PR #83656)   via llvm-commits
• [llvm] [X86] Transform `(xor x (PR #83659)   via llvm-commits
• [llvm] [X86] Transform `(xor x (PR #83659)   via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   via llvm-commits
• [llvm] [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (PR #83656)   WÁNG Xuěruì via llvm-commits
• [lld] [llvm] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)   via llvm-commits
• [llvm] [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (PR #83656)   Lu Weining via llvm-commits
• [llvm] [SROA]: Only defer trying partial sized ptr or ptr vector types (PR #82279)   Jeffrey Byrnes via llvm-commits
• [llvm] Add 3 way compare <=> integer intrinsics to Langref (PR #83227)   Dhruv Chawla via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   via llvm-commits
• [llvm] [InstCombine] optimize powi(X,Y) * X with Ofast (PR #69998)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [RISCV] Use the VR allocation order for VM. (PR #83664)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use the VR allocation order for VM. (PR #83664)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] Changed Regex to accept /branch: and /cherry-pick: commands (PR #81002)   Tom Stellard via llvm-commits
• [llvm] Changed Regex to accept /branch: and /cherry-pick: commands (PR #81002)   Shourya Goel via llvm-commits
• [llvm] Changed Regex to accept /branch: and /cherry-pick: commands (PR #81002)   Tom Stellard via llvm-commits
• [llvm] Changed Regex to accept /branch: and /cherry-pick: commands (PR #81002)   Shourya Goel via llvm-commits
• [llvm] Changed Regex to accept /branch: and /cherry-pick: commands (PR #81002)   Shourya Goel via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   Shengchen Kan via llvm-commits
• [llvm] Changed Regex to accept /branch: and /cherry-pick: commands (PR #81002)   Shourya Goel via llvm-commits
• [llvm] Removed unsupported branch command and changed Regex to accept /cherry-pick: command (PR #81002)   Shourya Goel via llvm-commits
• [llvm] [Github Automation] Update Execute command (PR #81002)   Shourya Goel via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [MemProf] Add option to match summary and definition strictly (PR #83665)   via llvm-commits
• [llvm] [MemProf] Add option to match summary and definition strictly (PR #83665)   via llvm-commits
• [llvm] [Py Reformat] Exclude `third-party` from reformat (PR #83491)   Tobias Hieta via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   via llvm-commits
• [llvm] [RISCV] Use the VR allocation order for VM. (PR #83664)   Wang Pengcheng via llvm-commits
• [llvm] [Github Automation] Update Execute command (PR #81002)   Shourya Goel via llvm-commits
• [llvm] [MemProf] Add option to match summary and definition strictly (PR #83665)   via llvm-commits
• [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #83667)   Daniil Kovalev via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #83667)   via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   Phoebe Wang via llvm-commits
• [llvm] [Instrumentation] Support MachineFunctionProperties (PR #83668)   via llvm-commits
• [llvm] [Instrumentation] Support MachineFunctionProperties (PR #83668)   via llvm-commits
• [llvm] c4f5993 - [llvm][Support] Call clear_error in LockFileManager to avoid report_fatal_error (#83655)   via llvm-commits
• [llvm] [llvm][Support] Call clear_error in LockFileManager to avoid report_fatal_error (PR #83655)   Michael Spencer via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   NAKAMURA Takumi via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   NAKAMURA Takumi via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   NAKAMURA Takumi via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [Instrumentation] Support MachineFunctionProperties (PR #83668)   via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [lld] [llvm] [lld] Fixes for unitests in standalone builds (PR #83670)   Michał Górny via llvm-commits
• [lld] [llvm] [lld] Fixes for unitests in standalone builds (PR #83670)   via llvm-commits
• [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)   Ivan Kosarev via llvm-commits
• [llvm] [mlir] Revert "[Dwarf] Support `__ptrauth` qualifier in metadata nodes" (PR #83672)   Daniil Kovalev via llvm-commits
• [llvm] [mlir] Revert "[Dwarf] Support `__ptrauth` qualifier in metadata nodes" (PR #83672)   via llvm-commits
• [llvm] [TabeGen] Add `PreferSmallerInstructions` for Targets. (PR #83587)   Ivan Kosarev via llvm-commits
• [llvm] [TabeGen] Add `PreferSmallerInstructions` for Targets. (PR #83587)   Ivan Kosarev via llvm-commits
• [llvm] [TabeGen] Add `PreferSmallerInstructions` for Targets. (PR #83587)   Ivan Kosarev via llvm-commits
• [llvm] [mlir] Revert "[Dwarf] Support `__ptrauth` qualifier in metadata nodes" (PR #83672)   via llvm-commits
• [llvm] bf08d02 - Revert "[Dwarf] Support `__ptrauth` qualifier in metadata nodes" (#83672)   via llvm-commits
• [llvm] [mlir] Revert "[Dwarf] Support `__ptrauth` qualifier in metadata nodes" (PR #83672)   Daniil Kovalev via llvm-commits
• [llvm] [TabeGen] Add `PreferSmallerInstructions` for Targets. (PR #83587)   Ivan Kosarev via llvm-commits
• [llvm] [X86] Convert logicalshift(x, C) -> and(x, M) iff x is allsignbits (PR #83596)   Phoebe Wang via llvm-commits
• [llvm] Add 3 way compare <=> integer intrinsics to Langref (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] 10f5e98 - [DSE] Delay deleting non-memory-defs until end of DSE. (#83411)   via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [llvm] [DSE] Delay deleting non-memory-defs until end of DSE. (PR #83411)   Florian Hahn via llvm-commits
• [llvm] ca827d5 - [X86] Convert logicalshift(x, C) -> and(x, M) iff x is allsignbits (#83596)   via llvm-commits
• [llvm] [X86] Convert logicalshift(x, C) -> and(x, M) iff x is allsignbits (PR #83596)   Simon Pilgrim via llvm-commits
• [llvm] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   Phoebe Wang via llvm-commits
• [llvm] [Instrumentation] Support MachineFunctionProperties (PR #83668)   via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Phoebe Wang via llvm-commits
• [llvm] [DAG] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] select m, sub/add(X, C), X --> sub/add (X, and(C, m)) (PR #82441)   via llvm-commits
• [llvm] [mlir] Revert "[Dwarf] Support `__ptrauth` qualifier in metadata nodes" (PR #83672)   Daniil Kovalev via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] Add 3 way compare <=> integer intrinsics to Langref (PR #83227)   Miguel Raz Guzmán Macedo via llvm-commits
• [llvm] [llvm][ARM][AArch64] Don't use module attr as function attr. (PR #83154)   via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LowerTileCopy - Find dead register to use to prevent save-reload (PR #83628)   Simon Pilgrim via llvm-commits
• [llvm] [X86] X86LowerTileCopy - Find dead register to use to prevent save-reload (PR #83628)   Simon Pilgrim via llvm-commits
• [lld] [llvm] [lld] Fixes for unitests in standalone builds (PR #83670)   Alexandre Ganea via llvm-commits
• [llvm] [X86] Treat returns as SpecialFP values (PR #83615)   Simon Pilgrim via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Simon Pilgrim via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Alexandre Ganea via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] [Instrumentation] Support MachineFunction in ChangeReporter (PR #80946)   via llvm-commits
• [llvm] [Instrumentation] Support MachineFunction in ChangeReporter (PR #80946)   via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Yaxun Liu via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [clang] [llvm] [RISCV] RISCV vector calling convention (1/2) (PR #77560)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV] RISCV vector calling convention (1/2) (PR #77560)   Brandon Wu via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [clang] [llvm] [RISCV] RISCV vector calling convention (1/2) (PR #77560)   Brandon Wu via llvm-commits
• [compiler-rt] [compiler-rt] intercept macOs's freadlink call. (PR #83679)   David CARLIER via llvm-commits
• [clang] [llvm] [RISCV] RISCV vector calling convention (1/2) (PR #77560)   Brandon Wu via llvm-commits
• [compiler-rt] [compiler-rt] intercept macOs's freadlink call. (PR #83679)   via llvm-commits
• [compiler-rt] [compiler-rt] intercept macOs's freadlink call. (PR #83679)   via llvm-commits
• [compiler-rt] [compiler-rt] intercept macOs's freadlink call. (PR #83679)   David CARLIER via llvm-commits
• [llvm] [DiagnosticInfo] Set correct DiagnosticKind for DiagnosticInfoIgnoringInvalidDebugMetadata class (PR #83680)   Anton Lilja via llvm-commits
• [llvm] [DiagnosticInfo] Set correct DiagnosticKind for DiagnosticInfoIgnoringInvalidDebugMetadata class (PR #83680)   via llvm-commits
• [llvm] [DiagnosticInfo] Set correct DiagnosticKind for DiagnosticInfoIgnoringInvalidDebugMetadata class (PR #83680)   via llvm-commits
• [libcxx] [llvm] Add more debug output to the builders for a moment. (PR #83508)   via llvm-commits
• [libcxx] [llvm] Add more debug output to the builders for a moment. (PR #83508)   via llvm-commits
• [libcxx] [llvm] Add more debug output to the builders for a moment. (PR #83508)   via llvm-commits
• [llvm] [DAG] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   via llvm-commits
• [clang] [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   Simon Pilgrim via llvm-commits
• [lld] [llvm] [lld] Fixes for unitests in standalone builds (PR #83670)   Fangrui Song via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [ARM][AArch64] Reformat target parser. NFC (PR #82601)   David Green via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83685)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83685)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83685)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83685)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [llvm][arm] add T1 and T2 assembly optoins for vlldm and vlstm (PR #83685)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [KnownBits] Make nuw and nsw support in computeForAddSub optimal (PR #83382)   via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   via llvm-commits
• [llvm] d89b771 - [ARM] Add alias tests for ROPI/RWPI   Fangrui Song via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   via llvm-commits
• [lld] af83a2a - [lld] Fixes for unitests in standalone builds (#83670)   via llvm-commits
• [lld] [llvm] [lld] Fixes for unitests in standalone builds (PR #83670)   Michał Górny via llvm-commits
• [llvm] da591d3 - [GlobalISel][TableGen] Take first result for multi-output instructions (#81130)   Bjorn Pettersson via llvm-commits
• [llvm] [GlobalISel][TableGen] Take first result for multi-output instructions (PR #81130)   Björn Pettersson via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   via llvm-commits
• [llvm] [GlobalISel][TableGen] Take first result for multi-output instructions (PR #81130)   Björn Pettersson via llvm-commits
• [llvm] [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (PR #83098)   George Koehler via llvm-commits
• [compiler-rt] [compiler-rt] Adds builtins support for xros. (PR #83484)   Nico Weber via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [SCEV] Infer loop max trip count from memory accesses (PR #70361)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Use NewVL in splatPartsI64WithVL. (PR #83690)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use NewVL in splatPartsI64WithVL. (PR #83690)   via llvm-commits
• [llvm] [RISCV] Use NewVL in splatPartsI64WithVL. (PR #83690)   Michael Maitland via llvm-commits
• [llvm] [LLVM] add LZMA for compression/decompression (PR #83297)   Artem Belevich via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [clang] [llvm] [NFC] Use fold expressions to replace discarded initializer_lists (PR #83693)   via llvm-commits
• [clang] [llvm] [NFC] Use fold expressions to replace discarded initializer_lists (PR #83693)   via llvm-commits
• [clang] [llvm] [NFC] Use fold expressions to replace discarded initializer_lists (PR #83693)   via llvm-commits
• [llvm] [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (PR #83098)   George Koehler via llvm-commits
• [llvm] [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (PR #83098)   George Koehler via llvm-commits
• [clang] [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   via llvm-commits
• [clang] [llvm] [NFC] Use fold expressions to replace discarded initializer_lists (PR #83693)   via llvm-commits
• [clang] [llvm] [NFC] Use fold expressions to replace discarded initializer_lists (PR #83693)   via llvm-commits
• [llvm] workflows: Fixes for building the release binaries (PR #83694)   Tom Stellard via llvm-commits
• [llvm] workflows: Fixes for building the release binaries (PR #83694)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [clang] [llvm] [NFC] Use fold expressions to replace discarded initializer_lists (PR #83693)   via llvm-commits
• [clang] [llvm] [NFC] Use fold expressions to replace discarded initializer_lists (PR #83693)   via llvm-commits
• [llvm] f505a92 - [NFC] Use fold expressions to replace discarded initializer_lists (#83693)   via llvm-commits
• [clang] [llvm] [NFC] Use fold expressions to replace discarded initializer_lists (PR #83693)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [clang] [llvm] [NFC] Use fold expressions to replace discarded initializer_lists (PR #83693)   via llvm-commits
• [llvm] [Py Reformat] Exclude `third-party` from reformat (PR #83491)   Mircea Trofin via llvm-commits
• [llvm] Update Benchmark (PR #83488)   Mircea Trofin via llvm-commits
• [llvm] Update Benchmark (PR #83488)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   NAKAMURA Takumi via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   NAKAMURA Takumi via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   NAKAMURA Takumi via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   NAKAMURA Takumi via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [DiagnosticInfo] Set correct DiagnosticKind for DiagnosticInfoIgnoringInvalidDebugMetadata class (PR #83680)   Anton Lilja via llvm-commits
• [llvm] [LV] Use SmallVector::resize instead of push_back/emplace_back in a loop. NFC (PR #83696)   Craig Topper via llvm-commits
• [llvm] workflows: Fixes for building the release binaries (PR #83694)   Aiden Grossman via llvm-commits
• [llvm] 8b26e60 - [RISCV] Use the VR register allocation order for VM. (#83664)   via llvm-commits
• [llvm] [RISCV] Use the VR allocation order for VM. (PR #83664)   Craig Topper via llvm-commits
• [llvm] [LV] Use SmallVector::resize instead of push_back/emplace_back in a loop. NFC (PR #83696)   via llvm-commits
• [llvm] 4dd9c2e - [RISCV] Use NewVL in splatPartsI64WithVL. (#83690)   via llvm-commits
• [llvm] [RISCV] Use NewVL in splatPartsI64WithVL. (PR #83690)   Craig Topper via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - add INTRINSIC_WO_CHAIN handling for PSADBW intrinsics (PR #83580)   Craig Topper via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   Craig Topper via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   Craig Topper via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   Phoebe Wang via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Fangrui Song via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   Craig Topper via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   Craig Topper via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Fangrui Song via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Fangrui Song via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Fangrui Song via llvm-commits
• [llvm] [X86] Transform `(xor x, SIGN_BIT)` -> `(add x, SIGN_BIT)` 32 bit and smaller scalars (PR #83659)   Craig Topper via llvm-commits
• [llvm] [opt] Use static arrays instead of std::vector to store legacy pass names. NFC (PR #83634)   Fangrui Song via llvm-commits
• [llvm] 8fccf6b - [opt] Use static arrays instead of std::vector to store legacy pass names. NFC (#83634)   via llvm-commits
• [llvm] [opt] Use static arrays instead of std::vector to store legacy pass names. NFC (PR #83634)   Craig Topper via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   Phoebe Wang via llvm-commits
• [llvm] [LLVM][DOCS]fix link in doc - LLVM Alias Analysis Infrastructure (PR #81832)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Phoebe Wang via llvm-commits
• [compiler-rt] [compiler-rt] Avoid generating coredumps when piped to a tool (PR #83701)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Avoid generating coredumps when piped to a tool (PR #83701)   via llvm-commits
• [lldb] [llvm] [mlir] Split the llvm::ThreadPool into an abstract base class and an implementation (PR #82094)   Mehdi Amini via llvm-commits
• [lld] [lldb] [llvm] [mlir] Rename ThreadPool->DefaultThreadPool and ThreadPoolInterface->ThreadPool (NFC) (PR #83702)   Mehdi Amini via llvm-commits
• [lld] [lldb] [llvm] [mlir] Rename ThreadPool->DefaultThreadPool and ThreadPoolInterface->ThreadPool (NFC) (PR #83702)   via llvm-commits
• [llvm] [Support] Fix Process::PreventCoreFiles() when coredumps are piped (PR #83703)   Alexander Richardson via llvm-commits
• [llvm] [Support] Fix Process::PreventCoreFiles() when coredumps are piped (PR #83703)   via llvm-commits
• [llvm] 6b70c5d - [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (#83098)   via llvm-commits
• [llvm] [PowerPC] provide CFI for ELF32 to unwind cr2, cr3, cr4 (PR #83098)   Brad Smith via llvm-commits
• [llvm] Export `LLVM_VERSION_*` CMake variables to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] Export `LLVM_VERSION_MAJOR` CMake variable to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] Export `LLVM_VERSION_MAJOR` CMake variable to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] Export `LLVM_VERSION_MAJOR` CMake variable to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] Export `LLVM_VERSION_MAJOR` CMake variable to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] [PowerPC] Handle CALL_RM like CALL for 32-bit ELF (PR #72758)   Brad Smith via llvm-commits
• [llvm] Export `LLVM_VERSION_MAJOR` CMake variable to `PARENT_SCOPE` (PR #83346)   Benoit Jacob via llvm-commits
• [llvm] 6c6ea9d - Fix BUILD_SHARED_LIBS=ON build for platforms which require explicit link of -lpthread (NFC)   Mehdi Amini via llvm-commits
• [llvm] 1a4f52c - More fix BUILD_SHARED_LIBS=ON build for platforms which require explicit link of -lpthread (NFC)   Mehdi Amini via llvm-commits
• [llvm] e29cad6 - More fix BUILD_SHARED_LIBS=ON build for platforms which require explicit link of -lpthread (NFC)   Mehdi Amini via llvm-commits
• [llvm] [utils/not] Disable coredumps when --crash is passed (PR #83704)   Alexander Richardson via llvm-commits
• [compiler-rt] [compiler-rt] Only query llvm-config in the orc tests (PR #83705)   Alexander Richardson via llvm-commits
• [llvm] [utils/not] Disable coredumps when --crash is passed (PR #83704)   via llvm-commits
• [compiler-rt] [compiler-rt] Avoid generating coredumps when piped to a tool (PR #83701)   Alexander Richardson via llvm-commits
• [llvm] [utils/not] Disable coredumps when --crash is passed (PR #83704)   via llvm-commits
• [compiler-rt] 5f70f25 - [sanitizer_common] Remove unnecessary const_cast   Alex Richardson via llvm-commits
• [llvm] 67221ed - More fix BUILD_SHARED_LIBS=ON build for platforms which require explicit link of -lpthread (NFC)   Mehdi Amini via llvm-commits
• [clang] [lld] [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   Phoebe Wang via llvm-commits
• [clang] [lld] [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   Craig Topper via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   Shengchen Kan via llvm-commits
• [llvm] 37293e6 - [X86][CodeGen] Support long instruction fixup for APX NDD instructions (#83578)   via llvm-commits
• [llvm] [X86][CodeGen] Support long instruction fixup for APX NDD instructions (PR #83578)   Shengchen Kan via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   via llvm-commits
• [llvm] [Github] Make CI container build more reliable (PR #83707)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make CI container build more reliable (PR #83707)   via llvm-commits
• [llvm] [DAG] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   Phoebe Wang via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Shengchen Kan via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Yaxun Liu via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Shengchen Kan via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Shengchen Kan via llvm-commits
• [clang] [llvm] [RISCV] RISCV vector calling convention (1/2) (PR #77560)   Brandon Wu via llvm-commits
• [clang] [llvm] [AArch64][PAC] Support ptrauth builtins and -fptrauth-intrinsics. (PR #65996)   Anton Korobeynikov via llvm-commits
• [clang] [llvm] [CodeGen][arm64e] Add methods and data members to Address, which are needed to authenticate signed pointers (PR #67454)   Anton Korobeynikov via llvm-commits
• [llvm] [mlir] [Dwarf] Support `__ptrauth` qualifier in metadata nodes (PR #82363)   Anton Korobeynikov via llvm-commits
• [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)   Anton Korobeynikov via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Fangrui Song via llvm-commits
• [llvm] [SCEV] Improve applyLoopGuards to support Mul (PR #83428)   via llvm-commits
• [llvm] [DAG] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   Craig Topper via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #83667)   Fangrui Song via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #83667)   Fangrui Song via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] [ARM][AArch64] Reformat target parser. NFC (PR #82601)   David Green via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #83667)   Daniil Kovalev via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   Craig Topper via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   Craig Topper via llvm-commits
• [llvm] [Github] Make CI container build more reliable (PR #83707)   Tom Stellard via llvm-commits
• [llvm] [InstCombine] Optimize `sinh` and `cosh` divisions (PR #81433)   Felix Kellenbenz via llvm-commits
• [llvm] 800de14 - [ARM][AArch64] Reformat target parser. NFC (#82601)   via llvm-commits
• [llvm] [ARM][AArch64] Reformat target parser. NFC (PR #82601)   David Green via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #83667)   Fangrui Song via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] select (sext m), (add X, C), X --> (add X, (and C, (sext m)))) (PR #83640)   via llvm-commits
• [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (PR #83720)   Phoebe Wang via llvm-commits
• [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (PR #83720)   via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #83667)   Daniil Kovalev via llvm-commits
• [llvm] [FileCheck] Fix parsing empty global and pseudo variable names (PR #83667)   Daniil Kovalev via llvm-commits
• [llvm] [mlir][bazel] Remove defines of obsolete MLIR_GPU_TO_CUBIN_PASS_ENABLE. (PR #83006)   Jacques Pienaar via llvm-commits
• [llvm] [python] Bump Python minimum version to 3.8 (PR #78828)   Jannick Kremer via llvm-commits
• [libcxx] [llvm] [RFC][libc++] Reworks clang-tidy selection. (PR #81362)   Mark de Wever via llvm-commits
• [llvm] [SEH] Ignore EH pad check for internal intrinsics (PR #79694)   Phoebe Wang via llvm-commits
• [llvm] [SEH] Ignore EH pad check for internal intrinsics (PR #79694)   Phoebe Wang via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (PR #83720)   Phoebe Wang via llvm-commits
• [llvm] 5b4759f - Revert "[X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches"   NAKAMURA Takumi via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   NAKAMURA Takumi via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   NAKAMURA Takumi via llvm-commits
• [clang] [lld] [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] 03f150b - Removes arcanist and Phabricator information. (#82115)   via llvm-commits
• [llvm] Removes arcanist and Phabricator information. (PR #82115)   Mark de Wever via llvm-commits
• [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   via llvm-commits
• [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Kiran Chandramohan via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Kiran Chandramohan via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Kiran Chandramohan via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   via llvm-commits
• [llvm] [X86] Resolve FIXME: Copy kill flag for eflags (PR #82411)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   via llvm-commits
• [llvm] [CodeGen] Remove NumVisited limit in TwoAddressInstructionPass (PR #80627)   via llvm-commits
• [llvm] [CodeGen] Remove NumVisited limit in TwoAddressInstructionPass (PR #80627)   via llvm-commits
• [llvm] [CodeGen] Remove NumVisited limit in TwoAddressInstructionPass (PR #80627)   via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] 5f05839 - [ARM] Mark AESD and AESE instructions as commutative.   David Green via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Fix non-determanism in `shouldKeepJumpConditionsTogether` (PR #83687)   via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [CodeGen] Remove NumVisited limit in TwoAddressInstructionPass (PR #80627)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [Thumb1] Resolve FIXME: Use 'mov hi, $src; mov $dst, hi' (PR #81908)   via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   Yingwei Zheng via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [lld] [lldb] [llvm] [mlir] Rename ThreadPool->DefaultThreadPool and ThreadPoolInterface->ThreadPool (NFC) (PR #83702)   Jakub Kuderski via llvm-commits
• [llvm] [Transforms] Base default constructor of LoopVectorizeOptions off command line parameters (PR #83645)   via llvm-commits
• [llvm] [X86] X86LowerTileCopy - Find dead register to use to prevent save-reload (PR #83628)   via llvm-commits
• [llvm] [X86] Treat returns as SpecialFP values (PR #83615)   via llvm-commits
• [llvm] [CodeGen] Resolve FIXME: Find the same unit free in each cycle instead of one in each cycle (PR #82732)   via llvm-commits
• [llvm] [AArch64] Skip if then else diamonds (PR #82135)   via llvm-commits
• [llvm] [LTO] Set default Darwin CPU to apple-a7 for AArch64 (PR #81540)   via llvm-commits
• [llvm] [Support] Refactor getN1Bits so it does not work around any g++ bug (PR #78933)   via llvm-commits
• [llvm] [CodeGen] Resolve TODO: Add DriverKit to mapToPlatformType (PR #78799)   via llvm-commits
• [llvm] Optimize circular buffers (PR #75722)   via llvm-commits
• [llvm] [Transforms] Resolve FIXME: Pick the smallest legal type that fits (PR #79158)   via llvm-commits
• [lld] [lldb] [llvm] [mlir] Rename ThreadPool->DefaultThreadPool and ThreadPoolInterface->ThreadPool (NFC) (PR #83702)   Alexandre Ganea via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for liveliness (PR #83526)   via llvm-commits
• [llvm] [Thumb1] Resolve FIXME: Use 'mov hi, $src; mov $dst, hi' (PR #81908)   via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement only for max, not min (PR #81505)   via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement only for max, not min (PR #81505)   via llvm-commits
• [llvm] [AArch64] Skip if then else diamonds (PR #82135)   via llvm-commits
• [llvm] [ARM] Resolve FIXME: Transform "(and (shl x, c2), c1)" into "(shl (and x, c1>>c2), c2)" (PR #82120)   via llvm-commits
• [llvm] [CodeGen] Do not include undef registers in the set of used ops (PR #80367)   via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement only for max, not min (PR #81505)   via llvm-commits
• [llvm] [Transforms] Base default constructor of LoopVectorizeOptions from command line parameters (PR #83645)   via llvm-commits
• [llvm] [Transforms] Base default constructor of LoopVectorizeOptions on command line parameters (PR #83645)   via llvm-commits
• [llvm] [Transforms] Base default constructor of LoopVectorizeOptions on command line parameters (PR #83645)   via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement or max, but not min (PR #81505)   via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement or max, but not min (PR #81505)   via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for neighbors (PR #83526)   via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for neighbors (PR #83526)   via llvm-commits
• [llvm] [InstCombine] Simplify nested selects with implied condition (PR #83739)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Simplify nested selects with implied condition (PR #83739)   via llvm-commits
• [llvm] [Github] Make CI container build more reliable (PR #83707)   Aiden Grossman via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] [X86] Improve transform for add-like nodes to `add` (PR #83691)   via llvm-commits
• [llvm] 5105f15 - [gn build] Port 33de5a316caa   LLVM GN Syncbot via llvm-commits
• [llvm] [InstCombine] Simplify nested selects with implied condition (PR #83739)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   Nikita Popov via llvm-commits
• [compiler-rt] [compiler-rt] Allow running tests without installing first (PR #83088)   Alexander Richardson via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [llvm] [InstCombine] Remove m_OneUse requirement for max, but not min (PR #81505)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   NAKAMURA Takumi via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   NAKAMURA Takumi via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   NAKAMURA Takumi via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [ObjC] Increase depth limit to MayAutorelease to 16 (PR #83743)   via llvm-commits
• [llvm] [ObjC] Increase depth limit to MayAutorelease to 16 (PR #83743)   via llvm-commits
• [llvm] [ObjC] Increase depth limit to MayAutorelease to 16 (PR #83743)   via llvm-commits
• [llvm] 2435dcd - [VPlan] Add initial pattern match implementation for VPInstruction. (#80563)   via llvm-commits
• [llvm] [VPlan] Add initial pattern match implementation for VPInstruction. (PR #80563)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly handle scalar pointer inductions. (PR #83068)   Florian Hahn via llvm-commits
• [llvm] [ObjC] Increase depth limit to MayAutorelease to 16 (PR #83743)   via llvm-commits
• [llvm] [ObjC] Increase depth limit to MayAutorelease (PR #83743)   via llvm-commits
• [llvm] [ObjC] Increase depth limit to MayAutorelease (PR #83743)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Expand v1f64-typed sin, cos, pow, log, exp intrinsics (PR #83745)   Takuya Shimizu via llvm-commits
• [llvm] [AArch64][SelectionDAG] Expand v1f64-typed sin, cos, pow, log, exp intrinsics (PR #83745)   via llvm-commits
• [llvm] [AArch64][SelectionDAG] Expand v1f64-typed sin, cos, pow, log, exp intrinsics (PR #83745)   via llvm-commits
• [llvm] [X86] Don't always separate conditions in `(br (and/or cond0, cond1))` into separate branches (PR #81689)   via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] 3dd6750 - [AArch64] Add more complete support for BF16   David Majnemer via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (PR #83720)   Freddy Ye via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [llvm] 5f058aa - [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (#83656)   via llvm-commits
• [llvm] [LoongArch] Override LoongArchTargetLowering::getExtendForAtomicCmpSwapArg (PR #83656)   Lu Weining via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   Phoebe Wang via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   Phoebe Wang via llvm-commits
• [llvm] [X86] Use generic CPU tuning when tune-cpu is empty (PR #83631)   via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [clang] [llvm] [X86] Add Support for X86 TLSDESC Relocations (PR #83136)   Phoebe Wang via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Alexey Bataev via llvm-commits
• [llvm] 8d1046a - [PowerPC] adjust cost for extract i64 from vector on P9 and above (#82963)   via llvm-commits
• [llvm] [PowerPC] adjust cost for extract i64 from vector on P9 and above (PR #82963)   Chen Zheng via llvm-commits
• [llvm] 61c283d - [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (#83519)   via llvm-commits
• [llvm] [ScalarizeMaskedMemIntrin] Use pointer alignment from pointer of masked.compressstore/expandload. (PR #83519)   Yeting Kuo via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [Frontend] Add leaf constructs and association to OpenMP/ACC directives (PR #83625)   Krzysztof Parzyszek via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Phoebe Wang via llvm-commits
• [llvm] [Support][Casting] Add predicates for `isa*` functions (PR #83753)   Jakub Kuderski via llvm-commits
• [llvm] [Support][Casting] Add predicates for `isa*` functions (PR #83753)   via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Evgenii Kudriashov via llvm-commits
• [llvm] [Support][Casting] Add predicates for `isa*` functions (PR #83753)   Fangrui Song via llvm-commits
• [llvm] ff72c83 - [X86] Add missing subvector_subreg_lowering for BF16 (#83720)   via llvm-commits
• [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (PR #83720)   Phoebe Wang via llvm-commits
• [llvm] [BPF] lowering target address leaf nodes tconstpool (PR #73667)   Yingchi Long via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Shengchen Kan via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Shengchen Kan via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Shengchen Kan via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Shengchen Kan via llvm-commits
• [llvm] [AVR][NFC] Reformat target description files (PR #83755)   Ben Shi via llvm-commits
• [llvm] [PowerPC] Handle CALL_RM like CALL for 32-bit ELF (PR #72758)   Chen Zheng via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Shengchen Kan via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Shengchen Kan via llvm-commits
• [llvm] [VPlan] Add VPComputeVFxUFRecipe, use for type inference (PR #78309)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Add VPComputeVFxUFRecipe, use for type inference (PR #78309)   Shih-Po Hung via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Shengchen Kan via llvm-commits
• [llvm] [RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (PR #80697)   Shih-Po Hung via llvm-commits
• [llvm] [AVR][NFC] Reformat target description files (PR #83755)   Ben Shi via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [llvm] [AVR][NFC] Reformat target description files (PR #83755)   Ben Shi via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Phoebe Wang via llvm-commits
• [llvm] [nfc][InstrProfiling]Compute a boolean state as a constant and use it everywhere (PR #83756)   Mingming Liu via llvm-commits
• [llvm] [nfc][InstrProfiling]Compute a boolean state as a constant and use it everywhere (PR #83756)   via llvm-commits
• [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (PR #83720)   Phoebe Wang via llvm-commits
• [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (PR #83720)   Phoebe Wang via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Qiu Chaofan via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Shengchen Kan via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Shengchen Kan via llvm-commits
• [llvm] ccc48d4 - [X86][NFC] Replace X32 check prefixes with X86   Phoebe Wang via llvm-commits
• [llvm] [X86] Add missing subvector_subreg_lowering for BF16 (PR #83720)   via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Phoebe Wang via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Qiu Chaofan via llvm-commits
• [llvm] [X86] Resolve FIXME: Add FPCW as a rounding control register (PR #82452)   Shengchen Kan via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Phoebe Wang via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Hoist immediate addresses from loads/stores (PR #83644)   Wang Pengcheng via llvm-commits
• [llvm] [PowerPC] Handle CALL_RM like CALL for 32-bit ELF (PR #72758)   Brad Smith via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Shengchen Kan via llvm-commits
• [llvm] [LoongArch] Switch to the Machine Scheduler (PR #83759)   via llvm-commits
• [llvm] [LoongArch] Switch to the Machine Scheduler (PR #83759)   via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Phoebe Wang via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Qiu Chaofan via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Chen Zheng via llvm-commits
• [llvm] [AVR][NFC] Reformat target description files (PR #83755)   Lu Weining via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Shengchen Kan via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [clang] [llvm] [HIP] change compress level (PR #83605)   Yaxun Liu via llvm-commits
• [clang] [llvm] [HIP] add --offload-compression-level= option (PR #83605)   Yaxun Liu via llvm-commits
• [clang] [llvm] [HIP] add --offload-compression-level= option (PR #83605)   Yaxun Liu via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Yeting Kuo via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   via llvm-commits
• [compiler-rt] b0c158b - [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (#80056)   via llvm-commits
• [compiler-rt] [llvm] [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (PR #80056)   Shilei Tian via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Shilei Tian via llvm-commits
• [llvm] [PowerPC][NFC] Update aix-tls-xcoff-reloc.ll (PR #83764)   Felix via llvm-commits
• [llvm] [PowerPC][NFC] Update aix-tls-xcoff-reloc.ll (PR #83764)   via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [AMDGPU][PromoteAlloca] Correctly handle a variable vector index (PR #83597)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][PromoteAlloca] Correctly handle a variable vector index (PR #83597)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Split smrd prefetch isel (PR #83627)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Split smrd prefetch isel (PR #83627)   Matt Arsenault via llvm-commits
• [llvm] 2c5d01c - Revert "[SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (#80056)"   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Simplify nested selects with implied condition (PR #83739)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fix fail to fold (A >> C1) Pred C2 if shr is used multple times #83430 (PR #83563)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Simplify nested selects with implied condition (PR #83739)   Yingwei Zheng via llvm-commits
• [llvm] [PowerPC][NFC] Update aix-tls-xcoff-reloc.ll (PR #83764)   Chen Zheng via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Craig Topper via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Craig Topper via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Yeting Kuo via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Yeting Kuo via llvm-commits
• [clang] [llvm] [llvm][vfs] Allow root directory remap (PR #83766)   via llvm-commits
• [clang] [llvm] [llvm][vfs] Allow root directory remap (PR #83766)   via llvm-commits
• [clang] [llvm] [llvm][vfs] Allow root directory remap. Fix assertion failure. (PR #83766)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Matt Arsenault via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Matt Arsenault via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   Matt Arsenault via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [llvm] [RISCV] Hoist immediate addresses from loads/stores (PR #83644)   Visoiu Mistrih Francis via llvm-commits
• [llvm] [RISCV] Hoist immediate addresses from loads/stores (PR #83644)   Visoiu Mistrih Francis via llvm-commits
• [llvm] [llvm-debuginfo-analyzer] Add support for WebAssembly binary format. (PR #82588)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [llvm][vfs] Allow root directory remap. Fix assertion failure. (PR #83766)   via llvm-commits
• [compiler-rt] 8300f30 - [SelectionDAG] Add `STRICT_BF16_TO_FP` and `STRICT_FP_TO_BF16` (#80056)   Shilei Tian via llvm-commits
• [llvm] [IndVarSimplify]Add pre-commit tests for PR74318. NFC. (PR #83770)   Liao Chunyu via llvm-commits
• [llvm] [IndVarSimplify]Add pre-commit tests for PR74318. NFC. (PR #83770)   via llvm-commits
• [llvm] [InstCombine] limit icmp sgt (shl nsw X, C1), C0 --> icmp sgt X, C0 >> C1 to hasOneUse (PR #74318)   Liao Chunyu via llvm-commits
• [llvm] [BOLT] support AArch64 JUMP26 createRelocation (PR #83531)   via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Shilei Tian via llvm-commits
• [llvm] [Mips] Fix missing sign extension in expansion of sub-word atomic max (PR #77072)   via llvm-commits
• [llvm] 23bc5b6 - [AArch64] Mark bf16 as custom for truncating stores & add a comment   David Majnemer via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [DWARF5][COFF] Fix wrong relocation in .debug_line (PR #83773)   via llvm-commits
• [llvm] [RISCV] Hoist immediate addresses from loads/stores (PR #83644)   Wang Pengcheng via llvm-commits
• [llvm] 43222bd - [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (#82678)   via llvm-commits
• [llvm] [SPIR-V] Do not use OpenCL metadata for ptr element type resolution (PR #82678)   Michal Paszkowski via llvm-commits
• [llvm] [DWARF5][COFF] Fix wrong relocation in .debug_line (PR #83773)   via llvm-commits
• [llvm] [DWARF5][COFF] Fix wrong relocation in .debug_line (PR #83773)   via llvm-commits
• [llvm] Add support for x87 registers on GISel register selection (PR #83528)   via llvm-commits
• [llvm] [BOLT] support AArch64 JUMP26 createRelocation (PR #83531)   via llvm-commits
• [llvm] [BOLT] support AArch64 JUMP26 createRelocation (PR #83531)   Vladislav Khmelevsky via llvm-commits
• [llvm] [SPIR-V] Fix bitcast legalization/instruction selection in SPIR-V Backend (PR #83139)   Michal Paszkowski via llvm-commits
• [llvm] [SPIR-V] Add support for the SPIR-V extension SPV_INTEL_bfloat16_conversion (PR #83443)   Michal Paszkowski via llvm-commits
• [clang] [llvm] [PowerPC] Add intrinsics for rldimi/rlwimi/rlwnm (PR #82968)   Qiu Chaofan via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Fangrui Song via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Fangrui Song via llvm-commits
• [llvm] 3a146d5 - AMDGPU: Partially re-add scheduling test for gfx940   Matt Arsenault via llvm-commits
• [llvm] [X86][MC] Report error when the instruction length exceeds 15 bytes (PR #83708)   Fangrui Song via llvm-commits
• [llvm] [CodeGen] Remove NumVisited limit in TwoAddressInstructionPass (PR #80627)   Eli Friedman via llvm-commits
• [llvm] [BOLT] support AArch64 JUMP26 createRelocation (PR #83531)   via llvm-commits
• [llvm] [BOLT] support AArch64 JUMP26 createRelocation (PR #83531)   via llvm-commits
• [llvm] [BOLT] support AArch64 JUMP26 createRelocation (PR #83531)   Vladislav Khmelevsky via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Craig Topper via llvm-commits
• [compiler-rt] [scudo] limit VMA size for riscv64 for DefaultConfig (PR #76013)   Icenowy Zheng via llvm-commits
• [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)   Shengchen Kan via llvm-commits
• [llvm] [AMDGPU] Replace `isInlinableLiteral16` with specific version (PR #81345)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Yeting Kuo via llvm-commits
• [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)   Shengchen Kan via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)   Pierre van Houtryve via llvm-commits
• [llvm] [X86] Support APX CMOV/CFCMOV instructions (PR #82592)   Shengchen Kan via llvm-commits
• [llvm] 63725ab - [RISCV] Add test for aliasing miscompile fixed by #83017. NFC   Luke Lau via llvm-commits
• [llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)   Luke Lau via llvm-commits
• [llvm] [RISCV] Prefer whole register loads and stores when VL=VLMAX (PR #75531)   Luke Lau via llvm-commits
• [clang] [llvm] [llvm][vfs] Allow root directory remap. Fix assertion failure. (PR #83766)   via llvm-commits
• [llvm] [SelectionDAG] Change computeAliasing signature from optional<uint64> to LocationSize. (PR #83017)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for neighbors (PR #83526)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for neighbors (PR #83526)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for neighbors (PR #83526)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Check entire block if no threshold was given for neighbors (PR #83526)   Matt Arsenault via llvm-commits
• [llvm] Expose TimeTraceProfiler for multiple traces (PR #83778)   Takuto Ikuta via llvm-commits
• [llvm] Expose TimeTraceProfiler for multiple traces (PR #83778)   via llvm-commits
• [clang] [llvm] [llvm][vfs] Allow root directory remap. Fix assertion failure. (PR #83766)   via llvm-commits
• [compiler-rt] [compiler-rt] Fix incorrect usages of check_cxx_compiler_flag (PR #83779)   Alexander Richardson via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Yeting Kuo via llvm-commits
• [llvm] c7fdd8c - Restore "Implement convergence control in MIR using SelectionDAG (#71785)"   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [DAG] Teach SelectionDAGBuilder to read parameter alignment of compressstore/expandload. (PR #83763)   Yeting Kuo via llvm-commits