[llvm] [llvm][arm] add T1 and T2 assembly options for vlldm and vlstm (PR #83116)

Jonathan Thackray via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 27 02:34:48 PST 2024


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@@ -7030,3 +7033,26 @@ static DecodeStatus DecodeT2AddSubSPImm(MCInst &Inst, unsigned Insn,
 
   return DS;
 }
+
+static DecodeStatus DecodeLazyLoadStoreMul(MCInst &Inst, unsigned Insn,
+                                           uint64_t Address,
+                                           const MCDisassembler *Decoder) {
+  DecodeStatus S = MCDisassembler::Success;
+
+  const unsigned Rn = fieldFromInstruction(Insn, 16, 4);
+  // Adding Rn, holding memory location to save/load to/from, the only argument
+  // that being encoded.
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jthackray wrote:

Nit: improve "that being encoded" - sounds like you've missed a word here.

https://github.com/llvm/llvm-project/pull/83116


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