[llvm] [AArch64] Remove copy in SVE/SME predicate spill and fill (PR #81716)

[Sander de Smalen via llvm-commits]

================
@@ -996,6 +996,16 @@ let Namespace = "AArch64" in {
   def psub1 : SubRegIndex<16, -1>;
 }
 
+class PPRorPNRClass : RegisterClass<
+                                  "AArch64",
+                                  [ nxv16i1, nxv8i1, nxv4i1, nxv2i1, nxv1i1 ], 16,
----------------
sdesmalen-arm wrote:

```suggestion
                                  [ nxv16i1, nxv8i1, nxv4i1, nxv2i1, nxv1i1, aarch64svcount ], 16,
```

https://github.com/llvm/llvm-project/pull/81716