The Week Of Monday 18 March 2024 Archives by thread
Starting: Mon Mar 18 00:00:44 PDT 2024
Ending: Sun Mar 24 23:45:41 PDT 2024
Messages: 5254
- [llvm] [InstCombine] Fold more 'fcmp' 'select' instrs idioms into 'fabs' (PR #83381)
Yashwant Singh via llvm-commits
- [llvm] Convert copy to r-value reference. (PR #85606)
Malay Sanghi via llvm-commits
- [llvm] [GISEL] Add G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR (PR #84538)
via llvm-commits
- [llvm] [MIPS] Fix the opcode of max.fmt and mina.fmt and make them matchable by ISel (PR #85609)
Cinhi Young via llvm-commits
- [llvm] b1e10d7 - [gn build] Port 580f60484e19
LLVM GN Syncbot via llvm-commits
- [lld] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)
Fangrui Song via llvm-commits
- [llvm] [AArch64][GlobalISel] Add custom legalization for v4s8 = G_TRUNC v4s16 (PR #85610)
Amara Emerson via llvm-commits
- [llvm] [RISCV][CostModel] Estimate cost of llvm.vector.reduce.fmaximum/fminimum (PR #80697)
Luke Lau via llvm-commits
- [llvm] [InstCombine] Try to fold add into GEP x, C (PR #85090)
David Green via llvm-commits
- [llvm] [AMDGPU] Add support for preloading hidden groupsize args (PR #83817)
Austin Kerbow via llvm-commits
- [llvm] [AMDGPU] Add support for preloading implicit kernel arguments (PR #83817)
Austin Kerbow via llvm-commits
- [llvm] [PowerPC][NFC] Add base test case for small-local-dynamic-tls on AIX (PR #84711)
Chen Zheng via llvm-commits
- [llvm] Expose TimeTraceProfiler for Async Events (PR #83778)
Fangrui Song via llvm-commits
- [llvm] [indvars] Missing variables at Og: (PR #69920)
Carlos Alberto Enciso via llvm-commits
- [llvm] 9b98692 - [AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (#75333)
via llvm-commits
- [llvm] [AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (PR #75333)
Pierre van Houtryve via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
Lu Weining via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
Fangrui Song via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
Vitaly Buka via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
via llvm-commits
- [compiler-rt] [tsan] Refine fstat{, 64} interceptors on GLIBC (PR #85612)
Lu Weining via llvm-commits
- [llvm] [WIP] Extend data layout to add sentinel pointer value for address space. (PR #83109)
Pierre van Houtryve via llvm-commits
- [llvm] [RISCV] Handle scalable ops with < EEW / 2 narrow types in combineBinOp_VLToVWBinOp_VL (PR #84158)
Luke Lau via llvm-commits
- [llvm] [mlir] [mlir] Move InlinerInterface from Transforms to Interfaces. (PR #84878)
Christian Sigg via llvm-commits
- [llvm] [AMDGPU] Support double type in atomic optimizer. (PR #84307)
Jay Foad via llvm-commits
- [llvm] [mlir][bazel] Partial fix for 513cdb82223a106f183b49a40d9acb1f7efbbe7e. (PR #85604)
Adrian Kuegel via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
Jay Foad via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
Jay Foad via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
Jay Foad via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
David Green via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
David Green via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
David Green via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
Jay Foad via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
Craig Topper via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [SelectionDAG] Fold (avg x, 0) -> x >> 1 (PR #85581)
via llvm-commits
- [llvm] [DAGCombiner] Simplifying `{si|ui}tofp` when only signbit is needed (PR #85445)
Jay Foad via llvm-commits
- [clang] [llvm] [AArch64] Add soft-float ABI (PR #84146)
via llvm-commits
- [llvm] [RISCV][TTI] Cost a subvector insert at a register boundary with exact vlen (PR #85240)
Luke Lau via llvm-commits
- [llvm] [LoopUnroll] Add CSE to remove redundant loads after unrolling. (PR #83860)
Florian Hahn via llvm-commits
- [llvm] [MachineLICM] Give opportunity to analyze physregs for invariance. (PR #84779)
Sander de Smalen via llvm-commits
- [clang] [compiler-rt] [clang][UBSan] Add implicit conversion check for bitfields (PR #75481)
Axel Lundberg via llvm-commits
- [llvm] c07c1c4 - [VPlan] Remove redundant cast (NFCI).
Florian Hahn via llvm-commits
- [llvm] [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (PR #81572)
Chen Zheng via llvm-commits
- [llvm] 3128c20 - [TableGen] Bug fix for tied optional operands resolution (#83588)
via llvm-commits
- [llvm] [TableGen] Bug fix for tied optional operands resolution (PR #83588)
Alfie Richards via llvm-commits
- [clang] [llvm] Use timeTraceAsyncProfilerBegin for Source span (PR #83961)
Takuto Ikuta via llvm-commits
- [llvm] 6854f6f - [TableGen] Add `PreferSmallerInstructions` for Targets. (#83587)
via llvm-commits
- [llvm] [TableGen] Add `PreferSmallerInstructions` for Targets. (PR #83587)
Alfie Richards via llvm-commits
- [llvm] [C API] Add accessors for function prefix and prologue data (PR #82193)
Nikita Popov via llvm-commits
- [lld] [ELF] Fix unnecessary inclusion of unreferenced provide symbols (PR #84512)
via llvm-commits
- [llvm] [mlir] [MLIR] Add initial convert-memref-to-emitc pass (PR #85389)
Marius Brehler via llvm-commits
- [llvm] [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (PR #83436)
Alfie Richards via llvm-commits
- [llvm] Upstreaming warning suppression to LLVM (PR #83590)
via llvm-commits
- [lld] [llvm] [lld-macho] Implement ObjC category merging (-objc_category_merging) (PR #82928)
Vincent Lee via llvm-commits
- [llvm] [mlir][bazel] Fix for 513cdb82223a106f183b49a40d9acb1f7efbbe7e. (PR #85617)
Christian Sigg via llvm-commits
- [clang] [llvm] Adapted MemRegion::getDescriptiveName to handle ElementRegions (PR #85104)
via llvm-commits
- [llvm] [Doc] Add a section on CI to the GitHub documentation (PR #85376)
Renato Golin via llvm-commits
- [llvm] [RISCV] Implement Intrinsics and CodeGen Support for XCValu Extension… (PR #78138)
via llvm-commits
- [llvm] 7fad304 - [AArch64][SME] Make coalescer barrier available without +sme. (#85311)
via llvm-commits
- [llvm] [AArch64][SME] Make coalescer barrier available without +sme. (PR #85311)
Sander de Smalen via llvm-commits
- [llvm] [RemoveDIs] Use getFirstNonnPHIIt to fix crash #85472 (PR #85618)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [AArch64] Add AArch64PassRegistry.def (PR #85215)
via llvm-commits
- [llvm] [RemoveDIs] Update DIBuilder C API with DbgRecord functions [1/2] (PR #84915)
Stephen Tozer via llvm-commits
- [llvm] [Object][Archive][NFC] Create all symbolic files objects before calculating offsets. (PR #85229)
James Henderson via llvm-commits
- [llvm] [IR] Add nowrap flags for trunc instruction (PR #85592)
Matt Arsenault via llvm-commits
- [llvm] [AArch64][SME] Create new pass to remove COALESCER_BARRIER early. (PR #85386)
Sander de Smalen via llvm-commits
- [llvm] 3ab1481 - [RemoveDIs] Use getFirstNonPHIIt to fix crash #85472 (#85618)
via llvm-commits
- [lld] [llvm] [lld][AArch64][ELF][PAC] Support AUTH relocations and AUTH ELF marking (PR #72714)
Daniil Kovalev via llvm-commits
- [libc] [llvm] [libc][math] Improve atanf performance. (PR #85463)
via llvm-commits
- [llvm] 3493438 - Revert "[AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (#75333)"
via llvm-commits
- [lld] [llvm] [Symbolizer] Support for Missing Line Numbers. (PR #82240)
via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize small G_TRUNC (PR #85625)
David Green via llvm-commits
- [llvm] [AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (PR #85626)
Pierre van Houtryve via llvm-commits
- [llvm] 38a44bd - [CodeGenPrepare] Reverse the canonicalization of isInf/isNanOrInf (#81572)
via llvm-commits
- [llvm] [InstCombine] Fold copysign of selects from sign comparison to sign operand (PR #85627)
Krishna Narayanan via llvm-commits
- [llvm] 59f34e8 - [SPIRV] Add Lifetime intrinsics/instructions (#85391)
via llvm-commits
- [llvm] [SPIRV] Add Lifetime intrinsics/instructions (PR #85391)
Vyacheslav Levytskyy via llvm-commits
- [clang] [llvm] [AMDGPU] Enable OpenCL hostcall printf (WIP) (PR #72556)
Vikram Hegde via llvm-commits
- [llvm] [SPIR-V] Support extension toggling and enabling all (PR #85503)
Vyacheslav Levytskyy via llvm-commits
- [llvm] [NFC][LLVM][CodeGen] Refactor SVE unpredicated binop isel patterns. (PR #84045)
Paul Walker via llvm-commits
- [llvm] [MacroFusion] Add SingleFusion that accepts a single instruction pair (PR #85630)
Wang Pengcheng via llvm-commits
- [llvm] [TableGen] fix tlbgen for EncodingByHwMode (PR #84906)
via llvm-commits
- [llvm] [llvm-ar][Object][COFF] Add support for EC symbols to llvm-ar. (PR #85230)
Jacek Caban via llvm-commits
- [llvm] 295cdd5 - [ARM][TableGen][MC] Change the ARM mnemonic operands to be optional for ASM parsing (#83436)
via llvm-commits
- [llvm] [InstCombine] Add contributor guide (PR #79007)
Nikita Popov via llvm-commits
- [llvm] a60deaa - [ConstantHoisting] Don't attempt to hoist ConstantInt vectors. (#85416)
via llvm-commits
- [llvm] [ConstantHoisting] Don't attempt to hoist ConstantInt vectors. (PR #85416)
Paul Walker via llvm-commits
- [llvm] f0dbcfe - [RemoveDIs] Update DIBuilder C API with DbgRecord functions [1/2] (#84915)
via llvm-commits
- [llvm] c18fc4f - Remove unused include. NFC
Benjamin Kramer via llvm-commits
- [llvm] 6825081 - [NFC][LLVM][SVE][ISel] Remove redundant type information from Pat targets. (#85409)
via llvm-commits
- [llvm] [NFC][LLVM][SVE][ISel] Remove redundant type information from Pat targets. (PR #85409)
Paul Walker via llvm-commits
- [llvm] 6598f63 - Remove another layering violation by unused include. NFC
Benjamin Kramer via llvm-commits
- [llvm] [MacroFusion][RISCV] Allocate same register for second instruction of fusible pair (PR #77461)
Wang Pengcheng via llvm-commits
- [llvm] a9f78a3 - Fix Werror buildbots after #84915
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [InstCombine] Fold its select user into select (PR #83405)
Matt Arsenault via llvm-commits
- [llvm] [RemoveDIs][AsmWriter] Add empty-metadata operands to the SlotTracker (PR #85636)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [PassManager] Support MachineFunctionProperties (PR #83668)
Matt Arsenault via llvm-commits
- [llvm] [ObjCARC] Allow removal of autoreleasepools (PR #85493)
Florian Hahn via llvm-commits
- [llvm] [Coroutines] Drop dead instructions more aggressively in addMustTailToCoroResumes() (PR #85271)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Alexey Bataev via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Florian Hahn via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Alexey Bataev via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Alexey Bataev via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
Alexey Bataev via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-folding mode using EVL. (PR #76172)
via llvm-commits
- [llvm] [PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (PR #80784)
Amy Kwan via llvm-commits
- [llvm] [InstCombine] Fold `fpto{s|u}i non-norm` to zero (PR #85569)
Matt Arsenault via llvm-commits
- [llvm] [SelectionDAG] Add MaskedValueIsZero check to allow folding of zero extended variables we know are safe to extend (PR #85573)
Matt Arsenault via llvm-commits
- [llvm] [SelectionDAG] Calculate KnownBits for SMIN (PR #85584)
Jay Foad via llvm-commits
- [llvm] bc70f60 - [SelectionDAG] Add m_Neg and m_Not pattern matcher and update DAGCombiner (#85365)
via llvm-commits
- [llvm] [SelectionDAG] Add m_Neg and m_Not pattern matcher and update DAGCombiner (PR #85365)
Matt Arsenault via llvm-commits
- [llvm] [GlobalISel] Handle div-by-pow2 (PR #83155)
Shilei Tian via llvm-commits
- [llvm] [SLP]Improve minbitwidth analysis. (PR #84536)
Martin Storsjö via llvm-commits
- [llvm] [InstSimplify] Simplify `(fmul -x, +/-0)` -> `-/+0` (PR #85345)
Matt Arsenault via llvm-commits
- [compiler-rt] [ASan][Windows] Synchronizing ASAN init on Windows (PR #71833)
Zack Johnson via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Thorsten Schütt via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Thorsten Schütt via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Craig Topper via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Matt Arsenault via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Michael Maitland via llvm-commits
- [llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)
Matt Arsenault via llvm-commits
- [llvm] [CodeExtractor] Terminate callsite blocks to new `noreturn` functions with `unreachable` (PR #84682)
Matt Arsenault via llvm-commits
- [compiler-rt] Fixing UB on Windows for trampoline allocations (PR #85639)
Zack Johnson via llvm-commits
- [llvm] [AArch64][GlobalISel] Take abs scalar codegen closer to SDAG (PR #84886)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Remove unneeded addr mode predicates on FLAT Real instructions (PR #85641)
Jay Foad via llvm-commits
- [llvm] [CodeGen] Update for scalable MemoryType in MMO (PR #70452)
Matt Arsenault via llvm-commits
- [llvm] a8bda0b - [C API] Add accessors for function prefix and prologue data (#82193)
via llvm-commits
- [llvm] [ValueTracking] Use `ConstantRange::toKnownBits` when computing from Range Metadata; NFC (PR #85574)
Nikita Popov via llvm-commits
- [llvm] 276847a - [LangRef][IR] Add 3-way compare intrinsics llvm.scmp/llvm.ucmp (#83227)
via llvm-commits
- [llvm] [LangRef][IR] Add 3-way compare intrinsics llvm.scmp/llvm.ucmp (PR #83227)
Nikita Popov via llvm-commits
- [llvm] [LICM] Drop nsw/nuw flags on affected instructions in hoistMulAddAssociation. (PR #85486)
Nikita Popov via llvm-commits
- [llvm] [LICM] Drop NSW/NUW flags on reassociated integer Mul instructions (PR #85645)
Danila Malyutin via llvm-commits
- [llvm] [ValueTracking] Handle `not` in `isImpliedCondition` (PR #85397)
Nikita Popov via llvm-commits
- [llvm] fd93a5e - [VPlan] Support match unary and binary recipes in pattern matcher (NFC).
Florian Hahn via llvm-commits
- [llvm] cb84f13 - [AMDGPU] Remove unneeded addr mode predicates on FLAT Real instructions (#85641)
via llvm-commits
- [llvm] e5b20c8 - [PowerPC] Update chain uses when emitting lxsizx (#84892)
via llvm-commits
- [llvm] [PowerPC] Update chain uses when emitting lxsizx (PR #84892)
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- [llvm] [GlobalISel] Add Knownbits for G_LOAD/ZEXTLOAD/SEXTLOAD with range metadata (PR #86431)
David Green via llvm-commits
- [llvm] e8d5223 - [AArch64] Additional GISel test coverage. NFC
David Green via llvm-commits
- [llvm] [DAG] Added m_AnyBinOp and m_c_AnyBinOp in SDPatternMatch.h (PR #86435)
Shourya Goel via llvm-commits
- [llvm] [GlobalISel] Add CTLZ known bits. (PR #86436)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalize Insert vector element (PR #81453)
David Green via llvm-commits
- [llvm] [AArch64][GlobalISel] Legalization for small anyext/sext/zext (PR #86438)
David Green via llvm-commits
- [llvm] b3fe27f - [InstCombine] Copy flags of extractelement for extelt -> icmp combine (#86366)
via llvm-commits
- [llvm] [IR][NFC] Cleanup CmpInst signatures / code docs (PR #86441)
Marc Auberer via llvm-commits
- [llvm] 9632e15 - Match fixed width ISD::AVGFLOORS + ISD::AVGCEILS patterns (#86222)
via llvm-commits
- [llvm] [MC] Make `MCParsedAsmOperand::getReg()` return `MCRegister` (PR #86444)
Sergei Barannikov via llvm-commits
- [lld] 4804805 - [lld/ELF][X86] Respect outSecOff when checking if GOTPCREL can be relaxed (#86334)
via llvm-commits
- [llvm] [llvm] Add KnownBits implementations for avgFloor and avgCeil (PR #86445)
Nhat Nguyen via llvm-commits
- [llvm] 488a187 - [JITLink][ELF] Improve ELF section start/end symbol handling.
Lang Hames via llvm-commits
- [llvm] [SelectionDAG] Add more cases for UDIV and SDIV (PR #86452)
via llvm-commits
- [llvm] [SelectionDAG] Use computeForAddSub to prove that ISD::ADD is not 0 (PR #86453)
via llvm-commits
- [llvm] [RISCV] ReadStoreData is read later in the pipeline for SiFive7 (PR #86454)
Michael Maitland via llvm-commits
- [llvm] f0a8738 - [VPlan] Generate CalculateTripCountMinusVF for Part 0 only. (NFCI).
Florian Hahn via llvm-commits
- [lld] [lld-macho][NFC] Refactor ObjCSelRefsSection => ObjCSelRefsHelper (PR #86456)
via llvm-commits
- [lld] 18a49f0 - [ELF] Merge relaIplt into relaDyn
Fangrui Song via llvm-commits
- [llvm] [SPIR-V] Extend SPIRVUsage.rst document (PR #84744)
Arvind Sudarsanam via llvm-commits
- [llvm] 67f2267 - [M68k][NFC] Suppress warning on an unused variable when assertion is disabled
Min Hsu via llvm-commits
- [llvm] [mlir] [mlir][bufferization][WIP] Use `BufferOriginAnalysis` to fold away `dealloc` runtime checks (PR #79602)
Matthias Springer via llvm-commits
- [llvm] 2e4e04c - [X86][BF16] Do not lower to VCVTNEPS2BF16 without AVX512VL (#86395)
via llvm-commits
- [llvm] 5e5b656 - [MC] Make `MCParsedAsmOperand::getReg()` return `MCRegister` (#86444)
via llvm-commits
- [llvm] Remove dead flags from virtual registers, but only when not compiling for MIPS (PR #86462)
via llvm-commits
- [clang] [llvm] [RISCV] Add generic CPUs for profiles (PR #84877)
Wang Pengcheng via llvm-commits
- [llvm] 6af6416 - [RISCV] Add a tune feature to disable stripping W suffix (#86255)
via llvm-commits
- [llvm] [CodeExtractor] Resolving the Inconsistency of Compiled Binary Files (PR #86464)
dong jianqiang via llvm-commits
- [clang] [llvm] [RISCV][NFC] Pass LMUL to copyPhysRegVector (PR #84448)
Wang Pengcheng via llvm-commits
- [llvm] d9746a6 - [RISCV][NFC] Pass LMUL to copyPhysRegVector
via llvm-commits
- [llvm] 373e77b - [RISCV] Generalize (sub zext, zext) -> (sext (sub zext, zext)) to add (#86248)
via llvm-commits
- [llvm] [RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (PR #86465)
Luke Lau via llvm-commits
- [llvm] [RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (PR #86465)
Luke Lau via llvm-commits
- [llvm] [RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (PR #86465)
via llvm-commits
- [llvm] [RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (PR #86465)
via llvm-commits
- [llvm] [RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (PR #86465)
via llvm-commits
- [llvm] [RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (PR #86465)
Wang Pengcheng via llvm-commits
- [llvm] [RISCV] Combine (mul (zext, zext)) -> (zext (mul (zext, zext))) (PR #86465)
via llvm-commits
Last message date:
Sun Mar 24 23:45:41 PDT 2024
Archived on: Sun Mar 24 23:46:59 PDT 2024
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