[llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)

[Matt Arsenault via llvm-commits]

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@@ -88,6 +88,9 @@ struct AMDGPUOutgoingValueHandler : public CallLowering::OutgoingValueHandler {
                                         {MRI.getType(ExtReg)})
                         .addReg(ExtReg);
       ExtReg = ToSGPR.getReg(0);
+      if (VA.getLocVT() == MVT::i1 &&
+          MIRBuilder.getMF().getSubtarget<GCNSubtarget>().isWave64())
+        ExtReg = MIRBuilder.buildAnyExt(LLT::scalar(64), ExtReg).getReg(0);
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arsenm wrote:

The i1 value should have been directly assigned to the register, there shouldn't be an additional, incorrect G_ANYEXT 

https://github.com/llvm/llvm-project/pull/72461