[llvm] [AMDGPU] Handle non-register operands for S_SUB/ADD_U64_PSEUDO (PR #86104)

[Matt Arsenault via llvm-commits]

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@@ -4857,9 +4857,11 @@ MachineBasicBlock *SITargetLowering::EmitInstrWithCustomInserter(
     bool IsAdd = (MI.getOpcode() == AMDGPU::S_ADD_U64_PSEUDO);
     if (Subtarget->hasScalarAddSub64()) {
       unsigned Opc = IsAdd ? AMDGPU::S_ADD_U64 : AMDGPU::S_SUB_U64;
+      // clang-format off
       BuildMI(*BB, MI, DL, TII->get(Opc), Dest.getReg())
-          .addReg(Src0.getReg())
-          .addReg(Src1.getReg());
+        .add(Src0)
+        .add(Src1);
+      // clang-format on
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arsenm wrote:

Drop the comments and ignore the error. I really wish clang-format would just ignore anything involving BuildMI 

https://github.com/llvm/llvm-project/pull/86104