[llvm] [RISCV][GISEL] Legalization, register bank selection, and instruction selection for scalable G_SELECT (PR #85540)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 18 16:24:10 PDT 2024


topperc wrote:

> and an ISD::VSELECT when the condition is scalar.

That seems wrong. An ISD::VSELECT has vector condition not scalar condition.

https://github.com/llvm/llvm-project/pull/85540


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