The Week Of Monday 23 February 2026 Archives by author

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Starting: Mon Feb 23 00:05:24 PST 2026
Ending: Sat Feb 28 20:14:03 PST 2026
Messages: 5780

• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Aadarsh Keshri via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   Aadarsh Keshri via llvm-commits
• [llvm] Re-enable MSVC C4141 diagnostic; NFC (PR #182586)   Aaron Ballman via llvm-commits
• [llvm] [NFC][IR] Fix MSVC C4706 diagnostic w/ 741b2cda32e1 (PR #182682)   Aaron Ballman via llvm-commits
• [llvm] Re-enable MSVC C4722 diagnostic; NFC (PR #182845)   Aaron Ballman via llvm-commits
• [llvm] Re-enable MSVC C4141 diagnostic; NFC (PR #182586)   Aaron Ballman via llvm-commits
• [llvm] Re-enable MSVC C4722 diagnostic; NFC (PR #182845)   Aaron Ballman via llvm-commits
• [llvm] Re-enable MSVC C4291 diagnostic; NFC (PR #182868)   Aaron Ballman via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Aaron Ballman via llvm-commits
• [llvm] Re-enable MSVC C4510 diagnostic; NFC (PR #182872)   Aaron Ballman via llvm-commits
• [llvm] Re-enable MSVC C4510 diagnostic; NFC (PR #182872)   Aaron Ballman via llvm-commits
• [llvm] Re-enable MSVC C4291 diagnostic; NFC (PR #182868)   Aaron Ballman via llvm-commits
• [llvm] Re-enable MSVC C4512 diagnostic; NFC (PR #182576)   Aaron Ballman via llvm-commits
• [llvm] [NFC][IR] Fix MSVC C4706 diagnostic w/ 741b2cda32e1 (PR #182682)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Aaron Ballman via llvm-commits
• [llvm] [NFC][IR] Fix MSVC C4706 diagnostic w/ 741b2cda32e1 (PR #182682)   Aaron Ballman via llvm-commits
• [llvm] [docs] Add exception to AI tool policy for Bazel build fixer (PR #183408)   Aaron Ballman via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Abhinav Gaba via llvm-commits
• [llvm] [HEXAGON] fp_to_uint conversion for v32f32 to v32i1 (PR #183248)   Abinaya Saravanan via llvm-commits
• [llvm] [HEXAGON] fp_to_uint conversion for v32f32 to v32i1 (PR #183248)   Abinaya Saravanan via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   Adam Siemieniuk via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   Adam Siemieniuk via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   Adam Siemieniuk via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   Adam Siemieniuk via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [CodeGenPrepare] Update CodeGenPrepare::tryToSinkFreeOperands() to avoid duplicating instructions when sinking (PR #181037)   Adel Ejjeh via llvm-commits
• [llvm] [CodeGenPrepare] Update CodeGenPrepare::tryToSinkFreeOperands() to avoid duplicating instructions when sinking (PR #181037)   Adel Ejjeh via llvm-commits
• [llvm] [bazel] Fix build for 67ac275 (PR #183510)   Adrian Kuegel via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   Adrian Prantl via llvm-commits
• [llvm] [NFCi][AsmPrinter] Refactor getting analyses to callbacks (PR #182793)   Aiden Grossman via llvm-commits
• [llvm] [NFCi][AsmPrinter] Refactor getting analyses to callbacks (PR #182793)   Aiden Grossman via llvm-commits
• [llvm] Implemented metric that gets biggest function's size (PR #182632)   Aiden Grossman via llvm-commits
• [llvm] [AsmPrinter] Use default capture for assertion only lambda (PR #182986)   Aiden Grossman via llvm-commits
• [llvm] [IR] Specify alloca with poison element count (PR #183072)   Aiden Grossman via llvm-commits
• [llvm] [IR] Specify alloca with poison element count (PR #183072)   Aiden Grossman via llvm-commits
• [llvm] [IR] Specify alloca with poison element count (PR #183072)   Aiden Grossman via llvm-commits
• [llvm] [IR] Specify alloca with poison element count (PR #183072)   Aiden Grossman via llvm-commits
• [llvm] [IR] Specify alloca with poison element count (PR #183072)   Aiden Grossman via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Aiden Grossman via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Aiden Grossman via llvm-commits
• [llvm] [X86] add X86DomainReassignmentPass to x86 npm pipeline (PR #183088)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Aiden Grossman via llvm-commits
• [llvm] [X86] add X86DomainReassignmentPass to x86 npm pipeline (PR #183088)   Aiden Grossman via llvm-commits
• [llvm] [Github] Make prune unused branches workflow correctly handle reverts (PR #183114)   Aiden Grossman via llvm-commits
• [llvm] [Github] Turn on prune-unused-branches workflow (PR #182985)   Aiden Grossman via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   Aiden Grossman via llvm-commits
• [llvm] [UTC][VPlan] Add 'REQUIRES:asserts' to tests that require asserts. (PR #183174)   Aiden Grossman via llvm-commits
• [llvm] [UTC][VPlan] Add 'REQUIRES:asserts' to tests that require asserts. (PR #183174)   Aiden Grossman via llvm-commits
• [llvm] [NewPM][X86] Port AsmPrinter to NewPM (PR #182797)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Expose likely/unlikely weights as constants in MDBuilder (PR #183252)   Aiden Grossman via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Aiden Grossman via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Expose likely/unlikely weights as constants in MDBuilder (PR #183252)   Aiden Grossman via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   Aiden Grossman via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   Aiden Grossman via llvm-commits
• [llvm] [LoopInfo] Preserve profile information in makeLoopInvariant (PR #174171)   Aiden Grossman via llvm-commits
• [llvm] [LoopInfo] Preserve profile information in makeLoopInvariant (PR #174171)   Aiden Grossman via llvm-commits
• [llvm] [NFC][LICM] Update the comment about hoisting depend on block frequency (PR #183437)   Aiden Grossman via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Aiden Grossman via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Aiden Grossman via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Aiden Grossman via llvm-commits
• [llvm] [JTS] Add statistics (PR #183431)   Aiden Grossman via llvm-commits
• [llvm] github-automation.py: Fix mis-indented statement (PR #149653)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Aiden Grossman via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Aiden Grossman via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Aiden Grossman via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (PR #183726)   Aiden Grossman via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   Aiden Grossman via llvm-commits
• [clang] [lld] [llvm] Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (PR #183782)   Aiden Grossman via llvm-commits
• [llvm] [LoopInfo] Preserve profile information in makeLoopInvariant (PR #174171)   Aiden Grossman via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Remove extra pipes from load-saddr-offset-imm.ll (PR #183874)   Aiden Grossman via llvm-commits
• [llvm] Revert "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (#181755)" (PR #183872)   Aiden Grossman via llvm-commits
• [llvm] [X86] Emit user-friendly error for x86_fp80 with x87 disabled on x86_64 (PR #183932)   Aiden Grossman via llvm-commits
• [llvm] [X86] Emit user-friendly error for x86_fp80 with x87 disabled on x86_64 (PR #183932)   Aiden Grossman via llvm-commits
• [llvm] [X86] Emit user-friendly error for x86_fp80 with x87 disabled on x86_64 (PR #183932)   Aiden Grossman via llvm-commits
• [llvm] [X86] Emit user-friendly error for x86_fp80 with x87 disabled on x86_64 (PR #183932)   Aiden Grossman via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Aiden Grossman via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Akash Dutta via llvm-commits
• [llvm] [SLP][NFC] Precommit test for zext reorder with duplicate shifts (PR #183748)   Akash Dutta via llvm-commits
• [llvm] [SLP][NFC] Precommit test for zext reorder with duplicate shifts (PR #183748)   Akash Dutta via llvm-commits
• [llvm] [SLP][NFC] Precommit test for zext reorder with duplicate shifts (PR #183748)   Akash Dutta via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Akash Dutta via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Akash Dutta via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Akash Dutta via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Akash Dutta via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Akash Dutta via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   Akash Dutta via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   Akash Dutta via llvm-commits
• [llvm] [StackSlotColoring] Add size aware stack slot coloring with TTI hook (PR #181874)   Akash Dutta via llvm-commits
• [llvm] [SLP]Convert compares from zexts, promoted to selects, to inversed op, if improves codegen (PR #181580)   Alan Zhao via llvm-commits
• [clang] [llvm] [Offload][clang-linker-wrapper][SPIRV] Tell spirv-link to not optimize out exported symbols (PR #182930)   Alex Duran via llvm-commits
• [llvm] [NVPTX] Support intrinsics for reserved shared memory special registers (PR #182354)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Refactor NVPTXLowerArgs and move helpers to NVPTXUtilities (PR #183686)   Alex MacLean via llvm-commits
• [llvm] [NVPTX] Refactor NVPTXLowerArgs and move helpers to NVPTXUtilities (PR #183686)   Alex MacLean via llvm-commits
• [llvm] [X86] Normalize relocation model for Windows targets (PR #182903)   Alex Reinking via llvm-commits
• [clang] [llvm] [SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [llvm] [IVDescriptors] Identify min/max recurrences in single pass. (PR #163460)   Alexander Kornienko via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexander Kornienko via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Alexander Kornienko via llvm-commits
• [llvm] InstCombine: Stop applying nofpclass from use nofpclass attribute (PR #183835)   Alexander Kornienko via llvm-commits
• [llvm] InstCombine: Stop applying nofpclass from use nofpclass attribute (PR #183835)   Alexander Kornienko via llvm-commits
• [llvm] [TableGen] Implement TypesAreContradictory for non-simple ValueTypeByHwMode. (PR #182765)   Alexander Richardson via llvm-commits
• [llvm] [RISCV] Remove -riscv-enable-p-ext-simd-codegen (PR #183156)   Alexander Richardson via llvm-commits
• [llvm] [RISCV] Remove -riscv-enable-p-ext-simd-codegen (PR #183156)   Alexander Richardson via llvm-commits
• [llvm] [RISCV] Remove -riscv-enable-p-ext-simd-codegen (PR #183156)   Alexander Richardson via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Alexander Richardson via llvm-commits
• [llvm] [utils] update type hint for python 3.8-3.9 compatibility (PR #183427)   Alexander Richardson via llvm-commits
• [llvm] [JTS] Add statistics (PR #183431)   Alexander Shaposhnikov via llvm-commits
• [llvm] [AMDGPU] Fix encoding of inline constants in v_fma_mix_f32_bf16 (PR #183487)   Alexander Weinrauch via llvm-commits
• [llvm] [LLVM][PDB] Add missing type/symbol IDs (PR #182743)   Alexandre Ganea via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Support Compare-and-Branch instructions without compact code (PR #182045)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Alexey Bader via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Alexey Bataev via llvm-commits
• [llvm] c08079d - [SLP]Add single-use check for the bitcasted reduction   Alexey Bataev via llvm-commits
• [llvm] [SLP]Support reduced or selects of bitmask as cmp bitcast (PR #181940)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Enable Sub as a base instruction in copyables (PR #163231)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Alexey Bataev via llvm-commits
• [llvm] [SLP][NFC] Precommit test for zext reorder with duplicate shifts (PR #183748)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Fix logic for commuting copyable operands in buildInstructionsState() (PR #183773)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Prefer copyable vectorization over alternate opcodes (PR #153684)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Alexey Bataev via llvm-commits
• [llvm] e317f42 - [SLP]Recalculate dependencies for the buildvector schedule node, if they have copyable node   Alexey Bataev via llvm-commits
• [llvm] [SLP]Enable Sub as a base instruction in copyables (PR #163231)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Initial compatibility support for shl v, 1 and add v, v (PR #181168)   Alexey Bataev via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   Alexey Bataev via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Alexey Bataev via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Alexey Karyakin via llvm-commits
• [llvm] Add TSFlags2 to carry upper TSFlags bits (PR #183766)   Alexey Karyakin via llvm-commits
• [clang-tools-extra] [llvm] [Hexagon] Enable TSFlags2 usage (PR #183767)   Alexey Karyakin via llvm-commits
• [clang-tools-extra] [llvm] [Hexagon] Enable TSFlags2 usage (PR #183767)   Alexey Karyakin via llvm-commits
• [llvm] Add TSFlags2 to carry upper TSFlags bits (PR #183766)   Alexey Karyakin via llvm-commits
• [llvm] [BOLT][merge-fdata] Skip truncated lines in raw profile data (PR #183187)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexey Moksyakov via llvm-commits
• [llvm] [bazel][libc] Add some deps for layering_check (PR #183235)   Alexey Samsonov via llvm-commits
• [llvm] [bazel][libc] Add some deps for layering_check (PR #183235)   Alexey Samsonov via llvm-commits
• [llvm] [bazel][libc] Add some deps for layering_check (PR #183235)   Alexey Samsonov via llvm-commits
• [compiler-rt] [scudo] Add reallocarray C wrapper. (PR #183385)   Alexey Samsonov via llvm-commits
• [llvm] [CMake] Don't try to reuse PCH if PCH is disabled (PR #182819)   Alexis Engelke via llvm-commits
• [llvm] [CMake] Don't try to reuse PCH if PCH is disabled (PR #182819)   Alexis Engelke via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [llvm] [CMake] Don't try to reuse PCH if PCH is disabled (PR #182819)   Alexis Engelke via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [llvm] [CMake][LLVM] Disable PCH for DISABLE_LLVM_LINK_LLVM_DYLIB (PR #182883)   Alexis Engelke via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Alexis Engelke via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   Alexis Engelke via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   Alexis Engelke via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   Alexis Engelke via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   Alexis Engelke via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   Alexis Engelke via llvm-commits
• [llvm] [CMake][LLVM] Disable PCH on Clang for file with custom flags too (PR #183813)   Alexis Engelke via llvm-commits
• [llvm] [CMake][LLVM] Disable PCH on Clang for file with custom flags too (PR #183813)   Alexis Engelke via llvm-commits
• [llvm] [CMake][LLVM] Disable PCH on Clang for file with custom flags too (PR #183813)   Alexis Engelke via llvm-commits
• [llvm] [CMake][LLVM] Disable PCH on Clang for file with custom flags too (PR #183813)   Alexis Engelke via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Alon Zakai via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Alon Zakai via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   Aly ElAshram via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [llvm] Move AArch64 regression test to CodeGen (PR #183566)   Amina Chabane via llvm-commits
• [llvm] Move AArch64 regression test to CodeGen (PR #183566)   Amina Chabane via llvm-commits
• [llvm] Move AArch64 regression test to CodeGen (PR #183566)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Amina Chabane via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   Amit Tiwari via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   Amit Tiwari via llvm-commits
• [llvm] [SystemZ] Add indirect reference bit XATTR REFERENCE(INDIRECT) for indirect symbol handling support (PR #183441)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Add indirect reference bit XATTR REFERENCE(INDIRECT) for indirect symbol handling support (PR #183441)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Add indirect reference bit XATTR REFERENCE(INDIRECT) for indirect symbol handling support (PR #183441)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Emit external aliases required for indirect symbol handling support (PR #183442)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Emit external aliases required for indirect symbol handling support (PR #183442)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Emit external aliases required for indirect symbol handling support (PR #183442)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Emit external aliases for indirect function descriptors in the ADA section (PR #183443)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Emit external aliases for indirect function descriptors in the ADA section (PR #183443)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Emit external aliases for indirect function descriptors in the ADA section (PR #183443)   Amy Kwan via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Anatoly Trosinenko via llvm-commits
• [llvm] [flang][runtime] Emit "Infinity" rather than "Inf" when required (PR #183359)   Andre Kuhlenschmidt via llvm-commits
• [llvm] [Hexagon] Handle trunc to i1 in matchRightShift (PR #174737)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] fold range checks for reassociated logical and/or (PR #183331)   Andreas Jonson via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Andrei Elovikov via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Adopt _dyld_get_dyld_header (PR #182943)   Andrew Haberlandt via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Andy Kaylor via llvm-commits
• [llvm] [LLVM][MachinePipeliner] Fix crash during prolog peeling when loop preheader terminates with a fallthrough conditional branch (PR #182189)   Ankit Aggarwal via llvm-commits
• [llvm] [LLVM][MachinePipeliner] Fix crash during prolog peeling when loop preheader terminates with a fallthrough conditional branch (PR #182189)   Ankit Aggarwal via llvm-commits
• [llvm] [Hexagon] Disable new value jumps when packetizer is disabled (PR #180615)   Ankit Aggarwal via llvm-commits
• [llvm] [Hexagon] Disable new value jumps when packetizer is disabled (PR #180615)   Ankit Aggarwal via llvm-commits
• [llvm] [Hexagon] Fix truncation to boolean vector that needs widening (PR #182528)   Ankit Aggarwal via llvm-commits
• [llvm] [Hexagon] Fix truncation to boolean vector that needs widening (PR #182528)   Ankit Aggarwal via llvm-commits
• [llvm] [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (PR #183669)   Ankit Aggarwal via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Anshil Gandhi via llvm-commits
• [llvm] [SandboxVec][NFC] Update test checks (PR #183216)   Anshil Gandhi via llvm-commits
• [llvm] [DSE] Consider all dominating conditions in `dominatingConditionImpliesValue` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Consider all dominating conditions in `dominatingConditionImpliesValue` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Antonio Frighetto via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Antonio Frighetto via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Antonio Frighetto via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Antonio Frighetto via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Antonio Frighetto via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Antonio Frighetto via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Antonio Frighetto via llvm-commits
• [llvm] [MemorySSA] Make `getBlockDefs` return non-const, drop `getWritableBlockDefs` (NFC) (PR #183479)   Antonio Frighetto via llvm-commits
• [llvm] [MemorySSA] Make `getBlockDefs` and `getBlockAccesses` return a non-const list (NFC) (PR #183479)   Antonio Frighetto via llvm-commits
• [llvm] [MemorySSA] Make `getBlockDefs` and `getBlockAccesses` return a non-const list (NFC) (PR #183479)   Antonio Frighetto via llvm-commits
• [llvm] [MemorySSA] Make `getBlockDefs` and `getBlockAccesses` return a non-const list (NFC) (PR #183479)   Antonio Frighetto via llvm-commits
• [llvm] [MemorySSA] Make `getBlockDefs` and `getBlockAccesses` return a non-const list (NFC) (PR #183479)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Antonio Frighetto via llvm-commits
• [llvm] Implemented metric that gets biggest function's size (PR #182632)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Metric added - largest number of basic blocks in a single func… (PR #182970)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Metric added - largest number of basic blocks in a single func… (PR #182970)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Metric added - largest number of basic blocks in a single func… (PR #182970)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Arthur Eubanks via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Arthur Eubanks via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Artur Gainullin via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   Arun Thangamani via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Model late forwarding in Neoverse N1 (PR #177590)   Asher Dobrescu via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Asher Dobrescu via llvm-commits
• [llvm] [BOLT] Check if symbol is in data area of function (PR #160143)   Asher Dobrescu via llvm-commits
• [llvm] [X86] Znver5 Scheduler Description (PR #172370)   Austin Dworaczyk Wiltshire via llvm-commits
• [llvm] [AMDGPU] Add scaffolding for ML focused scheduling strategy (PR #169616)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Add ML-oriented coexec scheduler selection and queue handling (PR #169616)   Austin Kerbow via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add support for X86-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add support for X86-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add support for X86-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add support for X86-specific lowering (PR #182645)   Ayokunle Amodu via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Ayokunle Amodu via llvm-commits
• [llvm] [Github] Make prune unused branches workflow correctly handle reverts (PR #183114)   Baranov Victor via llvm-commits
• [llvm] [Github] Make prune unused branches workflow correctly handle reverts (PR #183114)   Baranov Victor via llvm-commits
• [llvm] [Github] Turn on prune-unused-branches workflow (PR #182985)   Baranov Victor via llvm-commits
• [llvm] [AArch64] Add bfloat patterns for `partial_reduce_fmla` (PR #181982)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #180425)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)" (PR #183014)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Lower bfloat FADD/SUB to BFMLAL top/bottom instructions (PR #174814)   Benjamin Maxwell via llvm-commits
• [llvm] Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)" (PR #183014)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Benjamin Maxwell via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Benjamin Maxwell via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Benjamin Maxwell via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Benjamin Maxwell via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Benjamin Maxwell via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Benjamin Maxwell via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Benjamin Maxwell via llvm-commits
• [llvm] [TTI] Remove TargetLibraryInfo from IntrinsicCostAttributes (NFC) (PR #183764)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix bug related to demanded bits/elts for BITCAST (PR #145902)   Björn Pettersson via llvm-commits
• [llvm] Add DoNotPoisonEltMask to several SimplifyDemanded function in TargetLowering (PR #145903)   Björn Pettersson via llvm-commits
• [llvm] Add DoNotPoisonEltMask to several SimplifyDemanded function in TargetLowering (PR #145903)   Björn Pettersson via llvm-commits
• [llvm] Add DoNotPoisonEltMask to several SimplifyDemanded function in TargetLowering (PR #145903)   Björn Pettersson via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Expand more TruncStore and LoadExt operations for P extension. (PR #182995)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Remove -riscv-enable-p-ext-simd-codegen (PR #183156)   Brandon Wu via llvm-commits
• [llvm] Revert "[Hexagon] Handle subreg copies between DoubleRegs and IntRegs… (PR #182861)   Brian Cain via llvm-commits
• [llvm] Revert "[Hexagon] Handle subreg copies between DoubleRegs and IntRegs… (PR #182861)   Brian Cain via llvm-commits
• [llvm] Revert "[Hexagon] Handle subreg copies between DoubleRegs and IntRegs… (PR #182861)   Brian Cain via llvm-commits
• [llvm] Revert "[Hexagon] Handle subreg copies between DoubleRegs and IntRegs… (PR #182861)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Prevent optimizing out counter reads (PR #182338)   Brian Cain via llvm-commits
• [llvm] Revert "[Hexagon] Handle subreg copies between DoubleRegs and IntRegs… (PR #182861)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix extractHvxSubvectorPred shuffle mask for small predicates (PR #181364)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Disable new value jumps when packetizer is disabled (PR #180615)   Brian Cain via llvm-commits
• [llvm] [CodeGen] Fix liveness tracking removing live sibling sub-registers (PR #181518)   Brian Cain via llvm-commits
• [llvm] [CodeGen] Fix liveness tracking removing live sibling sub-registers (PR #181518)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Avoid contracting predicates in createHvxPrefixPred (PR #183081)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix createHvxPrefixPred storing i64 values in Words[] (PR #182968)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix createHvxPrefixPred storing i64 values in Words[] (PR #182968)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Avoid contracting predicates in createHvxPrefixPred (PR #183081)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix truncation to boolean vector that needs widening (PR #182528)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix truncation to boolean vector that needs widening (PR #182528)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix assert on sign-bit CONST32 immediates (PR #182118)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Add missing early architecture features to V81 processor (PR #183499)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (PR #183669)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (PR #183669)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (PR #183669)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix findMaskR8 missing duplex support (PR #183936)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Add coverage tests for CodeGen passes (PR #183951)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Add coverage tests for CodeGen analysis and optimization passes (PR #183952)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Add coverage tests for AsmPrinter and misc CodeGen (PR #183953)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Add MC parser and AsmBackend coverage tests (PR #183954)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix findMaskR8 missing duplex support (PR #183936)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix findMaskR8 missing duplex support (PR #183936)   Brian Cain via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass and remove opsel for cvt_pk_f8_fp32 pattern (PR #179995)   Brox Chen via llvm-commits
• [llvm] [AMDGPU] lower fptrunc.round(rtz) to cvt_pkrtz_f16_f32 (PR #177069)   Brox Chen via llvm-commits
• [llvm] [JumpThreading] Preserve assume instructions to maintain constraint information (PR #176600)   Bu Le via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [clang] [llvm] [Clang][CodeGen] Add -gbtf: target-independent BTF emission for ELF targets (PR #183929)   Can H. Tartanoglu via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #182510)   Carlos Alberto Enciso via llvm-commits
• [clang] [llvm] [clang][DebugInfo] Add virtuality call-site target information in DWARF. (PR #182510)   Carlos Alberto Enciso via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Chaitanya Koparkar via llvm-commits
• [lldb] [llvm] [lldb-dap][windows] add integratedTerminal support (PR #174635)   Charles Zablit via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Chinmay Deshpande via llvm-commits
• [libc] [llvm] [mlir] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [libc] [llvm] [mlir] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [libc] [llvm] [mlir] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Chip Kerchner via llvm-commits
• [llvm] [ARM] Emit a warning when the hard-float ABI is enabled but can't be used. (PR #111334)   Chris Copeland via llvm-commits
• [llvm] [llvm] Fix the MCSubtargetInfo used for module-level assembly. (PR #97685)   Chris Copeland via llvm-commits
• [llvm] [llvm] Fix the MCSubtargetInfo used for module-level assembly. (PR #97685)   Chris Copeland via llvm-commits
• [llvm] [llvm] Fix the MCSubtargetInfo used for module-level assembly. (PR #97685)   Chris Copeland via llvm-commits
• [llvm] [llvm] Fix the MCSubtargetInfo used for module-level assembly. (PR #97685)   Chris Copeland via llvm-commits
• [clang] [compiler-rt] [tsan] Add simulation to TSAN (PR #183200)   Chris Cotter via llvm-commits
• [clang] [compiler-rt] [tsan] Add simulation to TSAN (PR #183200)   Chris Cotter via llvm-commits
• [clang] [compiler-rt] [tsan] Add simulation to TSAN (PR #183200)   Chris Cotter via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Chris Lattner via llvm-commits
• [compiler-rt] [scudo] Change header tagging for the secondary allocator (PR #182487)   Christopher Ferris via llvm-commits
• [llvm] [BPF] i128 direct return support (PR #183258)   Claire Fan via llvm-commits
• [llvm] [BPF] i128 direct return support (PR #183258)   Claire Fan via llvm-commits
• [llvm] [SimplifyCFG] remove misleading arrow operator (PR #182435)   Congcong Cai via llvm-commits
• [llvm] [SimplifyCFG] remove misleading arrow operator (PR #182435)   Congcong Cai via llvm-commits
• [llvm] [SimplifyCFG] remove misleading arrow operator (PR #182435)   Congcong Cai via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Corentin Jabot via llvm-commits
• [llvm] [RISCV] Rename RVVConstraint->VS1VS2Constraint. NFC (PR #182688)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove extra ReadSFBALU from SFBNDS_BFO. (PR #182900)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   Craig Topper via llvm-commits
• [llvm] [RISCV] Expand more TruncStore and LoadExt operations for P extension. (PR #182995)   Craig Topper via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Craig Topper via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Craig Topper via llvm-commits
• [llvm] [RISCV] Document some of the names we require for getNamedOperandIdx. NFC (PR #182687)   Craig Topper via llvm-commits
• [llvm] [RISCV] Expand more TruncStore and LoadExt operations for P extension. (PR #182995)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove unnecessary And before seteq/ne in some cases. (PR #183221)   Craig Topper via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add missing immediates to check lines in rv32p-valid.s. NFC (PR #183238)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add missing immediates to check lines in rv32p-valid.s and rv64p-valid.s. NFC (PR #183238)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support scalar bitreverse using P extension rev instruction. (PR #183245)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make P imply Zba, Zbb, Zmmul, and Zicsr. (PR #183247)   Craig Topper via llvm-commits
• [llvm] [RISCV] Make P imply Zba, Zbb, Zmmul, and Zicsr. (PR #183247)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove unnecessary And before seteq/ne in some cases. (PR #183221)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove -riscv-enable-p-ext-simd-codegen (PR #183156)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Use virtual registers instead of arbitrary physical registers in unit tests. NFC (PR #183205)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Use virtual registers instead of arbitrary physical registers in unit tests. NFC (PR #183205)   Craig Topper via llvm-commits
• [llvm] [RISCV] Treat zext.h as a separate instruction from pack(w) with Zbkb. (PR #183364)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add MERGE, MVM, and MVMN to isSignExtendedW in RISCVOptWInstrs. (PR #183433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Treat zext.h as a separate instruction from pack(w) with Zbkb. (PR #183364)   Craig Topper via llvm-commits
• [llvm] [RISCV] Partial support for using PPAIRE.B/H to optimize unaligned load sequences. (PR #183423)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add MERGE, MVM, and MVMN to isSignExtendedW in RISCVOptWInstrs. (PR #183433)   Craig Topper via llvm-commits
• [llvm] [TargetLowering][RISCV] Disable the special illegal type expansion of ISD::AVGFLOORU on RV32 (PR #181073)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add Defs = VXSAT to P extension instructions. (PR #183455)   Craig Topper via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Craig Topper via llvm-commits
• [llvm] [RISCV][test] Add i256 codegen baseline test (PR #183588)   Craig Topper via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Craig Topper via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Craig Topper via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Craig Topper via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Replace buildInstr with BuildMI (PR #183714)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Replace buildInstr with BuildMI (PR #183714)   Craig Topper via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Craig Topper via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Craig Topper via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Craig Topper via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Craig Topper via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Craig Topper via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use getCopyFromReg in unit test to match comment. NFC (PR #183199)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Craig Topper via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Craig Topper via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   Craig Topper via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Craig Topper via llvm-commits
• [llvm] Add TSFlags2 to carry upper TSFlags bits (PR #183766)   Craig Topper via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   Craig Topper via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   Craig Topper via llvm-commits
• [llvm] [Hexagon] Disable new value jumps when packetizer is disabled (PR #180615)   Cullen Rhodes via llvm-commits
• [llvm] [Hexagon] Fix extractHvxSubvectorPred shuffle mask for small predicates (PR #181364)   Cullen Rhodes via llvm-commits
• [llvm] [Maintainers] Fix broken clang link (NFC) (PR #182451)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] -aarch64-enable-global-isel-at-O=-1 should disable GISel (PR #182250)   Cullen Rhodes via llvm-commits
• [llvm] [llvm][release] Link to .jsonl signatures for Windows x86_64 and ARM64 (PR #183053)   Cullen Rhodes via llvm-commits
• [llvm] [llvm][release] Link to .jsonl signatures for Windows x86_64 and ARM64 (PR #183053)   Cullen Rhodes via llvm-commits
• [llvm] [llvm][release] Link to .jsonl signatures for Windows x86_64 and ARM64 (PR #183053)   Cullen Rhodes via llvm-commits
• [llvm] [llvm][release] Note that some packages have 2 signature files (PR #183266)   Cullen Rhodes via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Cullen Rhodes via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Cullen Rhodes via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Cullen Rhodes via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Damian Heaton via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Damian Heaton via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Damian Heaton via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Damian Heaton via llvm-commits
• [compiler-rt] [sanitizer_common] [Darwin] Adopt _dyld_get_dyld_header (PR #182943)   Dan Blackwell via llvm-commits
• [clang] [llvm] [win] Add a flag to control the Control Flow Guard mechanism on Windows (PR #176276)   Daniel Paoliello via llvm-commits
• [llvm] Revert "RuntimeLibcalls: Fix adding __safestack_pointer_address by default" (PR #182949)   Daniel Thornburgh via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Daniil Fukalov via llvm-commits
• [clang] [llvm] [AMDGPU] Disable generic DAG combines at -O0 to preserve debuggability. (PR #176304)   Daniil Fukalov via llvm-commits
• [llvm] [AMDGPU] Remove AMDGPUArgumentUsageInfo pass (PR #182490)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Remove AMDGPUArgumentUsageInfo pass (PR #182490)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Dark Steve via llvm-commits
• [compiler-rt] [compiler-rt] fix __sanitizer::struct_sock_fprog_sz availability (PR #183411)   David CARLIER via llvm-commits
• [llvm] [AArch64] Add basic scmp and ucmp costs. (PR #182180)   David Green via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   David Green via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Combine to sqxtn pre legalization for FewerElements (PR #181163)   David Green via llvm-commits
• [llvm] [AArch64] Optimize 64-bit constant vector builds (PR #177076)   David Green via llvm-commits
• [llvm] [ARM] optimize to `vsri`/`vsli` (PR #182051)   David Green via llvm-commits
• [llvm] [ARM] optimize to `vsri`/`vsli` (PR #182051)   David Green via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   David Green via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   David Green via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64] Cortex-A55/A320/A510 scheduling model "typo" fixes (PR #182854)   David Green via llvm-commits
• [llvm] [AArch64] When lowering 16 bit vector bitcasts, convert to i16. (PR #178249)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [Thumb2] mve-vmovimm.ll - regenerate with missing check prefixes (PR #183019)   David Green via llvm-commits
• [llvm] [ARM] tADDrSPi no side effects change (PR #183071)   David Green via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   David Green via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   David Green via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   David Green via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   David Green via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   David Green via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   David Green via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   David Green via llvm-commits
• [llvm] [AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (PR #182494)   David Green via llvm-commits
• [llvm] [AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (PR #182494)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   David Green via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   David Green via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   David Green via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   David Green via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   David Green via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   David Green via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   David Green via llvm-commits
• [llvm] [AArch64][GISel] Fix computeKnownBits through a COPY with different-width fixed vector types (PR #179123)   David Green via llvm-commits
• [llvm] [AArch64][GISel] Fix computeKnownBits through a COPY with different fixed-width vector types (PR #179123)   David Green via llvm-commits
• [llvm] [AArch64][GISel] Fix computeKnownBits through a COPY with different fixed-width vector types (PR #179123)   David Green via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   David Green via llvm-commits
• [llvm] [AggressiveInstCombine] Match the pattern and generate ctlz function call (PR #177110)   David Green via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   David Green via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   David Green via llvm-commits
• [llvm] [ARM][MVE] Add SLI and SRI recognition. (PR #183471)   David Green via llvm-commits
• [llvm] [AArch64] Decompose FADD reductions with known zero elements (PR #167313)   David Green via llvm-commits
• [llvm] [AArch64] Decompose FADD reductions with known zero elements (PR #167313)   David Green via llvm-commits
• [llvm] [AArch64] Decompose FADD reductions with known zero elements (PR #167313)   David Green via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   David Green via llvm-commits
• [llvm] f5c3a8e - [AArch64] Rename shuffle-of-intrinscis.ll to shuffle-of-intrinsics.ll. NFC   David Green via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Use vector register for scalar CLMUL (PR #183282)   David Green via llvm-commits
• [llvm] [ARM][MVE] Add SLI and SRI recognition. (PR #183471)   David Green via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   David Green via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   David Green via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   David Green via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   David Green via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   David Green via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   David Green via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   David Green via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   David Green via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   David Green via llvm-commits
• [llvm] Precommit tests: strictfp rounding vector f16 intrinsics (PR #183699)   David Green via llvm-commits
• [llvm] Precommit tests: strictfp rounding vector f16 intrinsics (PR #183699)   David Green via llvm-commits
• [llvm] 0b61f15 - [AArch64] Add fcvt-i256 test cases. NFC   David Green via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   David Green via llvm-commits
• [llvm] [TableGen] Fix duplicate enum definitions in register class intersections (PR #183139)   David Peixotto via llvm-commits
• [llvm] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Regen CHECK lines in LoopVectorize/AArch64/veclib-intrinsic-calls.ll (PR #183098)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Regen CHECK lines in LoopVectorize/AArch64/veclib-intrinsic-calls.ll (PR #183098)   David Sherwood via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   David Sherwood via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   David Sherwood via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   David Sherwood via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   David Sherwood via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   David Sherwood via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   David Sherwood via llvm-commits
• [llvm] [LLVM][TTI] Remove the isVScaleKnownToBeAPowerOfTwo hook. (PR #183292)   David Sherwood via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib pass to optimise vector math calls (PR #181981)   David Sherwood via llvm-commits
• [llvm] [CodeGen] Teach ReplaceWithVeclib pass to optimise vector math calls (PR #181981)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   David Sherwood via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   David Sherwood via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   David Sherwood via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   David Sherwood via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   David Sherwood via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread pointer register on ARM Linux (PR #182438)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread pointer register on ARM Linux (PR #182438)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support reading the thread pointer register on ARM Linux (PR #182438)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSD] Add riscv64 support (PR #180549)   David Spickett via llvm-commits
• [llvm] [llvm][release] Link to .jsonl signatures for Windows x86_64 and ARM64 (PR #183053)   David Spickett via llvm-commits
• [llvm] [llvm][release] Link to .jsonl signatures for Windows x86_64 and ARM64 (PR #183053)   David Spickett via llvm-commits
• [llvm] [llvm][release] Link to .jsonl signatures for Windows x86_64 and ARM64 (PR #183053)   David Spickett via llvm-commits
• [llvm] [llvm][release] Link to .jsonl signatures for Windows x86_64 and ARM64 (PR #183053)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add riscv64 support (PR #180670)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] Revert "[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory()" (PR #183485)   David Spickett via llvm-commits
• [lldb] [llvm] Revert "[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory()" (PR #183485)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [llvm] [AArch64] Fix handling of x29/x30 in inline assembly clobbers (PR #167783)   David Spickett via llvm-commits
• [llvm] [AArch64] Fix handling of x29/x30 in inline assembly clobbers (PR #167783)   David Spickett via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   David Spickett via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   David Stuttard via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   David Stuttard via llvm-commits
• [llvm] [AMDGPU] Add attribute for FWD_PROGRESS (PR #181675)   David Stuttard via llvm-commits
• [llvm] [bazel] Fix windows stack space on llvm driver link (PR #182998)   David Zbarsky via llvm-commits
• [llvm] [bazel] Fix windows stack space on llvm driver link (PR #182998)   David Zbarsky via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Optimize `WebAssemblyCFGSort`'s post sort verifications. (PR #182458)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Add more tests for `wasm-fix-irreducible-control-flow`. NFC (PR #181254)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] `G_ADD` legalization & selection (PR #183694)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] `G_ADD` legalization & selection (PR #183694)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] `G_ADD` (and in-reg ext/trunc related) legalization & selection (PR #183694)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] `G_ADD` (and in-reg ext/trunc related) legalization & selection (PR #183694)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Fold AND mask operations into ZExt load (PR #183743)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Demetrius Kanios via llvm-commits
• [llvm] Revert "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (#181755)" (PR #183872)   Demetrius Kanios via llvm-commits
• [llvm] Revert "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (#181755)" (PR #183872)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   Derek Schuff via llvm-commits
• [lld] [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Derek Schuff via llvm-commits
• [lld] [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Derek Schuff via llvm-commits
• [lld] [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Derek Schuff via llvm-commits
• [llvm] [MC] Remove redundant setting of AllowDollarAtStartOfIdentifier. NFC (PR #183339)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Use MVT::i32 instead of i1 in performAnyAllCombine (PR #183866)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   Derek Schuff via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Deric C. via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [NFCi][AsmPrinter] Refactor getting analyses to callbacks (PR #182793)   Diana Picus via llvm-commits
• [lld] [LLD][ELF][RISCV] Support big-endian RISC-V linking (PR #180912)   Djordje Todorovic via llvm-commits
• [lld] [LLD][ELF][RISCV] Support big-endian RISC-V linking (PR #180912)   Djordje Todorovic via llvm-commits
• [llvm] Changing MutableArrayRef constructor checks (PR #183796)   Dmitrii Makarenko via llvm-commits
• [llvm] Conservative, just add second constructor (PR #183806)   Dmitrii Makarenko via llvm-commits
• [llvm] [ADT] Refine MutableArrayRef forwarding constructor constraints (PR #183806)   Dmitrii Makarenko via llvm-commits
• [llvm] [libsycl] Fix for static vars deinit order (libsycl vs liboffload) (PR #181366)   Dmitry Rogozhkin via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Dmitry Rogozhkin via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Dmitry Rogozhkin via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Dmitry Rogozhkin via llvm-commits
• [llvm] [libsycl] Add sycl::context stub (PR #182826)   Dmitry Rogozhkin via llvm-commits
• [llvm] [SPIR-V] Stop emitting FPRoundingMode for arithmetic constrained intrinsics (PR #182742)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV][AMD] Reenable `SPV_KHR_float_control2` for AMD flavored SPIRV (PR #182873)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add spirv-use-user-semantic-for-linkage option (PR #181661)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC][SPIRV] Fix compile warnings (PR #183725)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC][SPIRV] Fix compile warnings (PR #183725)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC][SPIRV] Fix compile warnings (PR #183725)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Dmitry Sidorov via llvm-commits
• [llvm] [flang-rt] Remove experiemental OpenMP offloading support (PR #183653)   Dominik Adamski via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [analyzer] New checker: optin.core.UnconditionalVAArg (PR #175602)   Donát Nagy via llvm-commits
• [clang] [llvm] [analyzer] New checker: optin.core.UnconditionalVAArg (PR #175602)   Donát Nagy via llvm-commits
• [llvm] [NVPTX] Refactor NVPTXLowerArgs and move helpers to NVPTXUtilities (PR #183686)   Drew Kersnar via llvm-commits
• [llvm] [LLVM][NVPTX] Fix infinite legalization loop in tcgen05.st (PR #183012)   Durgadoss R via llvm-commits
• [llvm] [LLVM][NVPTX] Fix infinite legalization loop in tcgen05.st (PR #183012)   Durgadoss R via llvm-commits
• [llvm] [LLVM][NVPTX] Fix infinite legalization loop in tcgen05.st (PR #183012)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Durgadoss R via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [ConstantFolding] Fold powf in single-precision. (PR #183102)   Eli Friedman via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [llvm] [CodeGen] Allow `-enable-ext-tsp-block-placement` and `-apply-ext-tsp-for-size` passed together (PR #183642)   Ellis Hoag via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] Fix Bazel build for 9d5574d (PR #183312)   Emilio Cota via llvm-commits
• [llvm] Fix Bazel build for 9d5574d (PR #183312)   Emilio Cota via llvm-commits
• [llvm] Fix Bazel build for 67ac275 (PR #183495)   Emilio Cota via llvm-commits
• [llvm] [bazel] Fix build for 67ac275 (PR #183510)   Emilio Cota via llvm-commits
• [llvm] Fix Bazel build for 67ac275 (PR #183495)   Emilio Cota via llvm-commits
• [llvm] Fix Bazel build for 67ac275 (PR #183495)   Emilio Cota via llvm-commits
• [llvm] [cmake] Disable -Wdangling-pointer on GCC 12+ (PR #183593)   Eric Christopher via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Eugene Epshteyn via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Eugene Epshteyn via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Eugene Epshteyn via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Eugene Epshteyn via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Eugene Epshteyn via llvm-commits
• [llvm] [flang][runtime] Emit "Infinity" rather than "Inf" when required (PR #183359)   Eugene Epshteyn via llvm-commits
• [llvm] [flang][runtime] Emit "Infinity" rather than "Inf" when required (PR #183359)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   Eugene Epshteyn via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Eugene Epshteyn via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Eugene Epshteyn via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Eugene Epshteyn via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   Evgenii Kudriashov via llvm-commits
• [llvm] [MC] Fix crash in x=0; .section x (PR #183001)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix crash in x=0; .section x (PR #183001)   Fangrui Song via llvm-commits
• [llvm] [MC] Fix crash in x=0; .section x (PR #183001)   Fangrui Song via llvm-commits
• [llvm] [MC] Add --reloc-section-sym option to control section symbol conversion (PR #182725)   Fangrui Song via llvm-commits
• [llvm] [MC] Add --reloc-section-sym option to control section symbol conversion (PR #182725)   Fangrui Song via llvm-commits
• [llvm] [MC] Set UseAtForSpecifier in initializeAtSpecifiers and default to false (PR #183253)   Fangrui Song via llvm-commits
• [llvm] [MC] Consistent use of inline field initializers in MCAsmInfo (PR #183343)   Fangrui Song via llvm-commits
• [llvm] [MC] Consistent use of inline field initializers in MCAsmInfo (PR #183343)   Fangrui Song via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Fangrui Song via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Fangrui Song via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Fangrui Song via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Fangrui Song via llvm-commits
• [llvm] [GCOV] Modify the path parsing of gcov instrument filter (PR #183475)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Fangrui Song via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Fangrui Song via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Fangrui Song via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Fangrui Song via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Fangrui Song via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Fangrui Song via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Fangrui Song via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Fangrui Song via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Fangrui Song via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Fangrui Song via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Fangrui Song via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Fangrui Song via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Fangrui Song via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Fangrui Song via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [llvm] RISCVMCAsmInfo: Remove redundant `UseAtForSpecifier = false`. NFC (PR #183890)   Fangrui Song via llvm-commits
• [llvm] RISCVMCAsmInfo: Remove redundant `UseAtForSpecifier = false`. NFC (PR #183890)   Fangrui Song via llvm-commits
• [llvm] RISCVMCAsmInfo: Remove redundant `UseAtForSpecifier = false`. NFC (PR #183890)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix findMaskR8 missing duplex support (PR #183936)   Fangrui Song via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Fangrui Song via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Fangrui Song via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Fangrui Song via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   Farid Zakaria via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   Farid Zakaria via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   Farid Zakaria via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Farid Zakaria via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Farid Zakaria via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Farid Zakaria via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Farid Zakaria via llvm-commits
• [lld] [lld] clang-format sources (PR #183805)   Farid Zakaria via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   Farid Zakaria via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Make Matrix InitListExprs and AST row-major order, and respect /Zpr and /Zpc in codegen (PR #182904)   Farzon Lotfi via llvm-commits
• [llvm] Fix memory type for vgather intrinsics (PR #183563)   Fateme Hosseini via llvm-commits
• [llvm] Fix memory type for vgather intrinsics (PR #183563)   Fateme Hosseini via llvm-commits
• [llvm] Fix memory type for vgather intrinsics (PR #183563)   Fateme Hosseini via llvm-commits
• [llvm] Fix memory type for vgather intrinsics (PR #183563)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Fix memory type for vgather intrinsics (PR #183563)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Fix memory type for vgather intrinsics (PR #183563)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add AggressiveRDF copy propagation (PR #182818)   Fateme Hosseini via llvm-commits
• [llvm] Add TSFlags2 to carry upper TSFlags bits (PR #183766)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Enable TSFlags2 usage (PR #183767)   Fateme Hosseini via llvm-commits
• [clang-tools-extra] [llvm] [Hexagon] Enable TSFlags2 usage (PR #183767)   Fateme Hosseini via llvm-commits
• [llvm] Add TSFlags2 to carry upper TSFlags bits (PR #183766)   Fateme Hosseini via llvm-commits
• [llvm] Add TSFlags2 to carry upper TSFlags bits (PR #183766)   Fateme Hosseini via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [LV] Add flag to always force a scalable VF when feasible. (PR #182467)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove verifyEVLRecipe (PR #182798)   Florian Hahn via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Florian Hahn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Florian Hahn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Florian Hahn via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Florian Hahn via llvm-commits
• [llvm] [TTI] Provide conservative costs for @llvm.speculative.load. (PR #180036)   Florian Hahn via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Florian Hahn via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Florian Hahn via llvm-commits
• [llvm] [LoopUnroll] Support parallel reductions for minmax (PR #182473)   Florian Hahn via llvm-commits
• [llvm] [LoopUnroll] Support parallel reductions for minmax (PR #182473)   Florian Hahn via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove verifyLate from VPlanVerifier. NFC (PR #182799)   Florian Hahn via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Florian Hahn via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Florian Hahn via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Florian Hahn via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Florian Hahn via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add simple driver option to run some individual transforms. (PR #178522)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Florian Hahn via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Florian Hahn via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Florian Hahn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Florian Hahn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Florian Hahn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move out canNarrowOps (NFC). (PR #167309)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Move out canNarrowOps (NFC). (PR #167309)   Florian Hahn via llvm-commits
• [llvm] 3c20913 - [IVDesc] Reject invariant stores in different blocks.   Florian Hahn via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Florian Hahn via llvm-commits
• [llvm] [IVDescriptors] Identify min/max recurrences in single pass. (PR #163460)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Florian Hahn via llvm-commits
• [llvm] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   Florian Hahn via llvm-commits
• [llvm] [CMake] Disable PCH when LLVM_ENABLE_MODULES is set (PR #182914)   Florian Hahn via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Florian Hahn via llvm-commits
• [llvm] Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)" (PR #183014)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Florian Hahn via llvm-commits
• [llvm] [LV][NFC] Regen CHECK lines in LoopVectorize/AArch64/veclib-intrinsic-calls.ll (PR #183098)   Florian Hahn via llvm-commits
• [llvm] [LAA] NFC: Rename mulSCEVOverflow to mulSCEVNoOverflow (PR #183096)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to Widen(Cast|GEP) (PR #183204)   Florian Hahn via llvm-commits
• [llvm] [UTC][VPlan] Add 'REQUIRES:asserts' to tests that require asserts. (PR #183174)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Florian Hahn via llvm-commits
• [llvm] [LLVM][TTI] Remove the isVScaleKnownToBeAPowerOfTwo hook. (PR #183292)   Florian Hahn via llvm-commits
• [llvm] [LV] Remove runtime IV overflow checks (PR #183066)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Florian Hahn via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] [LV] Remove CheckNeededWithTailFolding from addMinimumIterationCheck. NFC (PR #183066)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Florian Hahn via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Florian Hahn via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Florian Hahn via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Florian Hahn via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] c5d6feb - [VPlan] Limit interleave group narrowing to consecutive wide loads.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [LoopUnroll] Support parallel reductions for minmax (PR #182473)   Florian Hahn via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Florian Hahn via llvm-commits
• [llvm] [IVDescriptors] Remove function FMF attribute check for FP min/max reduction (PR #183523)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace simplifyKnownEVL by fold in simplifyRecipe (NFCI). (PR #183392)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace simplifyKnownEVL by fold in simplifyRecipe (NFCI). (PR #183392)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove non-power-of-2 scalable VF comment. NFC (PR #183719)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add nuw to unrolled canonical IVs (PR #183716)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Florian Hahn via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Florian Hahn via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Florian Hahn via llvm-commits
• [llvm] ab2908e - [LV] Add tail-folding & required scalar epilogue tests for IG narrowing.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Florian Hahn via llvm-commits
• [llvm] 94ebc8a - [LV] Remove duplicated IV expression sinking tests. (NFC)   Florian Hahn via llvm-commits
• [llvm] 72525fb - [VPlan] Materialize UF after unrolling (NFCI).   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of binary op of an induction. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [DenseMap] Add memory barrier for sanitizers in getInlineBuckets/getLargeRep (PR #183457)   Florian Mayer via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Florian Mayer via llvm-commits
• [llvm] [MTE] [HWASan] support more complicated lifetimes (PR #182425)   Florian Mayer via llvm-commits
• [llvm] [MTE] [HWASan] support more complicated lifetimes (PR #182425)   Florian Mayer via llvm-commits
• [llvm] [mlir] [ASan] Document limitations of container overflow checks (PR #183590)   Florian Mayer via llvm-commits
• [llvm] [mlir] [ASan] Document limitations of container overflow checks (PR #183590)   Florian Mayer via llvm-commits
• [llvm] [NFC] [HWASan] add test for duplicated lifetime end (PR #183807)   Florian Mayer via llvm-commits
• [llvm] [NFC] [HWASan] add test for duplicated lifetime end (PR #183807)   Florian Mayer via llvm-commits
• [clang] [llvm] [mlir] [ASan] Document limitations of container overflow checks (PR #183590)   Florian Mayer via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   Folkert de Vries via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   Folkert de Vries via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   Folkert de Vries via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   Folkert de Vries via llvm-commits
• [llvm] [ARM] optimize to `vsri`/`vsli` (PR #182051)   Folkert de Vries via llvm-commits
• [llvm] [ARM] optimize to `vsri`/`vsli` (PR #182051)   Folkert de Vries via llvm-commits
• [llvm] [ARM] optimize to `vsri`/`vsli` (PR #182051)   Folkert de Vries via llvm-commits
• [llvm] [ARM] optimize to `vsri`/`vsli` (PR #182051)   Folkert de Vries via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Folkert de Vries via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Folkert de Vries via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Folkert de Vries via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Folkert de Vries via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   Folkert de Vries via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   Folkert de Vries via llvm-commits
• [llvm] [ARM][MVE] Add SLI and SRI recognition. (PR #183471)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [vim] Set commentstring for TableGen files (PR #182654)   Fraser Cormack via llvm-commits
• [llvm] [vim] Set commentstring for TableGen files (PR #182654)   Fraser Cormack via llvm-commits
• [llvm] [vim] Set commentstring for TableGen files (PR #182654)   Fraser Cormack via llvm-commits
• [llvm] [AMDGPU] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Frederick Vu via llvm-commits
• [llvm] [DAG] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Frederick Vu via llvm-commits
• [llvm] [DAG] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   Frederick Vu via llvm-commits
• [llvm] [AMDGPU] Add 4x4 byte permutation fold in pre-legalization ISel (PR #181885)   Frederick Vu via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   Frederick Vu via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Handle V_PACK_B32_F16_e64 (PR #176383)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Handle V_PACK_B32_F16_e64 (PR #176383)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Handle V_PACK_B32_F16_e64 (PR #176383)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Handle V_PACK_B32_F16_e64 (PR #176383)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] si-peephole-sdwa: Handle V_PACK_B32_F16_e64 (PR #176383)   Frederik Harwath via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Frederik Harwath via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Fuad Ismail via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Gaëtan Bossu via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Gaëtan Bossu via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Gaëtan Bossu via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [BOLT][BTI] Patch ignored functions in place when targeting them with indirect branches (PR #177165)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Gergely Bálint via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Gergo Stomfai via llvm-commits
• [llvm] [X86] add X86DomainReassignmentPass to x86 npm pipeline (PR #183088)   Gergo Stomfai via llvm-commits
• [llvm] [X86] add X86DomainReassignmentPass to x86 npm pipeline (PR #183088)   Gergo Stomfai via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Gergo Stomfai via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Gergo Stomfai via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Gergo Stomfai via llvm-commits
• [llvm] [InstCombine] Fold shift of boolean zext to logic sequence (PR #180596)   Gergo Stomfai via llvm-commits
• [llvm] [X86][Gisel] add trivial arith tests for gisel x86-prelegalizer-combiner (PR #183544)   Gergo Stomfai via llvm-commits
• [llvm] [X86][Gisel] add trivial arith tests for gisel x86-prelegalizer-combiner (PR #183544)   Gergo Stomfai via llvm-commits
• [llvm] [X86][Gisel] add trivial arith tests for gisel x86-prelegalizer-combiner (PR #183544)   Gergo Stomfai via llvm-commits
• [llvm] [X86][GISel] Add initial tests for x86 postleg combiner (PR #183844)   Gergo Stomfai via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Graham Hunter via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Graham Hunter via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Graham Hunter via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Graham Hunter via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Graham Hunter via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Graham Hunter via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Graham Hunter via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Graham Hunter via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Grigory Pastukhov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Grigory Pastukhov via llvm-commits
• [llvm] [AArch64] Decompose FADD reductions with known zero elements (PR #167313)   Guy David via llvm-commits
• [llvm] [NFC][AArch64] Extract MOVaddr* expansion model into common header (PR #183503)   Guy David via llvm-commits
• [llvm] [NFC][AArch64] Extract MOVaddr* expansion model into common header (PR #183503)   Guy David via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [llvm] [AArch64] Decompose FADD reductions with known zero elements (PR #167313)   Guy David via llvm-commits
• [llvm] [AArch64] Decompose FADD reductions with known zero elements (PR #167313)   Guy David via llvm-commits
• [clang] [llvm] [ValueTracking] Extend computeConstantRange for add/sub, sext/zext/trunc (PR #181110)   Guy David via llvm-commits
• [llvm] [AArch64] Decompose FADD reductions with known zero elements (PR #167313)   Guy David via llvm-commits
• [llvm] [AArch64] Improve post-inc stores of SIMD/FP values (PR #151372)   Guy David via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   Gábor Spaits via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   Gábor Spaits via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   Gábor Spaits via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   Gábor Spaits via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   Gábor Spaits via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   Gábor Spaits via llvm-commits
• [llvm] [ValueTracking] impliesPoison(V, Cond ? V : V) = true (PR #183059)   Gábor Spaits via llvm-commits
• [llvm] [ValueTracking] impliesPoison(V, Cond ? V : V) = true (PR #183059)   Gábor Spaits via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Haibo Jiang via llvm-commits
• [llvm] Re-enable MSVC C4722 diagnostic; NFC (PR #182845)   Hans Wennborg via llvm-commits
• [llvm] Re-enable MSVC C4141 diagnostic; NFC (PR #182586)   Hans Wennborg via llvm-commits
• [llvm] Re-enable MSVC C4510 diagnostic; NFC (PR #182872)   Hans Wennborg via llvm-commits
• [llvm] Re-enable MSVC C4291 diagnostic; NFC (PR #182868)   Hans Wennborg via llvm-commits
• [llvm] [pdb] Fix libc++ strict-weak-ordering assertion failures from gsiRecordCmp (PR #183749)   Hans Wennborg via llvm-commits
• [llvm] [pdb] Fix libc++ strict-weak-ordering assertion failures from gsiRecordCmp (PR #183749)   Hans Wennborg via llvm-commits
• [llvm] [Offload] Enable memory usage printing with `alloc` debug type (PR #182938)   Hansang Bae via llvm-commits
• [llvm] [Offload] Remove unused data type (PR #183840)   Hansang Bae via llvm-commits
• [llvm] [CMake][LLVM] Disable PCH on Clang for file with custom flags too (PR #183813)   Harald van Dijk via llvm-commits
• [llvm] [CMake][LLVM] Disable PCH on Clang for file with custom flags too (PR #183813)   Harald van Dijk via llvm-commits
• [llvm] [CMake][LLVM] Disable PCH on Clang for file with custom flags too (PR #183813)   Harald van Dijk via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Harrishan Raveendran via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Harrishan Raveendran via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   Harrison Hao via llvm-commits
• [llvm] [AArch64] Add basic scmp and ucmp costs. (PR #182180)   Hassnaa Hamdi via llvm-commits
• [llvm] [AArch64] Add basic scmp and ucmp costs. (PR #182180)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [lld] [llvm] [WebAssembly] Use generic CPU by default in llvm-mc (PR #181460)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Optimize `WebAssemblyCFGSort`'s post sort verifications. (PR #182458)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Heejin Ahn via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Honey Goyal via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (PR #182494)   Igor Kirillov via llvm-commits
• [llvm] [LAA] NFC: Rename mulSCEVOverflow to mulSCEVNoOverflow (PR #183096)   Igor Kirillov via llvm-commits
• [llvm] [LAA] NFC: Rename mulSCEVOverflow to mulSCEVNoOverflow (PR #183096)   Igor Kirillov via llvm-commits
• [llvm] [AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (PR #182494)   Igor Kirillov via llvm-commits
• [llvm] [LAA] NFC: Rename mulSCEVOverflow to mulSCEVNoOverflow (PR #183096)   Igor Kirillov via llvm-commits
• [llvm] [AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (PR #182494)   Igor Kirillov via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Igor Kirillov via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Igor Kirillov via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Igor Kirillov via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   Igor Kirillov via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support thread local variables on ARM Linux (PR #181315)   Igor Kudrin via llvm-commits
• [lldb] [llvm] [lldb][ARM] Support thread local variables on ARM Linux (PR #181315)   Igor Kudrin via llvm-commits
• [llvm] [Hexagon] Handle trunc to i1 in matchRightShift (PR #174737)   Ikhlas Ajbar via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] Implemented metric that gets biggest function's size (PR #182632)   Iñaki V Arrechea via llvm-commits
• [llvm] Implemented metric that gets biggest function's size (PR #182632)   Iñaki V Arrechea via llvm-commits
• [llvm] Implemented metric that gets biggest function's size (PR #182632)   Iñaki V Arrechea via llvm-commits
• [llvm] Implemented metric that gets biggest function's size (PR #182632)   Iñaki V Arrechea via llvm-commits
• [llvm] Implemented metric that gets biggest function's size (PR #182632)   Iñaki V Arrechea via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   JF Bastien via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   JF Bastien via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   JF Bastien via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jack Styles via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jack Styles via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jack Styles via llvm-commits
• [llvm] Fix SafeStack crashing with scalable TypeSizes (PR #180547)   Jakob Koschel via llvm-commits
• [llvm] Fix SafeStack crashing with scalable TypeSizes (PR #180547)   Jakob Koschel via llvm-commits
• [compiler-rt] [SafeStack] Add unsafe sigaltstack support (PR #183733)   Jakob Koschel via llvm-commits
• [compiler-rt] [SafeStack] Add unsafe sigaltstack support (PR #183733)   Jakob Koschel via llvm-commits
• [compiler-rt] [SafeStack] Add unsafe sigaltstack support (PR #183733)   Jakob Koschel via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Jakub Kuderski via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Jakub Kuderski via llvm-commits
• [llvm] [DenseMap] Add memory barrier for sanitizers in getInlineBuckets/getLargeRep (PR #183457)   Jakub Kuderski via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   James Henderson via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   James Henderson via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jameson Nash via llvm-commits
• [llvm] [mlir] [OMPIRBuilder] Replace getAllocatedType with getAllocationSize (PR #181844)   Jameson Nash via llvm-commits
• [llvm] [UTC] Add utility script to deal with conflicting RUN lines (PR #182546)   Jameson Nash via llvm-commits
• [llvm] [CodeGen] Use byte offsets and ptradd in ShadowStackGCLowering (PR #178436)   Jameson Nash via llvm-commits
• [llvm] [CodeGen] Use byte offsets and ptradd in ShadowStackGCLowering (PR #178436)   Jameson Nash via llvm-commits
• [llvm] [AMDGPU] Replace getAllocatedType with getAllocationSize in PromoteAlloca (PR #179523)   Jameson Nash via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Jameson Nash via llvm-commits
• [llvm] [CodeGen] Use byte offsets and ptradd in ShadowStackGCLowering (PR #178436)   Jameson Nash via llvm-commits
• [llvm] [CodeGen] Use byte offsets and ptradd in ShadowStackGCLowering (PR #178436)   Jameson Nash via llvm-commits
• [llvm] [CodeGen] Add tests for ShadowStackGCLowering IR pass (PR #183167)   Jameson Nash via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Jameson Nash via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Jameson Nash via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Jameson Nash via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Jameson Nash via llvm-commits
• [clang] [llvm] [SSP] Add llvm.ssp.protected intrinsic for QualType-based stack protection (PR #183623)   Jameson Nash via llvm-commits
• [clang] [llvm] [SSP] Add llvm.ssp.protected intrinsic for QualType-based stack protection (PR #183623)   Jameson Nash via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   Jan Leyonberg via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   Jan Leyonberg via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   Jan Leyonberg via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Fix copy-elision warning (PR #182848)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Fix copy-elision warning (PR #182848)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Fix copy-elision warning (PR #182848)   Jan Patrick Lehr via llvm-commits
• [llvm] [CI] Enable OpenMP and Offload runtime in premerge (PR #174955)   Jan Patrick Lehr via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang][modules] Prevent deadlock in module cache (PR #182722)   Jan Svoboda via llvm-commits
• [llvm] [orc_rt] adding a very simple CLI flags parser in (PR #172987)   Jared Wyles via llvm-commits
• [llvm] [orc_rt] adding a very simple CLI flags parser in (PR #172987)   Jared Wyles via llvm-commits
• [llvm] [orc_rt] adding a very simple CLI flags parser in (PR #172987)   Jared Wyles via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   Jason Van Beusekom via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   Jason Van Beusekom via llvm-commits
• [llvm] [TableGen] fix unreachable code warning in *GenSubtargetInfo.inc files (PR #182477)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][ISel] Reduce 64-bit `setcc` to upper 32 bits if lower 32 bits are known (PR #181238)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][ISel] Reduce 64-bit `setcc` to upper 32 bits if lower 32 bits are known (PR #181238)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][ISel] Reduce 64-bit `setcc` to upper 32 bits if lower 32 bits are known (PR #181238)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][ISel] Reduce 64-bit `setcc` to upper 32 bits if lower 32 bits are known (PR #181238)   Jay Foad via llvm-commits
• [llvm] [PowerPC] Fix duplicate RUN lines in tests (PR #182275)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make Waitcnt members private (PR #180772)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make Waitcnt members private (PR #180772)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make Waitcnt members private (PR #180772)   Jay Foad via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Jay Foad via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Jay Foad via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Jay Foad via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Test hazard-getreg-waitalu.mir on gfx13 (PR #183007)   Jay Foad via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Jay Foad via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Jay Foad via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Jay Foad via llvm-commits
• [llvm] [MISched] Advance HazardRec past stalls before calling EmitInstruction (PR #182977)   Jay Foad via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (PR #180654)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove slow VOPD assert (PR #183166)   Jay Foad via llvm-commits
• [llvm] ValueTracking/AMDGPU: handle mbcnt in computeKnownBitsFromOperator (PR #183229)   Jay Foad via llvm-commits
• [llvm] ValueTracking/AMDGPU: handle mbcnt in computeKnownBitsFromOperator (PR #183229)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Ignore unused VALU src0/1/2 fields when disassembling (PR #175182)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Ignore unused VALU src0/1/2 fields when disassembling (PR #175182)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Address post-commit comments for #180864 (PR #183232)   Jay Foad via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix encoding of inline constants in v_fma_mix_f32_bf16 (PR #183487)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix encoding of inline constants in v_fma_mix_f32_bf16 (PR #183487)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix encoding of inline constants in v_fma_mix_f32_bf16 (PR #183487)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix encoding of inline constants in v_fma_mix_f32_bf16 (PR #183487)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix encoding of inline constants in v_fma_mix_f32_bf16 (PR #183487)   Jay Foad via llvm-commits
• [llvm] AMDGPU: llvm.amdgcn.trig.preop cannot return negative values (PR #183306)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add VINTERP encoding to gfx13 (PR #182481)   Jay Foad via llvm-commits
• [llvm] AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (PR #183483)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix typo in test file name. NFC. (PR #183570)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix typo in test file name. NFC. (PR #183570)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Handle GFX1250 hazards between WMMA and VOPD (PR #183573)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Handle GFX1250 hazards between WMMA and VOPD (PR #183573)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix typo in test file name. NFC. (PR #183570)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Handle GFX1250 hazards between WMMA and VOPD (PR #183573)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Handle GFX1250 hazards between WMMA and VOPD (PR #183573)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Handle GFX1250 hazards between WMMA and VOPD (PR #183573)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Handle GFX1250 hazards between WMMA and VOPD (PR #183573)   Jay Foad via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] AMDGPUIGroupLP: Avoid repeating reachability checks in greedy algorithm (PR #182463)   Jeffrey Byrnes via llvm-commits
• [lld] [LLD][ELF][RISCV] Support big-endian RISC-V linking (PR #180912)   Jessica Clarke via llvm-commits
• [llvm] [unittests][Support] Fix FileSystemTest for BSD semantics (PR #181487)   Jessica Clarke via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add riscv64 support (PR #180670)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   Jessica Clarke via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   Jessica Clarke via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   Jessica Clarke via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   Jessica Clarke via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add riscv64 support (PR #180670)   Jessica Clarke via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for RISC-V (PR #181332)   Jessica Clarke via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add riscv64 support (PR #180670)   Jessica Clarke via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Jianjian Guan via llvm-commits
• [llvm] [M68k] Update llvm/test/CodeGen/M68k/pipeline.ll (PR #182809)   Jim Lin via llvm-commits
• [llvm] [profcheck] Fix profile metadata propagation for Large FP Operations (PR #175864)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata propagation for Large FP Operations (PR #175864)   Jin Huang via llvm-commits
• [llvm] [profcheck] Expose likely/unlikely weights as constants in MDBuilder (PR #183252)   Jin Huang via llvm-commits
• [llvm] [profcheck] Expose likely/unlikely weights as constants in MDBuilder (PR #183252)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata propagation for Large FP Operations (PR #175864)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata propagation for Large FP Operations (PR #175864)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata propagation for Large FP Operations (PR #175864)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata propagation for Large FP Operations (PR #175864)   Jin Huang via llvm-commits
• [llvm] [BOLT][perf2bolt] Support multiple perf data inputs (PR #178202)   Jinjie Huang via llvm-commits
• [llvm] [NFC][IR] Fix MSVC C4706 diagnostic w/ 741b2cda32e1 (PR #182682)   Jinsong Ji via llvm-commits
• [llvm] [NFC][IR] Fix MSVC C4706 diagnostic w/ 741b2cda32e1 (PR #182682)   Jinsong Ji via llvm-commits
• [llvm] [AMDGPU] Remove slow VOPD assert (PR #183166)   Joe Nash via llvm-commits
• [llvm] [LoopUnroll][NFC] Record conditional latch info (PR #182403)   Joel E. Denny via llvm-commits
• [llvm] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   Johannes de Fine Licht via llvm-commits
• [llvm] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   Johannes de Fine Licht via llvm-commits
• [llvm] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   Johannes de Fine Licht via llvm-commits
• [clang] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   Johannes de Fine Licht via llvm-commits
• [clang] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   Johannes de Fine Licht via llvm-commits
• [clang] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   Johannes de Fine Licht via llvm-commits
• [lld] [llvm] [CMake] Use keyword signature in two additional callsites (PR #183889)   Johannes de Fine Licht via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Jonas Devlieghere via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Jonas Devlieghere via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Jonas Devlieghere via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Jonas Devlieghere via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Jonas Devlieghere via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Jonas Devlieghere via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Jonas Devlieghere via llvm-commits
• [llvm] [SystemZ] Allow folding from another MBB in foldMemoryOperandImpl(). (PR #182921)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Allow folding from another MBB in foldMemoryOperandImpl(). (PR #182921)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] Fix more typos (NFC) (PR #183086)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [Clang][Hexagon] Add QURT as recognized OS in target triple (PR #183622)   Jonathan Thackray via llvm-commits
• [llvm] [bazel][Clang][AMDGPU][Docs] Port e6f30334de720b0473f1d797c008ccf74fb300b8 (PR #182925)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc][math] Fix fmul->mul for bf16mul family (#182018) (PR #183112)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc][math] Fix fmul->mul for bf16mul family (#182018) (PR #183112)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Add some deps for layering_check (PR #183235)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Add some deps for layering_check (PR #183235)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel][libc] Add some deps for layering_check (PR #183235)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Fix build format (PR #183322)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Fix build format (PR #183322)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Fix build format (PR #183322)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Enable `parse_headers` for llvm/BUILD.bazel (PR #183680)   Jordan Rupprecht via llvm-commits
• [llvm] [Offload] Fix copy-elision warning (PR #182848)   Joseph Huber via llvm-commits
• [libc] [llvm] [LLVM] Port 'llvm-gpu-loader' to use LLVMOffload (PR #162739)   Joseph Huber via llvm-commits
• [llvm] 6738c46 - [LLVM] Add missing binary format dependency to llvm-gpu-loader   Joseph Huber via llvm-commits
• [llvm] 170a99d - [LLVM] Fix accidentally included POSIX header on Windows   Joseph Huber via llvm-commits
• [llvm] [flang-rt] Get rid of cyclic call chain in ChildIo. (PR #183369)   Joseph Huber via llvm-commits
• [clang] [llvm] [Clang] Enable response file support for 'llvm-offload-binary' (PR #183548)   Joseph Huber via llvm-commits
• [clang] [llvm] [Clang] Enable response file support for 'llvm-offload-binary' (PR #183548)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Joseph Huber via llvm-commits
• [llvm] [LLVM][Runtimes] Add 'llvm-gpu-loader' to dependency list (PR #183601)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Remove experiemental OpenMP offloading support (PR #183653)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Joseph Huber via llvm-commits
• [llvm] [DirectX][ResourceAccess] Resolve resource handles at access (PR #182106)   Joshua Batista via llvm-commits
• [llvm] [DirectX][ResourceAccess] Resolve resource handles at access (PR #182106)   Joshua Batista via llvm-commits
• [llvm] [DirectX][ResourceAccess] Resolve resource handles at access (PR #182106)   Joshua Batista via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   Joshua Seaton via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Stop emitting FPRoundingMode for arithmetic constrained intrinsics (PR #182742)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][AMD] Reenable `SPV_KHR_float_control2` for AMD flavored SPIRV (PR #182873)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][NFC] Update tests to check `spirv-val` output (PR #182549)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Stop emitting FPRoundingMode for arithmetic constrained intrinsics (PR #182742)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Simplify `selectPhi` (PR #183060)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Simplify `selectPhi` (PR #183060)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Simplify `selectPhi` and remove unreachable code (PR #183060)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Enable SPV_EXT_relaxed_printf_string_address_space by default for Intel (PR #183103)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Enable SPV_EXT_relaxed_printf_string_address_space by default for Intel (PR #183103)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][NFC] Update tests to check `spirv-val` output (PR #182549)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][AMD] Reenable `SPV_KHR_float_control2` for AMD flavored SPIRV (PR #182873)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][AMD] Reenable `SPV_KHR_float_control2` for AMD flavored SPIRV (PR #182873)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Simplify `selectPhi` and remove unreachable code (PR #183060)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Remove dead code from `SPIRVPostLegalizer.cpp` (PR #183585)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][Scheduler] Add `GCNRegPressure`-based methods to `GCNRPTarget` (PR #182853)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][Scheduler] Add `GCNRegPressure`-based methods to `GCNRPTarget` (PR #182853)   Juan Manuel Martinez Caamaño via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Julian Pokrovsky via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Julian Pokrovsky via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Julian Pokrovsky via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [lld] [llvm] [LIT] Use forward slashes in substitutions when LLVM_WINDOWS_PREFER_FORWARD_SLASH is set (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Justin Bogner via llvm-commits
• [llvm] [LoopUnrollPass] Fix grammar in `LLVM_DEBUG` and Optimization Remarks (PR #182429)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Fix grammar in `LLVM_DEBUG` and Optimization Remarks (PR #182429)   Justin Fargnoli via llvm-commits
• [llvm] [llvm][Verifier] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [llvm][Verifier] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [llvm][Verifier] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Add more LLVM_DEBUG statements (PR #182981)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Add more `LLVM_DEBUG` statements (PR #182981)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Add more `LLVM_DEBUG` statements (PR #182981)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Fix capitalization in `LLVM_DEBUG` (PR #182429)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Ensure we can accept both `llvm.loop.unroll.full` and `llvm.loop.unroll.enable` metadata on the same loop (NFC) (PR #182381)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Enhance the use of Optimization Remarks and `LLVM_DEBUG` (PR #178476)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnroll] Enhance the use of Optimization Remarks and `LLVM_DEBUG` (PR #178476)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Trace loop unroll heuristics with `LLVM_DEBUG` (PR #182981)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Trace loop unroll heuristics with `LLVM_DEBUG` (PR #182981)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Trace loop unroll heuristics with `LLVM_DEBUG` (PR #182981)   Justin Fargnoli via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Kai Nacke via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Kai Nacke via llvm-commits
• [llvm] [HLSL][SPIRV] Fix `faceforward` pattern matcher logic (PR #183630)   Kaitlin Peng via llvm-commits
• [llvm] [NVPTX] Merge consecutive elements while buffering constant vectors with sub-byte datatype. (PR #183628)   Karthik Senthil via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Kavin Gnanapandithan via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Enhance RISCVMoveMerger for GPRPair Moves on RV32 #180831 (PR #182416)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Kavin Gnanapandithan via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Kerry McLaughlin via llvm-commits
• [llvm] [mlir] [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (PR #182325)   Kirill Vedernikov via llvm-commits
• [llvm] [mlir] [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (PR #182325)   Kirill Vedernikov via llvm-commits
• [llvm] [mlir] [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (PR #182325)   Kirill Vedernikov via llvm-commits
• [llvm] [RISCV] Make P imply Zba, Zbb, Zmmul, and Zicsr. (PR #183247)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [AMDGPU] Add more cases to the "this is a wave ID" recognizer (PR #177713)   Krzysztof Drewniak via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   Krzysztof Drewniak via llvm-commits
• [llvm] [Hexagon] Handle subreg copies between DoubleRegs and IntRegs (PR #181360)   Krzysztof Parzyszek via llvm-commits
• [llvm] [Hexagon] Handle subreg copies between DoubleRegs and IntRegs (PR #181360)   Krzysztof Parzyszek via llvm-commits
• [llvm] [Hexagon] Handle subreg copies between DoubleRegs and IntRegs (PR #181360)   Krzysztof Parzyszek via llvm-commits
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• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   LLVM Continuous Integration via llvm-commits
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• [llvm] [ORC] Simplify WaitingOnGraph::Coalescer::remove. (PR #183175)   Lang Hames via llvm-commits
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• [llvm] [orc-rt] Rename ResourceManager detach/shutdown. NFCI. (PR #183285)   Lang Hames via llvm-commits
• [llvm] [AMDGPU] Add -amdgpu-allow-lds-in-non-entry-functions flag (PR #183658)   Larry Meadows via llvm-commits
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• [llvm] [AMDGPU] Add -amdgpu-allow-lds-in-non-entry-functions flag (PR #183658)   Larry Meadows via llvm-commits
• [llvm] [AMDGPU] Add -amdgpu-allow-lds-in-non-entry-functions flag (PR #183658)   Larry Meadows via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand part 2 (PR #180289)   Lei Huang via llvm-commits
• [llvm] [NFC][POWER] add Pre-Commit test case for Inefficient std::bit_floor(x) (PR #183363)   Lei Huang via llvm-commits
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• [llvm] [AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (PR #182808)   Lucas Ramirez via llvm-commits
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• [llvm] [AMDGPU][Scheduler] Add `GCNRegPressure`-based methods to `GCNRPTarget` (PR #182853)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Add `GCNRegPressure`-based methods to `GCNRPTarget` (PR #182853)   Lucas Ramirez via llvm-commits
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• [llvm] [AMDGPU][Scheduler] Fix compilation fail in EXPENSIVE_CHECKS (PR #183745)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix compilation fail in EXPENSIVE_CHECKS (PR #183745)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix compilation fail in EXPENSIVE_CHECKS (PR #183745)   Lucas Ramirez via llvm-commits
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• [llvm] [VPlan] Remove verifyEVLRecipe (PR #182798)   Luke Lau via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove verifyLate from VPlanVerifier. NFC (PR #182799)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove verifyLate from VPlanVerifier. NFC (PR #182799)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove verifyLate from VPlanVerifier. NFC (PR #182799)   Luke Lau via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (PR #182507)   Luke Lau via llvm-commits
• [llvm] [RISCV] Rename RVVConstraint->VS1VS2Constraint. NFC (PR #182688)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle early exit loops with non-dereferenceable loads in latch (PR #172454)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle early exit loops with non-dereferenceable loads in latch (PR #172454)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Luke Lau via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove verifyLate from VPlanVerifier. NFC (PR #182799)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and get verifier passing (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Luke Lau via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Luke Lau via llvm-commits
• [llvm] [DominanceFrontier] Support multiple root nodes for post-dom (PR #181257)   Luke Lau via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Supported conditionally executed single early exits. (PR #182395)   Luke Lau via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Luke Lau via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Luke Lau via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Luke Lau via llvm-commits
• [llvm] [LV] Remove runtime IV overflow checks (PR #183066)   Luke Lau via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   Luke Lau via llvm-commits
• [llvm] Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)" (PR #183014)   Luke Lau via llvm-commits
• [llvm] Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)" (PR #183014)   Luke Lau via llvm-commits
• [llvm] Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)" (PR #183014)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Luke Lau via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Luke Lau via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Luke Lau via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   Luke Lau via llvm-commits
• [llvm] [LV] Remove runtime IV overflow checks (PR #183066)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [LV] Remove runtime IV overflow checks (PR #183066)   Luke Lau via llvm-commits
• [llvm] [LV] Remove runtime IV overflow checks (PR #183066)   Luke Lau via llvm-commits
• [llvm] [LV] Remove CheckNeededWithTailFolding from addMinimumIterationCheck. NFC (PR #183066)   Luke Lau via llvm-commits
• [llvm] [LV] Remove CheckNeededWithTailFolding from addMinimumIterationCheck. NFC (PR #183066)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove unnecessary And before seteq/ne in some cases. (PR #183221)   Luke Lau via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Luke Lau via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Luke Lau via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Luke Lau via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Luke Lau via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Luke Lau via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (PR #181619)   Luke Lau via llvm-commits
• [llvm] [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (PR #181619)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Luke Lau via llvm-commits
• [llvm] [LV] Remove CheckNeededWithTailFolding from addMinimumIterationCheck. NFC (PR #183066)   Luke Lau via llvm-commits
• [llvm] [LV] Remove CheckNeededWithTailFolding from addMinimumIterationCheck. NFC (PR #183066)   Luke Lau via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (PR #181619)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [LangRef] Clarify in vscale_range that vscale is already a power-of-two (PR #183689)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] Revert "[VPlan] Don't drop NUW flag on tail folded canonical IVs (#183301)" (PR #183698)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add nuw to unrolled canonical IVs (PR #183716)   Luke Lau via llvm-commits
• [llvm] [SCEV] Always return true for isKnownToBeAPowerOfTwo for SCEVVScale (PR #183693)   Luke Lau via llvm-commits
• [llvm] [SCEV] Always return true for isKnownToBeAPowerOfTwo for SCEVVScale (PR #183693)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove non-power-of-2 scalable VF comment. NFC (PR #183719)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove non-power-of-2 scalable VF comment. NFC (PR #183719)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Luke Lau via llvm-commits
• [llvm] [LangRef] Clarify in vscale_range that vscale is already a power-of-two (PR #183689)   Luke Lau via llvm-commits
• [llvm] [LangRef] Clarify in vscale_range that vscale is a power-of-two without the attribute (PR #183689)   Luke Lau via llvm-commits
• [llvm] [LangRef] Clarify in vscale_range that vscale is a power-of-two without the attribute (PR #183689)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add nuw to unrolled canonical IVs (PR #183716)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add nuw to unrolled canonical IVs (PR #183716)   Luke Lau via llvm-commits
• [llvm] [LangRef] Clarify in vscale_range that vscale is a power-of-two without the attribute (PR #183689)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add nuw to unrolled canonical IVs (PR #183716)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Luke Lau via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Luke Lau via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] [RISCV][WIP] Better cost shuffles that can be lowered to VRGATHER/VRGATHER/VSLIDEUP (PR #183377)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Luke Lau via llvm-commits
• [llvm] [VPlan] Support arbitrary predicated early exits. (PR #182396)   Luke Lau via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LoopUnroll] Support parallel reductions for minmax (PR #182473)   Madhur Amilkanthwar via llvm-commits
• [llvm] [cmake] Don't pass -no-warn-on-unused-template-args to mlir-src-sharder (PR #183084)   Maksim Levental via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Manuel Carrasco via llvm-commits
• [llvm] [Don't review yet][NFC][SPIRV] Extract helper functions in SPIRVEmitNonSemanticDI (PR #183118)   Manuel Carrasco via llvm-commits
• [llvm] [Don't review yet][NFC][SPIRV] Extract helper functions in SPIRVEmitNonSemanticDI (PR #183118)   Manuel Carrasco via llvm-commits
• [llvm] [Don't review yet][NFC][SPIRV] Extract helper functions in SPIRVEmitNonSemanticDI (PR #183118)   Manuel Carrasco via llvm-commits
• [llvm] [Don't review yet][NFC][SPIRV] Extract helper functions in SPIRVEmitNonSemanticDI (PR #183118)   Manuel Carrasco via llvm-commits
• [llvm] [don't review yet] Users/mgcarrasco/spirv/debug function 2 (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [don't review yet] Users/mgcarrasco/spirv/debug function 2 (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [don't review yet] Users/mgcarrasco/spirv/debug function 2 (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [don't review yet] Users/mgcarrasco/spirv/debug function 2 (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [don't review yet] Users/mgcarrasco/spirv/debug function 2 (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] Required refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [Don't review yet][NFC][SPIRV] Extract helper functions in SPIRVEmitNonSemanticDI (PR #183118)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Simplify `selectPhi` and remove unreachable code (PR #183060)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][AMD] Reenable `SPV_KHR_float_control2` for AMD flavored SPIRV (PR #182873)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with poison size using poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [NFC][SPIRV] Remove dead code from `SPIRVPostLegalizer.cpp` (PR #183585)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Manuel Carrasco via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Manuel Dun via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV][NFC] Update tests to check `spirv-val` output (PR #182549)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV][AMD] Reenable `SPV_KHR_float_control2` for AMD flavored SPIRV (PR #182873)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #183567)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Marcos Maronas via llvm-commits
• [compiler-rt] [compiler-rt] fix __sanitizer::struct_sock_fprog_sz availability (PR #183411)   Marian Buschsieweke via llvm-commits
• [llvm] [AMDGPU] Add VOPC to gfx13 (PR #182293)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VOPC to gfx13 (PR #182293)   Mariusz Sikora via llvm-commits
• [llvm] AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (PR #183483)   Mariusz Sikora via llvm-commits
• [llvm] AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (PR #183483)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Add VINTERP encoding to gfx13 (PR #182481)   Mariusz Sikora via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Mariusz Sikora via llvm-commits
• [llvm] build: alter condition for adding `_DEBUG` CPP macro (PR #183120)   Martin Storsjö via llvm-commits
• [llvm] build: alter condition for adding `_DEBUG` CPP macro (PR #183120)   Martin Storsjö via llvm-commits
• [compiler-rt] builtins: adjust the FP80 enablement check (PR #183647)   Martin Storsjö via llvm-commits
• [compiler-rt] builtins: adjust FP80 source management (PR #183871)   Martin Storsjö via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Matheus Izvekov via llvm-commits
• [clang] [llvm] [WIP] ABI Lowering Library (PR #140112)   Matheus Izvekov via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add VOPD to gfx13 (PR #182815)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Implement TypesAreContradictory for non-simple ValueTypeByHwMode. (PR #182765)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Improved handling of ISD::ROTL and ISD::ROTR in isKnownToBeAPowerOfTwo (PR #182744)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (PR #182811)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (PR #182811)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add VOP2 to gfx13 (PR #182812)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add VOP2 to gfx13 (PR #182812)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove AMDGPUArgumentUsageInfo pass (PR #182490)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Do not infer top down on functions with no uses (PR #182839)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Do not infer top down on functions with no uses (PR #182839)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Do not infer top down on functions with no uses (PR #182839)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Do not infer top down on functions with no uses (PR #182839)   Matt Arsenault via llvm-commits
• [llvm] DAG: Replace legal type check in EmitCopyFromReg (PR #177788)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPUCtorDtorLowering] Remove unnecessary pointer arithmetic (PR #182869)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove target feature `DumpCodeLower` (PR #176960)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove `FeaturePromoteAlloca` (PR #177636)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Matt Arsenault via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Matt Arsenault via llvm-commits
• [llvm] [TableGen][CodeGen][NFC] Add ImplicitRegByHwMode infrastructure (PR #182866)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove `FeaturePromoteAlloca` (PR #177636)   Matt Arsenault via llvm-commits
• [llvm] [TableGen][CodeGen][NFC] Add ImplicitRegByHwMode infrastructure (PR #182866)   Matt Arsenault via llvm-commits
• [llvm] [TableGen][CodeGen][NFC] Add ImplicitRegByHwMode infrastructure (PR #182866)   Matt Arsenault via llvm-commits
• [llvm] Reapply "RuntimeLibcalls: Fix adding __safestack_pointer_address by default" (#182949) (PR #183005)   Matt Arsenault via llvm-commits
• [llvm] Reapply "RuntimeLibcalls: Fix adding __safestack_pointer_address by default" (#182949) (PR #183005)   Matt Arsenault via llvm-commits
• [llvm] Reapply "RuntimeLibcalls: Fix adding __safestack_pointer_address by default" (#182949) (PR #183005)   Matt Arsenault via llvm-commits
• [llvm] ea6fee0 - SafeStack: Add missing lit.local.cfg to SPARC subdirectory   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Matt Arsenault via llvm-commits
• [llvm] [llvm][AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Matt Arsenault via llvm-commits
• [llvm] [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (PR #183032)   Matt Arsenault via llvm-commits
• [llvm] [NFCI] Make all SI_KILL* convergent (PR #183100)   Matt Arsenault via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   Matt Arsenault via llvm-commits
• [llvm] [MISched] Advance HazardRec past stalls before calling EmitInstruction (PR #182977)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyLibCalls] Avoid simplifying pow(x, 2.0) -> x * x with math-errno. (PR #183099)   Matt Arsenault via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [llvm] llvm: Delete bugpoint (PR #182320)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Address post-commit comments for #180864 (PR #183232)   Matt Arsenault via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Matt Arsenault via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Matt Arsenault via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Matt Arsenault via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Matt Arsenault via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   Matt Arsenault via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   Matt Arsenault via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   Matt Arsenault via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   Matt Arsenault via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel: Make CombinerInfo const (PR #183263)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel: Make CombinerInfo const (PR #183263)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel: Make CombinerInfo const (PR #183263)   Matt Arsenault via llvm-commits
• [llvm] [GISel][X86] port X86PreLegalizerCombiner to npm (PR #182638)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel: Make CombinerInfo const (PR #183263)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Replace getAllocatedType with getAllocationSize in PromoteAlloca (PR #179523)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove target feature `DumpCodeLower` (PR #176960)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (PR #182811)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add VFLAT, VGLOBAL, VSCRATCH to gfx13 (PR #182811)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   Matt Arsenault via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] WaitEventSet const_iterator (PR #182965)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] WaitEventSet const_iterator (PR #182965)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Propagate nofpclass from callsite arguments (PR #183277)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Propagate nofpclass from callsite arguments (PR #183277)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Propagate nofpclass from callsite arguments (PR #183277)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Fix duplicate enum definitions in register class intersections (PR #183139)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: llvm.amdgcn.trig.preop cannot return negative values (PR #183306)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: llvm.amdgcn.trig.preop cannot return negative values (PR #183306)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: llvm.amdgcn.trig.preop cannot return negative values (PR #183306)   Matt Arsenault via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Matt Arsenault via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Implement expansion for f64 exp (PR #182539)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Remove NoNaNsFPMath uses (PR #183045)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking/AMDGPU: handle mbcnt in computeKnownBitsFromOperator (PR #183229)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Remove NoNaNsFPMath uses (PR #183045)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Change error messages to follow phrasing guidance (PR #183488)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Change error messages to follow phrasing guidance (PR #183488)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Change error messages to follow phrasing guidance (PR #183488)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Change error messages to follow phrasing guidance (PR #183488)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   Matt Arsenault via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Matt Arsenault via llvm-commits
• [llvm] CodeGen: Change error messages to follow phrasing guidance (PR #183488)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add attribute for FWD_PROGRESS (PR #181675)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add attribute for FWD_PROGRESS (PR #181675)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (PR #183483)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (PR #183483)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (PR #183270)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Propagate nofpclass from callsite arguments (PR #183277)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Propagate nofpclass from callsite arguments (PR #183277)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid calling identifyDefaultAbstractAttributes on declarations (PR #182663)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: llvm.amdgcn.trig.preop cannot return negative values (PR #183306)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop checking for r600 in printf pass (PR #183536)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop checking for r600 in printf pass (PR #183536)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop checking for r600 in printf pass (PR #183536)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop checking for r600 in printf pass (PR #183536)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Matt Arsenault via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #182673)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Remove `NoNaNsFPMath` uses (PR #183449)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass that multiply by <= 1 cannot overflow (PR #183159)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Stop checking for r600 in printf pass (PR #183536)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass that multiply by <= 1 cannot overflow (PR #183159)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Special case fmul by llvm.amdgcn.trig.preop (PR #183373)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Improve fsqrt f64 expansion with ninf (PR #183695)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SSP] Add llvm.ssp.protected intrinsic for QualType-based stack protection (PR #183623)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NFC] Add virtual prefix to GCN LiveRegs and Pressure. (PR #183673)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking/AMDGPU: handle mbcnt in computeKnownBitsFromOperator (PR #183229)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISel] Replace buildInstr with BuildMI (PR #183714)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove unused CmpLGOp instruction (PR #180195)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add -amdgpu-allow-lds-in-non-entry-functions flag (PR #183658)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add -amdgpu-allow-lds-in-non-entry-functions flag (PR #183658)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] `G_ADD` legalization & selection (PR #183694)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] `G_ADD` legalization & selection (PR #183694)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] `G_ADD` legalization & selection (PR #183694)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] `G_ADD` legalization & selection (PR #183694)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   Matt Arsenault via llvm-commits
• [llvm] [TTI] Remove TargetLibraryInfo from IntrinsicCostAttributes (NFC) (PR #183764)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Matt Arsenault via llvm-commits
• [llvm] [RISCV][GISel] Replace buildInstr with BuildMI (PR #183714)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Matt Arsenault via llvm-commits
• [llvm] [CodeGenPrepare] Update CodeGenPrepare::tryToSinkFreeOperands() to avoid duplicating instructions when sinking (PR #181037)   Matt Arsenault via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Matt Arsenault via llvm-commits
• [llvm] Revert "[InstCombine] Support DemandElts in SimplifyDemandedFPClass" (PR #174242)   Matt Arsenault via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   Matt Arsenault via llvm-commits
• [llvm] Reapply "[ValueTracking] Propagate sign information out of loop" (PR #182512)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Stop applying nofpclass from use nofpclass attribute (PR #183835)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Stop applying nofpclass from use nofpclass attribute (PR #183835)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add early LDS resource check before register allocation (PR #183888)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Matthew Devereau via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Matthew Devereau via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Matthew Devereau via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Matthew Devereau via llvm-commits
• [compiler-rt] [TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (PR #183310)   Matthew Nagy via llvm-commits
• [compiler-rt] [TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (PR #183310)   Matthew Nagy via llvm-commits
• [compiler-rt] [TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (PR #183310)   Matthew Nagy via llvm-commits
• [compiler-rt] [TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (PR #183310)   Matthew Nagy via llvm-commits
• [compiler-rt] [TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (PR #183310)   Matthew Nagy via llvm-commits
• [compiler-rt] [TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (PR #183310)   Matthew Nagy via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Mehdi Amini via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   Mehdi Amini via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [IVDescriptors] Remove function FMF attribute check for FP min/max reduction (PR #183523)   Mel Chen via llvm-commits
• [llvm] [IVDescriptors] Remove function FMF attribute check for FP min/max reduction (PR #183523)   Mel Chen via llvm-commits
• [llvm] [VPlan] Remove unused VPExpandSCEVRecipe before expansion (PR #181329)   Mel Chen via llvm-commits
• [llvm] [LLVM] [SeparateConstOffsetFromGEP] Fix sep-const-offset-from-gep invalid assumption (PR #183402)   Meredith Julian via llvm-commits
• [llvm] [LLVM] [SeparateConstOffsetFromGEP] Fix sep-const-offset-from-gep invalid assumption (PR #183402)   Meredith Julian via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Michael Buch via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   Michael Buch via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Bump DWARFListTable maximum DWARF version (PR #183859)   Michael Buch via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Bump DWARFContext maximum DWARF version (PR #183838)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Bump DWARFDebugLine maximum DWARF version (PR #183841)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Bump DWARFListTable maximum DWARF version (PR #183859)   Michael Buch via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   Michael Buch via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   Michael Buch via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   Michael Buch via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Emit DW_LNAME_Assembly for DWARFv6 assembly CUs (PR #183897)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Emit DW_LNAME_Assembly for DWARFv6 assembly CUs (PR #183897)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Emit DW_LNAME_Assembly for DWARFv6 assembly CUs (PR #183897)   Michael Buch via llvm-commits
• [llvm] [llvm][DebugInfo] Emit DW_LNAME_Assembly for DWARFv6 assembly CUs (PR #183897)   Michael Buch via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Michael Kruse via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Michael Kruse via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Michael Kruse via llvm-commits
• [llvm] [LLVM][Runtimes] Add 'llvm-gpu-loader' to dependency list (PR #183601)   Michael Kruse via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Michael Kruse via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Michael Kruse via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Michal Paszkowski via llvm-commits
• [llvm] [Windows] Adjust exported symbols to filter out dumpColor and printPretty (PR #182964)   Michal Paszkowski via llvm-commits
• [llvm] [Windows] Adjust exported symbols to filter out profile symbols (PR #167985)   Michal Paszkowski via llvm-commits
• [llvm] [Windows] Don't hide Type::getAs symbols (PR #182966)   Michal Paszkowski via llvm-commits
• [llvm] [tools] llvm-advisor: LLVM compiler visualization tool for offloading (PR #147451)   Miguel Cárdenas via llvm-commits
• [llvm] [tools] llvm-advisor: LLVM compiler visualization tool for offloading (PR #147451)   Miguel Cárdenas via llvm-commits
• [llvm] [tools] llvm-advisor: LLVM compiler visualization tool for offloading (PR #147451)   Miguel Cárdenas via llvm-commits
• [llvm] [tools] llvm-advisor: LLVM compiler visualization tool for offloading (PR #147451)   Miguel Cárdenas via llvm-commits
• [llvm] [tools] llvm-advisor: LLVM compiler visualization tool for offloading (PR #147451)   Miguel Cárdenas via llvm-commits
• [llvm] [tools] llvm-advisor: LLVM compiler visualization tool for offloading (PR #147451)   Miguel Cárdenas via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Mikael Holmen via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Mikael Holmen via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Mikael Holmen via llvm-commits
• [llvm] [SLP]Enable Sub as a base instruction in copyables (PR #163231)   Mikael Holmen via llvm-commits
• [llvm] [Windows] Adjust exported symbols to filter out dumpColor and printPr… (PR #182964)   Mike Hommey via llvm-commits
• [llvm] [CodeGen] Don't merge stack slots accessed with volatile after setjmp (returns twice) calls (PR #181370)   Mikołaj Piróg via llvm-commits
• [llvm] Add remaining patterns for floating-point flag matches (PR #173912)   Mikołaj Piróg via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Mikołaj Piróg via llvm-commits
• [llvm] Add remaining patterns for floating-point flag matches (PR #173912)   Mikołaj Piróg via llvm-commits
• [llvm] Add remaining patterns for floating-point flag matches (PR #173912)   Mikołaj Piróg via llvm-commits
• [llvm] [RISCV] Remove extra ReadSFBALU from SFBNDS_BFO. (PR #182900)   Min-Yih Hsu via llvm-commits
• [llvm] [ADT] Add StringRef::rfind_if/rfind_if_not (PR #182928)   Min-Yih Hsu via llvm-commits
• [llvm] [ADT] Add StringRef::rfind_if/rfind_if_not (PR #182928)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Min-Yih Hsu via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   Min-Yih Hsu via llvm-commits
• [llvm] [SlotIndexes] Further pack indices to improve spill placement time (PR #182640)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Document some of the names we require for getNamedOperandIdx. NFC (PR #182687)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update Andes45 vector reduction scheduling info (PR #182980)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update Andes45 vector reduction scheduling info (PR #182980)   Min-Yih Hsu via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add arm support (PR #180674)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add riscv64 support (PR #180670)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
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• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   Minsoo Choo via llvm-commits
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• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add ppc64le support (PR #180669)   Minsoo Choo via llvm-commits
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• [clang] [llvm] [AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (PR #182107)   Mirko Brkušanin via llvm-commits
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• [clang] [llvm] [AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (PR #182107)   Mirko Brkušanin via llvm-commits
• [llvm] [NVPTX] Support lowering of `(l)lround` (PR #183901)   Mitch Briles via llvm-commits
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• [clang] [clang-tools-extra] [compiler-rt] [flang] [libc] [libclc] [lldb] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   Mohamed Emad via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [flang] [libc] [libclc] [lldb] [llvm] [libc][math] Refactor bf16mul family to header-only (PR #182018)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor floor family to header-only (PR #182194)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor floor family to header-only (PR #182194)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor floor family to header-only (PR #182194)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16sub family to header-only (PR #182115)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor floor family to header-only (PR #182194)   Mohamed Emad via llvm-commits
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• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Mohamed Emad via llvm-commits
• [compiler-rt] [compiler-rt][build] option to warn about unlisted builtins (PR #183959)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrti to header-only (PR #177960)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor setpayload family to header-only (PR #182922)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor setpayload family to header-only (PR #182922)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor setpayloadsig family to header-only (PR #183113)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor setpayloadsig family to header-only (PR #183113)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor atanpif16 to Header Only. (PR #179158)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor fdim family to header-only (PR #182190)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor float16 operations to header-only (PR #181745)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor floor family to header-only (PR #182194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor floor family to header-only (PR #182194)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] implement `asinpif` function (PR #181511)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #178750)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor atanpif16 to Header Only. (PR #179158)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextafter family to header-only (PR #181673)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextafter family to header-only (PR #181673)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16sub family to header-only (PR #182115)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor floor family to header-only (PR #182194)   Muhammad Bassiouni via llvm-commits
• [llvm] Restore #125407, Make covmap tolerant of nested Decisions (PR #183073)   NAKAMURA Takumi via llvm-commits
• [llvm] Restore #125407, Make covmap tolerant of nested Decisions (PR #183073)   NAKAMURA Takumi via llvm-commits
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• [llvm] Restore #125407, Make covmap tolerant of nested Decisions (PR #183073)   NAKAMURA Takumi via llvm-commits
• [llvm] Revert "[MC/DC] Make covmap tolerant of nested Decisions (#125407)" (PR #181069)   NAKAMURA Takumi via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
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• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
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• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Nashe Mncube via llvm-commits
• [llvm] [ARM][MVE] Add SLI and SRI recognition. (PR #183471)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Nashe Mncube via llvm-commits
• [llvm] [NFC][AArch64] Refactor Arm llvm-mca tests (PR #183294)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [clang] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   Nathan Chancellor via llvm-commits
• [llvm] [SPIRV] Implement Gather and GatherCmp intrinsics (PR #182578)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Implement Gather and GatherCmp intrinsics (PR #182578)   Nathan Gauër via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Nathan Gauër via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Nathan Gauër via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Nathan Gauër via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Nathan Gauër via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Nathan Gauër via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Nathan Gauër via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Nathan Gauër via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Nathan Gauër via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Nathan Gauër via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Nathan Gauër via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   Nathan Gauër via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Nathan Gauër via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Nathan Gauër via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Nathan Gauër via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   Nathan Gauër via llvm-commits
• [llvm] [InstCombine] Decompose icmp over min/max intrinsics when compared with a constant (PR #182461)   Nathiyaa Sengodan via llvm-commits
• [llvm] [libsycl] Fix for static vars deinit order (libsycl vs liboffload) (PR #181366)   Nick Sarnie via llvm-commits
• [clang] [llvm] [Offload][clang-linker-wrapper][SPIRV] Tell spirv-link to not optimize out exported symbols (PR #182930)   Nick Sarnie via llvm-commits
• [clang] [llvm] [Offload][clang-linker-wrapper][SPIRV] Tell spirv-link to not optimize out exported symbols (PR #182930)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Fix for static vars deinit order (libsycl vs liboffload) (PR #181366)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Fix build after global dtor change (PR #183077)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Fix build after global dtor change (PR #183077)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Fix build after global dtor change (PR #183077)   Nick Sarnie via llvm-commits
• [llvm] [libsycl] Fix build after global dtor change (PR #183077)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Enable SPV_EXT_relaxed_printf_string_address_space by default for Intel (PR #183103)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Enable SPV_EXT_relaxed_printf_string_address_space by default for Intel (PR #183103)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Enable SPV_EXT_relaxed_printf_string_address_space by default for Intel (PR #183103)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Enable SPV_EXT_relaxed_printf_string_address_space by default for Intel (PR #183103)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix legalization of zero-size external global (PR #183130)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #183567)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #183567)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #183567)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #183567)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #183567)   Nick Sarnie via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   Nick Sarnie via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   Nick Sarnie via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   Nick Sarnie via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #183567)   Nick Sarnie via llvm-commits
• [llvm] Revert "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions" (PR #183774)   Nick Sarnie via llvm-commits
• [llvm] Revert "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions" (PR #183774)   Nick Sarnie via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   Nick Sarnie via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   Nick Sarnie via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   Nick Sarnie via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   Nick Sarnie via llvm-commits
• [llvm] dc2ec04 - [gn] port 3490d28c8cab   Nico Weber via llvm-commits
• [llvm] [pdb] Fix libc++ strict-weak-ordering assertion failures from gsiRecordCmp (PR #183749)   Nico Weber via llvm-commits
• [llvm] [CodeGen] Remove legacy getTgtMemIntrinsic overload (PR #175846)   Nicolai Hähnle via llvm-commits
• [llvm] [CodeGen] Remove legacy getTgtMemIntrinsic overload (PR #175846)   Nicolai Hähnle via llvm-commits
• [llvm] AMDGPU: Cleanup the handling of flags in getTgtMemIntrinsic (PR #179469)   Nicolai Hähnle via llvm-commits
• [llvm] [InstCombine] Only ignore first zero index during GEP canonicalization (PR #180764)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Only ignore first zero index during GEP canonicalization (PR #180764)   Nikita Popov via llvm-commits
• [llvm] [M68k] Update llvm/test/CodeGen/M68k/pipeline.ll (PR #182809)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Only ignore first zero index during GEP canonicalization (PR #180764)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [lld] 3fc9018 - Revert "CodeGen: Emit .prefalign directives based on the prefalign attribute."   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] CodeGen: Emit .prefalign directives based on the prefalign attribute. (PR #155529)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Restrict foldICmpOfVectorReduce to one-use (PR #182833)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Restrict foldICmpOfVectorReduce to one-use (PR #182833)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Restrict foldICmpOfVectorReduce to one-use (PR #182833)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Restrict foldICmpOfVectorReduce to one-use (PR #182833)   Nikita Popov via llvm-commits
• [llvm] FunctionAttrs: Basic propagation of nofpclass (PR #182444)   Nikita Popov via llvm-commits
• [llvm] FunctionAttrs: Do not infer top down on functions with no uses (PR #182839)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Nikita Popov via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Nikita Popov via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Nikita Popov via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Nikita Popov via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Nikita Popov via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] remove misleading arrow operator (PR #182435)   Nikita Popov via llvm-commits
• [llvm] [AMDGPUCtorDtorLowering] Remove unnecessary pointer arithmetic (PR #182869)   Nikita Popov via llvm-commits
• [llvm] [UTC] Add utility script to deal with conflicting RUN lines (PR #182546)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Nikita Popov via llvm-commits
• [llvm] [AMDGPUCtorDtorLowering] Remove unnecessary pointer arithmetic (PR #182869)   Nikita Popov via llvm-commits
• [llvm] [AMDGPUCtorDtorLowering] Remove unnecessary pointer arithmetic (PR #182869)   Nikita Popov via llvm-commits
• [llvm] [AMDGPUCtorDtorLowering] Remove unnecessary pointer arithmetic (PR #182869)   Nikita Popov via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Nikita Popov via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Respect AllowNonDeterministic when flushing denormals (PR #183031)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify nsz semantics (PR #180906)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Nikita Popov via llvm-commits
• [llvm] [LICM] Handle disjoint or's in hoistAdd (PR #182915)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Nikita Popov via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Make validLookupTableConstant explicitly reject vector types. (PR #182555)   Nikita Popov via llvm-commits
• [llvm] [DSE] Introduce `eliminateRedundantStoresViaDominatingConditions` (PR #181709)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [IR] Specify alloca with poison element count (PR #183072)   Nikita Popov via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Allow switch-to-table for some vector constants. (PR #183057)   Nikita Popov via llvm-commits
• [llvm] [IR] Specify alloca with poison element count (PR #183072)   Nikita Popov via llvm-commits
• [llvm] [IR] Specify alloca with poison element count (PR #183072)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] impliesPoison(V, Cond ? V : V) = true (PR #183059)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Nikita Popov via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Nikita Popov via llvm-commits
• [llvm] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   Nikita Popov via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Nikita Popov via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use byte offsets and ptradd in ShadowStackGCLowering (PR #178436)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use byte offsets and ptradd in ShadowStackGCLowering (PR #178436)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use byte offsets and ptradd in ShadowStackGCLowering (PR #178436)   Nikita Popov via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Nikita Popov via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #182673)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [LoopInfo] Preserve profile information in makeLoopInvariant (PR #174171)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Add tests for ShadowStackGCLowering IR pass (PR #183167)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Add tests for ShadowStackGCLowering IR pass (PR #183167)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Add tests for ShadowStackGCLowering IR pass (PR #183167)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Document transformation that leads to invalid IR. (PR #182919)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Nikita Popov via llvm-commits
• [llvm] [Inline] Accumulate the cost of the inlined function to the new callsite (PR #111104)   Nikita Popov via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Use byte offsets and ptradd in ShadowStackGCLowering (PR #178436)   Nikita Popov via llvm-commits
• [clang] [llvm] [Coroutines] Replace struct alloca frame with byte array and ptradd (PR #178359)   Nikita Popov via llvm-commits
• [llvm] [LLVM][ExecutionEngine] Add vector ConstantInt/FP support to getConstantValue(). (PR #182538)   Nikita Popov via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Nikita Popov via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Nikita Popov via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Nikita Popov via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Nikita Popov via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Nikita Popov via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Nikita Popov via llvm-commits
• [llvm] [MemorySSA] Make `getBlockDefs` return non-const, drop `getWritableBlockDefs` (NFC) (PR #183479)   Nikita Popov via llvm-commits
• [llvm] [MemorySSA] Make `getBlockDefs` return non-const, drop `getWritableBlockDefs` (NFC) (PR #183479)   Nikita Popov via llvm-commits
• [llvm] [MemorySSA] Make `getBlockDefs` and `getBlockAccesses` return a non-const list (NFC) (PR #183479)   Nikita Popov via llvm-commits
• [llvm] Add remaining patterns for floating-point flag matches (PR #173912)   Nikita Popov via llvm-commits
• [llvm] Add remaining patterns for floating-point flag matches (PR #173912)   Nikita Popov via llvm-commits
• [llvm] Add remaining patterns for floating-point flag matches (PR #173912)   Nikita Popov via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI) (WIP). (PR #91961)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Always return true for isKnownToBeAPowerOfTwo for SCEVVScale (PR #183693)   Nikita Popov via llvm-commits
• [clang] [llvm] [SSP] Add llvm.ssp.protected intrinsic for QualType-based stack protection (PR #183623)   Nikita Popov via llvm-commits
• [llvm] [CMake] Stop suppressing specific MSVC warnings when LLVM_ENABLE_WARNINGS is ON (PR #183439)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Replace alloca with undef size with poison instead of null (PR #182919)   Nikita Popov via llvm-commits
• [clang] [llvm] [SSP] Add llvm.ssp.protected intrinsic for QualType-based stack protection (PR #183623)   Nikita Popov via llvm-commits
• [llvm] [CMake] Stop suppressing specific MSVC warnings when LLVM_ENABLE_WARNINGS is ON (PR #183439)   Nikita Popov via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::EXTRACT_VECTOR_ELT handling (PR #183961)   Nikita Popov via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::EXTRACT_VECTOR_ELT handling (PR #183961)   Nikita Popov via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::EXTRACT_VECTOR_ELT handling (PR #183961)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikolas Klauser via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] Adding getFuncNames API to ir2vec python bindings (PR #180473)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Refactoring the ir2vec python bindings testing (PR #180664)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [clang] [lld] [llvm] Support -fpass-plugin + -fthinlto-index together (PR #183525)   Nuri Amari via llvm-commits
• [llvm] Enable all warnings when LLVM_ENABLE_WARNINGS is ON (PR #183439)   Oliver Hunt via llvm-commits
• [llvm] [CMake] Stop suppressing specific MSVC warnings when LLVM_ENABLE_WARNINGS is ON (PR #183439)   Oliver Hunt via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [llvm] [BOLT][BTI] Patch ignored functions in place when targeting them with indirect branches (PR #177165)   Paschalis Mpeis via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add a unittest for compare-and-branch inversion. (PR #181177)   Paschalis Mpeis via llvm-commits
• [compiler-rt] [compiler-rt][common] Only unmap stacks the runtime has actually mapped (PR #179000)   Paul Kirth via llvm-commits
• [compiler-rt] Revert "[ASan][Fuchsia] Have Fuchsia use a dynamic shadow start" (PR #182972)   Paul Kirth via llvm-commits
• [compiler-rt] Revert "[ASan][Fuchsia] Have Fuchsia use a dynamic shadow start" (PR #182972)   Paul Kirth via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   Paul Walker via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   Paul Walker via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   Paul Walker via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Paul Walker via llvm-commits
• [llvm] [LLVM][ConstantFolding] Add vector ConstantInt/FP support to ReadDataFromGlobal. (PR #182530)   Paul Walker via llvm-commits
• [llvm] [LLVM][ValueTracking] Add vector ConstantInt/FP support to isBytewiseValue(). (PR #182519)   Paul Walker via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Allow switch-to-table for some vector constants. (PR #183057)   Paul Walker via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Make validLookupTableConstant explicitly reject vector types. (PR #182555)   Paul Walker via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Paul Walker via llvm-commits
• [llvm] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   Paul Walker via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Paul Walker via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Paul Walker via llvm-commits
• [llvm] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   Paul Walker via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Make validLookupTableConstant explicitly reject vector types. (PR #182555)   Paul Walker via llvm-commits
• [llvm] [mlir] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   Paul Walker via llvm-commits
• [llvm] [mlir] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   Paul Walker via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Paul Walker via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   Paul Walker via llvm-commits
• [llvm] [NFC][CodeGen] Add Register guard to ARMMaterializeFP. (PR #182559)   Paul Walker via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Allow switch-to-table for some vector constants. (PR #183057)   Paul Walker via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Allow switch-to-table for some vector constants. (PR #183057)   Paul Walker via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Paul Walker via llvm-commits
• [llvm] [LLVM][TTI] Remove the isVScaleKnownToBeAPowerOfTwo hook. (PR #183292)   Paul Walker via llvm-commits
• [llvm] [LV] Remove CheckNeededWithTailFolding from addMinimumIterationCheck. NFC (PR #183066)   Paul Walker via llvm-commits
• [llvm] [LLVM][ExecutionEngine] Add vector ConstantInt/FP support to getConstantValue(). (PR #182538)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Paul Walker via llvm-commits
• [llvm] [AArch64][SVE] Handle nxv1i1 INSERT_VECTOR_ELT in DAG lowering (PR #183454)   Paul Walker via llvm-commits
• [llvm] [AArch64][SVE] Handle nxv1i1 INSERT_VECTOR_ELT in DAG lowering (PR #183454)   Paul Walker via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Allow switch-to-table for some vector constants. (PR #183057)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Paul Walker via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Paul Walker via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   Paul Walker via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   Paul Walker via llvm-commits
• [llvm] [LangRef] Clarify in vscale_range that vscale is already a power-of-two (PR #183689)   Paul Walker via llvm-commits
• [llvm] [LLVM][ExecutionEngine] Add vector ConstantInt/FP support to getConstantValue(). (PR #182538)   Paul Walker via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Paul Walker via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   Paul Walker via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Paul Walker via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   Paul Walker via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Paul Walker via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Paul Walker via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Paul Walker via llvm-commits
• [llvm] [AArch64][SVE] Handle nxv1i1 INSERT_VECTOR_ELT in DAG lowering (PR #183454)   Paul Walker via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   Paul Walker via llvm-commits
• [clang] [llvm] [OpenASIP] Update the TCE target defs for OpenASIP 2.2 (PR #176698)   Pekka Jääskeläinen via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (PR #179954)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_PHI (PR #179735)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit test for COPY_SCC_VCC combine (PR #179351)   Petar Avramovic via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Petar Avramovic via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Petar Avramovic via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Petar Avramovic via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries at IR level (PR #180509)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_exp/exp_row (PR #181956)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] GVN: Inhibit PRE for llvm.protected.field.ptr. (PR #182976)   Peter Collingbourne via llvm-commits
• [lld] [llvm] Reland "CodeGen: Emit .prefalign directives based on the prefalign attribute." (PR #182929)   Peter Collingbourne via llvm-commits
• [flang] [llvm] [flang-rt] Add PDT LEN parameter support: Concrete type cache (PR #181008)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang-rt] Add PDT LEN parameter support: Concrete type cache (PR #181008)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang-rt] Add PDT LEN parameter support: Concrete type cache (PR #181008)   Peter Klausler via llvm-commits
• [llvm] [flang-rt] Get rid of cyclic call chain in ChildIo. (PR #183369)   Peter Klausler via llvm-commits
• [llvm] [flang][runtime] Emit "Infinity" rather than "Inf" when required (PR #183359)   Peter Klausler via llvm-commits
• [llvm] [flang][runtime] Emit "Infinity" rather than "Inf" when required (PR #183359)   Peter Klausler via llvm-commits
• [llvm] [flang][runtime] Emit "Infinity" rather than "Inf" when required (PR #183359)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Conditionally fail empty ALLOCATE (PR #182918)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][runtime] Catch asynchronous parent or child I/O (PR #183161)   Peter Klausler via llvm-commits
• [llvm] [flang][runtime] Catch EOSHIFT ARRAY/BOUNDARY type mismatch (PR #183168)   Peter Klausler via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Peter Klausler via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Peter Klausler via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for ARM (PR #182440)   Peter Smith via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Peter Smith via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Peter Smith via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Peter Smith via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Peter Smith via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Peter Smith via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Peter Smith via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Peter Smith via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   Peter Smith via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Peter Smith via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Petr Hosek via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   Petr Hosek via llvm-commits
• [clang] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   Petr Hosek via llvm-commits
• [llvm] [llvm-cov] Support multicall binary (PR #178294)   Petr Hosek via llvm-commits
• [llvm] [Tablegen] Fix condition to report when lanemask overflows (PR #181810)   Petr Vesely via llvm-commits
• [llvm] [RISCV] Better cost shuffles that can be lowered to VRGATHER/VRGATHER/VSLIDEUP (PR #183377)   Philip Reames via llvm-commits
• [llvm] [RISCV] Better cost shuffles that can be lowered to VRGATHER/VRGATHER/VSLIDEUP (PR #183377)   Philip Reames via llvm-commits
• [llvm] [RISCV] Better cost shuffles that can be lowered to VRGATHER/VRGATHER/VSLIDEUP (PR #183377)   Philip Reames via llvm-commits
• [llvm] [X86] getFauxShuffleMask - OR(SHUF(),SHUF()) - treat undemanded elements as undef (PR #182678)   Phoebe Wang via llvm-commits
• [llvm] [X86] Add i256/i512 CTPOP expansion on AVX512VPOPCNTDQ targets (PR #182830)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Phoebe Wang via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   Phoebe Wang via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10] Change MINMAX sign control to select the sign of compare result (PR #183452)   Phoebe Wang via llvm-commits
• [llvm] [X86][AVX10] Change MINMAX sign control to select the sign of compare result (PR #183452)   Phoebe Wang via llvm-commits
• [llvm] [AMX][NFC] Match pseudo name with isa (PR #182235)   Phoebe Wang via llvm-commits
• [llvm] [RFC][X86] Consistently only use SignBitMasks for FABS/FNEG/FCOPYSIGN patterns (PR #183731)   Phoebe Wang via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Phoebe Wang via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Phoebe Wang via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   Piotr Fusik via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   Piotr Fusik via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] [llvm][tools] Stack usage analysis scripts (PR #183399)   Prabhu Rajasekaran via llvm-commits
• [llvm] [llvm][tools] Stack usage analysis scripts (PR #183399)   Prabhu Rajasekaran via llvm-commits
• [llvm] [llvm][tools] Stack usage analysis scripts (PR #183399)   Prabhu Rajasekaran via llvm-commits
• [llvm] [llvm-cov] Support multicall binary (PR #178294)   Prabhu Rajasekaran via llvm-commits
• [llvm] [LLVM][NVPTX] Fix infinite legalization loop in tcgen05.st when debuginfo is enabled (PR #183012)   Pradeep Kumar via llvm-commits
• [llvm] [LLVM][NVPTX] Fix infinite legalization loop in tcgen05.st (PR #183012)   Pradeep Kumar via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   Pranav Bhandarkar via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Pranshu Goyal via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Pranshu Goyal via llvm-commits
• [llvm] [LLVM] [SeparateConstOffsetFromGEP] Fix sep-const-offset-from-gep invalid assumption (PR #183402)   Princeton Ferro via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Princeton Ferro via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Quentin Colombet via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Quentin Colombet via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Quentin Colombet via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Quentin Colombet via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Quentin Colombet via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Rafał Rudnicki via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add asserts for a few register related checks (PR #182680)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][CodeGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][CodeGen] Consolidate sub-register index names into a single string (PR #182651)   Rahul Joshi via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   Rahul Joshi via llvm-commits
• [llvm] [ADT] Add StringRef::rfind_if/rfind_if_not (PR #182928)   Rahul Joshi via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   Rahul Joshi via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   Rahul Joshi via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Rahul Joshi via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Rahul Joshi via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   Rahul Joshi via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   Rahul Joshi via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   Rahul Joshi via llvm-commits
• [llvm] [NFC][CodeGen] Simplify sub-register verification in MIR (PR #181423)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT] Remove indentation of StringRef class (PR #183317)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT] Remove indentation of StringRef class (PR #183317)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Rahul Joshi via llvm-commits
• [llvm] [TableGen] Add a mode for compact register/sub-register names (PR #182531)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT] Remove indentation of StringRef class (PR #183317)   Rahul Joshi via llvm-commits
• [llvm] [NFC][ADT] Remove indentation of StringRef class (PR #183317)   Rahul Joshi via llvm-commits
• [llvm] [cmake] Don't pass -no-warn-on-unused-template-args to mlir-src-sharder (PR #183084)   Rahul Kayaith via llvm-commits
• [llvm] [cmake] Don't pass -no-warn-on-unused-template-args to mlir-src-sharder (PR #183084)   Rahul Kayaith via llvm-commits
• [llvm] TargetLowering: Replace android triple check with libcall check (PR #148800)   Rainer Orth via llvm-commits
• [clang] [compiler-rt] [SafeStack] Allow -fsanitize-minimal-runtime with -fsanitize=safestack (PR #183644)   Rainer Orth via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Ralf Jung via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Ralf Jung via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Ralf Jung via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Ralf Jung via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Mention allocation elision (PR #177592)   Ralf Jung via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [cmake] Add config for riscv(32|64)-unknown-elf (PR #176353)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use bitfield to store Cmp predicates and GEP wrap flags. (NFC) (PR #181571)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel/RISCV] Scalarize small pow-of-2 VECREDUCE_(AND|OR|XOR) (PR #182631)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Restrict foldICmpOfVectorReduce to one-use (PR #182833)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Restrict foldICmpOfVectorReduce to one-use (PR #182833)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove verifyLate from VPlanVerifier. NFC (PR #182799)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify recipes before cse as well (PR #180235)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify recipes before cse as well (PR #180235)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Recursively match operands of interleave group (PR #164839)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold icmp (vreduce_(or|and) %x), (0|-1) (PR #182684)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Allow recursive narrowing in interleave group narrowing. (PR #167310)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (NFCI) (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedMemOps for hoistInvariantLoads (NFCI) (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedPredicatedMemOps for hoistInvariantLoads (NFCI) (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedPredicatedMemOps (NFCI) (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedReplicateMemOps (NFCI) (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Factor collectGroupedReplicateMemOps (NFCI) (PR #179506)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold vmv.v.x (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to Widen(Cast|GEP) (PR #183204)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DAGCombiner] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove manual region removal when simplifying for VF and UF. (PR #181252)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   Reid Kleckner via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   Reid Kleckner via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   Reid Kleckner via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Renato Golin via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Renato Golin via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   Renato Golin via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   Renato Golin via llvm-commits
• [llvm] [SimplifyLibCalls] Avoid simplifying pow(x, 2.0) -> x * x with math-errno. (PR #183099)   Ricardo Jesus via llvm-commits
• [llvm] [ConstantFolding] Fold powf in single-precision. (PR #183102)   Ricardo Jesus via llvm-commits
• [llvm] [SimplifyLibCalls] Avoid simplifying pow(x, 2.0) -> x * x with math-errno. (PR #183099)   Ricardo Jesus via llvm-commits
• [llvm] [ConstantFolding] Fold powf in single-precision. (PR #183102)   Ricardo Jesus via llvm-commits
• [llvm] [ConstantFolding] Fold powf in single-precision. (PR #183102)   Ricardo Jesus via llvm-commits
• [llvm] [SimplifyLibCalls] Avoid simplifying pow(x, 2.0) -> x * x with math-errno. (PR #183099)   Ricardo Jesus via llvm-commits
• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Robert Imschweiler via llvm-commits
• [llvm] [OpenMP][Offload] Handle `present/to/from` when a different entry did `alloc/delete`. (PR #165494)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Robert Imschweiler via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #163142)   Robin Kastberg via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #163142)   Robin Kastberg via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] Match the pattern and generate ctlz function call (PR #177110)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Rohit Aggarwal via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Rohit Aggarwal via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Rohit Aggarwal via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [clang][ASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #182917)   Roland McGrath via llvm-commits
• [compiler-rt] Reapply "[ASan][Fuchsia] Have Fuchsia use a dynamic shadow start" (#182972) (PR #183154)   Roland McGrath via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   Roman Vinogradov via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   Roman Vinogradov via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   Roman Vinogradov via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   Roman Vinogradov via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Roy Shi via llvm-commits
• [llvm] [dsymutil] Add option to filter debug map objects by allowlist (PR #182083)   Roy Shi via llvm-commits
• [llvm] [SLP] Fix : Do not skip profitable small VFs in Vectorize Stores (PR #177100)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Fix : Do not skip profitable small VFs in Vectorize Stores (PR #177100)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   Ryan Buchner via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Better cost shuffles that can be lowered to VRGATHER/VRGATHER/VSLIDEUP (PR #183377)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Better cost shuffles that can be lowered to VRGATHER/VRGATHER/VSLIDEUP (PR #183377)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Better cost shuffles that can be lowered to VRGATHER/VRGATHER/VSLIDEUP (PR #183377)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Fix logic for commuting copyable operands in buildInstructionsState() (PR #183773)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Fix logic for commuting copyable operands in buildInstructionsState() (PR #183773)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Fix logic for commuting copyable operands in buildInstructionsState() (PR #183773)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Fix logic for commuting copyable operands in buildInstructionsState() (PR #183773)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (PR #183627)   Ryan Buchner via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Ryan Buchner via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Ryan Buchner via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Ryan Buchner via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Ryan Buchner via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Ryan Buchner via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (PR #182494)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (PR #182494)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (PR #182494)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] ComplexDeinterleavingPass: instruction does not dominate all uses! (PR #182494)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] When lowering 16 bit vector bitcasts, convert to i16. (PR #178249)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   Ryan Mansfield via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update tests for reduction2mem (NFC) (PR #181629)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update tests for reduction2mem (NFC) (PR #181629)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Update tests for reduction2mem (NFC) (PR #181629)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Add tests for a simple profitable case currently missed (NFC) (PR #181990)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Fix test phi-ordering.ll (NFC) (PR #181989)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopUnrollAndJam] Update test dependencies.ll (NFC) (PR #183509)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopUnrollAndJam] Update test unroll-and-jam.ll (NFC) (PR #183520)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopUnrollAndJam] Update test dependencies.ll (NFC) (PR #183509)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopUnrollAndJam] Update test unroll-and-jam.ll (NFC) (PR #183520)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Ensure nsw flag is checked for StrongSIV addrecs (PR #178047)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopUnrollAndJam] Update test dependencies.ll (NFC) (PR #183509)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopUnrollAndJam] Update test dependencies.ll (NFC) (PR #183509)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopUnrollAndJam] Update test unroll-and-jam.ll (NFC) (PR #183520)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for the WeakZeroSIV tests return incorrect result (NFC) (PR #183735)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for the WeakZeroSIV tests return incorrect result (NFC) (PR #183735)   Ryotaro Kasuga via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   S. VenkataKeerthy via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Sairudra More via llvm-commits
• [llvm] build: alter condition for adding `_DEBUG` CPP macro (PR #183120)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] builtins: adjust the FP80 enablement check (PR #183647)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] builtins: adjust the FP80 enablement check (PR #183647)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Fix conditions for strict-mode FP testing (PR #183507)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] builtins: adjust the FP80 enablement check (PR #183647)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Fix conditions for strict-mode FP testing (PR #183507)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Fix conditions for strict-mode FP testing (PR #183507)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] builtins: adjust FP80 source management (PR #183871)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] builtins: adjust FP80 source management (PR #183871)   Saleem Abdulrasool via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   Sam Clegg via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sam Clegg via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sam Clegg via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sam Clegg via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sam Clegg via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sam Clegg via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sam Clegg via llvm-commits
• [lld] [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [llvm] [MC] Remove redundant setting of AllowDollarAtStartOfIdentifier. NFC (PR #183339)   Sam Clegg via llvm-commits
• [llvm] [MC] Consistent use of inline field initializers in MCAsmInfo (PR #183343)   Sam Clegg via llvm-commits
• [llvm] [MC] Remove redundant setting of AllowDollarAtStartOfIdentifier. NFC (PR #183339)   Sam Clegg via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sam Clegg via llvm-commits
• [llvm] [MC] Consistent use of inline field initializers in MCAsmInfo (PR #183343)   Sam Clegg via llvm-commits
• [llvm] [MC] Consistent use of inline field initializers in MCAsmInfo (PR #183343)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Remove comment about wasm-ld being WIP. NFC (PR #183410)   Sam Clegg via llvm-commits
• [lld] [lld][WebAssembly] Remove comment about wasm-ld being WIP. NFC (PR #183410)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sam Clegg via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Sam Elliott via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Document some of the names we require for getNamedOperandIdx. NFC (PR #182687)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Expand more TruncStore and LoadExt operations for P extension. (PR #182995)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Expand more TruncStore and LoadExt operations for P extension. (PR #182995)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove -riscv-enable-p-ext-simd-codegen (PR #183156)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add missing immediates to check lines in rv32p-valid.s and rv64p-valid.s. NFC (PR #183238)   Sam Elliott via llvm-commits
• [llvm] [NFC][IROutliner] Add test showing llvm.typeid.for not Outlined (PR #183406)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Treat zext.h as a separate instruction from pack(w) with Zbkb. (PR #183364)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Treat zext.h as a separate instruction from pack(w) with Zbkb. (PR #183364)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Treat zext.h as a separate instruction from pack(w) with Zbkb. (PR #183364)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Treat zext.h as a separate instruction from pack(w) with Zbkb. (PR #183364)   Sam Elliott via llvm-commits
• [llvm] [IROutliner] Don't outline callsites with nomerge (PR #183387)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add Defs = VXSAT to P extension instructions. (PR #183455)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add Defs = VXSAT to P extension instructions. (PR #183455)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Sam Elliott via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   Sam Elliott via llvm-commits
• [llvm] Add TSFlags2 to carry upper TSFlags bits (PR #183766)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   Sam Elliott via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   Sam Parker via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   Sam Parker via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Sander de Smalen via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Sander de Smalen via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Sander de Smalen via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Sander de Smalen via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Sander de Smalen via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Sander de Smalen via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Sander de Smalen via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Sander de Smalen via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Sander de Smalen via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Sander de Smalen via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Sander de Smalen via llvm-commits
• [llvm] [mlir] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   Sander de Smalen via llvm-commits
• [llvm] [NFC][CodeGen] Add Register guard to ARMMaterializeFP. (PR #182559)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Sander de Smalen via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Sander de Smalen via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Sander de Smalen via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Sander de Smalen via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Sander de Smalen via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Sander de Smalen via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   Sander de Smalen via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   Sander de Smalen via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Sander de Smalen via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   Sander de Smalen via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Sander de Smalen via llvm-commits
• [llvm] Support CSA for floating-point & pointer types (PR #182313)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU][MC] Replace shifted registers in CFI instructions (PR #183147)   Scott Linder via llvm-commits
• [llvm] [AMDGPU] Implement -amdgpu-spill-cfi-saved-regs (PR #183149)   Scott Linder via llvm-commits
• [llvm] [MC][Dwarf] Add custom CFI pseudo-ops for use in AMDGPU (PR #183151)   Scott Linder via llvm-commits
• [llvm] [AMDGPU] Emit entry function Dwarf CFI (PR #183152)   Scott Linder via llvm-commits
• [llvm] [AMDGPU] Use register pair for PC spill (PR #183146)   Scott Linder via llvm-commits
• [llvm] [AMDGPU] Implement CFI for non-kernel functions (PR #183153)   Scott Linder via llvm-commits
• [llvm] [AMDGPU] Implement CFI for CSR spills (PR #183150)   Scott Linder via llvm-commits
• [llvm] [amdgpu-cfi: 1/9]: [MIR] Error on signed integer in getUnsigned (PR #183171)   Scott Linder via llvm-commits
• [llvm] [amdgpu-cfi: 1/9]: [MIR] Error on signed integer in getUnsigned (PR #183171)   Scott Linder via llvm-commits
• [llvm] [amdgpu-cfi: 1/9]: [MIR] Error on signed integer in getUnsigned (PR #183171)   Scott Linder via llvm-commits
• [llvm] [amdgpu-cfi: 1/9]: [MIR] Error on signed integer in getUnsigned (PR #183171)   Scott Linder via llvm-commits
• [llvm] [amdgpu-cfi: 2/9]: [MC][Dwarf] Add custom CFI pseudo-ops for use in AMDGPU (PR #183151)   Scott Linder via llvm-commits
• [llvm] [PowerPC] Add mnemonics to paddis (PR #179979)   Sean Fertile via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Sebastian Buchwald via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Sebastian Buchwald via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Sebastian Buchwald via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Sebastian Buchwald via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   Sebastian Neubauer via llvm-commits
• [llvm] Precommit tests: strictfp rounding vector f16 intrinsics (PR #183699)   Serge Pavlov via llvm-commits
• [llvm] Precommit tests: strictfp rounding vector f16 intrinsics (PR #183699)   Serge Pavlov via llvm-commits
• [llvm] [ARM] Lower strictfp vector fp16 rounding operations similar to default mode (PR #183700)   Serge Pavlov via llvm-commits
• [llvm] [ARM] Lower strictfp vector fp16 rounding operations similar to default mode (PR #183700)   Serge Pavlov via llvm-commits
• [llvm] [ARM] Lower strictfp vector fp16 rounding operations similar to default mode (PR #183700)   Serge Pavlov via llvm-commits
• [llvm] [TableGen] fix unreachable code warning in *GenSubtargetInfo.inc files (PR #182477)   Sergei Barannikov via llvm-commits
• [llvm] [Tablegen] Fix condition to report when lanemask overflows (PR #181810)   Sergei Barannikov via llvm-commits
• [lldb] [llvm] [lldb-dap][windows] add integratedTerminal support (PR #174635)   Sergei Druzhkov via llvm-commits
• [llvm] [Hexagon] Fix memory type for vgather intrinsics (PR #183563)   Sergei Larin via llvm-commits
• [llvm] [libsycl] Fix for static vars deinit order (libsycl vs liboffload) (PR #181366)   Sergey Semenov via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] Remove Generic-SPMD early detection (PR #150922)   Sergio Afonso via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
• [flang] [llvm] [mlir] [openmp] [Flang][MLIR][OpenMP] Add support for OpenMP Loop Interchange and permutation clause in Flang (PR #183435)   Sergio Afonso via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   Shafik Yaghmour via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   Shafik Yaghmour via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   Shafik Yaghmour via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   Shafik Yaghmour via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   Shafik Yaghmour via llvm-commits
• [llvm] [AArch64][GISel] Fix bitcast assertion by making computeKnownBits length-aware for different-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [llvm] [AArch64][GISel] Fix bitcast assertion by making computeKnownBits length-aware for different-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [clang] [flang] [llvm] [mlir] [polly] [CMake][LLVM] Add PCH infrastructure and LLVMSupport PCH (PR #176420)   Shankar Easwaran via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Shanzhi Chen via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Shanzhi Chen via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Shanzhi Chen via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Shanzhi Chen via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Shanzhi Chen via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Shanzhi Chen via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Shanzhi Chen via llvm-commits
• [llvm] [BOLT] Remove some unused code (NFC) (PR #183880)   Shanzhi Chen via llvm-commits
• [llvm] [CMake] Stop suppressing specific MSVC warnings when LLVM_ENABLE_WARNINGS is ON (PR #183439)   Shaojie Zhu via llvm-commits
• [llvm] [CMake] Stop suppressing specific MSVC warnings when LLVM_ENABLE_WARNINGS is ON (PR #183439)   Shaojie Zhu via llvm-commits
• [llvm] [CMake] Stop suppressing specific MSVC warnings when LLVM_ENABLE_WARNINGS is ON (PR #183439)   Shaojie Zhu via llvm-commits
• [llvm] [X86][APX] Fix assembly printing for NF+ND shift-by-1 instructions (PR #181565)   Shengchen Kan via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (PR #182808)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (PR #182808)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (PR #182753)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Remove target feature `DumpCodeLower` (PR #176960)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Remove target feature `DumpCodeLower` (PR #176960)   Shilei Tian via llvm-commits
• [llvm] [NFCI][AMDGPU] Use X-macro to reduce boilerplate in `GCNSubtarget.h` (PR #176844)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix caller/callee mismatch in SGPR assignment for inreg args (PR #182754)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Remove target feature `DumpCodeLower` (PR #176960)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Remove `FeaturePromoteAlloca` (PR #177636)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Remove `FeaturePromoteAlloca` (PR #177636)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Remove `FeaturePromoteAlloca` (PR #177636)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Update gfx1250 sched model to latest table (PR #182923)   Shilei Tian via llvm-commits
• [clang] [llvm] [AMDGPU] Extend __builtin_amdgcn_ds_bpermute argument types (PR #153501)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add feature for FWD_PROGRESS (PR #181675)   Shilei Tian via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [WIP][IR][Constants] Change the semantic of `ConstantPointerNull` to represent an actual `nullptr` instead of a zero-value pointer (PR #166667)   Shilei Tian via llvm-commits
• [clang] [lld] [llvm] [WIP][IR][Constants] Change the semantic of `ConstantPointerNull` to represent an actual `nullptr` instead of a zero-value pointer (PR #166667)   Shilei Tian via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] [DataLayout] Add null pointer value infrastructure (PR #183207)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Generate COPY for each use-constraint instead of constraining the register class (PR #182104)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Shilei Tian via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Shilei Tian via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Stop checking for r600 in printf pass (PR #183536)   Shilei Tian via llvm-commits
• [llvm] AMDGPU: Stop checking for r600 in printf pass (PR #183536)   Shilei Tian via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU][NFC] Add virtual prefix to GCN LiveRegs and Pressure. (PR #183673)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Shilei Tian via llvm-commits
• [llvm] [CodeGenPrepare] Update CodeGenPrepare::tryToSinkFreeOperands() to avoid duplicating instructions when sinking (PR #181037)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   Shilei Tian via llvm-commits
• [llvm] Attributor: Avoid double map lookup in updateAttrMap (PR #182666)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add -amdgpu-allow-lds-in-non-entry-functions flag (PR #183658)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] users/shiltian/valueless uniform work group size (PR #183925)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] users/shiltian/valueless uniform work group size (PR #183925)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add early LDS resource check before register allocation (PR #183888)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Assert non-array alloca does have a size (PR #183834)   Shilei Tian via llvm-commits
• [llvm] Attributor: Avoid calling identifyDefaultAbstractAttributes on declarations (PR #182663)   Shilei Tian via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Shivam Kunwar via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Shivam Kunwar via llvm-commits
• [llvm] [DWARFLinker] Fix buildbot crash: NewUnit can be null during garbage (PR #182993)   Shivam Kunwar via llvm-commits
• [llvm] [DWARFLinker] Fix buildbot crash: NewUnit can be null during garbage (PR #182993)   Shivam Kunwar via llvm-commits
• [llvm] [DWARFLinker] Use DIEEntry for backward ref_addr references (PR #181881)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [SSP] Add llvm.ssp.protected intrinsic for QualType-based stack protection (PR #183623)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [SSP] Add llvm.ssp.protected intrinsic for QualType-based stack protection (PR #183623)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [SSP] Add llvm.ssp.protected intrinsic for QualType-based stack protection (PR #183623)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Shivam Kunwar via llvm-commits
• [llvm] [X86] Attempt to use VPMADD52L/VPMULUDQ instead of VPMULLQ on slow VPMULLQ targets (or when VPMULLQ is unavailable) (PR #171760)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i256/i512 CTPOP expansion on AVX512VPOPCNTDQ targets (PR #182830)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for #137422 (PR #182832)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for #137422 (PR #182832)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test coverage for #137422 (PR #182832)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   Simon Pilgrim via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   Simon Pilgrim via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   Simon Pilgrim via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   Simon Pilgrim via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   Simon Pilgrim via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   Simon Pilgrim via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   Simon Pilgrim via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   Simon Pilgrim via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Support ashr sign-bit extraction (PR #181998)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   Simon Pilgrim via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Simon Pilgrim via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Simon Pilgrim via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerV64I8Shuffle - prefer VPERMV3 byte shuffles to OR(PSHUFB,PSHUFB) on VBMI targets (PR #182852)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerV64I8Shuffle - prefer VPERMV3 byte shuffles to OR(PSHUFB,PSHUFB) on VBMI targets (PR #182852)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i256/i512 CTPOP expansion on AVX512VPOPCNTDQ targets (PR #182830)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i256/i512 CTPOP expansion on AVX512VPOPCNTDQ targets (PR #182830)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i256/i512 CTPOP expansion on AVX512VPOPCNTDQ targets (PR #182830)   Simon Pilgrim via llvm-commits
• [llvm] [X86] getFauxShuffleMask - OR(SHUF(),SHUF()) - treat undemanded elements as undef (PR #182678)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   Simon Pilgrim via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   Simon Pilgrim via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [X86] getFauxShuffleMask - OR(SHUF(),SHUF()) - treat undemanded elements as undef (PR #182678)   Simon Pilgrim via llvm-commits
• [llvm] [X86] getFauxShuffleMask - OR(SHUF(),SHUF()) - treat undemanded elements as undef (PR #182678)   Simon Pilgrim via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   Simon Pilgrim via llvm-commits
• [llvm] [X86] getFauxShuffleMask - OR(SHUF(),SHUF()) - treat undemanded elements as undef (PR #182678)   Simon Pilgrim via llvm-commits
• [llvm] [Thumb2] mve-vmovimm.ll - regenerate with missing check prefixes (PR #183019)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   Simon Pilgrim via llvm-commits
• [llvm] Add EVT::changeVectorElementCount and MVT:changeVectorElementCount (PR #182266)   Simon Pilgrim via llvm-commits
• [llvm] [Thumb2] mve-vmovimm.ll - regenerate with missing check prefixes (PR #183019)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (PR #183032)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (PR #183032)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerShuffleAsLanePermuteAndRepeatedMask - consistently move V2.isUndef handling inside the function. NFC. (PR #183069)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerShuffleAsLanePermuteAndRepeatedMask - consistently move V2.isUndef handling inside the function. NFC. (PR #183069)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Simon Pilgrim via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerV64I8Shuffle - avoid lowerShuffleAsRepeatedMaskAndLanePermute call on VBMI targets (PR #183109)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (PR #183032)   Simon Pilgrim via llvm-commits
• [llvm] [X86] shift-i512.ll - add test coverage for shift+extract patterns as suggested on #132601 (PR #183111)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerV64I8Shuffle - avoid lowerShuffleAsRepeatedMaskAndLanePermute call on VBMI targets (PR #183109)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (PR #183032)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemanedBits (PR #183270)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Simon Pilgrim via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (PR #183270)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add vector demanded elts pow2 test for #183270 (PR #183327)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add vector demanded elts pow2 test for #183270 (PR #183327)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add vector demanded elts pow2 test for #183270 (PR #183327)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (PR #183270)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i512 funnel shift / rotate test coverage (PR #183486)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i512 funnel shift / rotate test coverage (PR #183486)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (PR #181882)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i512 funnel shift / rotate test coverage (PR #183486)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (PR #183270)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (PR #183270)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (PR #183270)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (PR #183270)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (PR #183270)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Expand i512 shifts on AVX512 targets (PR #183198)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Clearout unused FALLBACK check prefixes from vector extension/concatenation tests. NFC. (PR #183527)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Clearout unused FALLBACK check prefixes from vector extension/concatenation tests. NFC. (PR #183527)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Clearout unused FALLBACK check prefixes from vector midpoint tests. NFC. (PR #183534)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Clearout unused FALLBACK check prefixes from vector midpoint tests. NFC. (PR #183534)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Clearout unused FALLBACK check prefixes from vector extension/concatenation tests. NFC. (PR #183527)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Clearout unused FALLBACK check prefixes from vector midpoint tests. NFC. (PR #183534)   Simon Pilgrim via llvm-commits
• [llvm] [X86] single_elt_vector_memory_operation.ll - simplify check prefixes. NFC. (PR #183545)   Simon Pilgrim via llvm-commits
• [llvm] [X86] single_elt_vector_memory_operation.ll - simplify check prefixes. NFC. (PR #183545)   Simon Pilgrim via llvm-commits
• [llvm] [X86] vector-replicaton-i1-mask.ll - simplify check prefixes. NFC. (PR #183547)   Simon Pilgrim via llvm-commits
• [llvm] [X86] vector-replicaton-i1-mask.ll - simplify check prefixes. NFC. (PR #183547)   Simon Pilgrim via llvm-commits
• [llvm] [X86] vector-replicaton-i1-mask.ll - simplify check prefixes. NFC. (PR #183547)   Simon Pilgrim via llvm-commits
• [llvm] [X86] single_elt_vector_memory_operation.ll - simplify check prefixes. NFC. (PR #183545)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] shuffle-of-casts.ll - add x86-64-v2 and x86-64-v4 test coverage (PR #183562)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] shuffle-of-casts.ll - add x86-64-v2 and x86-64-v4 test coverage (PR #183562)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] shuffle-of-casts.ll - add x86-64-v2 and x86-64-v4 test coverage (PR #183562)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] shuffle-of-casts.ll - add #165813 test coverage (PR #183569)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] shuffle-of-casts.ll - add #165813 test coverage (PR #183569)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] shuffle-of-casts.ll - add #165813 test coverage (PR #183569)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] Ensure we recognise free sign extends of vector comparison results (PR #183575)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] Ensure we recognise free sign extends of vector comparison results (PR #183575)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::UDIV/SDIV DemandedElts handling and tests (PR #183227)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine][X86] Ensure we recognise free sign extends of vector comparison results (PR #183575)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Pass DemandedElts to isKnownNeverZero for extend nodes (PR #183624)   Simon Pilgrim via llvm-commits
• [llvm] [X86] fnabs.ll - regenerate test checks and add AVX512 test coverage (PR #183709)   Simon Pilgrim via llvm-commits
• [llvm] [X86] stack-align.ll - regenerate test checks with no address scrubing (PR #183712)   Simon Pilgrim via llvm-commits
• [llvm] [X86] regenerate fcopysign test checks (PR #183710)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   Simon Pilgrim via llvm-commits
• [llvm] [RFC][X86] Consistently only use SignBitMasks for FABS/FNEG/FCOPYSIGN patterns (PR #183731)   Simon Pilgrim via llvm-commits
• [llvm] [X86] SimplifyDemandedBitsForTargetNode - add handling for X86ISD::FAND/FOR (PR #136618)   Simon Pilgrim via llvm-commits
• [llvm] [RFC][X86] Consistently only use SignBitMasks for FABS/FNEG/FCOPYSIGN patterns (PR #183731)   Simon Pilgrim via llvm-commits
• [llvm] [RFC][X86] Consistently only use SignBitMasks for FABS/FNEG/FCOPYSIGN patterns (PR #183731)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   Simon Pilgrim via llvm-commits
• [llvm] [RFC][X86] Consistently only use SignBitMasks for FABS/FNEG/FCOPYSIGN patterns (PR #183731)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion (PR #183537)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion (PR #183537)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion (PR #183537)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion (PR #183537)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SelectionDAGBuilder::visitShuffleVector - split shuffle(concat(x,y),undef,mask) -> shuffle(x,y,mask) patterns (PR #180573)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV] Use getCopyFromReg in unit test to match comment. NFC (PR #183199)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - Power of 2 value is known to be power of 2 after BSWAP/BITREVERSE (PR #182207)   Simon Pilgrim via llvm-commits
• [llvm] [X86][test] Add i256 codegen baseline tests (PR #183586)   Simon Pilgrim via llvm-commits
• [llvm] [X86][test] Add i256 codegen baseline tests (PR #183586)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-pow2.ll - add tests showing failure to handle ISD::EXTRACT_VECTOR_ELT nodes (PR #183918)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-pow2.ll - add tests showing failure to handle ISD::EXTRACT_VECTOR_ELT nodes (PR #183918)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-pow2.ll - add tests showing failure to handle ISD::EXTRACT_VECTOR_ELT nodes (PR #183918)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::EXTRACT_VECTOR_ELT handling (PR #183924)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add tests showing failure to handle ISD::EXTRACT_VECTOR_ELT nodes (PR #183934)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add tests showing failure to handle ISD::EXTRACT_VECTOR_ELT nodes (PR #183934)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add tests showing failure to handle ISD::EXTRACT_VECTOR_ELT nodes (PR #183934)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::EXTRACT_VECTOR_ELT handling (PR #183961)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::EXTRACT_VECTOR_ELT handling (PR #183961)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::EXTRACT_VECTOR_ELT handling (PR #183961)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::EXTRACT_VECTOR_ELT handling (PR #183961)   Simon Pilgrim via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] cmake properties for complicated builtin sources (PR #179919)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] cmake properties for complicated builtin sources (PR #179919)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Fix conditions for strict-mode FP testing (PR #183507)   Simon Tatham via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Fix conditions for strict-mode FP testing (PR #183507)   Simon Tatham via llvm-commits
• [llvm] [NFC][LICM] Update the comment about hoisting depend on block frequency (PR #183437)   Sirish Pande via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Sirui Mu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Sirui Mu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Sirui Mu via llvm-commits
• [clang] [llvm] [CIR][NFC] Add skeleton for target-specific lowering (PR #182645)   Sirui Mu via llvm-commits
• [llvm] [AMDGPU] Add -amdgpu-allow-lds-in-non-entry-functions flag (PR #183658)   Siu Chi Chan via llvm-commits
• [llvm] [AMDGPU] Add -amdgpu-allow-lds-in-non-entry-functions flag (PR #183658)   Siu Chi Chan via llvm-commits
• [llvm] [DA] Remove consistent flag from Dependence class (PR #181608)   Sjoerd Meijer via llvm-commits
• [llvm] [flang-rt] Get rid of cyclic call chain in ChildIo. (PR #183369)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang][cuda] Add support for cudaStreamDestroy (PR #183648)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang][cuda] Add support for cudaStreamDestroy (PR #183648)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang][cuda] Add support for cudaStreamDestroy (PR #183648)   Slava Zakharin via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Slava Zakharin via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Slava Zakharin via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] [TableGen][CodeGen][NFC] Add ImplicitRegByHwMode infrastructure (PR #182866)   Son Tuan Vu via llvm-commits
• [llvm] [TableGen][CodeGen][NFC] Add ImplicitRegByHwMode infrastructure (PR #182866)   Son Tuan Vu via llvm-commits
• [llvm] [TableGen][CodeGen][NFC] Add ImplicitRegByHwMode infrastructure (PR #182866)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   Son Tuan Vu via llvm-commits
• [llvm] [AMDGPU] Update gfx1251 sched model to latest table (PR #182923)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove slow VOPD assert (PR #183166)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Remove slow VOPD assert (PR #183166)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (PR #176895)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix encoding of inline constants in v_fma_mix_f32_bf16 (PR #183487)   Stanislav Mekhanoshin via llvm-commits
• [compiler-rt] [TSan] Fix determining static TLS blocks (PR #183106)   Stefan Schulze Frielinghaus via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Steven Perron via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Implement Gather and GatherCmp intrinsics (PR #182578)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Implement Gather and GatherCmp intrinsics (PR #182578)   Steven Perron via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Steven Perron via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Steven Perron via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add Intermediate cast when Vector From/To types are of different element size and type (PR #182166)   Steven Perron via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Steven Perron via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Implement Gather and GatherCmp intrinsics (PR #182578)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   Steven Perron via llvm-commits
• [llvm] [CMake] Disable PCH when LLVM_ENABLE_MODULES is set (PR #182914)   Steven Wu via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [clang] [lld] [llvm] [WebAssembly] WASIP3 and component model threading support (PR #175800)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   Sy Brand via llvm-commits
• [compiler-rt] [scudo] Change header tagging for the secondary allocator (PR #182487)   Tamas Kaman via llvm-commits
• [compiler-rt] [scudo] Change header tagging for the secondary allocator (PR #182487)   Tamas Kaman via llvm-commits
• [compiler-rt] [scudo] Change header tagging for the secondary allocator (PR #182487)   Tamas Kaman via llvm-commits
• [compiler-rt] [scudo] Change header tagging for the secondary allocator (PR #182487)   Tamas Kaman via llvm-commits
• [compiler-rt] [scudo] Change header tagging for the secondary allocator (PR #182487)   Tamas Kaman via llvm-commits
• [compiler-rt] [scudo] Change header tagging for the secondary allocator (PR #182487)   Tamas Kaman via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [llvm/llvm-project][flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Tarun Prabhu via llvm-commits
• [llvm] [NFC][ThinLTO] Check that refs between split modules have the same GUID (PR #182982)   Teresa Johnson via llvm-commits
• [llvm] [NFC][ThinLTO] Check that refs between split modules have the same GUID (PR #182982)   Teresa Johnson via llvm-commits
• [llvm] [NFC][ThinLTO] Check that refs between split modules have the same GUID (PR #182982)   Teresa Johnson via llvm-commits
• [llvm] [NFC][ThinLTO] Check that refs between split modules have the same GUID (PR #182982)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   Teresa Johnson via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   Teresa Johnson via llvm-commits
• [clang] [llvm] [Clang][Lexer] Reland "Detect SSE4.2 availability at runtime in fastParseASCIIIdentifier" (PR #180631)   Thibault Monnier via llvm-commits
• [llvm] Move AArch64 regression test to CodeGen (PR #183566)   Thibault Monnier via llvm-commits
• [llvm] [WebAssembly] MC support for acquire-release atomics (PR #183656)   Thomas Lively via llvm-commits
• [llvm] [NFCI][AMDGPU] Use X-macro to reduce boilerplate in `GCNSubtarget.h` (PR #176844)   Tim Renouf via llvm-commits
• [clang] [flang] [llvm] [mlir] [OpenMP] Only generate call to __kmpc_global_thread_num when needed (PR #182669)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   Tom Eccles via llvm-commits
• [llvm] [LV] Add debug print for TTI.MaxInterleaveFactor (NFC) (PR #183309)   Tomer Shafir via llvm-commits
• [llvm] [LV] Add debug print for TTI.MaxInterleaveFactor (NFC) (PR #183309)   Tomer Shafir via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   Tommy Chiang via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Tony Tao via llvm-commits
• [llvm] [SystemZ] Allow folding from another MBB in foldMemoryOperandImpl(). (PR #182921)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize and fold (PR #182782)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize and fold (PR #182782)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Ulrich Weigand via llvm-commits
• [llvm] [CodeGen] Fix liveness tracking removing live sibling sub-registers (PR #181518)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Emit prolog size (PR #181850)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize (PR #182782)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize (PR #182782)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Add indirect reference bit XATTR REFERENCE(INDIRECT) for indirect symbol handling support (PR #183441)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Ulrich Weigand via llvm-commits
• [flang] [llvm] [flang][cuda] Add support for cudaStreamDestroy (PR #183648)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang][cuda] Add support for cudaStreamDestroy (PR #183648)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Valentin Clement バレンタイン クレメン via llvm-commits
• [flang] [llvm] [flang-rt] Enable more runtime functions for the GPU target (PR #183649)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [VectorCombine] Support ashr sign-bit extraction (PR #181998)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Support ashr sign-bit extraction (PR #181998)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Handle disjoint or's in hoistAdd (PR #182915)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Handle disjoint or's in hoistAdd (PR #182915)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Handle disjoint or's in hoistAdd (PR #182915)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Handle disjoint or's in hoistAdd (PR #182915)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Handle disjoint or's in hoistAdd (PR #182915)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Handle disjoint or's in hoistAdd (PR #182915)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Valeriy Savchenko via llvm-commits
• [llvm] [GVN] Forward store values through select addresses in findDominatingValue (PR #183316)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Valeriy Savchenko via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   Valeriy Savchenko via llvm-commits
• [llvm] [BOLT] Enable compatibility of instrumentation-file-append-pid with instrumentation-sleep-time (PR #183919)   Vasily Leonenko via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrti to header-only (PR #177960)   Vedant Neve via llvm-commits
• [llvm] [AMDGPU] Combine i8/i16 (and (srl x, c), mask) to v_bfe_u32 (PR #182446)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Select v_bfe_u32 for i8/i16 (and (srl x, c), mask) (PR #182446)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Fix non-deterministic compiler output for debug type pointer (PR #182773)   Viktoria Maximova via llvm-commits
• [llvm] [SPIRV][NFC] Update tests to check `spirv-val` output (PR #182549)   Viktoria Maximova via llvm-commits
• [llvm] Fix SafeStack crashing with scalable TypeSizes (PR #180547)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [SafeStack] Allow -fsanitize-minimal-runtime with -fsanitize=safestack (PR #183644)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [CFI] Expand test to include minimal runtime (PR #183646)   Vitaly Buka via llvm-commits
• [clang] [compiler-rt] [CFI] Expand test to include minimal runtime (PR #183646)   Vitaly Buka via llvm-commits
• [clang] [llvm] [mlir] [ASan] Document limitations of container overflow checks (PR #183590)   Vitaly Buka via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DwarfUnit] Fix comment mistake in shouldPlaceInUnitDIE() (PR #183481)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DwarfUnit] Fix comment mistake in shouldPlaceInUnitDIE() (PR #183481)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DwarfUnit] Fix comment mistake in shouldPlaceInUnitDIE() (PR #183481)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DwarfUnit] Fix comment mistake in shouldPlaceInUnitDIE() (PR #183481)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DwarfUnit] Fix comment mistake in shouldPlaceInUnitDIE() (PR #183481)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DwarfUnit] Fix comment mistake in shouldPlaceInUnitDIE() (PR #183481)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [clang] [llvm] [DebugInfo] Emit DW_AT_const_value for constexpr array static members (PR #182442)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [NFC][LICM] Update the comment about hoisting depend on block frequency (PR #183437)   Wang Yaduo via llvm-commits
• [clang] [llvm] [RISCV] Add processor definitions for XuanTie C910V2 and C920V2 (PR #174056)   Wang Yaduo via llvm-commits
• [clang] [llvm] [RISCV] Add processor definitions for XuanTie C910V2 and C920V2 (PR #174056)   Wang Yaduo via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   Weiwen He via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   Weiwen He via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   Weiwen He via llvm-commits
• [llvm] [cmake] forward LLVM_EXTERNAL_*_SOURCE_DIR to runtimes (PR #180399)   Wenju He via llvm-commits
• [llvm] [SPIRV] Lower G_FMINIMUMNUM/G_FMAXIMUMNUM to OpenCL extended inst fmin/fmax (PR #153550)   Wenju He via llvm-commits
• [llvm] [SPIRV] Lower G_FMINIMUMNUM/G_FMAXIMUMNUM to OpenCL extended inst fmin/fmax (PR #153550)   Wenju He via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
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• [llvm] [RISCV][test] Add i256 codegen baseline test (PR #183588)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
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• [llvm] [RISCV][test] Add i256 codegen baseline test (PR #183588)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   Xavier Roche via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   Xavier Roche via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   Xavier Roche via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   Xavier Roche via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   Xavier Roche via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   Xavier Roche via llvm-commits
• [llvm] [RISCV][test] Add i256 codegen baseline test (PR #183588)   Xavier Roche via llvm-commits
• [llvm] [RISCV][test] Add i256 codegen baseline test (PR #183588)   Xavier Roche via llvm-commits
• [llvm] [RISCV][test] Add i256 codegen baseline test (PR #183588)   Xavier Roche via llvm-commits
• [llvm] [X86][test] Add i256 codegen baseline tests (PR #183586)   Xavier Roche via llvm-commits
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• [llvm] [X86][test] Add i256 codegen baseline tests (PR #183586)   Xavier Roche via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   Xavier Roche via llvm-commits
• [llvm] [AArch64][test] Add i256 codegen baseline tests (PR #183587)   Xavier Roche via llvm-commits
• [clang] [llvm] [NFC] Add comments for PR “[LLVM][CLANG] Update signal‑handling behavior to comply with POSIX” (PR #183206)   Xing Xue via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmin to header only (PR #182290)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [llvm] [Windows] Adjust exported symbols to filter out dumpColor and printPretty (PR #182964)   Yanzuo Liu via llvm-commits
• [llvm] [Windows] Adjust exported symbols to filter out dumpColor and printPretty (PR #182964)   Yanzuo Liu via llvm-commits
• [llvm] [RuntimeDyld] Sign-extend 32-bit COFF relocation addend in RuntimeDyldCOFFX86_64 (PR #183136)   Yanzuo Liu via llvm-commits
• [llvm] [RuntimeDyld] Sign-extend 32-bit COFF relocation addend in RuntimeDyldCOFFX86_64 (PR #183136)   Yanzuo Liu via llvm-commits
• [llvm] [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (PR #181863)   Yanzuo Liu via llvm-commits
• [llvm] [Hexagon] Add AggressiveRDF copy propagation (PR #182818)   Yashas Andaluri via llvm-commits
• [llvm] [CHR] Skip regions containing convergent calls (PR #180882)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Split struct kernel arguments (PR #133786)   Yaxun Liu via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] [AArch64] Reject non-constant expressions in tryParseAdjImm0_63 (PR #183246)   Yihan Yang via llvm-commits
• [llvm] [AArch64] Reject non-constant expressions in tryParseAdjImm0_63 (PR #183246)   Yihan Yang via llvm-commits
• [llvm] [InstCombine] Fold min/max of two subtracts with common RHS (PR #183240)   Yingwei Zheng via llvm-commits
• [llvm] FunctionAttrs: Propagate nofpclass from callsite arguments (PR #183277)   Yingwei Zheng via llvm-commits
• [llvm] FunctionAttrs: Propagate nofpclass from callsite arguments (PR #183277)   Yingwei Zheng via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Yingwei Zheng via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Yingwei Zheng via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Yingwei Zheng via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Yingwei Zheng via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold min/max of two subtracts with common RHS (PR #183240)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold min/max of two subtracts with common RHS (PR #183240)   Yingwei Zheng via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Move fmul constant special case to KnownFPClass (PR #183157)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Merge duplicate shuffle instruction nodes (PR #182768)   Yingwei Zheng via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Teach computeKnownFPClass that multiply by <= 1 cannot overflow (PR #183159)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   Yingwei Zheng via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   Yingwei Zheng via llvm-commits
• [llvm] [LoopInterchange] Optimize the way of insertion for the FirstIteration PHINode. (PR #183273)   Yingying Wang via llvm-commits
• [llvm] [LoopInterchange] Fix the way of insertion for the FirstIteration PHINode. (PR #183273)   Yingying Wang via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [llvm] Define VP_FMINIMUMNUM and VP_FMAXIMUMNUM (PR #181084)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   kadir çetinkaya via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   kadir çetinkaya via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   kadir çetinkaya via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   kadir çetinkaya via llvm-commits
• [llvm] [Support] Optimize signal handling file removal code (PR #173586)   kadir çetinkaya via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   liao jun via llvm-commits
• [llvm] cb3d7ff - [AArch64] Add bfloat patterns for `partial_reduce_fmla` (#181982)   via llvm-commits
• [llvm] [Hexagon] Add AggressiveRDF copy propagation (PR #182818)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] ca7cf83 - [Maintainers] Fix broken clang link (NFC) (#182451)   via llvm-commits
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• [llvm] 63e3e89 - [InstCombine] Only ignore first zero index during GEP canonicalization (#180764)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
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• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] [AArch64] optimize manual pairwise min/max (PR #182785)   via llvm-commits
• [llvm] 3849fce - [CMake] Don't try to reuse PCH if PCH is disabled (#182819)   via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   via llvm-commits
• [llvm] f02aadc - [AArch64][GlobalISel] Combine to sqxtn pre legalization for FewerElements (#181163)   via llvm-commits
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• [llvm] 5870fcf - [M68k] Update llvm/test/CodeGen/M68k/pipeline.ll (#182809)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] 4bd0e49 - [VPlan] Remove verifyEVLRecipe (#182798)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [LV] Add corner-case tests for licm of predicated memops (PR #182828)   via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] 594e889 - [PowerPC] Fix duplicate RUN lines in tests (#182275)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [X86] Add i256/i512 CTPOP expansion on AVX512VPOPCNTDQ targets (PR #182830)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add DemandedElts argument (PR #182679)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [llvm] [InstCombine] Restrict foldICmpOfVectorReduce to one-use (PR #182833)   via llvm-commits
• [llvm] 36d60b1 - [analyzer] New checker: optin.core.UnconditionalVAArg (#175602)   via llvm-commits
• [llvm] 0e3a96d - [X86] Add test coverage for #137422 (#182832)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] FunctionAttrs: Do not infer top down on functions with no uses (PR #182839)   via llvm-commits
• [llvm] [NFC][SPARC] Add proper flags for instruction definitions (PR #182840)   via llvm-commits
• [llvm] [NFC][SPARC] Add proper flags for instruction definitions (PR #182840)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [llvm] 966a461 - [VectorCombine] Support ashr sign-bit extraction (#181998)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (PR #179315)   via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] 9e6a6be - [AMDGPU] Remove AMDGPUArgumentUsageInfo pass (#182490)   via llvm-commits
• [llvm] [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (PR #179315)   via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   via llvm-commits
• [llvm] 8b36a41 - FunctionAttrs: Do not infer top down on functions with no uses (#182839)   via llvm-commits
• [llvm] 5e5e300 - [SelectionDAG] Fix bug related to demanded bits/elts for BITCAST (#145902)   via llvm-commits
• [llvm] [Offload] Fix copy-elision warning (PR #182848)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [AMDGPU][Scheduler] Add `GCNRegPressure`-based methods to `GCNRPTarget` (PR #182853)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] 630a418 - Re-enable MSVC C4141 diagnostic; NFC (#182586)   via llvm-commits
• [llvm] 1737b61 - Re-enable MSVC C4722 diagnostic; NFC (#182845)   via llvm-commits
• [llvm] [AArch64] Cortex-A55/A320/A510 scheduling model "typo" fixes (PR #182854)   via llvm-commits
• [llvm] [AArch64] Cortex-A55/A320/A510 scheduling model "typo" fixes (PR #182854)   via llvm-commits
• [llvm] 817b7f3 - [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (#179315)   via llvm-commits
• [llvm] [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (PR #179315)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   via llvm-commits
• [llvm] [LLVM][PDB] Add missing type/symbol IDs (PR #182743)   via llvm-commits
• [llvm] [LLVM][PDB] Add missing type/symbol IDs (PR #182743)   via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] 8f5880d - [X86] lowerV64I8Shuffle - prefer VPERMV3 byte shuffles to OR(PSHUFB,PSHUFB) on VBMI targets (#182852)   via llvm-commits
• [llvm] [AArch64] Match CTPOP combine without zero extend (PR #182859)   via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   via llvm-commits
• [llvm] [LV] NFCI: Move extend optimization to transformToPartialReduction. (PR #182860)   via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] Revert "[Hexagon] Handle subreg copies between DoubleRegs and IntRegs… (PR #182861)   via llvm-commits
• [llvm] a9645eb - [AMDGPU] Move `advanceBeforeNext` before `advanceToNext` (#182808)   via llvm-commits
• [llvm] Revert "[Hexagon] Handle subreg copies between DoubleRegs and IntRegs… (PR #182861)   via llvm-commits
• [llvm] [NFC][WebAssembly] Expanding load-ext testcases for the MVP CPU target (PR #182864)   via llvm-commits
• [llvm] [NFC][WebAssembly] Expanding load-ext testcases for the MVP CPU target (PR #182864)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] 0e9880c - [VPlan] Remove verifyLate from VPlanVerifier. NFC (#182799)   via llvm-commits
• [llvm] [TableGen][CodeGen][NFC] Add ImplicitRegByHwMode infrastructure (PR #182866)   via llvm-commits
• [llvm] [TableGen][CodeGen][NFC] Add ImplicitRegByHwMode infrastructure (PR #182866)   via llvm-commits
• [llvm] 4f30127 - [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (#178991)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (PR #182107)   via llvm-commits
• [llvm] [AMDGPU] Remove DX10_CLAMP and IEEE bits from gfx1170 (PR #182107)   via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor fmin to header only (PR #182290)   via llvm-commits
• [llvm] [WebAssembly] optimize ext + shuffle + add into addext (PR #182849)   via llvm-commits
• [llvm] [AMDGPUCtorDtorLowering] Remove unnecessary pointer arithmetic (PR #182869)   via llvm-commits
• [llvm] [LLVM][PDB] Add missing type/symbol IDs (PR #182743)   via llvm-commits
• [llvm] 329cd89 - [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (#180425)   via llvm-commits
• [llvm] [AMDGPU] Enable scheduler mfma rewrite stage by default (PR #180751)   via llvm-commits
• [llvm] 3215645 - [AMDGPU] Enable scheduler mfma rewrite stage by default (#180751)   via llvm-commits
• [llvm] [AMDGPU] Enable scheduler mfma rewrite stage by default (PR #180751)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [llvm] Re-enable MSVC C4291 diagnostic; NFC (PR #182868)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [llvm] 5a3fdec - [X86] Add i256/i512 CTPOP expansion on AVX512VPOPCNTDQ targets (#182830)   via llvm-commits
• [llvm] ce2a9cb - [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (#181420)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [llvm] [LV] Run VPlan licm late in executePlan (PR #181122)   via llvm-commits
• [llvm] Re-enable MSVC C4510 diagnostic; NFC (PR #182872)   via llvm-commits
• [llvm] [SPIRV][AMD] Reenable `SPV_KHR_float_control2` for AMD flavored SPIRV (PR #182873)   via llvm-commits
• [llvm] 239e14b - [NFC][AMDGPU] Add test showing caller/callee SGPR mismatch for inreg args (#182753)   via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   via llvm-commits
• [llvm] [AMDGPUCtorDtorLowering] Remove unnecessary pointer arithmetic (PR #182869)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] Revert "[Hexagon] Handle subreg copies between DoubleRegs and IntRegs… (PR #182861)   via llvm-commits
• [llvm] [NFCi][AsmPrinter] Refactor getting analyses to callbacks (PR #182793)   via llvm-commits
• [llvm] 13530d4 - [AMDGPUCtorDtorLowering] Remove unnecessary pointer arithmetic (#182869)   via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (PR #182254)   via llvm-commits
• [llvm] Re-enable MSVC C4510 diagnostic; NFC (PR #182872)   via llvm-commits
• [llvm] [TableGen] Consolidate sub-register index names into a single string (PR #182651)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   via llvm-commits
• [llvm] 6295903 - [TableGen] Add asserts for a few register related checks (#182680)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [InstSimplify] Add support for llvm.structured.gep (PR #182874)   via llvm-commits
• [llvm] [SPIRV][AMD] Reenable `SPV_KHR_float_control2` for AMD flavored SPIRV (PR #182873)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (PR #182878)   via llvm-commits
• [llvm] 4dac683 - [AArch64] Cortex-A55/A320/A510 scheduling model "typo" fixes (#182854)   via llvm-commits
• [llvm] [AArch64] Cortex-A55/A320/A510 scheduling model "typo" fixes (PR #182854)   via llvm-commits
• [llvm] 6d36f21 - [Hexagon] Prevent optimizing out counter reads (#182338)   via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   via llvm-commits
• [llvm] [AMDGPU] Remove target feature `DumpCodeLower` (PR #176960)   via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (PR #182244)   via llvm-commits
• [llvm] 20c6a59 - Re-enable MSVC C4510 diagnostic; NFC (#182872)   via llvm-commits
• [llvm] 6465d6d - Re-enable MSVC C4291 diagnostic; NFC (#182868)   via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   via llvm-commits
• [llvm] [X86][GlobalISel] Ignore non-vregs in regbank mapping (PR #182880)   via llvm-commits
• [llvm] Implemented metric that gets biggest function's size (PR #182632)   via llvm-commits
• [llvm] 035de0a - [RISCV] Rename RVVConstraint->VS1VS2Constraint. NFC (#182688)   via llvm-commits
• [llvm] dd6e7b8 - [LV] Add corner-case tests for licm of predicated memops (#182828)   via llvm-commits
• [clang] [llvm] Stack params (PR #182902)   via llvm-commits
• [clang] [llvm] Stack params (PR #182902)   via llvm-commits
• [clang] [llvm] Stack params (PR #182902)   via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   via llvm-commits
• [llvm] b8a4bf2 - [RISCV] Remove extra ReadSFBALU from SFBNDS_BFO. (#182900)   via llvm-commits
• [llvm] [LICM] Handle disjoint or's in hoistAdd (PR #182915)   via llvm-commits
• [llvm] [LICM] Handle disjoint or's in hoistAdd (PR #182915)   via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   via llvm-commits
• [llvm] 4e8c730 - [unittests][Support] Fix FileSystemTest for BSD semantics (#181487)   via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   via llvm-commits
• [compiler-rt] [compiler-rt][common] Only unmap stacks the runtime has actually mapped (PR #179000)   via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   via llvm-commits
• [llvm] c3a86ff - [Hexagon] Fix extractHvxSubvectorPred shuffle mask for small predicates (#181364)   via llvm-commits
• [llvm] 4a78803 - AMDGPU: Cleanup the handling of flags in getTgtMemIntrinsic (#179469)   via llvm-commits
• [llvm] 3df1c6f - [VPlan] Add simple driver option to run some individual transforms. (#178522)   via llvm-commits
• [llvm] 6d37110 - Revert "RuntimeLibcalls: Fix adding __safestack_pointer_address by default" (#182949)   via llvm-commits
• [compiler-rt] 9146da3 - [ASan][Fuchsia] Have Fuchsia use a dynamic shadow start (#180880)   via llvm-commits
• [compiler-rt] [ASan][Fuchsia] Have Fuchsia use a dynamic shadow start (PR #180880)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] a8f3c97 - Implemented metric that gets biggest function's size (#182632)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] WaitEventSet const_iterator (PR #182965)   via llvm-commits
• [compiler-rt] Revert "[ASan][Fuchsia] Have Fuchsia use a dynamic shadow start" (PR #182972)   via llvm-commits
• [llvm] [LoopUnrollPass] Add more LLVM_DEBUG statements (PR #182981)   via llvm-commits
• [llvm] a17a305 - [LLVM] Metric added - largest number of basic blocks in a single func… (#182970)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] [NFC][ThinLTO] Check that refs between split modules have the same GUID (PR #182982)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] 1b47242 - [CHR] Skip regions containing convergent calls (#180882)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `using llvm::AMDGPU` (PR #180782)   via llvm-commits
• [llvm] [NFC][ThinLTO] Check that refs between split modules have the same GUID (PR #182982)   via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   via llvm-commits
• [llvm] [Sample Profile] make page size configurable for ProfiledBinary (PR #164773)   via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] 0ab1d23 - [DWARFLinker] Use DIEEntry for backward ref_addr references (#181881)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] a96daba - [DWARFLinker] Fix buildbot crash: NewUnit can be null during garbage (#182993)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [NFC][llvm] Fix incomplete type issues in LLVM (PR #182655)   via llvm-commits
• [llvm] 0b8bb80 - [MC] Fix crash in x=0; .section x (#183001)   via llvm-commits
• [llvm] Reapply "RuntimeLibcalls: Fix adding __safestack_pointer_address by default" (#182949) (PR #183005)   via llvm-commits
• [llvm] d59d00a - [AArch64] Match CTPOP combine without zero extend (#182859)   via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit test for COPY_SCC_VCC combine (PR #179351)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] 1bc2446 - [WebAssembly] Use generic CPU by default in llvm-mc (#181460)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [LLVM][NVPTX] Fix infinite legalization loop in tcgen05.st when debuginfo is enabled (PR #183012)   via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   via llvm-commits
• [compiler-rt] a84ee14 - [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (#179918)   via llvm-commits
• [llvm] Revert "[VPlan] Strengthen materializeFactors with assert (NFC) (#181665)" (PR #183014)   via llvm-commits
• [llvm] [X86][GlobalIsel] Support shuffle vector (PR #183015)   via llvm-commits
• [llvm] [X86][GlobalIsel] Support shuffle vector (PR #183015)   via llvm-commits
• [llvm] [X86][GlobalIsel] Support shuffle vector (PR #183015)   via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   via llvm-commits
• [llvm] 7c5c58c - [X86] getFauxShuffleMask - OR(SHUF(), SHUF()) - treat undemanded elements as undef (#182678)   via llvm-commits
• [llvm] Support unnamed functions in MIR parser (PR #183018)   via llvm-commits
• [llvm] [X86][GlobalIsel] Support shuffle vector (PR #183015)   via llvm-commits
• [llvm] [X86][GlobalIsel] Support shuffle vector (PR #183015)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] 5c002d0 - [NFC][AArch64] AArch64ConditionOptimizer extract shared instruction finding logic (#182244)   via llvm-commits
• [llvm] [X86][GlobalIsel] Support shuffle vector (PR #183015)   via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   via llvm-commits
• [llvm] [DAG] ISD::matchUnaryPredicate / matchUnaryFpPredicate / matchBinaryPredicate - add DemandedElts variant (PR #183013)   via llvm-commits
• [llvm] cfaa67b - [Thumb2] mve-vmovimm.ll - regenerate with missing check prefixes (#183019)   via llvm-commits
• [llvm] [AArch64] Refine reduction VT selection in CTPOP -> VECREDUCE combine (PR #183025)   via llvm-commits
• [llvm] [Support] Fix APFloat conversion crash on zero-bit APInt (PR #183026)   via llvm-commits
• [llvm] [Support] Fix APFloat conversion crash on zero-bit APInt (PR #183026)   via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] a3f9e63 - [AMDGPU][MC] Validate atomics with TH_ATOMIC_RETURN (#182888)   via llvm-commits
• [llvm] c94cf32 - [LLVM][ConstantFolding] Add vector ConstantInt/FP support to ReadDataFromGlobal. (#182530)   via llvm-commits
• [llvm] e5a40fe - [LoopInterchange] Update tests for reduction2mem (NFC) (#181629)   via llvm-commits
• [llvm] 37eee8a - [DA] Rewrite the formula in the Strong SIV test (#179665)   via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   via llvm-commits
• [llvm] [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (PR #183029)   via llvm-commits
• [llvm] 8645065 - [LLVM][ValueTracking] Add vector ConstantInt/FP support to isBytewiseValue(). (#182519)   via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] [StandardInstrumentations] Add helper class to StandardInstrumentations (PR #153171)   via llvm-commits
• [llvm] [ConstantFolding] Respect AllowNonDeterministic when flushing denormals (PR #183031)   via llvm-commits
• [llvm] [StandardInstrumentations] Add helper class to StandardInstrumentations (PR #153171)   via llvm-commits
• [llvm] eff183b - [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (#172837)   via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for rounding nodes (PR #173004)   via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for rounding nodes (PR #173004)   via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for lowering fp_to_int nodes (PR #173001)   via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for lowering fp_to_int nodes (PR #173001)   via llvm-commits
• [llvm] [Mips] Remove NoNaNsFPMath uses (PR #183045)   via llvm-commits
• [llvm] db9d024 - [vim] Set commentstring for TableGen files (#182654)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (PR #183032)   via llvm-commits
• [llvm] [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (PR #183032)   via llvm-commits
• [llvm] [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (PR #183032)   via llvm-commits
• [llvm] [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (PR #183032)   via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] 0ad19bc - [ValueTracking][unittest] Add `impliesPoison` unit tests for `select` instruction (NFC) (#183029)   via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   via llvm-commits
• [llvm] [PtrUseVisitor] Support llvm.structured.gep (PR #183052)   via llvm-commits
• [llvm] [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (PR #181755)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [AArch64] Custom Lower abds and abdu to avoid regressions caused by freezes (PR #177992)   via llvm-commits
• [llvm] ba6c7d0 - [AArch64] Remove NoNaNsFPMath uses (#180462)   via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   via llvm-commits
• [llvm] d75ca40 - [LLVM][CodeGen] Consolidate sub-register index names into a single string (#182651)   via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [Thumb2] Use BXAUT instruction if available (PR #183056)   via llvm-commits
• [llvm] [Thumb2] Use BXAUT instruction if available (PR #183056)   via llvm-commits
• [llvm] [LLVM][SimplifyCFG] Allow switch-to-table for some vector constants. (PR #183057)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] 2e40d2b - [LICM] Handle disjoint or's in hoistAdd (#182915)   via llvm-commits
• [llvm] [SPIRV] Simplify `selectPhi` (PR #183060)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] 72c0a07 - [VPlan] Move out canNarrowOps (NFC). (#167309)   via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   via llvm-commits
• [llvm] bddc8e2 - [AMDGPU] Replace getAllocatedType with getAllocationSize in PromoteAlloca (#179523)   via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   via llvm-commits
• [llvm] bc8302d - Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy" (#180002)   via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   via llvm-commits
• [llvm] [LV] Restrict scalable vectorization to targets with power-of-2 vscale (PR #183065)   via llvm-commits
• [llvm] [LLVM][AArch64] Allow vector converts to run in streaming mode with … (PR #177375)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [Thumb2] Use BXAUT instruction if available (PR #183056)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [LV] Remove runtime IV overflow checks (PR #183066)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] 049cfda - [LLVM] Port 'llvm-gpu-loader' to use LLVMOffload (#162739)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] [ValueTracking] impliesPoison(V, Cond ? V : V) = true (PR #183059)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] 1eb8ab7 - [AMDGPU] Add VOPC to gfx13 (#182293)   via llvm-commits
• [flang] [llvm] [flang-rt] Add PDT LEN parameter support: Concrete type cache (PR #181008)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] [ARM] tADDrSPi no side effects change (PR #183071)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [IR] Specify alloca with poison element count (PR #183072)   via llvm-commits
• [llvm] Restore #125407, Make covmap tolerant of nested Decisions (PR #183073)   via llvm-commits
• [llvm] [Thumb2] Use BXAUT instruction if available (PR #183056)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   via llvm-commits
• [llvm] [AMDGPU]Implement get addr space cast preserved ptr mask (PR #182658)   via llvm-commits
• [llvm] 7a83886 - [X86] lowerShuffleAsLanePermuteAndRepeatedMask - consistently move V2.isUndef handling inside the function. NFC. (#183069)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] 8854dd0 - [IR] Specify alloca with poison element count (#183072)   via llvm-commits
• [llvm] 76699fb - [MLIR][NVVM][NVPTX] Support for new mma/mma.sp variants from PTX 9.1 (#182325)   via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize and fold (PR #182782)   via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   via llvm-commits
• [llvm] [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (PR #183080)   via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   via llvm-commits
• [lld] [llvm] [WebAssembly] Take symbol flags for exports from the dylink section for shared objects (PR #183079)   via llvm-commits
• [llvm] [Hexagon] Avoid contracting predicates in createHvxPrefixPred (PR #183081)   via llvm-commits
• [llvm] [LICM] Reassociate add/sub expressions to hoist invariant computations (PR #183082)   via llvm-commits
• [llvm] [Hexagon] Avoid contracting predicates in createHvxPrefixPred (PR #183081)   via llvm-commits
• [llvm] 6e5cc82 - [LAA][LV]Allow recognition of strided pointers with constant stride (#171151)   via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   via llvm-commits
• [llvm] [AArch64] Fix more typos (NFC) (PR #183086)   via llvm-commits
• [llvm] [X86] add X86DomainReassignmentPass to x86 npm pipeline (PR #183088)   via llvm-commits
• [llvm] e147b3a - [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (#179504)   via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   via llvm-commits
• [llvm] [Github] Turn on prune-unused-branches workflow (PR #182985)   via llvm-commits
• [compiler-rt] 2e7d07a - [sanitizer_common] [Darwin] Adopt _dyld_get_dyld_header (#182943)   via llvm-commits
• [llvm] 1c11f94 - [lldb][Process/FreeBSDKernel] Rename to FreeBSDKernelCore (#182878)   via llvm-commits
• [llvm] f2f3300 - [X86] add X86DomainReassignmentPass to x86 npm pipeline (#183088)   via llvm-commits
• [llvm] f9e0a99 - [LoopUnrollPass] Fix capitalization in `LLVM_DEBUG` (#182429)   via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize and fold (PR #182782)   via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize (PR #182782)   via llvm-commits
• [llvm] e8d8f8c - [LLVM][SimplifyCFG] Make validLookupTableConstant explicitly reject vector types. (#182555)   via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize (PR #182782)   via llvm-commits
• [llvm] [LAA] NFC: Rename mulSCEVOverflow to mulSCEVNoOverflow (PR #183096)   via llvm-commits
• [llvm] [LAA] NFC: Rename mulSCEVOverflow to mulSCEVNoOverflow (PR #183096)   via llvm-commits
• [llvm] [LV][NFC] Regen CHECK lines in LoopVectorize/AArch64/veclib-intrinsic-calls.ll (PR #183098)   via llvm-commits
• [llvm] [SimplifyLibCalls] Avoid simplifying pow(x, 2.0) -> x * x with math-errno. (PR #183099)   via llvm-commits
• [llvm] 7ed50d6 - [ADT] Add StringRef::rfind_if/rfind_if_not (#182928)   via llvm-commits
• [llvm] [NFCI] Make all SI_KILL* convergent (PR #183100)   via llvm-commits
• [llvm] [NFCI] Make all SI_KILL* convergent (PR #183100)   via llvm-commits
• [llvm] f3c5ab0 - [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (#182170)   via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit memcpy test with complex constant length (PR #182170)   via llvm-commits
• [llvm] 61d40e2 - [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (#182615)   via llvm-commits
• [llvm] [SDPatternMatch] Add `m_ConstInt` overloads with `uint64_t`/`int64_t` operands (PR #182615)   via llvm-commits
• [llvm] [ConstantFolding] Fold powf in single-precision. (PR #183102)   via llvm-commits
• [compiler-rt] [TSan] Fix determining static TLS blocks (PR #183106)   via llvm-commits
• [llvm] [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (PR #183074)   via llvm-commits
• [llvm] f0289f0 - [Hexagon] Avoid contracting predicates in createHvxPrefixPred (#183081)   via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize (PR #182782)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [SystemZ] Extend #179838 to include more loads to rematerialize (PR #182782)   via llvm-commits
• [llvm] [AMX][NFC] Match pseudo name with isa (PR #182235)   via llvm-commits
• [llvm] [AMX][NFC] Match pseudo name with isa (PR #182235)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] 59661a2 - [LLVM][LangRef] Restrict vscale to be a signed power-of-two integer. (#183080)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [llvm] 1b9fea0 - [X86] lowerV64I8Shuffle - avoid lowerShuffleAsRepeatedMaskAndLanePermute call on VBMI targets (#183109)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor setpayloadsig family to header-only (PR #183113)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor setpayloadsig family to header-only (PR #183113)   via llvm-commits
• [llvm] [Github] Make prune unused branches workflow correctly handle reverts (PR #183114)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor setpayloadsig family to header-only (PR #183113)   via llvm-commits
• [llvm] [RISCV] Document some of the names we require for getNamedOperandIdx. NFC (PR #182687)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   via llvm-commits
• [llvm] ba0e082 - [RISCV] Document some of the names we require for getNamedOperandIdx. NFC (#182687)   via llvm-commits
• [llvm] 04ca29e - [RISCV] Expand more TruncStore and LoadExt operations for P extension. (#182995)   via llvm-commits
• [libc] [llvm] [libc][math] Implement sqrti (PR #177960)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   via llvm-commits
• [llvm] e1be4df - [Hexagon] Disable new value jumps when packetizer is disabled (#180615)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nexttoward family to header-only (PR #181685)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nexttoward family to header-only (PR #181685)   via llvm-commits
• [llvm] b66fae3 - GVN: Inhibit PRE for llvm.protected.field.ptr.   via llvm-commits
• [lld] 27533c7 - Reland "CodeGen: Emit .prefalign directives based on the prefalign attribute."   via llvm-commits
• [llvm] [AMDGPU] Remove slow VOPD assert (PR #183166)   via llvm-commits
• [compiler-rt] ac45132 - Reapply "[ASan][Fuchsia] Have Fuchsia use a dynamic shadow start" (#182972) (#183154)   via llvm-commits
• [compiler-rt] Reapply "[ASan][Fuchsia] Have Fuchsia use a dynamic shadow start" (#182972) (PR #183154)   via llvm-commits
• [clang] [llvm] [NFC] Add comments for PR “[LLVM][CLANG] Update signal‑handling behavior to comply with POSIX” (PR #183206)   via llvm-commits
• [clang] [llvm] [NFC] Add comments for PR “[LLVM][CLANG] Update signal‑handling behavior to comply with POSIX” (PR #183206)   via llvm-commits
• [flang] [llvm] [flang][runtime] Catch asynchronous parent or child I/O (PR #183161)   via llvm-commits
• [clang] [compiler-rt] [tsan] Add simulation to TSAN (PR #183200)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instr events code into separate function (PR #180864)   via llvm-commits
• [llvm] [SandboxVec][NFC] Update test checks (PR #183216)   via llvm-commits
• [llvm] [RISCV] Remove unnecessary And before seteq/ne in some cases. (PR #183221)   via llvm-commits
• [llvm] Add LIT tests for DS loop waitcnt prefetch flushed (tests-only PR) (PR #183217)   via llvm-commits
• [llvm] Add LIT tests for DS loop waitcnt prefetch flushed (tests-only PR) (PR #183217)   via llvm-commits
• [llvm] [AMDGPU] Add LIT tests for DS loop waitcnt prefetch flushed (tests-only PR) (PR #183217)   via llvm-commits
• [lld] [lld][RISCV] More fine-grained __global_pointer$ placement (PR #182029)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   via llvm-commits
• [lld] [lld][LoongArch] Support reloc types for LA32R/LA32S (PR #172618)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Address post-commit comments for #180864 (PR #183232)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Address post-commit comments for #180864 (PR #183232)   via llvm-commits
• [lld] [lld][LoongArch] Fix range checking of R_LARCH_*_PCADD_HI20 relocations on 64-bit (PR #183233)   via llvm-commits
• [lld] [lld][LoongArch] Fix range checking of R_LARCH_*_PCADD_HI20 relocations on 64-bit (PR #183233)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   via llvm-commits
• [llvm] [RISCV] Add missing immediates to check lines in rv32p-valid.s and rv64p-valid.s. NFC (PR #183238)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [RISCV] Support scalar bitreverse using P extension rev instruction. (PR #183245)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   via llvm-commits
• [llvm] [AArch64] Reject non-constant expressions in tryParseAdjImm0_63 (PR #183246)   via llvm-commits
• [llvm] [AArch64] Reject non-constant expressions in tryParseAdjImm0_63 (PR #183246)   via llvm-commits
• [llvm] [AArch64] Reject non-constant expressions in tryParseAdjImm0_63 (PR #183246)   via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] 550c65b - [SystemZ] Allow folding from another MBB in foldMemoryOperandImpl(). (#182921)   via llvm-commits
• [llvm] [DAG] foldShiftToAvg - recognize sub(x, xor(y, -1)) >> 1 as avgceil[su] (PR #182616)   via llvm-commits
• [llvm] 9d5574d - llvm: Delete bugpoint (#182320)   via llvm-commits
• [llvm] [X86] Handle VPMADD52L for smaller min-legal-vector-width (PR #183250)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::OR DemandedElts handling (PR #183228)   via llvm-commits
• [llvm] db5a570 - [RISCV] Make P imply Zba, Zbb, Zmmul, and Zicsr. (#183247)   via llvm-commits
• [llvm] 55ce4b7 - Reapply "[ORC] Simplify WaitingOnGraph::Coalescer::remove." (#183231)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Emit signed loads for sext of i8/i16/i32 (PR #182767)   via llvm-commits
• [llvm] [profcheck] Expose likely/unlikely weights as constants in MDBuilder (PR #183252)   via llvm-commits
• [llvm] 2fc45ba - [MC] Set UseAtForSpecifier in initializeAtSpecifiers and default to false (#183253)   via llvm-commits
• [llvm] bc76535 - [LV][NFC] Regen CHECK lines in LoopVectorize/AArch64/veclib-intrinsic-calls.ll (#183098)   via llvm-commits
• [llvm] bded7e9 - [AArch64][GISel] Fix computeKnownBits through a COPY with different fixed-width vector types (#179123)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] GlobalISel: Make CombinerInfo const (PR #183263)   via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   via llvm-commits
• [llvm] [ARM] Explicitly mark certain instructions as having no side effects. (PR #182771)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] b830bcf - [AMDGPU]Fix compute num sign bits unsigned underflow (#182723)   via llvm-commits
• [llvm] [AMDGPU]Fix compute num sign bits unsigned underflow (PR #182723)   via llvm-commits
• [llvm] efcf64e - [DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (#183032)   via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [LoopInterchange] Optimize the way of insertion for the FirstIteration PHINode. (PR #183273)   via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   via llvm-commits
• [llvm] FunctionAttrs: Propagate nofpclass from callsite arguments (PR #183277)   via llvm-commits
• [llvm] 58f4da4 - [SimplifyLibCalls] Avoid simplifying pow(x, 2.0) -> x * x with math-errno. (#183099)   via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemanedBits (PR #183270)   via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemanedBits (PR #183270)   via llvm-commits
• [llvm] [llvm][release] Note that some packages have 2 signature files (PR #183266)   via llvm-commits
• [llvm] 641c32e - [LoopInterchange] Fix test phi-ordering.ll (NFC) (#181989)   via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   via llvm-commits
• [llvm] d25b7f7 - [NFC][CodeGen] Add Register guard to ARMMaterializeFP. (#182559)   via llvm-commits
• [llvm] db5ffb0 - [ORC] WaitingOnGraph perf: faster dependence propagation. (#183272)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] f55a5cf - [OpenMP] Only generate call to __kmpc_global_thread_num when needed (#182669)   via llvm-commits
• [llvm] [LV] Transform tests for early-exit with stores (PR #183288)   via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [llvm] cfca635 - [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (#180178)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183237)   via llvm-commits
• [llvm] 9d55f14 - [SPIRV][AMD] Reenable `SPV_KHR_float_control2` for AMD flavored SPIRV (#182873)   via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   via llvm-commits
• [llvm] [SROA][Target] Add requiresStructuredGEP to TTI (PR #183296)   via llvm-commits
• [llvm] 90144c2 - [WebAssembly] optimize ext + shuffle + add into addext (#182849)   via llvm-commits
• [llvm] 717a9ab - [InstSimplify] Add support for llvm.structured.gep (#182874)   via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   via llvm-commits
• [llvm] 87d9dad - [NFC] Address unresolved comments on #172837 (#183284)   via llvm-commits
• [llvm] [NFC] Address unresolved comments on #172837 (PR #183284)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [Mips] Remove NoNaNsFPMath uses (PR #183045)   via llvm-commits
• [llvm] c1b2477 - [LAA] NFC: Rename mulSCEVOverflow to mulSCEVNoOverflow (#183096)   via llvm-commits
• [llvm] 3e1545b - [LLVM] Refine MemoryEffect handling for target-specific intrinsics (#155590)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   via llvm-commits
• [llvm] 4c8ad96 - [SPIRV] Implement Gather and GatherCmp intrinsics (#182578)   via llvm-commits
• [llvm] ab360b1 - [LLVM][TTI] Remove the isVScaleKnownToBeAPowerOfTwo hook. (#183292)   via llvm-commits
• [llvm] [CMake][IR] Add PCH (PR #183303)   via llvm-commits
• [llvm] [Mips] Remove NoNaNsFPMath uses (PR #183045)   via llvm-commits
• [llvm] [Mips] Remove NoNaNsFPMath uses (PR #183045)   via llvm-commits
• [llvm] Fix SafeStack crashing with scalable TypeSizes (PR #180547)   via llvm-commits
• [llvm] bf4705c - [VPlan] Supported conditionally executed single early exits. (#182395)   via llvm-commits
• [llvm] [CFGPrinter] Allow set hide paths at runtime (PR #172206)   via llvm-commits
• [llvm] AMDGPU: llvm.amdgcn.trig.preop cannot return negative values (PR #183306)   via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   via llvm-commits
• [llvm] [VPlan] Don't drop NUW flag on tail folded canonical IVs (PR #183301)   via llvm-commits
• [llvm] [HEXAGON] fp_to_uint conversion for v32f32 to v32i1 (PR #183248)   via llvm-commits
• [llvm] 5aa1c38 - [NFCI] Make all SI_KILL* convergent (#183100)   via llvm-commits
• [llvm] [NFCI] Make all SI_KILL* convergent (PR #183100)   via llvm-commits
• [llvm] [LV] Add debug print for TTI.MaxInterleaveFactor (NFC) (PR #183309)   via llvm-commits
• [llvm] [LV] Add debug print for TTI.MaxInterleaveFactor (NFC) (PR #183309)   via llvm-commits
• [compiler-rt] [TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (PR #183310)   via llvm-commits
• [compiler-rt] [TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (PR #183310)   via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   via llvm-commits
• [llvm] [mlir] [mlir][x86] Rename x86vector to x86 (PR #183311)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [AMDGPU] Ignore unused VALU src0/1/2 fields when disassembling (PR #175182)   via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] cb9f3ee - [SPIRV] Enable SPV_EXT_relaxed_printf_string_address_space by default for Intel (#183103)   via llvm-commits
• [compiler-rt] [TySan][Sanitizer Common] Make TySan compatible with sanitizer common… (PR #183310)   via llvm-commits
• [llvm] e77f11c - [NFC][RegisterInfoEmitter] Add target name prefix for a few variables (#183074)   via llvm-commits
• [llvm] 3d25128 - [lldb][Process/FreeBSDKernel] Add arm support (#180674)   via llvm-commits
• [llvm] [GVN] Forward store values through select addresses in findDominatingValue (PR #183316)   via llvm-commits
• [llvm] [AArch64] Add lowering for misc NEON intrinsics (PR #183050)   via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [LV] Adjust exit recipe detection to run on early vplan (PR #183318)   via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] 8d2d8be - [profcheck] Expose likely/unlikely weights as constants in MDBuilder (#183252)   via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   via llvm-commits
• [llvm] [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (PR #183329)   via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   via llvm-commits
• [llvm] [CFGPrinter] Allow set hide paths at runtime (PR #172206)   via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   via llvm-commits
• [llvm] [InstCombine] fold range checks for reassociated logical and/or (PR #183331)   via llvm-commits
• [llvm] [InstCombine] fold range checks for reassociated logical and/or (PR #183331)   via llvm-commits
• [llvm] [InstCombine] fold range checks for reassociated logical and/or (PR #183331)   via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   via llvm-commits
• [llvm] [InstCombine] fold range checks for reassociated logical and/or (PR #183331)   via llvm-commits
• [llvm] e044af8 - [CMake][IR] Add PCH (#183303)   via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   via llvm-commits
• [lld] [llvm] [WebAssembly] Allow strings for import modules and names in asm (PR #182896)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   via llvm-commits
• [llvm] [InstCombine] fold range checks for reassociated logical and/or (PR #183331)   via llvm-commits
• [llvm] [AArch64] Vectorise llvm.pow using vector intrinsic for ArmPL library (PR #183319)   via llvm-commits
• [llvm] [AMDGPU] Ensure all DPP instructions are convergent (PR #183334)   via llvm-commits
• [llvm] 219b5a0 - build: alter condition for adding `_DEBUG` CPP macro (#183120)   via llvm-commits
• [llvm] [AMDGPU] Ensure all DPP instructions are convergent (PR #183334)   via llvm-commits
• [llvm] [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (PR #181601)   via llvm-commits
• [llvm] 333ef64 - [RISCV] Remove unnecessary And before seteq/ne in some cases. (#183221)   via llvm-commits
• [llvm] 118f64a - [RISCV] Remove -riscv-enable-p-ext-simd-codegen (#183156)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Address post-commit comments for #180864 (PR #183232)   via llvm-commits
• [llvm] [NFC][ADT] Remove indentation of StringRef class (PR #183317)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Add riscv64 support (PR #180670)   via llvm-commits
• [llvm] 1e676e7 - [SelectionDAG] Use virtual registers instead of arbitrary physical registers in unit tests. NFC (#183205)   via llvm-commits
• [llvm] 9d7c786 - [X86] Add vector demanded elts pow2 test for #183270 (#183327)   via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   via llvm-commits
• [llvm] [DAGCombiner] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   via llvm-commits
• [llvm] 6d2a2e6 - [RISCV] Make ElementsDependOn opt-in instead of opt-out. NFCI (#181601)   via llvm-commits
• [llvm] c221e2a - [Hexagon] Handle trunc to i1 in matchRightShift (#174737)   via llvm-commits
• [llvm] [MC] Remove redundant setting of AllowDollarAtStartOfIdentifier. NFC (PR #183339)   via llvm-commits
• [llvm] [MC] Remove redundant setting of AllowDollarAtStartOfIdentifier. NFC (PR #183339)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] WaitEventSet const_iterator (PR #182965)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] WaitEventSet const_iterator (PR #182965)   via llvm-commits
• [llvm] [MC] Remove redundant setting of AllowDollarAtStartOfIdentifier. NFC (PR #183339)   via llvm-commits
• [llvm] [MC] Consistent use of inline field initializers in MCAsmInfo (PR #183343)   via llvm-commits
• [llvm] 4fec4df - [InstCombine] Fold min/max of two subtracts with common RHS (#183240)   via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   via llvm-commits
• [llvm] [SPIRV] Fix disabling of default extensions (PR #183325)   via llvm-commits
• [llvm] 1053047 - [SandboxVec][NFC] Update test checks (#183216)   via llvm-commits
• [llvm] [SandboxVec][NFC] Update test checks (PR #183216)   via llvm-commits
• [llvm] a59b4fc - [RISCV] Replace whitelist with elementsDependOnVL in RISCVVLOptimizer. NFC (#181619)   via llvm-commits
• [llvm] a8f5f4a - [VPlan] Assert vplan-verify-each result and fix LastActiveLane verification (#182254)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor nextup family to header-only (PR #181688)   via llvm-commits
• [llvm] [AMX][NFC] Match pseudo name with isa (PR #182235)   via llvm-commits
• [llvm] [AMDGPU][SIPreEmitPeephole] Fold consecutive `s_cselect_b32`s (PR #183357)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor float16 operations to header-only (PR #181745)   via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   via llvm-commits
• [llvm] [LoopFusion] clear FusionCandidates more often (PR #183353)   via llvm-commits
• [llvm] [LoopFusion] clear FusionCandidates more often (PR #183353)   via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   via llvm-commits
• [llvm] [AMDGPU] Add dereferenceable retAttr to a call to llvm.amdgcn.implicitarg.ptr (PR #182206)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   via llvm-commits
• [llvm] [RISCV] Support scalar bitreverse using P extension rev instruction. (PR #183245)   via llvm-commits
• [llvm] [RISCV] Support scalar bitreverse using P extension rev instruction. (PR #183245)   via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   via llvm-commits
• [compiler-rt] [scudo] Add reallocarray C wrapper. (PR #183385)   via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   via llvm-commits
• [llvm] 3031ba9 - [CodeGen] Expand power-of-2 div/rem at IR level in ExpandIRInsts. (#180654)   via llvm-commits
• [llvm] [llvm][tools] Stack usage analysis scripts (PR #183399)   via llvm-commits
• [llvm] [LLVM] [SeparateConstOffsetFromGEP] Fix sep-const-offset-from-gep invalid assumption (PR #183402)   via llvm-commits
• [llvm] [LLVM] [SeparateConstOffsetFromGEP] Fix sep-const-offset-from-gep invalid assumption (PR #183402)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] 8539dca - [MC] Consistent use of inline field initializers in MCAsmInfo (#183343)   via llvm-commits
• [lld] f38e7b1 - [lld][WebAssembly] Remove comment about wasm-ld being WIP. NFC (#183410)   via llvm-commits
• [llvm] dc2dad6 - [NFC][IROutliner] Add test showing llvm.typeid.for not Outlined (#183406)   via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   via llvm-commits
• [llvm] [AMDGPU][NFC] Pre-commit test for COPY_SCC_VCC combine (PR #179351)   via llvm-commits
• [llvm] [RISCV] Add MERGE, MVM, and MVMN to isSignExtendedW in RISCVOptWInstrs. (PR #183433)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [llvm] [NFC][LICM] Update the comment about hoisting depend on block frequency (PR #183437)   via llvm-commits
• [llvm] ValueTracking/AMDGPU: handle mbcnt in computeKnownBitsFromOperator (PR #183229)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] dd9d242 - [RISCV] Treat zext.h as a separate instruction from pack(w) with Zbkb. (#183364)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [llvm] 8533889 - [RISCV] Partial support for using PPAIRE.B/H to optimize unaligned load sequences. (#183423)   via llvm-commits
• [llvm] d12870e - [RISCV] Add MERGE, MVM, and MVMN to isSignExtendedW in RISCVOptWInstrs. (#183433)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] [Mips] Remove NoNaNsFPMath uses (PR #183045)   via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   via llvm-commits
• [llvm] [llvm-symbolizer] Have --obj participate in markup resolution (PR #183444)   via llvm-commits
• [llvm] [BPF] Fix CORE optimization bug in BPFMISimplifyPatchable (PR #183446)   via llvm-commits
• [llvm] [NVPTX] Remove `NoNaNsFPMath` uses (PR #183447)   via llvm-commits
• [llvm] [BPF] Fix CORE optimization bug in BPFMISimplifyPatchable (PR #183446)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [llvm] [PowerPC] Remove `NoNaNsFPMath` uses (PR #183449)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] 0a9d7ff - [X86][AVX10] Change MINMAX sign control to select the sign of compare result (#183452)   via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   via llvm-commits
• [llvm] [AMDGPU] Pre-Commit tests for support one immediate folding for global load (PR #178607)   via llvm-commits
• [llvm] [InstCombine] Fix non-convergence with freeze/phi folding (PR #182647)   via llvm-commits
• [llvm] [AMDGPU] Pre-Commit tests for handle mbcnt in computeKnownBitsFromOperator (PR #178607)   via llvm-commits
• [llvm] [AMDGPU] Pre-Commit tests for handle mbcnt in computeKnownBitsFromOperator (PR #178607)   via llvm-commits
• [llvm] ab0823c - [TargetLowering][RISCV] Disable the special illegal type expansion of ISD::AVGFLOORU on RV32 (#181073)   via llvm-commits
• [llvm] ValueTracking/AMDGPU: handle mbcnt in computeKnownBitsFromOperator (PR #183229)   via llvm-commits
• [llvm] ValueTracking/AMDGPU: handle mbcnt in computeKnownBitsFromOperator (PR #183229)   via llvm-commits
• [llvm] ValueTracking/AMDGPU: handle mbcnt in computeKnownBitsFromOperator (PR #183229)   via llvm-commits
• [llvm] [NVPTX] Remove `NoNaNsFPMath` uses (PR #183447)   via llvm-commits
• [llvm] [ARM][MVE] Add SLI and SRI recognition. (PR #183471)   via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] 5dd1600 - [X86] Handle VPMADD52L for smaller min-legal-vector-width (#183250)   via llvm-commits
• [llvm] [GCOV] Modify the path parsing of gcov instrument filter (PR #183475)   via llvm-commits
• [llvm] [GCOV] Modify the path parsing of gcov instrument filter (PR #183475)   via llvm-commits
• [llvm] [GCOV] Modify the path parsing of gcov instrument filter (PR #183475)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] [WebAssembly] Optimize legalized vector multiplications into i32x4.dot_i16x8_s (PR #183244)   via llvm-commits
• [llvm] 3c566a6 - [LV] Fix miscompile with conditional scalar assignment + tail folding (#182492)   via llvm-commits
• [llvm] [GCOV] Modify the path parsing of gcov instrument filter (PR #183475)   via llvm-commits
• [llvm] [GCOV] Modify the path parsing of gcov instrument filter (PR #183475)   via llvm-commits
• [llvm] [GCOV] Modify the path parsing of gcov instrument filter (PR #183475)   via llvm-commits
• [llvm] [InstCombine] fold range checks for reassociated logical and/or (PR #183331)   via llvm-commits
• [llvm] [Mips] Remove NoNaNsFPMath uses (PR #183045)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] 72215a4 - [DwarfUnit] Fix comment mistake in shouldPlaceInUnitDIE() (#183481)   via llvm-commits
• [llvm] AMDGPU: Add FlatSignedOffset feature and use it for flat offset printing (PR #183483)   via llvm-commits
• [llvm] 850b045 - Revert "[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory()" (#183485)   via llvm-commits
• [lldb] [llvm] Revert "[lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory()" (PR #183485)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] [AMDGPU] Remove alignment constraint from spill pseudos (PR #177317)   via llvm-commits
• [llvm] 6d7ec4b - [DAG] Improved ISD::SHL handling in isKnownToBeAPowerOfTwo (#181882)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   via llvm-commits
• [llvm] bff5ef6 - [X86] Add i512 funnel shift / rotate test coverage (#183486)   via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   via llvm-commits
• [llvm] [NVPTX] Remove `NoNaNsFPMath` uses (PR #183447)   via llvm-commits
• [llvm] [NVPTX] Remove `NoNaNsFPMath` uses (PR #183447)   via llvm-commits
• [llvm] [NVPTX] Remove `NoNaNsFPMath` uses (PR #183447)   via llvm-commits
• [llvm] ec58575 - [Mips] Remove NoNaNsFPMath uses (#183045)   via llvm-commits
• [llvm] [Mips] Remove NoNaNsFPMath uses (PR #183045)   via llvm-commits
• [llvm] 230481c - CodeGen: Change error messages to follow phrasing guidance (#183488)   via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [llvm] [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (PR #183270)   via llvm-commits
• [llvm] [RISCV] Combine unaligned scalar ld -> aligned vector ld (PR #183336)   via llvm-commits
• [llvm] [AMDGPU] Fix encoding of inline constants in v_fma_mix_f32_bf16 (PR #183487)   via llvm-commits
• [llvm] d46a400 - [PowerPC] Remove `NoSignedZerosFPMath` uses (#180087)   via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   via llvm-commits
• [llvm] ff5dcb1 - [SPIRV] Simplify `selectPhi` and remove unreachable code (#183060)   via llvm-commits
• [llvm] [AMX][NFC] Match pseudo name with isa (PR #182235)   via llvm-commits
• [llvm] 90b3fd7 - [DAG] Move (X +/- Y) & Y --> ~X & Y fold from visitAnd to SimplifyDemandedBits (#183270)   via llvm-commits
• [llvm] cd68939 - [AMDGPU] Add attribute for FWD_PROGRESS (#181675)   via llvm-commits
• [llvm] [Hexagon] Add missing early architecture features to V81 processor (PR #183499)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [llvm] [Hexagon] Add missing early architecture features to V81 processor (PR #183499)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   via llvm-commits
• [llvm] f02c6ea - AMDGPU: llvm.amdgcn.trig.preop cannot return negative values (#183306)   via llvm-commits
• [llvm] 32b8b9b - [VPlan] Simplify ExitingIVValue and use for tail-folded IVs. (#182507)   via llvm-commits
• [llvm] 254cb2a - [AMDGPU] Hoist WMMA coexecution hazard V_NOPs from loops to preheaders (#176895)   via llvm-commits
• [llvm] [NFC][AArch64] Extract MOVaddr* expansion model into common header (PR #183503)   via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   via llvm-commits
• [llvm] [NFC][AArch64] Extract MOVaddr* expansion model into common header (PR #183503)   via llvm-commits
• [llvm] [SelectionDAG] Move fcmp conditions optimization to DAGCombiner (PR #174330)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   via llvm-commits
• [llvm] AMDGPU: Stop adding uniform-work-group-size=false (PR #183502)   via llvm-commits
• [llvm] [LoopUnrollAndJam] Update test dependencies.ll (NFC) (PR #183509)   via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   via llvm-commits
• [llvm] [LAA] Fix recordAnalysis receiving null Instruction pointer (PR #183512)   via llvm-commits
• [llvm] [PowerPC] Remove `NoNaNsFPMath` uses (PR #183449)   via llvm-commits
• [llvm] [PowerPC] Remove `NoNaNsFPMath` uses (PR #183449)   via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   via llvm-commits
• [llvm] [LoopUnrollAndJam] Update test unroll-and-jam.ll (NFC) (PR #183520)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [llvm] 841d511 - [LLVM][SimplifyCFG] Allow switch-to-table for some vector constants. (#183057)   via llvm-commits
• [llvm] [AArch64] Prefer `SADDLV` over `ADDV` for vector mask reductions (PR #183522)   via llvm-commits
• [llvm] 327f060 - [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (#182934)   via llvm-commits
• [llvm] [PowerPC] Remove `NoNaNsFPMath` uses (PR #183449)   via llvm-commits
• [llvm] [PowerPC] Remove `NoNaNsFPMath` uses (PR #183449)   via llvm-commits
• [llvm] [DAG] Fix OrZero in isKnownToBeAPowerOfTwo ISD::AND (PR #182934)   via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FPOW when using ArmPL (PR #183526)   via llvm-commits
• [llvm] 9ec7b02 - [JTS] Add statistics (#183431)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   via llvm-commits
• [llvm] [ARM] Port ConditionOptimizer to ARM (PR #151187)   via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   via llvm-commits
• [llvm] [AArch64] Add support for mi/pl in ConditionOptimizer (PR #183533)   via llvm-commits
• [llvm] [AArch64] Add support for mi/pl in ConditionOptimizer (PR #183533)   via llvm-commits
• [llvm] [AArch64] Add support for mi/pl in ConditionOptimizer (PR #183533)   via llvm-commits
• [llvm] 7516bc1 - [X86] Clearout unused FALLBACK check prefixes from vector extension/concatenation tests. NFC. (#183527)   via llvm-commits
• [llvm] fad15b9 - [SPIR-V] Add lowering for G_FEXP10 (#182466)   via llvm-commits
• [llvm] AMDGPU: Stop checking for r600 in printf pass (PR #183536)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FEXP10 (PR #182466)   via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   via llvm-commits
• [llvm] [NFC][AArch64] AArch64ConditionOptimizer Improve semantics of findSuitableCompare (PR #183532)   via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion choosing zext path when CL… (PR #183537)   via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion choosing zext path when CL… (PR #183537)   via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion (PR #183537)   via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion (PR #183537)   via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion (PR #183537)   via llvm-commits
• [llvm] [ARM] Port ConditionOptimizer to ARM (PR #151187)   via llvm-commits
• [llvm] bd5f938 - [VPlan] Extend interleave-group-narrowing to WidenCast (#183204)   via llvm-commits
• [llvm] 8b41ad4 - AMDGPU: Stop adding uniform-work-group-size=false (#183502)   via llvm-commits
• [llvm] [SelectionDAG] Fix CLMULR/CLMULH expansion (PR #183537)   via llvm-commits
• [llvm] 7ed40b5 - [AArch64] When lowering 16 bit vector bitcasts, convert to i16. (#178249)   via llvm-commits
• [llvm] b56137d - [AMDGPU] Ensure all DPP instructions are convergent (#183334)   via llvm-commits
• [llvm] [AMDGPU] Ensure all DPP instructions are convergent (PR #183334)   via llvm-commits
• [llvm] 1c2e9b1 - [X86] Clearout unused FALLBACK check prefixes from vector midpoint tests. NFC. (#183534)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [llvm] [X86][Gisel] add trivial arith tests for gisel x86-prelegalizer-combiner (PR #183544)   via llvm-commits
• [llvm] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   via llvm-commits
• [llvm] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [llvm] [AArch64] Decompose FADD reductions with known zero elements (PR #167313)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [llvm] 6df45ed - [AMDGPU][True16] change vdst_in regclass and remove opsel for cvt_pk_f8_fp32 pattern (#179995)   via llvm-commits
• [llvm] d161a22 - [AMDGPU] lower fptrunc.round(rtz) to cvt_pkrtz_f16_f32 (#177069)   via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   via llvm-commits
• [llvm] 6f736e2 - [Hexagon] Add missing early architecture features to V81 processor (#183499)   via llvm-commits
• [llvm] [Hexagon] Add missing early architecture features to V81 processor (PR #183499)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [clang] [llvm] [AArch64][clang][llvm] Add ACLE `stshh` atomic store builtin (PR #181386)   via llvm-commits
• [llvm] bbaf723 - [llvm/docs] Add advanced RTTI techniques to HowToSetUpLLVMStyleRTTI (#181863)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (PR #183553)   via llvm-commits
• [llvm] fd8b45c - [X86] vector-replicaton-i1-mask.ll - simplify check prefixes. NFC. (#183547)   via llvm-commits
• [llvm] 0141d82 - [X86] single_elt_vector_memory_operation.ll - simplify check prefixes. NFC. (#183545)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   via llvm-commits
• [llvm] 3a8081c - AMDGPU: Stop checking for r600 in printf pass (#183536)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Gather and Texture2D::GatherCmp (PR #183323)   via llvm-commits
• [llvm] 8d23abe - [IROutliner] Don't outline callsites with nomerge (#183387)   via llvm-commits
• [llvm] Fix memory type for vgather intrinsics (PR #183563)   via llvm-commits
• [llvm] [AArch64] Add support for mi/pl in ConditionOptimizer (PR #183533)   via llvm-commits
• [llvm] [AArch64] Add support for mi/pl in ConditionOptimizer (PR #183533)   via llvm-commits
• [llvm] [AArch64] Add support for mi/pl in ConditionOptimizer (PR #183533)   via llvm-commits
• [llvm] [AArch64] Add support for mi/pl in ConditionOptimizer (PR #183533)   via llvm-commits
• [llvm] Move AArch64 regression test to CodeGen (PR #183566)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   via llvm-commits
• [llvm] f14875f - [Clang] Enable response file support for 'llvm-offload-binary' (#183548)   via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   via llvm-commits
• [llvm] [SPIRV] Fix Phi Legalization (PR #183559)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] a17349f - [VectorCombine][X86] shuffle-of-casts.ll - add x86-64-v2 and x86-64-v4 test coverage (#183562)   via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   via llvm-commits
• [llvm] [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #183567)   via llvm-commits
• [llvm] [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (PR #183567)   via llvm-commits
• [llvm] [NFC][AArch64] isPureCmp is a duplicate of canAdjustCmp, so remove the duplicate (PR #183568)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [llvm] 11ed282 - ValueTracking: Teach computeKnownFPClass that multiply by <= 1 cannot overflow (#183159)   via llvm-commits
• [llvm] b9ad15f - [NFC][LICM] Update the comment about hoisting depend on block frequency (#183437)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [clang] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [llvm] 7cc976c - Move AArch64 regression test to CodeGen (#183566)   via llvm-commits
• [llvm] 1ad3a03 - [VectorCombine][X86] shuffle-of-casts.ll - add #165813 test coverage (#183569)   via llvm-commits
• [llvm] 9608d0a - [AMDGPU] Fix typo in test file name. NFC. (#183570)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [llvm] [VectorCombine][X86] Ensure we recognise free sign extends of vector comparison results (PR #183575)   via llvm-commits
• [llvm] [VectorCombine][X86] Ensure we recognise free sign extends of vector comparison results (PR #183575)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SRA/SRL DemandedElts handling and tests (PR #183577)   via llvm-commits
• [clang] [compiler-rt] [llvm] [memprof] Add Darwin platform support, fine-granularity shadow, v6 raw profile format (PR #182224)   via llvm-commits
• [llvm] Add remaining patterns for floating-point flag matches (PR #173912)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanpif16 to header-only (PR #181240)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [flang] [llvm] [flang][flang-rt][F202X][Issue #178494] Implement F202X leading-zero … (PR #183500)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #183542)   via llvm-commits
• [compiler-rt] compiler-rt: Use LLVM_THIRD_PARTY_DIR for siphash include (PR #166097)   via llvm-commits
• [compiler-rt] compiler-rt: Use LLVM_THIRD_PARTY_DIR for siphash include (PR #166097)   via llvm-commits
• [clang] [compiler-rt] [flang] [libc] [libcxx] [lldb] [llvm] [RFC][Clang] Add __int256/__uint256 builtin types (PR #182733)   via llvm-commits
• [llvm] dc66b51 - [PowerPC] Remove `NoNaNsFPMath` uses (#183449)   via llvm-commits
• [llvm] [PowerPC] Remove `NoNaNsFPMath` uses (PR #183449)   via llvm-commits
• [llvm] [VPlan] Replicate VPScalarIVStepsRecipe by VF outside replicate regions. (PR #170053)   via llvm-commits
• [llvm] 6bc9ba7 - [Hexagon] Fix memory type for vgather intrinsics (#183563)   via llvm-commits
• [llvm] [SampleProfileMatcher] Match IR direct calls against profile indirect calls (PR #183631)   via llvm-commits
• [llvm] [SampleProfileMatcher] Match IR direct calls against profile indirect calls (PR #183631)   via llvm-commits
• [llvm] [HLSL][SPIRV] Fix `faceforward` pattern matcher logic (PR #183630)   via llvm-commits
• [llvm] [HLSL][SPIRV] Fix `faceforward` pattern matcher logic (PR #183630)   via llvm-commits
• [llvm] e92dd71 - [RISCV] Add Defs = VXSAT to P extension instructions. (#183455)   via llvm-commits
• [flang] [llvm] [flang][cuda] Add support for cudaStreamDestroy (PR #183648)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Move VCCZ workaround code out of the way (PR #182619)   via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #182673)   via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #182673)   via llvm-commits
• [llvm] [flang-rt] Remove experiemental OpenMP offloading support (PR #183653)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   via llvm-commits
• [llvm] 46b6c97 - [LoopUnrollAndJam] Update test unroll-and-jam.ll (NFC) (#183520)   via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [llvm] [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (PR #183669)   via llvm-commits
• [llvm] 8f9c926 - Revert "AMDGPU: Fix runtime unrolling when cascaded GEPs present (#14… (#183641)   via llvm-commits
• [llvm] Revert "AMDGPU: Fix runtime unrolling when cascaded GEPs present (#14… (PR #183641)   via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   via llvm-commits
• [libc] [llvm] [libc][math][c23] implement C23 `acospif` math function (PR #183661)   via llvm-commits
• [llvm] [NVPTX] Refactor NVPTXLowerArgs and move helpers to NVPTXUtilities (PR #183686)   via llvm-commits
• [llvm] [AMX][NFC] Match pseudo name with isa (PR #182235)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   via llvm-commits
• [llvm] [AMX][NFC] Match pseudo name with isa (PR #182235)   via llvm-commits
• [llvm] [SimplifyCFG] Introduce a heuristic code sinker to fold phi expressions (PR #128171)   via llvm-commits
• [llvm] [NVPTX] Refactor NVPTXLowerArgs and move helpers to NVPTXUtilities (PR #183686)   via llvm-commits
• [llvm] [NVPTX] Refactor NVPTXLowerArgs and move helpers to NVPTXUtilities (PR #183686)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [LangRef] Clarify in vscale_range that vscale is already a power-of-two (PR #183689)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] 9270406 - [VectorCombine][X86] Ensure we recognise free sign extends of vector comparison results (#183575)   via llvm-commits
• [llvm] [InstCombine] fold commutative binop with const into select (PR #183692)   via llvm-commits
• [llvm] AMDGPU: Improve fsqrt f64 expansion with ninf (PR #183695)   via llvm-commits
• [llvm] 5af5bd4 - [AMX][NFC] Match pseudo name with isa (#182235)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_exp/exp_row (PR #181956)   via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Allow strings for import modules and names in asm (PR #182896)   via llvm-commits
• [llvm] [X86] Added sincos vector lib codegen test coverage (PR #183702)   via llvm-commits
• [llvm] d43213f - Revert "[VPlan] Don't drop NUW flag on tail folded canonical IVs (#183301)" (#183698)   via llvm-commits
• [compiler-rt] builtins: adjust the FP80 enablement check (PR #183647)   via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   via llvm-commits
• [llvm] 10b48e4 - [InstCombine] Combine extract from get_active_lane_mask where all lanes inactive (#183329)   via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   via llvm-commits
• [llvm] [AMDGPU] Set preferred function alignment based on icache geometry (PR #183064)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Remove unused CmpLGOp instruction (PR #180195)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [VPlan] Add nuw to unrolled canonical IVs (PR #183716)   via llvm-commits
• [llvm] [VPlan] Add nuw to unrolled canonical IVs (PR #183716)   via llvm-commits
• [llvm] 5e1d991 - [X86] stack-align.ll - regenerate test checks with no address scrubing (#183712)   via llvm-commits
• [llvm] [RISCV][NFC] Prepare for Short Forward Branch of branches with immediates (PR #182456)   via llvm-commits
• [llvm] [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (PR #183718)   via llvm-commits
• [llvm] [VPlan] Remove non-power-of-2 scalable VF comment. NFC (PR #183719)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [llvm] [X86] regenerate fcopysign test checks (PR #183710)   via llvm-commits
• [llvm] 1afd7d4 - [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (#175489)   via llvm-commits
• [llvm] [SPIRV] Fix compile warnings (PR #183725)   via llvm-commits
• [llvm] [SPIRV] Fix compile warnings (PR #183725)   via llvm-commits
• [llvm] [SPIRV] Fix compile warnings (PR #183725)   via llvm-commits
• [llvm] [SPIRV] Fix compile warnings (PR #183725)   via llvm-commits
• [llvm] [SPIRV] Fix compile warnings (PR #183725)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [llvm] [InstCombine] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (PR #183726)   via llvm-commits
• [llvm] [InstCombine] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (PR #183726)   via llvm-commits
• [llvm] [InstCombine] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (PR #183726)   via llvm-commits
• [llvm] 4d169f3 - [LangRef] Clarify in vscale_range that vscale is a power-of-two without the attribute (#183689)   via llvm-commits
• [llvm] [InstCombine] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (PR #183726)   via llvm-commits
• [llvm] 3676ae4 - [NFC][SPIRV] Remove dead code from `SPIRVPostLegalizer.cpp` (#183585)   via llvm-commits
• [llvm] d867128 - [VPlan] Add nuw to unrolled canonical IVs (#183716)   via llvm-commits
• [llvm] fc69531 - [LLVM][ExecutionEngine] Add vector ConstantInt/FP support to getConstantValue(). (#182538)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   via llvm-commits
• [llvm] [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (PR #183729)   via llvm-commits
• [clang] [llvm] [WebAssembly] Change half-precision feature name to fp16. (PR #105434)   via llvm-commits
• [llvm] [RFC][X86] Consistently only use SignBitMasks for FABS/FNEG/FCOPYSIGN patterns (PR #183731)   via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [llvm] 8a0be0b - [X86] Fold XOR of two vgf2p8affineqb instructions with same input (#179900)   via llvm-commits
• [compiler-rt] [SafeStack] Add unsafe sigaltstack support (PR #183733)   via llvm-commits
• [llvm] [RFC][X86] Consistently only use SignBitMasks for FABS/FNEG/FCOPYSIGN patterns (PR #183731)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] 20df251 - [LLVM][Runtimes] Add 'llvm-gpu-loader' to dependency list (#183601)   via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   via llvm-commits
• [llvm] [AArch64] Combine (and/or X, (dup (not Y))) -> (bic/orn X, (dup Y)) (PR #175739)   via llvm-commits
• [llvm] [AMDGPU] Use subtarget feature for flat offset bit width instead of arch checks (PR #183742)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Fold AND mask operations into ZExt load (PR #183743)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Fold AND mask operations into ZExt load (PR #183743)   via llvm-commits
• [llvm] bf3ab0d - [AMDGPU][Scheduler] Add `GCNRegPressure`-based methods to `GCNRPTarget` (#182853)   via llvm-commits
• [llvm] 9210d70 - [MIR] Error on signed integer in getUnsigned (#183171)   via llvm-commits
• [llvm] 7402312 - [NFC][SPIRV] Fix compile warnings (#183725)   via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix compilation fail in EXPENSIVE_CHECKS (PR #183745)   via llvm-commits
• [llvm] a8a6613 - [AMDGPU][Scheduler] Fix compilation fail in EXPENSIVE_CHECKS (#183745)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [llvm] [AArch64] Fix type mismatch in bitconvert + vec_extract patterns (PR #183549)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] 3702733 - [SelectionDAG] Fix CLMULR/CLMULH expansion (#183537)   via llvm-commits
• [llvm] [pdb] Fix libc++ strict-weak-ordering assertion failures from gsiRecordCmp (PR #183749)   via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   via llvm-commits
• [llvm] [SLP][NFC] Precommit test for zext reorder with duplicate shifts (PR #183748)   via llvm-commits
• [llvm] [SLP][NFC] Precommit test for zext reorder with duplicate shifts (PR #183748)   via llvm-commits
• [llvm] [AArch64] Add vector expansion support for ISD::FCBRT when using ArmPL (PR #183750)   via llvm-commits
• [llvm] [CodeGenPrepare] Update CodeGenPrepare::tryToSinkFreeOperands() to avoid duplicating instructions when sinking (PR #181037)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] ef05d06 - [lldb][Process/FreeBSDKernelCore] Implement DoWriteMemory() (#183553)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] d8956d7 - [SPIRV][NFCI] Use unordered data structures for SPIR-V extensions (#183567)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [llvm] 4eab75e - [SLP][NFC] Precommit test for zext reorder with duplicate shifts (#183748)   via llvm-commits
• [llvm] [Object][ELF] Fix section header zero check (PR #181796)   via llvm-commits
• [llvm] [GlobalISel] Combine sext(load), zext(load) patterns when the load has multiple uses (PR #182831)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] 11a92a9 - [SystemZ] Add indirect reference bit XATTR REFERENCE(INDIRECT) for indirect symbol handling support (#183441)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [ARM] Emit a warning when the hard-float ABI is enabled but can't be used. (PR #111334)   via llvm-commits
• [llvm] [ARM] Emit a warning when the hard-float ABI is enabled but can't be used. (PR #111334)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [LV] Remove DataAndControlFlowWithoutRuntimeCheck. NFC (PR #183762)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [llvm] [TTI] Remove TargetLibraryInfo from IntrinsicCostAttributes (NFC) (PR #183764)   via llvm-commits
• [llvm] [AArch64] Fix performZExtUZPCombine() DAG combine (PR #183765)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [llvm] 2265d32 - [pdb] Fix libc++ strict-weak-ordering assertion failures from gsiRecordCmp (#183749)   via llvm-commits
• [llvm] [Hexagon] Enable TSFlags2 usage (PR #183767)   via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   via llvm-commits
• [llvm] 9c53215 - [VPlan] Remove manual region removal when simplifying for VF and UF. (#181252)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Move VCCZ workaround code out of the way (PR #182619)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Move VCCZ workaround code out of the way (PR #182619)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Move VCCZ workaround code out of the way (PR #182619)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Move VCCZ workaround code out of the way (PR #182619)   via llvm-commits
• [llvm] [BPF] i128 direct return support (PR #183258)   via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   via llvm-commits
• [llvm] [BPF] i128 direct return support (PR #183258)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] Add TSFlags2 to carry upper TSFlags bits (PR #183766)   via llvm-commits
• [llvm] Add TSFlags2 to carry upper TSFlags bits (PR #183766)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Move VCCZ workaround code out of the way (PR #182619)   via llvm-commits
• [llvm] 975dba2 - [ThinLTO] Reduce the number of renaming due to promotions (#178587)   via llvm-commits
• [lld] 975dba2 - [ThinLTO] Reduce the number of renaming due to promotions (#178587)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #178587)   via llvm-commits
• [llvm] [SLP] Fix logic for commuting copyable operands in buildInstructionsState() (PR #183773)   via llvm-commits
• [llvm] [SLP] Fix logic for commuting copyable operands in buildInstructionsState() (PR #183773)   via llvm-commits
• [clang-tools-extra] [llvm] [Hexagon] Enable TSFlags2 usage (PR #183767)   via llvm-commits
• [clang-tools-extra] [llvm] [Hexagon] Enable TSFlags2 usage (PR #183767)   via llvm-commits
• [llvm] 729602e - Revert "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions" (#183774)   via llvm-commits
• [llvm] Revert "[SPIRV][NFCI] Use unordered data structures for SPIR-V extensions" (PR #183774)   via llvm-commits
• [llvm] 0617623 - [SPIR-V] Fix non-deterministic compiler output for debug type pointer (#182773)   via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   via llvm-commits
• [llvm] [SPIR-V] Don't consider a function be a builtin just by checking name (PR #182776)   via llvm-commits
• [llvm] [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (PR #183778)   via llvm-commits
• [llvm] [AMDGPU] Handle GFX1250 hazards between WMMA and VOPD (PR #183573)   via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   via llvm-commits
• [llvm] de4a1a7 - [clang][modules] Prevent deadlock in module cache (#182722)   via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   via llvm-commits
• [clang] [lld] [llvm] Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (PR #183782)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [clang] [lld] [llvm] Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (PR #183782)   via llvm-commits
• [clang] [lld] [llvm] Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (PR #183782)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [flang] [llvm] [flang] [flang-rt] Addition of the Fortran 2023 TOKENIZE intrinsic. (PR #181030)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [clang] [lld] [llvm] Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (PR #183782)   via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   via llvm-commits
• [llvm] d2c5452 - [RISCV] Use getCopyFromReg in unit test to match comment. NFC (#183199)   via llvm-commits
• [clang] [lld] [llvm] Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (PR #183782)   via llvm-commits
• [llvm] cd50a30 - Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (#183782)   via llvm-commits
• [clang] [lld] [llvm] Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (PR #183782)   via llvm-commits
• [lld] cd50a30 - Revert "[ThinLTO] Reduce the number of renaming due to promotions (#178587)" (#183782)   via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   via llvm-commits
• [llvm] [llvm-mc][dwarf] Bump supported version to DWARF 6 (PR #183779)   via llvm-commits
• [llvm] 179c25e - [MTE] [HWASan] support more complicated lifetimes   via llvm-commits
• [llvm] c3b3f41 - [SystemZ] Emit external aliases required for indirect symbol handling support (#183442)   via llvm-commits
• [llvm] 0d95dda - [LoopInfo] Preserve profile information in makeLoopInvariant (#174171)   via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 2/3] Add coverage baseline comparison and line table coverage in isolation (PR #183790)   via llvm-commits
• [llvm] [llvm-dwarfdump][LineCov 2/3] Add coverage baseline comparison and line table coverage in isolation (PR #183790)   via llvm-commits
• [llvm] 67a51ea - [NFC][POWER] add Pre-Commit test case for Inefficient std::bit_floor(x) (#183363)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   via llvm-commits
• [llvm] 6301243 - Reapply "[ValueTracking] Propagate sign information out of loop" (#182512)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [llvm] Changing MutableArrayRef constructor checks (PR #183796)   via llvm-commits
• [llvm] Support non-constant `G_BUILD_VECTOR` in X86. (PR #182502)   via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [llvm] c05e323 - [WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (#181755)   via llvm-commits
• [lld] [llvm] AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (PR #155776)   via llvm-commits
• [llvm] 403fd76 - [SlotIndexes] Further pack indices to improve spill placement time (#182640)   via llvm-commits
• [llvm] cf28f23 - [SLP] Reject duplicate shift amounts in matchesShlZExt reorder path (#183627)   via llvm-commits
• [llvm] 25d709e - [SystemZ] Emit external aliases for indirect function descriptors in the ADA section (#183443)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Move VCCZ workaround code out of the way (PR #182619)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Move VCCZ workaround code out of the way (PR #182619)   via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] WaitEventSet const_iterator (PR #182965)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   via llvm-commits
• [llvm] ee6f5f3 - [InstCombine] Replace alloca with undef size with poison instead of null (#182919)   via llvm-commits
• [lld] [lld] clang-format sources (PR #183805)   via llvm-commits
• [lld] [lld] clang-format sources (PR #183805)   via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   via llvm-commits
• [llvm] [TableGen] Allow specification of underlying type for GenericEnum (PR #183769)   via llvm-commits
• [llvm] Conservative, just add second constructor (PR #183806)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] WaitEventSet const_iterator (PR #182965)   via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   via llvm-commits
• [llvm] fff2f0b - [AMDGPU] Handle GFX1250 hazards between WMMA and VOPD (#183573)   via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::SHL DemandedElts handling and tests (PR #183772)   via llvm-commits
• [llvm] [llvm] fix: fix c++ narrowing conversion (PR #183784)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   via llvm-commits
• [llvm] [AArch64] Optimize vector multiplications by certain constants for v2i64 (PR #183827)   via llvm-commits
• [llvm] [X86][GISel] Add initial tests for x86 postleg combiner (PR #183844)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [llvm] [AMDGPU] Enable shift64 hazard recognition for gfx9 (PR #183839)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #183138)   via llvm-commits
• [llvm] [SandboxVec][DAG] Handle unscheduled successors when user is external (PR #183861)   via llvm-commits
• [llvm] e3c0454 - [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (#183541)   via llvm-commits
• [llvm] 5395d26 - Revert "[WebAssembly] Incorporate SCCs into WebAssemblyFixIrreducibleControlFlow (#181755)" (#183872)   via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] [SPIRV] Update the global registry when expanding function pointer (PR #183873)   via llvm-commits
• [llvm] 8bd8d8e - [AMDGPU] Remove extra pipes from load-saddr-offset-imm.ll (#183874)   via llvm-commits
• [flang] [llvm] [Flang] Fix wrong compile-time error message, issue #178494. (PR #183878)   via llvm-commits
• [llvm] [InstCombine] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (PR #183726)   via llvm-commits
• [llvm] [AArch64][SVE] Handle nxv1i1 INSERT_VECTOR_ELT in DAG lowering (PR #183454)   via llvm-commits
• [llvm] [InstCombine] Change the order of checks in SliceUpIllegalIntegerPHI for faster compile time. (PR #183726)   via llvm-commits
• [llvm] 6f9c68d - [VPlan] Don't adjust trip count for DataAndControlFlowWithoutRuntimeCheck (#183729)   via llvm-commits
• [llvm] fe76e90 - [CodeGen] Allow `-enable-ext-tsp-block-placement` and `-apply-ext-tsp-for-size` passed together (#183642)   via llvm-commits
• [llvm] bed8997 - AArch64: Replace @plt/%gotpcrel in data directives with %pltpcrel %gotpcrel (#155776)   via llvm-commits
• [llvm] 27d654c - [AMDGPU] Fix piggybacking after commute in AMDGPULowerVGPREncoding (#183778)   via llvm-commits
• [llvm] [CVP] Stop CVP constant propagation from destroying `llvm.assume` (PR #183688)   via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] 1ff1e5f - InstCombine: Stop applying nofpclass from use nofpclass attribute (#183835)   via llvm-commits
• [llvm] [AMDGPU] Add early LDS resource check before register allocation (PR #183888)   via llvm-commits
• [llvm] [AMDGPU] Add early LDS resource check before register allocation (PR #183888)   via llvm-commits
• [llvm] [AMDGPU] Add early LDS resource check before register allocation (PR #183888)   via llvm-commits
• [lld] [llvm] [CMake] Use keyword signature in two additional callsites (PR #183889)   via llvm-commits
• [lld] [llvm] [CMake] Use keyword signature in two additional callsites (PR #183889)   via llvm-commits
• [clang] [llvm] [mlir] [CMake] Propagate dependencies to OBJECT libraries in `add_llvm_library` (PR #183541)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [llvm] 55f9cf3 - RISCVMCAsmInfo: Remove redundant `UseAtForSpecifier = false`. NFC (#183890)   via llvm-commits
• [llvm] c40b0b2 - [llvm][DebugInfo] Bump DWARFContext maximum DWARF version (#183838)   via llvm-commits
• [llvm] ce3460e - [llvm][DebugInfo] Bump DWARFDebugLine maximum DWARF version (#183841)   via llvm-commits
• [llvm] 8f09282 - [llvm][DebugInfo] Bump DWARFListTable maximum DWARF version (#183859)   via llvm-commits
• [llvm] 9b1f784 - [ARM][MVE] Add SLI and SRI recognition. (#183471)   via llvm-commits
• [llvm] 3403aac - [CMake][LLVM] Disable PCH on Clang for file with custom flags too (#183813)   via llvm-commits
• [llvm] b2c92bc - [llvm-mc][dwarf] Bump supported version to DWARF 6 (#183779)   via llvm-commits
• [llvm] [llvm][DebugInfo] Emit DW_LNAME_Assembly for DWARFv6 assembly CUs (PR #183897)   via llvm-commits
• [llvm] 2456214 - Restore #125407, Make covmap tolerant of nested Decisions (#183073)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   via llvm-commits
• [llvm] [llvm][DebugInfo] Emit DW_LNAME_Assembly for DWARFv6 assembly CUs (PR #183897)   via llvm-commits
• [llvm] [llvm][DebugInfo] Emit DW_LNAME_Assembly for DWARFv6 assembly CUs (PR #183897)   via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   via llvm-commits
• [llvm] [NVPTX] Support lowering of `(l)lround` (PR #183901)   via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   via llvm-commits
• [llvm] [AMDGPU] Fix to handle inline ASM SGPR constraints (PR #183663)   via llvm-commits
• [llvm] [AMDGPU] LIT tests for incorrect VGPR to SGPR copy removal (PR #183668)   via llvm-commits
• [llvm] [AMDGPU] LIT tests for incorrect VGPR to SGPR copy removal (PR #183668)   via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   via llvm-commits
• [llvm] [VPlan] Optimize FindLast of binary op of an induction. (PR #183911)   via llvm-commits
• [llvm] [VPlan] Optimize FindLast of binary op of an induction. (PR #183911)   via llvm-commits
• [llvm] 2f7c947 - Precommit tests: strictfp rounding vector f16 intrinsics (#183699)   via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   via llvm-commits
• [llvm] 2342db0 - [CMake] Use keyword signature in two additional callsites (#183889)   via llvm-commits
• [lld] [llvm] [CMake] Use keyword signature in two additional callsites (PR #183889)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [llvm] [BOLT] Enable compatibility of instrumentation-file-append-pid with instrumentation-sleep-time (PR #183919)   via llvm-commits
• [llvm] d5a8f1e - [X86] known-pow2.ll - add tests showing failure to handle ISD::EXTRACT_VECTOR_ELT nodes (#183918)   via llvm-commits
• [llvm] 7585ab0 - [AMDGPU] Enable shift64 hazard recognition for gfx9 (#183839)   via llvm-commits
• [llvm] [AMDGPU] Enable shift64 hazard recognition for gfx9 (PR #183839)   via llvm-commits
• [llvm] [DAG] isKnownToBeAPowerOfTwo - add ISD::EXTRACT_VECTOR_ELT handling (PR #183924)   via llvm-commits
• [clang] [llvm] [mlir] users/shiltian/valueless uniform work group size (PR #183925)   via llvm-commits
• [clang] [llvm] [mlir] users/shiltian/valueless uniform work group size (PR #183925)   via llvm-commits
• [llvm] a6ceae4 - [AMDGPU] Assert non-array alloca does have a size (#183834)   via llvm-commits
• [llvm] 4a93b9a - [ARM] Lower strictfp vector fp16 rounding operations similar to default mode (#183700)   via llvm-commits
• [llvm] 2430410 - [lldb][Process/FreeBSDKernelCore] Add ppc64le support (#180669)   via llvm-commits
• [llvm] [RISCV] Extends RISCVMoveMerger to merge GPRPairs independent of even/odd pair instruction order. (PR #183657)   via llvm-commits
• [clang] [llvm] [Clang][CodeGen] Add -gbtf: target-independent BTF emission for ELF targets (PR #183929)   via llvm-commits
• [clang] [llvm] [Clang][CodeGen] Add -gbtf: target-independent BTF emission for ELF targets (PR #183929)   via llvm-commits
• [clang] [llvm] [Clang][CodeGen] Add -gbtf: target-independent BTF emission for ELF targets (PR #183929)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [AMDGPU] Add early LDS resource check before register allocation (PR #183888)   via llvm-commits
• [llvm] [X86] Emit user-friendly error for x86_fp80 with x87 disabled on x86_64 (PR #183932)   via llvm-commits
• [llvm] [X86] Emit user-friendly error for x86_fp80 with x87 disabled on x86_64 (PR #183932)   via llvm-commits
• [llvm] [X86] Emit user-friendly error for x86_fp80 with x87 disabled on x86_64 (PR #183932)   via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   via llvm-commits
• [llvm] 4d724c0 - [X86] known-never-zero.ll - add tests showing failure to handle ISD::EXTRACT_VECTOR_ELT nodes (#183934)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [llvm] [LoopAccessAnalysis] Fix type mismatch (PR #183116)   via llvm-commits
• [lld] [lld][Hexagon] Fix findMaskR8 missing duplex support (PR #183936)   via llvm-commits
• [lld] [lld][Hexagon] Fix findMaskR8 missing duplex support (PR #183936)   via llvm-commits
• [lld] [lld][Hexagon] Fix findMaskR8 missing duplex support (PR #183936)   via llvm-commits
• [llvm] 3e05ab6 - [ThinLTO] Reduce the number of renaming due to promotions (#183793)   via llvm-commits
• [clang] [lld] [llvm] [ThinLTO] Reduce the number of renaming due to promotions (PR #183793)   via llvm-commits
• [llvm] 4a602c0 - [lldb][Process/FreeBSDKernelCore] Add riscv64 support (#180670)   via llvm-commits
• [llvm] [Hexagon] Add coverage tests for CodeGen passes (PR #183951)   via llvm-commits
• [llvm] [Hexagon] Add coverage tests for CodeGen analysis and optimization passes (PR #183952)   via llvm-commits
• [llvm] [Hexagon] Add coverage tests for AsmPrinter and misc CodeGen (PR #183953)   via llvm-commits
• [llvm] [Hexagon] Add MC parser and AsmBackend coverage tests (PR #183954)   via llvm-commits
• [llvm] [Hexagon] Add MC checker and relocation coverage tests (PR #183955)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::ADD/SUB DemandedElts handling and tests (PR #183958)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::EXTRACT_VECTOR_ELT handling (PR #183961)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   via llvm-commits
• [compiler-rt] [ASan] Fix overflow and last byte handling in __asan_region_is_poisoned (PR #183900)   via llvm-commits
• [llvm] b72d8ac - [DAG] isKnownNeverZero - add ISD::EXTRACT_VECTOR_ELT handling (#183961)   via llvm-commits
• [llvm] 910988b - [AMDGPU] Stop treating AMDGPU_CS_ChainPreserve as a module entry funtion (#183718)   via llvm-commits
• [llvm] [PowerPC] Fix inefficient code for __builtin_ppc_test_data_class (PR #181420)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for memccpy instead of lib call (PR #182563)   zhijian lin via llvm-commits
• [llvm] [NFC][POWER] add Pre-Commit test case for Inefficient std::bit_floor(x) (PR #183363)   zhijian lin via llvm-commits
• [llvm] [NFC][POWER] add Pre-Commit test case for Inefficient std::bit_floor(x) (PR #183363)   zhijian lin via llvm-commits
• [llvm] [NFC][POWER] add Pre-Commit test case for Inefficient std::bit_floor(x) (PR #183363)   zhijian lin via llvm-commits