[llvm-branch-commits] [llvm-branch] r370076 - ReleaseNotes: RISCV

Hans Wennborg via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Tue Aug 27 09:26:35 PDT 2019


Author: hans
Date: Tue Aug 27 09:26:35 2019
New Revision: 370076

URL: http://llvm.org/viewvc/llvm-project?rev=370076&view=rev
Log:
ReleaseNotes: RISCV

By Alex Bradbury!

Modified:
    llvm/branches/release_90/docs/ReleaseNotes.rst

Modified: llvm/branches/release_90/docs/ReleaseNotes.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/docs/ReleaseNotes.rst?rev=370076&r1=370075&r2=370076&view=diff
==============================================================================
--- llvm/branches/release_90/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_90/docs/ReleaseNotes.rst Tue Aug 27 09:26:35 2019
@@ -55,6 +55,8 @@ Non-comprehensive list of changes in thi
 * The CMake parameter ``CLANG_ANALYZER_ENABLE_Z3_SOLVER`` has been replaced by
   ``LLVM_ENABLE_Z3_SOLVER``.
 
+* The RISCV target is no longer "experimental" (see below for more details).
+
 
 .. NOTE
    If you would like to document a larger change, then you can add a
@@ -216,6 +218,18 @@ Changes to the WebAssembly Target
 
  During this release ...
 
+Changes to the RISCV Target
+---------------------------------
+
+The RISCV target is no longer "experimental"! It's now built by default,
+rather than needing to be enabled with ``LLVM_EXPERIMENTAL_TARGETS_TO_BUILD``.
+
+The backend has full codegen support for the RV32I and RV64I base RISC-V
+instruction set variants, with the MAFDC standard extensions. We support the
+hard and soft-float ABIs for these targets. Testing has been performed with
+both Linux and bare-metal targets, including the compilation of a large corpus
+of Linux applications (through buildroot).
+
 
 Changes to the OCaml bindings
 -----------------------------




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