[llvm-branch-commits] [llvm-branch] r370065 - ReleaseNotes: PowerPC

[Hans Wennborg via llvm-branch-commits]

Author: hans
Date: Tue Aug 27 07:36:51 2019
New Revision: 370065

URL: http://llvm.org/viewvc/llvm-project?rev=370065&view=rev
Log:
ReleaseNotes: PowerPC

By Lei Huang!

Modified:
    llvm/branches/release_90/docs/ReleaseNotes.rst

Modified: llvm/branches/release_90/docs/ReleaseNotes.rst
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/docs/ReleaseNotes.rst?rev=370065&r1=370064&r2=370065&view=diff
==============================================================================
--- llvm/branches/release_90/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_90/docs/ReleaseNotes.rst Tue Aug 27 07:36:51 2019
@@ -144,7 +144,30 @@ Changes to the MIPS Target
 Changes to the PowerPC Target
 -----------------------------
 
- During this release ...
+* Improved handling of TOC pointer spills for indirect calls
+
+* Improve precision of square root reciprocal estimate
+
+* Enabled MachinePipeliner support for P9 with -ppc-enable-pipeliner.
+
+* MMX/SSE/SSE2 intrinsics headers have been ported to PowerPC using Altivec.
+
+* Machine verification failures cleaned, EXPENSIVE_CHECKS will run
+  MachineVerification by default now.
+
+* PowerPC scheduling enhancements, with customized PPC specific scheduler
+  strategy.
+
+* Inner most loop now always align to 32 bytes.
+
+* Enhancements of hardware loops interaction with LSR.
+
+* New builtins added, eg: __builtin_setrnd.
+
+* Various codegen improvements for both scalar and vector code
+
+* Various new exploitations and bug fixes, eg: exploited P9 maddld.
+
 
 Changes to the SystemZ Target
 -----------------------------