[llvm] [AArch64][SelectionDAG] Lower multiplication by a constant to shl+add+shl+add (PR #89532)

[Eli Friedman via llvm-commits]

https://github.com/efriedma-quic approved this pull request.

LGTM

In terms of general cost modeling, these are clearly equivalent to existing patterns: two cheap ALU ops.  If we wanted to disable all 2-instruction patterns for some targets, we could maybe consider that, but it would be a different discussion.

https://github.com/llvm/llvm-project/pull/89532