[PATCH] D120287: [RISCV] Add isel patterns for masked RISCVISD::FMA_VL with RISCVISD::FNEG_VL.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll:1168
+
+declare <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half>, <vscale x 1 x i1>, i32)
+
----------------
liaolucy wrote:
> I see a lot of VP intrinsic added, but I'm a little confused about how to use these intrinsics. 
> 
> I would hazard a guess that the next step is to construct the [[ https://www.llvm.org/docs/Proposals/VectorPredication.html#id5 | IR-level VP intrinsic]]?  Is there an initial patch or discussion?
> I see a lot of VP intrinsic added, but I'm a little confused about how to use these intrinsics. 
> 
> I would hazard a guess that the next step is to construct the [[ https://www.llvm.org/docs/Proposals/VectorPredication.html#id5 | IR-level VP intrinsic]]?  Is there an initial patch or discussion?

https://lists.llvm.org/pipermail/llvm-dev/2019-January/129791.html

https://reviews.llvm.org/D104608 <- first patch for loop vectorizer should be other patches as children



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  https://reviews.llvm.org/D120287/new/

https://reviews.llvm.org/D120287