[PATCH] D120287: [RISCV] Add isel patterns for masked RISCVISD::FMA_VL with RISCVISD::FNEG_VL.

Liao Chunyu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 23 17:41:15 PST 2022


liaolucy added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll:1168
+
+declare <vscale x 1 x half> @llvm.vp.fneg.nxv1f16(<vscale x 1 x half>, <vscale x 1 x i1>, i32)
+
----------------
I see a lot of VP intrinsic added, but I'm a little confused about how to use these intrinsics. 

I would hazard a guess that the next step is to construct the [[ https://www.llvm.org/docs/Proposals/VectorPredication.html#id5 | IR-level VP intrinsic]]?  Is there an initial patch or discussion?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D120287/new/

https://reviews.llvm.org/D120287



More information about the llvm-commits mailing list