[PATCH] ARM FastISel fix load register classes

[Renato Golin]

Hi JF,

It looks ok. Even though some of these operations do allow the use of PC, I
guess on that context, it shouldn't. Is that correct?

Can you add a simple test that should expose this bug?

cheers,
--renato


On 8 June 2013 20:23, JF Bastien <jfb at google.com> wrote:

> The register classes when emitting loads weren't quite restricting enough,
> leading to MI verification failure on the result register.
>
> These are new failures that weren't there the first time I tried enabling
> ARM FastISel for new targets.
>
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