[llvm-branch-commits] [llvm] [SelectionDAG] Handle constants in SimplifyMultipleUseDemandedBits (PR #224882)

[Harrison Hao via llvm-branch-commits]

================
@@ -766,6 +766,12 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
   unsigned BitWidth = DemandedBits.getBitWidth();
   KnownBits LHSKnown, RHSKnown;
   switch (Op.getOpcode()) {
+  case ISD::Constant: {
+    const APInt &Value = Op->getAsAPIntVal();
+    if (!Value.isZero() && (Value & DemandedBits).isZero())
----------------
harrisonGPU wrote:

I tried the following:
```cpp
if (!Value.isSubsetOf(DemandedBits))
  return DAG.getConstant(Value & DemandedBits, SDLoc(Op), VT);
```
However, I found some AMDGPU tests regressions. For example, this changes:
```asm
v_mul_i32_i24_e32 v0, -5, v0
```
into:
```asm
v_mul_i32_i24_e32 v0, 0xfffffb, v0
```
These values are equivalent for a signed 24 bit multiplication. However, AMDGPU supports only certain integer values as inline immediates. `-5` is an inline immediate, whereas `0xfffffb` requires a literal constant, resulting in a larger instruction encoding.

I also found that this change causes infinite loops on some targets, such as RISC-V, but I have not yet determined the cause.

https://github.com/llvm/llvm-project/pull/224882