[llvm-branch-commits] [llvm] [SelectionDAG] Handle constants in SimplifyMultipleUseDemandedBits (PR #224882)
Harrison Hao via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sun Sep 20 19:22:17 PDT 2026
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@@ -766,6 +766,12 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
unsigned BitWidth = DemandedBits.getBitWidth();
KnownBits LHSKnown, RHSKnown;
switch (Op.getOpcode()) {
+ case ISD::Constant: {
+ const APInt &Value = Op->getAsAPIntVal();
+ if (!Value.isZero() && (Value & DemandedBits).isZero())
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harrisonGPU wrote:
> Value.isSubsetOf(DemandedBits)? I think that's what the IR version does
In my options,we don't handle this optimization in the same way as the IR version, because the IR version does not need to account for inline immediate values. Implementing it the same way would require more registers in AMDGPU.
https://github.com/llvm/llvm-project/pull/224882
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